From 629a46ef9253ced4d71befd9e22f917f0833f048 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Tue, 9 Jul 2024 17:21:08 +0200 Subject: [PATCH] soc_linux/make.py: Remove Xilinx specific code since not tested and status is unknown. Let's keep the repo more generic. --- make.py | 22 ------------------- soc_linux.py | 61 +--------------------------------------------------- 2 files changed, 1 insertion(+), 82 deletions(-) diff --git a/make.py b/make.py index 2513676e..d0d21aea 100755 --- a/make.py +++ b/make.py @@ -88,11 +88,6 @@ def __init__(self): # Buses "spi", "i2c", - # Monitoring - "xadc", - # 7-Series specific - "mmcm", - "icap_bitstream", }) class ArtyA7(Arty): pass @@ -112,11 +107,6 @@ def __init__(self): # Buses "spi", "i2c", - # Monitoring - "xadc", - # 7-Series specific - "mmcm", - "icap_bitstream", }) # NeTV2 support ------------------------------------------------------------------------------------ @@ -134,8 +124,6 @@ def __init__(self): "leds", # Video "framebuffer", - # Monitoring - "xadc", }) # Genesys2 support --------------------------------------------------------------------------------- @@ -165,8 +153,6 @@ def __init__(self): #"sata", # GPIOs "leds", - # Monitoring - "xadc", }) # VC707 support --------------------------------------------------------------------------------- @@ -182,8 +168,6 @@ def __init__(self): "sdcard", # GPIOs "leds", - # Monitoring - "xadc", }) # KCU105 support ----------------------------------------------------------------------------------- @@ -938,8 +922,6 @@ def main(): from litex_boards.platforms.gsd_orangecrab import feather_i2c board.platform.add_extension(feather_i2c) - if "mmcm" in board.soc_capabilities: - soc.add_mmcm(2) if "spisdcard" in board.soc_capabilities: soc.add_spi_sdcard() if "sdcard" in board.soc_capabilities: @@ -956,10 +938,6 @@ def main(): soc.add_spi(args.spi_data_width, args.spi_clk_freq) if "i2c" in board.soc_capabilities: soc.add_i2c() - if "xadc" in board.soc_capabilities: - soc.add_xadc() - if "icap_bitstream" in board.soc_capabilities: - soc.add_icap_bitstream() # Build ------------------------------------------------------------------------------------ build_dir = os.path.join("build", board_name) diff --git a/soc_linux.py b/soc_linux.py index 2c086eaa..4d9ab0b9 100644 --- a/soc_linux.py +++ b/soc_linux.py @@ -17,10 +17,7 @@ from litex.soc.cores.gpio import GPIOOut, GPIOIn from litex.soc.cores.spi import SPIMaster from litex.soc.cores.bitbang import I2CMaster -from litex.soc.cores.xadc import XADC from litex.soc.cores.pwm import PWM -from litex.soc.cores.icap import ICAPBitstream -from litex.soc.cores.clock import S7MMCM from litex.tools.litex_json2dts_linux import generate_dts @@ -39,7 +36,7 @@ def __init__(self, **kwargs): def add_rgb_led(self): rgb_led_pads = self.platform.request("rgb_led", 0) for n in "rgb": - self.add_module(name=f"rgb_led_{n}0", PWM(getattr(rgb_led_pads, n))) + self.add_module(name=f"rgb_led_{n}0", module=PWM(getattr(rgb_led_pads, n))) # Switches --------------------------------------------------------------------------------- @@ -58,62 +55,6 @@ def add_spi(self, data_width, clk_freq): def add_i2c(self): self.i2c0 = I2CMaster(self.platform.request("i2c", 0)) - # XADC (Xilinx only) ----------------------------------------------------------------------- - - def add_xadc(self): - self.xadc = XADC() - - # ICAP Bitstream (Xilinx only) ------------------------------------------------------------- - - def add_icap_bitstream(self): - self.icap_bit = ICAPBitstream(); - - # MMCM (Xilinx only) ----------------------------------------------------------------------- - - def add_mmcm(self, nclkout): - if (nclkout > 7): - raise ValueError("nclkout cannot be above 7!") - - self.cd_mmcm_clkout = [] - self.mmcm = S7MMCM(speedgrade=-1) - self.mmcm.register_clkin(self.crg.cd_sys.clk, self.clk_freq) - - for n in range(nclkout): - self.cd_mmcm_clkout += [ClockDomain(name="cd_mmcm_clkout{}".format(n))] - self.mmcm.create_clkout(self.cd_mmcm_clkout[n], self.clk_freq) - self.mmcm.clock_domains.cd_mmcm_clkout = self.cd_mmcm_clkout - - self.add_constant("clkout_def_freq", int(self.clk_freq)) - self.add_constant("clkout_def_phase", int(0)) - self.add_constant("clkout_def_duty_num", int(50)) - self.add_constant("clkout_def_duty_den", int(100)) - # We need to write exponent of clkout_margin to allow the driver for smaller inaccuracy - from math import log10 - exp = log10(self.mmcm.clkouts[0][3]) - if exp < 0: - self.add_constant("clkout_margin_exp", int(abs(exp))) - self.add_constant("clkout_margin", int(self.mmcm.clkouts[0][3] * 10 ** abs(exp))) - else: - self.add_constant("clkout_margin", int(self.mmcm.clkouts[0][3])) - self.add_constant("clkout_margin_exp", int(0)) - - self.add_constant("nclkout", int(nclkout)) - self.add_constant("mmcm_lock_timeout", int(10)) - self.add_constant("mmcm_drdy_timeout", int(10)) - self.add_constant("vco_margin", int(self.mmcm.vco_margin)) - self.add_constant("vco_freq_range_min", int(self.mmcm.vco_freq_range[0])) - self.add_constant("vco_freq_range_max", int(self.mmcm.vco_freq_range[1])) - self.add_constant("clkfbout_mult_frange_min", int(self.mmcm.clkfbout_mult_frange[0])) - self.add_constant("clkfbout_mult_frange_max", int(self.mmcm.clkfbout_mult_frange[1])) - self.add_constant("divclk_divide_range_min", int(self.mmcm.divclk_divide_range[0])) - self.add_constant("divclk_divide_range_max", int(self.mmcm.divclk_divide_range[1])) - self.add_constant("clkout_divide_range_min", int(self.mmcm.clkout_divide_range[0])) - self.add_constant("clkout_divide_range_max", int(self.mmcm.clkout_divide_range[1])) - - self.mmcm.expose_drp() - - self.comb += self.mmcm.reset.eq(self.mmcm.drp_reset.re) - # Ethernet configuration ------------------------------------------------------------------- def configure_ethernet(self, remote_ip):