From 3aed38cf52e72cb51a907fad9dd53802f6505b81 Mon Sep 17 00:00:00 2001 From: Bruno Cardoso Lopes Date: Thu, 14 Nov 2024 23:12:04 -0800 Subject: [PATCH] [CIR][CIRGen] Teach all uses of ApplyNonVirtualAndVirtualOffset to use BaseClassAddrOp --- clang/lib/CIR/CodeGen/CIRGenClass.cpp | 26 ++++++++++++------------- clang/test/CIR/CodeGen/multi-vtable.cpp | 9 +++------ clang/test/CIR/CodeGen/vtt.cpp | 14 ++++--------- 3 files changed, 20 insertions(+), 29 deletions(-) diff --git a/clang/lib/CIR/CodeGen/CIRGenClass.cpp b/clang/lib/CIR/CodeGen/CIRGenClass.cpp index b8b520e0d235..8a20664fd2a8 100644 --- a/clang/lib/CIR/CodeGen/CIRGenClass.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenClass.cpp @@ -662,21 +662,19 @@ static Address ApplyNonVirtualAndVirtualOffset( // Compute the offset from the static and dynamic components. mlir::Value baseOffset; if (!nonVirtualOffset.isZero()) { - mlir::Type OffsetType = - (CGF.CGM.getTarget().getCXXABI().isItaniumFamily() && - CGF.CGM.getItaniumVTableContext().isRelativeLayout()) - ? CGF.SInt32Ty - : CGF.PtrDiffTy; - baseOffset = CGF.getBuilder().getConstInt(loc, OffsetType, - nonVirtualOffset.getQuantity()); if (virtualOffset) { + mlir::Type OffsetType = + (CGF.CGM.getTarget().getCXXABI().isItaniumFamily() && + CGF.CGM.getItaniumVTableContext().isRelativeLayout()) + ? CGF.SInt32Ty + : CGF.PtrDiffTy; + baseOffset = CGF.getBuilder().getConstInt(loc, OffsetType, + nonVirtualOffset.getQuantity()); baseOffset = CGF.getBuilder().createBinop( virtualOffset, cir::BinOpKind::Add, baseOffset); - } else if (baseValueTy) { - // TODO(cir): this should be used as a firt class in this function for the - // nonVirtualOffset cases, but all users of this function need to be - // updated first. - baseOffset.getDefiningOp()->erase(); + } else { + assert(baseValueTy && "expected base type"); + // If no virtualOffset is present this is the final stop. return CGF.getBuilder().createBaseClassAddr( loc, addr, baseValueTy, nonVirtualOffset.getQuantity(), assumeNotNull); @@ -725,6 +723,7 @@ void CIRGenFunction::initializeVTablePointer(mlir::Location loc, mlir::Value VirtualOffset{}; CharUnits NonVirtualOffset = CharUnits::Zero(); + mlir::Type BaseValueTy; if (CGM.getCXXABI().isVirtualOffsetNeededForVTableField(*this, Vptr)) { // We need to use the virtual base offset offset because the virtual base // might have a different offset in the most derived class. @@ -734,6 +733,7 @@ void CIRGenFunction::initializeVTablePointer(mlir::Location loc, } else { // We can just use the base offset in the complete class. NonVirtualOffset = Vptr.Base.getBaseOffset(); + BaseValueTy = convertType(getContext().getTagDeclType(Vptr.Base.getBase())); } // Apply the offsets. @@ -741,7 +741,7 @@ void CIRGenFunction::initializeVTablePointer(mlir::Location loc, if (!NonVirtualOffset.isZero() || VirtualOffset) { VTableField = ApplyNonVirtualAndVirtualOffset( loc, *this, VTableField, NonVirtualOffset, VirtualOffset, - Vptr.VTableClass, Vptr.NearestVBase); + Vptr.VTableClass, Vptr.NearestVBase, BaseValueTy); } // Finally, store the address point. Use the same CIR types as the field. diff --git a/clang/test/CIR/CodeGen/multi-vtable.cpp b/clang/test/CIR/CodeGen/multi-vtable.cpp index a00e29f45109..b887e78c8239 100644 --- a/clang/test/CIR/CodeGen/multi-vtable.cpp +++ b/clang/test/CIR/CodeGen/multi-vtable.cpp @@ -55,11 +55,8 @@ int main() { // CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr>>> // CIR: cir.store %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr>>, !cir.ptr>>> // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, vtable_index = 1, address_point_index = 2) : !cir.ptr>> -// CIR: %{{[0-9]+}} = cir.const #cir.int<8> : !s64i -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr -// CIR: %{{[0-9]+}} = cir.ptr_stride(%{{[0-9]+}} : !cir.ptr, %{{[0-9]+}} : !s64i), !cir.ptr -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr>>> +// CIR: %7 = cir.base_class_addr(%1 : !cir.ptr nonnull) [8] -> !cir.ptr +// CIR: %8 = cir.cast(bitcast, %7 : !cir.ptr), !cir.ptr>>> loc(#loc8) // CIR: cir.store %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr>>, !cir.ptr>>> // CIR: cir.return // CIR: } @@ -70,7 +67,7 @@ int main() { // LLVM-DAG: define linkonce_odr void @_ZN5ChildC2Ev(ptr %0) // LLVM-DAG: store ptr getelementptr inbounds ({ [4 x ptr], [3 x ptr] }, ptr @_ZTV5Child, i32 0, i32 0, i32 2), ptr %{{[0-9]+}}, align 8 -// LLVM-DAG: %{{[0-9]+}} = getelementptr i8, ptr %3, i64 8 +// LLVM-DAG: %{{[0-9]+}} = getelementptr i8, ptr {{.*}}, i32 8 // LLVM-DAG: store ptr getelementptr inbounds ({ [4 x ptr], [3 x ptr] }, ptr @_ZTV5Child, i32 0, i32 1, i32 2), ptr %{{[0-9]+}}, align 8 // LLVM-DAG: ret void // } diff --git a/clang/test/CIR/CodeGen/vtt.cpp b/clang/test/CIR/CodeGen/vtt.cpp index 16203276c544..ab8cc999f856 100644 --- a/clang/test/CIR/CodeGen/vtt.cpp +++ b/clang/test/CIR/CodeGen/vtt.cpp @@ -120,19 +120,13 @@ int f() { // CIR: cir.store %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr>>, !cir.ptr>>> // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, vtable_index = 2, address_point_index = 3) : !cir.ptr>> -// CIR: %{{[0-9]+}} = cir.const #cir.int<40> : !s64i -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr -// CIR: %{{[0-9]+}} = cir.ptr_stride(%{{[0-9]+}} : !cir.ptr, %{{[0-9]+}} : !s64i), !cir.ptr -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr>>> +// CIR: %{{[0-9]+}} = cir.base_class_addr(%{{[0-9]+}} : !cir.ptr nonnull) [40] -> !cir.ptr +// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr>>> // CIR: cir.store %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr>>, !cir.ptr>>> // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, vtable_index = 1, address_point_index = 3) : !cir.ptr>> -// CIR: %{{[0-9]+}} = cir.const #cir.int<16> : !s64i -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr -// CIR: %{{[0-9]+}} = cir.ptr_stride(%{{[0-9]+}} : !cir.ptr, %{{[0-9]+}} : !s64i), !cir.ptr -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr>>> +// CIR: cir.base_class_addr(%{{[0-9]+}} : !cir.ptr nonnull) [16] -> !cir.ptr +// CIR: cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr>>> // CIR: cir.store %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr>>, !cir.ptr>>> // CIR: cir.return // CIR: }