From 9322a0c2f34a7c9f0d40e4f6c5d162d0fc06bd6c Mon Sep 17 00:00:00 2001 From: Paul Walker Date: Wed, 18 Oct 2023 10:44:25 +0000 Subject: [PATCH] [Clang] Run update_cc_test_checks across SVE acle tests. --- .../aarch64-sme-intrinsics/acle_sme_add-i32.c | 179 +- .../aarch64-sme-intrinsics/acle_sme_add-i64.c | 179 +- .../aarch64-sme-intrinsics/acle_sme_cnt.c | 67 +- .../aarch64-sme-intrinsics/acle_sme_ld1.c | 241 ++- .../acle_sme_ld1_vnum.c | 331 ++- .../aarch64-sme-intrinsics/acle_sme_ldr.c | 94 +- .../acle_sme_mopa-za32.c | 133 +- .../acle_sme_mopa-za64.c | 113 +- .../acle_sme_mops-za32.c | 133 +- .../acle_sme_mops-za64.c | 113 +- .../aarch64-sme-intrinsics/acle_sme_read.c | 1851 +++++++++++------ .../aarch64-sme-intrinsics/acle_sme_st1.c | 241 ++- .../acle_sme_st1_vnum.c | 331 ++- .../aarch64-sme-intrinsics/acle_sme_str.c | 94 +- .../aarch64-sme-intrinsics/acle_sme_write.c | 1851 +++++++++++------ .../aarch64-sme-intrinsics/acle_sme_zero.c | 67 +- .../acle_sve_ld1-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_ld1.c | 256 +-- .../aarch64-sve-intrinsics/acle_sve_ld1sb.c | 112 +- .../aarch64-sve-intrinsics/acle_sve_ld1sh.c | 144 +- .../aarch64-sve-intrinsics/acle_sve_ld1sw.c | 72 +- .../aarch64-sve-intrinsics/acle_sve_ld1ub.c | 112 +- .../aarch64-sve-intrinsics/acle_sve_ld1uh.c | 144 +- .../aarch64-sve-intrinsics/acle_sve_ld1uw.c | 72 +- .../acle_sve_ld2-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_ld2.c | 88 +- .../acle_sve_ld3-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_ld3.c | 88 +- .../acle_sve_ld4-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_ld4.c | 88 +- .../acle_sve_ldff1-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_ldff1.c | 256 +-- .../aarch64-sve-intrinsics/acle_sve_ldff1sb.c | 112 +- .../aarch64-sve-intrinsics/acle_sve_ldff1sh.c | 144 +- .../aarch64-sve-intrinsics/acle_sve_ldff1sw.c | 72 +- .../aarch64-sve-intrinsics/acle_sve_ldff1ub.c | 112 +- .../aarch64-sve-intrinsics/acle_sve_ldff1uh.c | 144 +- .../aarch64-sve-intrinsics/acle_sve_ldff1uw.c | 72 +- .../acle_sve_ldnf1-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1.c | 88 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1sb.c | 48 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1sh.c | 32 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1sw.c | 16 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1ub.c | 48 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1uh.c | 32 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1uw.c | 16 +- .../acle_sve_ldnt1-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_ldnt1.c | 88 +- .../aarch64-sve-intrinsics/acle_sve_prfb.c | 84 +- .../aarch64-sve-intrinsics/acle_sve_prfd.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_prfh.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_prfw.c | 8 +- .../acle_sve_reinterpret.c | 2 +- .../aarch64-sve-intrinsics/acle_sve_setffr.c | 4 +- .../acle_sve_st1-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_st1.c | 256 +-- .../aarch64-sve-intrinsics/acle_sve_st1b.c | 56 +- .../aarch64-sve-intrinsics/acle_sve_st1h.c | 72 +- .../aarch64-sve-intrinsics/acle_sve_st1w.c | 36 +- .../acle_sve_st2-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_st2.c | 88 +- .../acle_sve_st3-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_st3.c | 88 +- .../acle_sve_st4-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_st4.c | 88 +- .../acle_sve_stnt1-bfloat.c | 8 +- .../aarch64-sve-intrinsics/acle_sve_stnt1.c | 88 +- .../aarch64-sve-intrinsics/acle_sve_wrffr.c | 4 +- 68 files changed, 5845 insertions(+), 3615 deletions(-) diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c index b0855553df79f6..1b181bd59e7c84 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,98 +14,164 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svaddha_za32_u32( -// CHECK-CXX-LABEL: @_Z21test_svaddha_za32_u32u10__SVBool_tu10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za32_u32( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za32_u32u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) { SME_ACLE_FUNC(svaddha_za32, _u32, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddha_za32_u32_1( -// CHECK-CXX-LABEL: @_Z23test_svaddha_za32_u32_1u10__SVBool_tu10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za32_u32_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za32_u32_1u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) { SME_ACLE_FUNC(svaddha_za32, _u32, _m)(3, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddha_za32_s32( -// CHECK-CXX-LABEL: @_Z21test_svaddha_za32_s32u10__SVBool_tu10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za32_s32( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za32_s32u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) { SME_ACLE_FUNC(svaddha_za32, _s32, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddha_za32_s32_1( -// CHECK-CXX-LABEL: @_Z23test_svaddha_za32_s32_1u10__SVBool_tu10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za32_s32_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za32_s32_1u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) { SME_ACLE_FUNC(svaddha_za32, _s32, _m)(3, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za32_u32( -// CHECK-CXX-LABEL: @_Z21test_svaddva_za32_u32u10__SVBool_tu10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za32_u32( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za32_u32u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za32_u32(svbool_t pn, svbool_t pm, svuint32_t zn) { SME_ACLE_FUNC(svaddva_za32, _u32, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za32_u32_1( -// CHECK-CXX-LABEL: @_Z23test_svaddva_za32_u32_1u10__SVBool_tu10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za32_u32_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za32_u32_1u10__SVBool_tu10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za32_u32_1(svbool_t pn, svbool_t pm, svuint32_t zn) { SME_ACLE_FUNC(svaddva_za32, _u32, _m)(3, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za32_s32( -// CHECK-CXX-LABEL: @_Z21test_svaddva_za32_s32u10__SVBool_tu10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za32_s32( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za32_s32u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za32_s32(svbool_t pn, svbool_t pm, svint32_t zn) { SME_ACLE_FUNC(svaddva_za32, _s32, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za32_s32_1( -// CHECK-CXX-LABEL: @_Z23test_svaddva_za32_s32_1u10__SVBool_tu10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za32_s32_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za32_s32_1u10__SVBool_tu10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za32_s32_1(svbool_t pn, svbool_t pm, svint32_t zn) { SME_ACLE_FUNC(svaddva_za32, _s32, _m)(3, pn, pm, zn); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c index 2f0f97e742e3e1..fdccafbebf006b 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme-i16i64 -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme-i16i64 -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,98 +14,164 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svaddha_za64_u64( -// CHECK-CXX-LABEL: @_Z21test_svaddha_za64_u64u10__SVBool_tu10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za64_u64( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za64_u64u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) { SME_ACLE_FUNC(svaddha_za64, _u64, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddha_za64_u64_1( -// CHECK-CXX-LABEL: @_Z23test_svaddha_za64_u64_1u10__SVBool_tu10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za64_u64_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za64_u64_1u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) { SME_ACLE_FUNC(svaddha_za64, _u64, _m)(7, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddha_za64_s64( -// CHECK-CXX-LABEL: @_Z21test_svaddha_za64_s64u10__SVBool_tu10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za64_s64( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddha_za64_s64u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) { SME_ACLE_FUNC(svaddha_za64, _s64, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddha_za64_s64_1( -// CHECK-CXX-LABEL: @_Z23test_svaddha_za64_s64_1u10__SVBool_tu10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddha_za64_s64_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddha_za64_s64_1u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addha.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddha_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) { SME_ACLE_FUNC(svaddha_za64, _s64, _m)(7, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za64_u64( -// CHECK-CXX-LABEL: @_Z21test_svaddva_za64_u64u10__SVBool_tu10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za64_u64( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za64_u64u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za64_u64(svbool_t pn, svbool_t pm, svuint64_t zn) { SME_ACLE_FUNC(svaddva_za64, _u64, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za64_u64_1( -// CHECK-CXX-LABEL: @_Z23test_svaddva_za64_u64_1u10__SVBool_tu10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za64_u64_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za64_u64_1u10__SVBool_tu10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za64_u64_1(svbool_t pn, svbool_t pm, svuint64_t zn) { SME_ACLE_FUNC(svaddva_za64, _u64, _m)(7, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za64_s64( -// CHECK-CXX-LABEL: @_Z21test_svaddva_za64_s64u10__SVBool_tu10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za64_s64( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svaddva_za64_s64u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 0, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za64_s64(svbool_t pn, svbool_t pm, svint64_t zn) { SME_ACLE_FUNC(svaddva_za64, _s64, _m)(0, pn, pm, zn); } -// CHECK-C-LABEL: @test_svaddva_za64_s64_1( -// CHECK-CXX-LABEL: @_Z23test_svaddva_za64_s64_1u10__SVBool_tu10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svaddva_za64_s64_1( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svaddva_za64_s64_1u10__SVBool_tu10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, [[TMP0]], [[TMP1]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svaddva_za64_s64_1(svbool_t pn, svbool_t pm, svint64_t zn) { SME_ACLE_FUNC(svaddva_za64, _s64, _m)(7, pn, pm, zn); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c index b3b2499a383033..09b183dac3e261 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -5,42 +6,68 @@ #include -// CHECK-C-LABEL: @test_svcntsb( -// CHECK-CXX-LABEL: @_Z12test_svcntsbv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: ret i64 [[TMP0]] +// CHECK-C-LABEL: define dso_local i64 @test_svcntsb( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: ret i64 [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntsbv( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntsb() { return svcntsb(); } -// CHECK-C-LABEL: @test_svcntsh( -// CHECK-CXX-LABEL: @_Z12test_svcntshv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh() -// CHECK-NEXT: ret i64 [[TMP0]] +// CHECK-C-LABEL: define dso_local i64 @test_svcntsh( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh() +// CHECK-C-NEXT: ret i64 [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntshv( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh() +// CHECK-CXX-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntsh() { return svcntsh(); } -// CHECK-C-LABEL: @test_svcntsw( -// CHECK-CXX-LABEL: @_Z12test_svcntswv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw() -// CHECK-NEXT: ret i64 [[TMP0]] +// CHECK-C-LABEL: define dso_local i64 @test_svcntsw( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw() +// CHECK-C-NEXT: ret i64 [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntswv( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw() +// CHECK-CXX-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntsw() { return svcntsw(); } -// CHECK-C-LABEL: @test_svcntsd( -// CHECK-CXX-LABEL: @_Z12test_svcntsdv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd() -// CHECK-NEXT: ret i64 [[TMP0]] +// CHECK-C-LABEL: define dso_local i64 @test_svcntsd( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd() +// CHECK-C-NEXT: ret i64 [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntsdv( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd() +// CHECK-CXX-NEXT: ret i64 [[TMP0]] // uint64_t test_svcntsd() { return svcntsd(); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c index 57ed4699550099..72d159b19118e3 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -11,138 +12,226 @@ #define ARM_STREAMING_ATTR __attribute__((arm_streaming)) #endif -// CHECK-C-LABEL: @test_svld1_hor_za8( -// CHECK-CXX-LABEL: @_Z18test_svld1_hor_za8ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG:%.*]], [[PTRTY:ptr|i8\*]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], [[PTRTY]] [[PTR]], i32 0, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z18test_svld1_hor_za8ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_hor_za8(0, slice_base, pg, ptr); svld1_hor_za8(0, slice_base + 15, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_hor_za16( -// CHECK-CXX-LABEL: @_Z19test_svld1_hor_za16ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 1, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svld1_hor_za16ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_za16(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_hor_za16(0, slice_base, pg, ptr); svld1_hor_za16(1, slice_base + 7, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_hor_za32( -// CHECK-CXX-LABEL: @_Z19test_svld1_hor_za32ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 3, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svld1_hor_za32ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_za32(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_hor_za32(0, slice_base, pg, ptr); svld1_hor_za32(3, slice_base + 3, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_hor_za64( -// CHECK-CXX-LABEL: @_Z19test_svld1_hor_za64ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 7, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svld1_hor_za64ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_za64(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_hor_za64(0, slice_base, pg, ptr); svld1_hor_za64(7, slice_base + 1, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_hor_za128( -// CHECK-CXX-LABEL: @_Z20test_svld1_hor_za128ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svld1_hor_za128ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_hor_za128(0, slice_base, pg, ptr); svld1_hor_za128(15, slice_base, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_ver_za8( -// CHECK-CXX-LABEL: @_Z18test_svld1_ver_za8ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG:%.*]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], [[PTRTY]] [[PTR]], i32 0, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z18test_svld1_ver_za8ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_za8(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_ver_za8(0, slice_base, pg, ptr); svld1_ver_za8(0, slice_base + 15, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_ver_za16( -// CHECK-CXX-LABEL: @_Z19test_svld1_ver_za16ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 1, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svld1_ver_za16ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_za16(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_ver_za16(0, slice_base, pg, ptr); svld1_ver_za16(1, slice_base + 7, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_ver_za32( -// CHECK-CXX-LABEL: @_Z19test_svld1_ver_za32ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 3, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svld1_ver_za32ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_za32(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_ver_za32(0, slice_base, pg, ptr); svld1_ver_za32(3, slice_base + 3, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_ver_za64( -// CHECK-CXX-LABEL: @_Z19test_svld1_ver_za64ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 7, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svld1_ver_za64ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_za64(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_ver_za64(0, slice_base, pg, ptr); svld1_ver_za64(7, slice_base + 1, pg, ptr); } -// CHECK-C-LABEL: @test_svld1_ver_za128( -// CHECK-CXX-LABEL: @_Z20test_svld1_ver_za128ju10__SVBool_tPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svld1_ver_za128ju10__SVBool_tPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_za128(uint32_t slice_base, svbool_t pg, const void *ptr) { svld1_ver_za128(0, slice_base, pg, ptr); svld1_ver_za128(15, slice_base, pg, ptr); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c index 5d61587d855708..cf49f62664eee8 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -11,168 +12,286 @@ #define ARM_STREAMING_ATTR __attribute__((arm_streaming)) #endif -// CHECK-C-LABEL: @test_svld1_hor_vnum_za8( -// CHECK-CXX-LABEL: @_Z23test_svld1_hor_vnum_za8ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, [[PTRTY:ptr|i8\*]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG:%.*]], [[PTRTY]] [[TMP1]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], [[PTRTY]] [[TMP1]], i32 0, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_vnum_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-C-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svld1_hor_vnum_za8ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_vnum_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_hor_vnum_za8(0, slice_base, pg, ptr, vnum); svld1_hor_vnum_za8(0, slice_base + 15, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_hor_vnum_za16( -// CHECK-CXX-LABEL: @_Z24test_svld1_hor_vnum_za16ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 1, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_vnum_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svld1_hor_vnum_za16ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.horiz( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_hor_vnum_za16(0, slice_base, pg, ptr, vnum); svld1_hor_vnum_za16(1, slice_base + 7, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_hor_vnum_za32( -// CHECK-CXX-LABEL: @_Z24test_svld1_hor_vnum_za32ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 3, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_vnum_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svld1_hor_vnum_za32ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.horiz( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_hor_vnum_za32(0, slice_base, pg, ptr, vnum); svld1_hor_vnum_za32(3, slice_base + 3, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_hor_vnum_za64( -// CHECK-CXX-LABEL: @_Z24test_svld1_hor_vnum_za64ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 7, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_vnum_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svld1_hor_vnum_za64ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.horiz( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_hor_vnum_za64(0, slice_base, pg, ptr, vnum); svld1_hor_vnum_za64(7, slice_base + 1, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_hor_vnum_za128( -// CHECK-CXX-LABEL: @_Z25test_svld1_hor_vnum_za128ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_hor_vnum_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svld1_hor_vnum_za128ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.horiz( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_hor_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_hor_vnum_za128(0, slice_base, pg, ptr, vnum); svld1_hor_vnum_za128(15, slice_base, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_ver_hor_za8( -// CHECK-CXX-LABEL: @_Z22test_svld1_ver_hor_za8ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG:%.*]], [[PTRTY]] [[TMP1]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], [[PTRTY]] [[TMP1]], i32 0, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_hor_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-C-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z22test_svld1_ver_hor_za8ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_ver_vnum_za8(0, slice_base, pg, ptr, vnum); svld1_ver_vnum_za8(0, slice_base + 15, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_ver_vnum_za16( -// CHECK-CXX-LABEL: @_Z24test_svld1_ver_vnum_za16ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 1, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_vnum_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svld1_ver_vnum_za16ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1h.vert( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_ver_vnum_za16(0, slice_base, pg, ptr, vnum); svld1_ver_vnum_za16(1, slice_base + 7, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_ver_vnum_za32( -// CHECK-CXX-LABEL: @_Z24test_svld1_ver_vnum_za32ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 3, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_vnum_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svld1_ver_vnum_za32ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1w.vert( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_ver_vnum_za32(0, slice_base, pg, ptr, vnum); svld1_ver_vnum_za32(3, slice_base + 3, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_ver_vnum_za64( -// CHECK-CXX-LABEL: @_Z24test_svld1_ver_vnum_za64ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 7, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_vnum_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svld1_ver_vnum_za64ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1d.vert( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_ver_vnum_za64(0, slice_base, pg, ptr, vnum); svld1_ver_vnum_za64(7, slice_base + 1, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svld1_ver_vnum_za128( -// CHECK-CXX-LABEL: @_Z25test_svld1_ver_vnum_za128ju10__SVBool_tPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svld1_ver_vnum_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svld1_ver_vnum_za128ju10__SVBool_tPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ld1q.vert( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svld1_ver_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) { svld1_ver_vnum_za128(0, slice_base, pg, ptr, vnum); svld1_ver_vnum_za128(15, slice_base, pg, ptr, vnum); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c index 3f8bb6a8cdfebb..e85c47072f2df8 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -5,51 +6,86 @@ #include -// CHECK-C-LABEL: @test_svldr_vnum_za( -// CHECK-CXX-LABEL: @_Z18test_svldr_vnum_zajPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svldr_vnum_za( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z18test_svldr_vnum_zajPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-CXX-NEXT: ret void // void test_svldr_vnum_za(uint32_t slice_base, const void *ptr) { svldr_vnum_za(slice_base, ptr, 0); } -// CHECK-C-LABEL: @test_svldr_vnum_za_1( -// CHECK-CXX-LABEL: @_Z20test_svldr_vnum_za_1jPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15 -// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svldr_vnum_za_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15 +// CHECK-C-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svldr_vnum_za_1jPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-CXX-NEXT: ret void // void test_svldr_vnum_za_1(uint32_t slice_base, const void *ptr) { svldr_vnum_za(slice_base, ptr, 15); } -// CHECK-C-LABEL: @test_svldr_za( -// CHECK-CXX-LABEL: @_Z13test_svldr_zajPKv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svldr_za( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z13test_svldr_zajPKv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-CXX-NEXT: ret void // void test_svldr_za(uint32_t slice_base, const void *ptr) { svldr_za(slice_base, ptr); } -// CHECK-C-LABEL: @test_svldr_vnum_za_var( -// CHECK-CXX-LABEL: @_Z22test_svldr_vnum_za_varjPKvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM:%.*]] to i32 -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE:%.*]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svldr_vnum_za_var( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]] +// CHECK-C-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32 +// CHECK-C-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z22test_svldr_vnum_za_varjPKvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32 +// CHECK-CXX-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-CXX-NEXT: ret void // void test_svldr_vnum_za_var(uint32_t slice_base, const void *ptr, int64_t vnum) { svldr_vnum_za(slice_base, ptr, vnum); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c index b52aee12f9c703..f1382b699f637a 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za32.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,78 +14,128 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svmopa_za32_s8( -// CHECK-CXX-LABEL: @_Z19test_svmopa_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za32_s8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmopa_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svint8_t zm) { SME_ACLE_FUNC(svmopa_za32, _s8, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmopa_za32_u8( -// CHECK-CXX-LABEL: @_Z19test_svmopa_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za32_u8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmopa_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svuint8_t zm) { SME_ACLE_FUNC(svmopa_za32, _u8, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmopa_za32_bf16( -// CHECK-CXX-LABEL: @_Z21test_svmopa_za32_bf16u10__SVBool_tu10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8bf16(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za32_bf16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8bf16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svmopa_za32_bf16u10__SVBool_tu10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8bf16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za32_bf16(svbool_t pn, svbool_t pm, svbfloat16_t zn, svbfloat16_t zm) { SME_ACLE_FUNC(svmopa_za32, _bf16, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmopa_za32_f16( -// CHECK-CXX-LABEL: @_Z20test_svmopa_za32_f16u10__SVBool_tu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8f16(i32 1, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za32_f16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8f16(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmopa_za32_f16u10__SVBool_tu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.wide.nxv8f16(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za32_f16(svbool_t pn, svbool_t pm, svfloat16_t zn, svfloat16_t zm) { SME_ACLE_FUNC(svmopa_za32, _f16, _m)(1, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmopa_za32_f32( -// CHECK-CXX-LABEL: @_Z20test_svmopa_za32_f32u10__SVBool_tu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv4f32(i32 1, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za32_f32( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv4f32(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmopa_za32_f32u10__SVBool_tu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv4f32(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za32_f32(svbool_t pn, svbool_t pm, svfloat32_t zn, svfloat32_t zm) { SME_ACLE_FUNC(svmopa_za32, _f32, _m)(1, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svsumopa_za32_s8( -// CHECK-CXX-LABEL: @_Z21test_svsumopa_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svsumopa_za32_s8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svsumopa_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svsumopa_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svuint8_t zm) { SME_ACLE_FUNC(svsumopa_za32, _s8, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svusmopa_za32_u8( -// CHECK-CXX-LABEL: @_Z21test_svusmopa_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svusmopa_za32_u8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svusmopa_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svusmopa_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svint8_t zm) { SME_ACLE_FUNC(svusmopa_za32, _u8, _m)(0, pn, pm, zn, zm); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c index 835d7c75ba6eac..e60a764e18e9a2 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mopa-za64.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme-f64f64 -target-feature +sme-i16i64 -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme-f64f64 -target-feature +sme-i16i64 -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,62 +14,104 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svmopa_za64_s16( -// CHECK-CXX-LABEL: @_Z20test_svmopa_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za64_s16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmopa_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.smopa.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svint16_t zm) { SME_ACLE_FUNC(svmopa_za64, _s16, _m)(7, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmopa_za64_u16( -// CHECK-CXX-LABEL: @_Z20test_svmopa_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za64_u16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmopa_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.umopa.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svuint16_t zm) { SME_ACLE_FUNC(svmopa_za64, _u16, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmopa_za64_f64( -// CHECK-CXX-LABEL: @_Z20test_svmopa_za64_f64u10__SVBool_tu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv2f64(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmopa_za64_f64( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv2f64(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmopa_za64_f64u10__SVBool_tu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mopa.nxv2f64(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmopa_za64_f64(svbool_t pn, svbool_t pm, svfloat64_t zn, svfloat64_t zm) { SME_ACLE_FUNC(svmopa_za64, _f64, _m)(7, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svsumopa_za64_s16( -// CHECK-CXX-LABEL: @_Z22test_svsumopa_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svsumopa_za64_s16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z22test_svsumopa_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.sumopa.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svsumopa_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svuint16_t zm) { SME_ACLE_FUNC(svsumopa_za64, _s16, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svusmopa_za64_u16( -// CHECK-CXX-LABEL: @_Z22test_svusmopa_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svusmopa_za64_u16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z22test_svusmopa_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.usmopa.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svusmopa_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svint16_t zm) { SME_ACLE_FUNC(svusmopa_za64, _u16, _m)(7, pn, pm, zn, zm); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c index 923b6b96b4b4e0..2524dab52a9c07 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za32.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,78 +14,128 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svmops_za32_s8( -// CHECK-CXX-LABEL: @_Z19test_svmops_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.smops.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za32_s8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.smops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmops_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.smops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svint8_t zm) { SME_ACLE_FUNC(svmops_za32, _s8, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmops_za32_u8( -// CHECK-CXX-LABEL: @_Z19test_svmops_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.umops.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za32_u8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.umops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svmops_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.umops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svuint8_t zm) { SME_ACLE_FUNC(svmops_za32, _u8, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmops_za32_bf16( -// CHECK-CXX-LABEL: @_Z21test_svmops_za32_bf16u10__SVBool_tu10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mops.wide.nxv8bf16(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za32_bf16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mops.wide.nxv8bf16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svmops_za32_bf16u10__SVBool_tu10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mops.wide.nxv8bf16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za32_bf16(svbool_t pn, svbool_t pm, svbfloat16_t zn, svbfloat16_t zm) { SME_ACLE_FUNC(svmops_za32, _bf16, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmops_za32_f16( -// CHECK-CXX-LABEL: @_Z20test_svmops_za32_f16u10__SVBool_tu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mops.wide.nxv8f16(i32 1, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za32_f16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mops.wide.nxv8f16(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmops_za32_f16u10__SVBool_tu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mops.wide.nxv8f16(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za32_f16(svbool_t pn, svbool_t pm, svfloat16_t zn, svfloat16_t zm) { SME_ACLE_FUNC(svmops_za32, _f16, _m)(1, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmops_za32_f32( -// CHECK-CXX-LABEL: @_Z20test_svmops_za32_f32u10__SVBool_tu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mops.nxv4f32(i32 1, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za32_f32( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mops.nxv4f32(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmops_za32_f32u10__SVBool_tu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mops.nxv4f32(i32 1, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za32_f32(svbool_t pn, svbool_t pm, svfloat32_t zn, svfloat32_t zm) { SME_ACLE_FUNC(svmops_za32, _f32, _m)(1, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svsumops_za32_s8( -// CHECK-CXX-LABEL: @_Z21test_svsumops_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.sumops.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svsumops_za32_s8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.sumops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svsumops_za32_s8u10__SVBool_tu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.sumops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svsumops_za32_s8(svbool_t pn, svbool_t pm, svint8_t zn, svuint8_t zm) { SME_ACLE_FUNC(svsumops_za32, _s8, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svusmops_za32_u8( -// CHECK-CXX-LABEL: @_Z21test_svusmops_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.usmops.wide.nxv16i8(i32 0, [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svusmops_za32_u8( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.usmops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svusmops_za32_u8u10__SVBool_tu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.usmops.wide.nxv16i8(i32 0, [[PN]], [[PM]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svusmops_za32_u8(svbool_t pn, svbool_t pm, svuint8_t zn, svint8_t zm) { SME_ACLE_FUNC(svusmops_za32, _u8, _m)(0, pn, pm, zn, zm); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c index ea1e55001b654c..75ec07ffa3df6e 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_mops-za64.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme-f64f64 -target-feature +sme-i16i64 -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme-f64f64 -target-feature +sme-i16i64 -target-feature +sve -target-feature +bf16 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,62 +14,104 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svmops_za64_s16( -// CHECK-CXX-LABEL: @_Z20test_svmops_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.smops.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za64_s16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.smops.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmops_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.smops.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svint16_t zm) { SME_ACLE_FUNC(svmops_za64, _s16, _m)(7, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmops_za64_u16( -// CHECK-CXX-LABEL: @_Z20test_svmops_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.umops.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za64_u16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.umops.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmops_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.umops.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svuint16_t zm) { SME_ACLE_FUNC(svmops_za64, _u16, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svmops_za64_f64( -// CHECK-CXX-LABEL: @_Z20test_svmops_za64_f64u10__SVBool_tu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.mops.nxv2f64(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svmops_za64_f64( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.mops.nxv2f64(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svmops_za64_f64u10__SVBool_tu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.mops.nxv2f64(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svmops_za64_f64(svbool_t pn, svbool_t pm, svfloat64_t zn, svfloat64_t zm) { SME_ACLE_FUNC(svmops_za64, _f64, _m)(7, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svsumops_za64_s16( -// CHECK-CXX-LABEL: @_Z22test_svsumops_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.sumops.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svsumops_za64_s16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.sumops.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z22test_svsumops_za64_s16u10__SVBool_tu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.sumops.wide.nxv8i16(i32 0, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svsumops_za64_s16(svbool_t pn, svbool_t pm, svint16_t zn, svuint16_t zm) { SME_ACLE_FUNC(svsumops_za64, _s16, _m)(0, pn, pm, zn, zm); } -// CHECK-C-LABEL: @test_svusmops_za64_u16( -// CHECK-CXX-LABEL: @_Z22test_svusmops_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.usmops.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN:%.*]], [[ZM:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svusmops_za64_u16( +// CHECK-C-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.usmops.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z22test_svusmops_za64_u16u10__SVBool_tu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( +// CHECK-CXX-SAME: [[PN:%.*]], [[PM:%.*]], [[ZN:%.*]], [[ZM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PN]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PM]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.usmops.wide.nxv8i16(i32 7, [[TMP0]], [[TMP1]], [[ZN]], [[ZM]]) +// CHECK-CXX-NEXT: ret void // void test_svusmops_za64_u16(svbool_t pn, svbool_t pm, svuint16_t zn, svint16_t zm) { SME_ACLE_FUNC(svusmops_za64, _u16, _m)(7, pn, pm, zn, zm); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c index f7a0852387e895..fc5f798d72a189 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,1090 +14,1772 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svread_hor_za8_s8( -// CHECK-CXX-LABEL: @_Z22test_svread_hor_za8_s8u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za8_s8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z22test_svread_hor_za8_s8u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_hor_za8_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za8, _s8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za8_s8_1( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za8_s8_1u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za8_s8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za8_s8_1u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_hor_za8_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 15; return SME_ACLE_FUNC(svread_hor_za8, _s8, _m)(zd, pg, 0, slice); } -// CHECK-C-LABEL: @test_svread_hor_za16_s16( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za16_s16u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_s16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za16_s16u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_hor_za16_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za16, _s16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za16_s16_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za16_s16_1u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_s16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za16_s16_1u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_hor_za16_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_hor_za16, _s16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_hor_za32_s32( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za32_s32u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za32_s32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za32_s32u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_hor_za32_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za32, _s32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za32_s32_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za32_s32_1u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 3, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za32_s32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za32_s32_1u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_hor_za32_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 3; return SME_ACLE_FUNC(svread_hor_za32, _s32, _m)(zd, pg, 3, slice); } -// CHECK-C-LABEL: @test_svread_hor_za64_s64( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za64_s64u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za64_s64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za64_s64u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_hor_za64_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za64, _s64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za64_s64_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za64_s64_1u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 7, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za64_s64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za64_s64_1u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_hor_za64_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 1; return SME_ACLE_FUNC(svread_hor_za64, _s64, _m)(zd, pg, 7, slice); } -// CHECK-C-LABEL: @test_svread_hor_za8_u8( -// CHECK-CXX-LABEL: @_Z22test_svread_hor_za8_u8u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za8_u8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z22test_svread_hor_za8_u8u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_hor_za8_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za8, _u8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za8_u8_1( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za8_u8_1u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za8_u8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za8_u8_1u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_hor_za8_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 15; return SME_ACLE_FUNC(svread_hor_za8, _u8, _m)(zd, pg, 0, slice); } -// CHECK-C-LABEL: @test_svread_hor_za16_u16( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za16_u16u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_u16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za16_u16u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_hor_za16_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za16, _u16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za16_u16_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za16_u16_1u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_u16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za16_u16_1u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_hor_za16_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_hor_za16, _u16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_hor_za32_u32( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za32_u32u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za32_u32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za32_u32u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_hor_za32_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za32, _u32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za32_u32_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za32_u32_1u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 3, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za32_u32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za32_u32_1u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_hor_za32_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 3; return SME_ACLE_FUNC(svread_hor_za32, _u32, _m)(zd, pg, 3, slice); } -// CHECK-C-LABEL: @test_svread_hor_za64_u64( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za64_u64u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za64_u64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za64_u64u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_hor_za64_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za64, _u64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za64_u64_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za64_u64_1u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 7, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za64_u64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za64_u64_1u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_hor_za64_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 1; return SME_ACLE_FUNC(svread_hor_za64, _u64, _m)(zd, pg, 7, slice); } -// CHECK-C-LABEL: @test_svread_hor_za16_f16( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za16_f16u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_f16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za16_f16u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_hor_za16_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za16, _f16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za16_f16_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za16_f16_1u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_f16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za16_f16_1u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_hor_za16_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_hor_za16, _f16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_hor_za16_bf16( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za16_bf16u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_bf16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za16_bf16u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_hor_za16_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za16, _bf16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za16_bf16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za16_bf16_1u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za16_bf16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za16_bf16_1u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_hor_za16_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_hor_za16, _bf16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_hor_za32_f32( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za32_f32u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za32_f32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za32_f32u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_hor_za32_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za32, _f32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za32_f32_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za32_f32_1u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 3, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za32_f32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za32_f32_1u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_hor_za32_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 3; return SME_ACLE_FUNC(svread_hor_za32, _f32, _m)(zd, pg, 3, slice); } -// CHECK-C-LABEL: @test_svread_hor_za64_f64( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za64_f64u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za64_f64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za64_f64u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_hor_za64_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za64, _f64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za64_f64_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za64_f64_1u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 7, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za64_f64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za64_f64_1u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_hor_za64_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 1; return SME_ACLE_FUNC(svread_hor_za64, _f64, _m)(zd, pg, 7, slice); } -// CHECK-C-LABEL: @test_svread_hor_za128_s8( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za128_s8u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za128_s8u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_hor_za128_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_s8_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za128_s8_1u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za128_s8_1u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_hor_za128_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s8, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_s16( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_s16u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_s16u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_hor_za128_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_s16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_s16_1u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_s16_1u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_hor_za128_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_s32( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_s32u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_s32u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_hor_za128_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_s32_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_s32_1u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_s32_1u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_hor_za128_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s32, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_s64( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_s64u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_s64u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_hor_za128_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_s64_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_s64_1u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_s64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_s64_1u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_hor_za128_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _s64, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u8( -// CHECK-CXX-LABEL: @_Z24test_svread_hor_za128_u8u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_hor_za128_u8u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_hor_za128_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u8_1( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za128_u8_1u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za128_u8_1u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_hor_za128_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u8, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u16( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_u16u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_u16u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_hor_za128_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_u16_1u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_u16_1u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_hor_za128_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u32( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_u32u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_u32u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_hor_za128_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u32_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_u32_1u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_u32_1u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_hor_za128_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u32, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u64( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_u64u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_u64u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_hor_za128_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_u64_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_u64_1u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_u64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_u64_1u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_hor_za128_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _u64, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_f16( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_f16u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_f16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_f16u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_hor_za128_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _f16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_f16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_f16_1u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_f16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_f16_1u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8f16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_hor_za128_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _f16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_bf16( -// CHECK-CXX-LABEL: @_Z26test_svread_hor_za128_bf16u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_bf16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_hor_za128_bf16u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_hor_za128_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _bf16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_bf16_1( -// CHECK-CXX-LABEL: @_Z28test_svread_hor_za128_bf16_1u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_bf16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z28test_svread_hor_za128_bf16_1u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv8bf16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_hor_za128_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _bf16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_f32( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_f32u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_f32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_f32u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_hor_za128_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _f32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_f32_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_f32_1u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_f32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_f32_1u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv4f32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_hor_za128_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _f32, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_f64( -// CHECK-CXX-LABEL: @_Z25test_svread_hor_za128_f64u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_f64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_hor_za128_f64u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_hor_za128_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _f64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_hor_za128_f64_1( -// CHECK-CXX-LABEL: @_Z27test_svread_hor_za128_f64_1u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_hor_za128_f64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_hor_za128_f64_1u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.horiz.nxv2f64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_hor_za128_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_hor_za128, _f64, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za8_s8( -// CHECK-CXX-LABEL: @_Z22test_svread_ver_za8_s8u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za8_s8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z22test_svread_ver_za8_s8u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_ver_za8_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za8, _s8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za8_s8_1( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za8_s8_1u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za8_s8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za8_s8_1u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_ver_za8_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 15; return SME_ACLE_FUNC(svread_ver_za8, _s8, _m)(zd, pg, 0, slice); } -// CHECK-C-LABEL: @test_svread_ver_za16_s16( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za16_s16u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_s16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za16_s16u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_ver_za16_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za16, _s16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za16_s16_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za16_s16_1u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_s16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za16_s16_1u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_ver_za16_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_ver_za16, _s16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_ver_za32_s32( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za32_s32u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za32_s32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za32_s32u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_ver_za32_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za32, _s32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za32_s32_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za32_s32_1u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 3, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za32_s32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za32_s32_1u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_ver_za32_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 3; return SME_ACLE_FUNC(svread_ver_za32, _s32, _m)(zd, pg, 3, slice); } -// CHECK-C-LABEL: @test_svread_ver_za64_s64( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za64_s64u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za64_s64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za64_s64u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_ver_za64_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za64, _s64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za64_s64_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za64_s64_1u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 7, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za64_s64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za64_s64_1u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_ver_za64_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 1; return SME_ACLE_FUNC(svread_ver_za64, _s64, _m)(zd, pg, 7, slice); } -// CHECK-C-LABEL: @test_svread_ver_za8_u8( -// CHECK-CXX-LABEL: @_Z22test_svread_ver_za8_u8u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za8_u8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z22test_svread_ver_za8_u8u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_ver_za8_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za8, _u8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za8_u8_1( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za8_u8_1u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za8_u8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za8_u8_1u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_ver_za8_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 15; return SME_ACLE_FUNC(svread_ver_za8, _u8, _m)(zd, pg, 0, slice); } -// CHECK-C-LABEL: @test_svread_ver_za16_u16( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za16_u16u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_u16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za16_u16u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_ver_za16_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za16, _u16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za16_u16_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za16_u16_1u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_u16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za16_u16_1u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8i16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_ver_za16_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_ver_za16, _u16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_ver_za32_u32( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za32_u32u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za32_u32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za32_u32u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_ver_za32_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za32, _u32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za32_u32_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za32_u32_1u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 3, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za32_u32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za32_u32_1u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4i32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_ver_za32_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 3; return SME_ACLE_FUNC(svread_ver_za32, _u32, _m)(zd, pg, 3, slice); } -// CHECK-C-LABEL: @test_svread_ver_za64_u64( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za64_u64u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za64_u64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za64_u64u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_ver_za64_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za64, _u64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za64_u64_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za64_u64_1u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 7, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za64_u64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za64_u64_1u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2i64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_ver_za64_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 1; return SME_ACLE_FUNC(svread_ver_za64, _u64, _m)(zd, pg, 7, slice); } -// CHECK-C-LABEL: @test_svread_ver_za16_f16( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za16_f16u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_f16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za16_f16u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_ver_za16_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za16, _f16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za16_f16_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za16_f16_1u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_f16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8f16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za16_f16_1u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8f16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_ver_za16_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_ver_za16, _f16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_ver_za16_bf16( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za16_bf16u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_bf16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za16_bf16u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_ver_za16_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za16, _bf16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za16_bf16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za16_bf16_1u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 1, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za16_bf16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za16_bf16_1u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_ver_za16_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 7; return SME_ACLE_FUNC(svread_ver_za16, _bf16, _m)(zd, pg, 1, slice); } -// CHECK-C-LABEL: @test_svread_ver_za32_f32( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za32_f32u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za32_f32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za32_f32u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_ver_za32_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za32, _f32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za32_f32_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za32_f32_1u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 3, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za32_f32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4f32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za32_f32_1u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv4f32( [[ZD]], [[TMP0]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_ver_za32_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 3; return SME_ACLE_FUNC(svread_ver_za32, _f32, _m)(zd, pg, 3, slice); } -// CHECK-C-LABEL: @test_svread_ver_za64_f64( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za64_f64u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za64_f64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za64_f64u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_ver_za64_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za64, _f64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za64_f64_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za64_f64_1u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 7, i32 [[TILESLICE]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za64_f64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2f64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za64_f64_1u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.read.vert.nxv2f64( [[ZD]], [[TMP0]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_ver_za64_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { uint32_t slice = slice_base + 1; return SME_ACLE_FUNC(svread_ver_za64, _f64, _m)(zd, pg, 7, slice); } -// CHECK-C-LABEL: @test_svread_ver_za128_s8( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za128_s8u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za128_s8u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_ver_za128_s8(svint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_s8_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za128_s8_1u10__SVInt8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za128_s8_1u10__SVInt8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svint8_t test_svread_ver_za128_s8_1(svint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s8, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_s16( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_s16u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_s16u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_ver_za128_s16(svint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_s16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_s16_1u11__SVInt16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_s16_1u11__SVInt16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint16_t test_svread_ver_za128_s16_1(svint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_s32( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_s32u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_s32u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_ver_za128_s32(svint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_s32_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_s32_1u11__SVInt32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_s32_1u11__SVInt32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint32_t test_svread_ver_za128_s32_1(svint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s32, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_s64( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_s64u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_s64u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_ver_za128_s64(svint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_s64_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_s64_1u11__SVInt64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_s64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_s64_1u11__SVInt64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svint64_t test_svread_ver_za128_s64_1(svint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _s64, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u8( -// CHECK-CXX-LABEL: @_Z24test_svread_ver_za128_u8u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u8( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z24test_svread_ver_za128_u8u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_ver_za128_u8(svuint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u8, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u8_1( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za128_u8_1u11__SVUint8_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD:%.*]], [[PG:%.*]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u8_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP0]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za128_u8_1u11__SVUint8_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv16i8( [[ZD]], [[PG]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP0]] // svuint8_t test_svread_ver_za128_u8_1(svuint8_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u8, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u16( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_u16u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_u16u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_ver_za128_u16(svuint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_u16_1u12__SVUint16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_u16_1u12__SVUint16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8i16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint16_t test_svread_ver_za128_u16_1(svuint16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u32( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_u32u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_u32u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_ver_za128_u32(svuint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u32_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_u32_1u12__SVUint32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_u32_1u12__SVUint32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4i32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint32_t test_svread_ver_za128_u32_1(svuint32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u32, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u64( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_u64u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_u64u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_ver_za128_u64(svuint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_u64_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_u64_1u12__SVUint64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_u64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_u64_1u12__SVUint64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2i64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svuint64_t test_svread_ver_za128_u64_1(svuint64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _u64, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_f16( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_f16u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_f16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_f16u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8f16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_ver_za128_f16(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _f16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_f16_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_f16_1u13__SVFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8f16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_f16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8f16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_f16_1u13__SVFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8f16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat16_t test_svread_ver_za128_f16_1(svfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _f16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_bf16( -// CHECK-CXX-LABEL: @_Z26test_svread_ver_za128_bf16u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_bf16( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z26test_svread_ver_za128_bf16u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_ver_za128_bf16(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _bf16, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_bf16_1( -// CHECK-CXX-LABEL: @_Z28test_svread_ver_za128_bf16_1u14__SVBFloat16_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8bf16( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_bf16_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z28test_svread_ver_za128_bf16_1u14__SVBFloat16_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv8bf16( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svbfloat16_t test_svread_ver_za128_bf16_1(svbfloat16_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _bf16, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_f32( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_f32u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_f32( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_f32u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4f32( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_ver_za128_f32(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _f32, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_f32_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_f32_1u13__SVFloat32_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4f32( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_f32_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4f32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_f32_1u13__SVFloat32_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv4f32( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat32_t test_svread_ver_za128_f32_1(svfloat32_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _f32, _m)(zd, pg, 15, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_f64( -// CHECK-CXX-LABEL: @_Z25test_svread_ver_za128_f64u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_f64( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z25test_svread_ver_za128_f64u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2f64( [[ZD]], [[TMP0]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_ver_za128_f64(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _f64, _m)(zd, pg, 0, slice_base); } -// CHECK-C-LABEL: @test_svread_ver_za128_f64_1( -// CHECK-CXX-LABEL: @_Z27test_svread_ver_za128_f64_1u13__SVFloat64_tu10__SVBool_tj( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2f64( [[ZD:%.*]], [[TMP0]], i32 15, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] +// CHECK-C-LABEL: define dso_local @test_svread_ver_za128_f64_1( +// CHECK-C-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2f64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret [[TMP1]] +// +// CHECK-CXX-LABEL: define dso_local @_Z27test_svread_ver_za128_f64_1u13__SVFloat64_tu10__SVBool_tj( +// CHECK-CXX-SAME: [[ZD:%.*]], [[PG:%.*]], i32 noundef [[SLICE_BASE:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sme.readq.vert.nxv2f64( [[ZD]], [[TMP0]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret [[TMP1]] // svfloat64_t test_svread_ver_za128_f64_1(svfloat64_t zd, svbool_t pg, uint32_t slice_base) { return SME_ACLE_FUNC(svread_ver_za128, _f64, _m)(zd, pg, 15, slice_base); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c index eec54234167025..9ea5fa10c1bbc7 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -11,138 +12,226 @@ #define ARM_STREAMING_ATTR __attribute__((arm_streaming)) #endif -// CHECK-C-LABEL: @test_svst1_hor_za8( -// CHECK-CXX-LABEL: @_Z18test_svst1_hor_za8ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG:%.*]], [[PTRTY:ptr|i8\*]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], [[PTRTY]] [[PTR]], i32 0, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z18test_svst1_hor_za8ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_za8(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_hor_za8(0, slice_base, pg, ptr); svst1_hor_za8(0, slice_base + 15, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_hor_za16( -// CHECK-CXX-LABEL: @_Z19test_svst1_hor_za16ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 1, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svst1_hor_za16ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_za16(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_hor_za16(0, slice_base, pg, ptr); svst1_hor_za16(1, slice_base + 7, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_hor_za32( -// CHECK-CXX-LABEL: @_Z19test_svst1_hor_za32ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 3, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svst1_hor_za32ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_za32(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_hor_za32(0, slice_base, pg, ptr); svst1_hor_za32(3, slice_base + 3, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_hor_za64( -// CHECK-CXX-LABEL: @_Z19test_svst1_hor_za64ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 7, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svst1_hor_za64ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_za64(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_hor_za64(0, slice_base, pg, ptr); svst1_hor_za64(7, slice_base + 1, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_hor_za128( -// CHECK-CXX-LABEL: @_Z20test_svst1_hor_za128ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], [[PTRTY]] [[PTR]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svst1_hor_za128ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_za128(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_hor_za128(0, slice_base, pg, ptr); svst1_hor_za128(15, slice_base, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_ver_za8( -// CHECK-CXX-LABEL: @_Z18test_svst1_ver_za8ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG:%.*]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], [[PTRTY]] [[PTR]], i32 0, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z18test_svst1_ver_za8ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[PTR]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_za8(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_ver_za8(0, slice_base, pg, ptr); svst1_ver_za8(0, slice_base + 15, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_ver_za16( -// CHECK-CXX-LABEL: @_Z19test_svst1_ver_za16ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 1, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svst1_ver_za16ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[PTR]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_za16(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_ver_za16(0, slice_base, pg, ptr); svst1_ver_za16(1, slice_base + 7, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_ver_za32( -// CHECK-CXX-LABEL: @_Z19test_svst1_ver_za32ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 3, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svst1_ver_za32ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[PTR]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_za32(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_ver_za32(0, slice_base, pg, ptr); svst1_ver_za32(3, slice_base + 3, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_ver_za64( -// CHECK-CXX-LABEL: @_Z19test_svst1_ver_za64ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE1:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 7, i32 [[TILESLICE1]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svst1_ver_za64ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[PTR]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_za64(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_ver_za64(0, slice_base, pg, ptr); svst1_ver_za64(7, slice_base + 1, pg, ptr); } -// CHECK-C-LABEL: @test_svst1_ver_za128( -// CHECK-CXX-LABEL: @_Z20test_svst1_ver_za128ju10__SVBool_tPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], [[PTRTY]] [[PTR:%.*]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], [[PTRTY]] [[PTR]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svst1_ver_za128ju10__SVBool_tPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[PTR]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[PTR]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_za128(uint32_t slice_base, svbool_t pg, void *ptr) { svst1_ver_za128(0, slice_base, pg, ptr); svst1_ver_za128(15, slice_base, pg, ptr); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c index 81a2bba953b812..6b534f25a1f8db 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_st1_vnum.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -11,168 +12,286 @@ #define ARM_STREAMING_ATTR __attribute__((arm_streaming)) #endif -// CHECK-C-LABEL: @test_svst1_hor_vnum_za8( -// CHECK-CXX-LABEL: @_Z23test_svst1_hor_vnum_za8ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, [[PTRTY:ptr|i8\*]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG:%.*]], [[PTRTY]] [[TMP1]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], [[PTRTY]] [[TMP1]], i32 0, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_vnum_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-C-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svst1_hor_vnum_za8ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.horiz( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_vnum_za8(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_hor_vnum_za8(0, slice_base, pg, ptr, vnum); svst1_hor_vnum_za8(0, slice_base + 15, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_hor_vnum_za16( -// CHECK-CXX-LABEL: @_Z24test_svst1_hor_vnum_za16ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 1, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_vnum_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svst1_hor_vnum_za16ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.horiz( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_vnum_za16(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_hor_vnum_za16(0, slice_base, pg, ptr, vnum); svst1_hor_vnum_za16(1, slice_base + 7, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_hor_vnum_za32( -// CHECK-CXX-LABEL: @_Z24test_svst1_hor_vnum_za32ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 3, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_vnum_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svst1_hor_vnum_za32ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.horiz( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_vnum_za32(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_hor_vnum_za32(0, slice_base, pg, ptr, vnum); svst1_hor_vnum_za32(3, slice_base + 3, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_hor_vnum_za64( -// CHECK-CXX-LABEL: @_Z24test_svst1_hor_vnum_za64ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 7, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_vnum_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svst1_hor_vnum_za64ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.horiz( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_vnum_za64(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_hor_vnum_za64(0, slice_base, pg, ptr, vnum); svst1_hor_vnum_za64(7, slice_base + 1, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_hor_vnum_za128( -// CHECK-CXX-LABEL: @_Z25test_svst1_hor_vnum_za128ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], [[PTRTY]] [[TMP2]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_hor_vnum_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svst1_hor_vnum_za128ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.horiz( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_hor_vnum_za128(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_hor_vnum_za128(0, slice_base, pg, ptr, vnum); svst1_hor_vnum_za128(15, slice_base, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_ver_vnum_za8( -// CHECK-CXX-LABEL: @_Z23test_svst1_ver_vnum_za8ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG:%.*]], [[PTRTY]] [[TMP1]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], [[PTRTY]] [[TMP1]], i32 0, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_vnum_za8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-C-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svst1_ver_vnum_za8ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP0]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1b.vert( [[PG]], ptr [[TMP1]], i32 0, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_vnum_za8(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_ver_vnum_za8(0, slice_base, pg, ptr, vnum); svst1_ver_vnum_za8(0, slice_base + 15, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_ver_vnum_za16( -// CHECK-CXX-LABEL: @_Z24test_svst1_ver_vnum_za16ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 7 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 1, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_vnum_za16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svst1_ver_vnum_za16ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1h.vert( [[TMP0]], ptr [[TMP2]], i32 1, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_vnum_za16(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_ver_vnum_za16(0, slice_base, pg, ptr, vnum); svst1_ver_vnum_za16(1, slice_base + 7, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_ver_vnum_za32( -// CHECK-CXX-LABEL: @_Z24test_svst1_ver_vnum_za32ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 3 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 3, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_vnum_za32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svst1_ver_vnum_za32ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1w.vert( [[TMP0]], ptr [[TMP2]], i32 3, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_vnum_za32(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_ver_vnum_za32(0, slice_base, pg, ptr, vnum); svst1_ver_vnum_za32(3, slice_base + 3, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_ver_vnum_za64( -// CHECK-CXX-LABEL: @_Z24test_svst1_ver_vnum_za64ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: [[TILESLICE2:%.*]] = add i32 [[SLICE_BASE]], 1 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 7, i32 [[TILESLICE2]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_vnum_za64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z24test_svst1_ver_vnum_za64ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1d.vert( [[TMP0]], ptr [[TMP2]], i32 7, i32 [[ADD]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_vnum_za64(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_ver_vnum_za64(0, slice_base, pg, ptr, vnum); svst1_ver_vnum_za64(7, slice_base + 1, pg, ptr, vnum); } -// CHECK-C-LABEL: @test_svst1_ver_vnum_za128( -// CHECK-CXX-LABEL: @_Z25test_svst1_ver_vnum_za128ju10__SVBool_tPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, [[PTRTY]] [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 0, i32 [[SLICE_BASE:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], [[PTRTY]] [[TMP2]], i32 15, i32 [[SLICE_BASE]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svst1_ver_vnum_za128( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-C-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-C-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svst1_ver_vnum_za128ju10__SVBool_tPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv1i1( [[PG]]) +// CHECK-CXX-NEXT: [[TMP1:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[TMP1]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[TMP2]], i32 0, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.st1q.vert( [[TMP0]], ptr [[TMP2]], i32 15, i32 [[SLICE_BASE]]) +// CHECK-CXX-NEXT: ret void // ARM_STREAMING_ATTR void test_svst1_ver_vnum_za128(uint32_t slice_base, svbool_t pg, void *ptr, int64_t vnum) { svst1_ver_vnum_za128(0, slice_base, pg, ptr, vnum); svst1_ver_vnum_za128(15, slice_base, pg, ptr, vnum); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c index 94c95b6664a0a3..e53a3c6c57de32 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -5,51 +6,86 @@ #include -// CHECK-C-LABEL: @test_svstr_vnum_za( -// CHECK-CXX-LABEL: @_Z18test_svstr_vnum_zajPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svstr_vnum_za( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z18test_svstr_vnum_zajPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-CXX-NEXT: ret void // void test_svstr_vnum_za(uint32_t slice_base, void *ptr) { svstr_vnum_za(slice_base, ptr, 0); } -// CHECK-C-LABEL: @test_svstr_vnum_za_1( -// CHECK-CXX-LABEL: @_Z20test_svstr_vnum_za_1jPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15 -// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svstr_vnum_za_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15 +// CHECK-C-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z20test_svstr_vnum_za_1jPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-CXX-NEXT: ret void // void test_svstr_vnum_za_1(uint32_t slice_base, void *ptr) { svstr_vnum_za(slice_base, ptr, 15); } -// CHECK-C-LABEL: @test_svstr_za( -// CHECK-CXX-LABEL: @_Z13test_svstr_zajPv( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svstr_za( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z13test_svstr_zajPv( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE]], ptr [[PTR]]) +// CHECK-CXX-NEXT: ret void // void test_svstr_za(uint32_t slice_base, void *ptr) { svstr_za(slice_base, ptr); } -// CHECK-C-LABEL: @test_svstr_vnum_za_var( -// CHECK-CXX-LABEL: @_Z22test_svstr_vnum_za_varjPvl( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() -// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM:%.*]] -// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]] -// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM:%.*]] to i32 -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE:%.*]] -// CHECK-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svstr_vnum_za_var( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]] +// CHECK-C-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-C-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32 +// CHECK-C-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]] +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z22test_svstr_vnum_za_varjPvl( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb() +// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]] +// CHECK-CXX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]] +// CHECK-CXX-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32 +// CHECK-CXX-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]] +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.str(i32 [[TILESLICE]], ptr [[TMP0]]) +// CHECK-CXX-NEXT: ret void // void test_svstr_vnum_za_var(uint32_t slice_base, void *ptr, int64_t vnum) { svstr_vnum_za(slice_base, ptr, vnum); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c index 395918b936b3d8..0919968e5ae1b6 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -13,1090 +14,1772 @@ #define SME_ACLE_FUNC(A1,A2,A3) A1##A2##A3 #endif -// CHECK-C-LABEL: @test_svwrite_hor_za8_s8( -// CHECK-CXX-LABEL: @_Z23test_svwrite_hor_za8_s8ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za8_s8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svwrite_hor_za8_s8ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za8_s8(uint32_t slice_base, svbool_t pg, svint8_t zn) { SME_ACLE_FUNC(svwrite_hor_za8, _s8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za8_s8_1( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za8_s8_1ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[TILESLICE]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za8_s8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za8_s8_1ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za8_s8_1(uint32_t slice_base, svbool_t pg, svint8_t zn) { uint32_t slice = slice_base + 15; SME_ACLE_FUNC(svwrite_hor_za8, _s8, _m)(0, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_s16( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za16_s16ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_s16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za16_s16ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_s16(uint32_t slice_base, svbool_t pg, svint16_t zn) { SME_ACLE_FUNC(svwrite_hor_za16, _s16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_s16_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za16_s16_1ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_s16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za16_s16_1ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_s16_1(uint32_t slice_base, svbool_t pg, svint16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_hor_za16, _s16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za32_s32( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za32_s32ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za32_s32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za32_s32ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za32_s32(uint32_t slice_base, svbool_t pg, svint32_t zn) { SME_ACLE_FUNC(svwrite_hor_za32, _s32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za32_s32_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za32_s32_1ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 3, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za32_s32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za32_s32_1ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za32_s32_1(uint32_t slice_base, svbool_t pg, svint32_t zn) { uint32_t slice = slice_base + 3; SME_ACLE_FUNC(svwrite_hor_za32, _s32, _m)(3, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za64_s64( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za64_s64ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za64_s64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za64_s64ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za64_s64(uint32_t slice_base, svbool_t pg, svint64_t zn) { SME_ACLE_FUNC(svwrite_hor_za64, _s64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za64_s64_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za64_s64_1ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 7, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za64_s64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za64_s64_1ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za64_s64_1(uint32_t slice_base, svbool_t pg, svint64_t zn) { uint32_t slice = slice_base + 1; SME_ACLE_FUNC(svwrite_hor_za64, _s64, _m)(7, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za8_u8( -// CHECK-CXX-LABEL: @_Z23test_svwrite_hor_za8_u8ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za8_u8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svwrite_hor_za8_u8ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za8_u8(uint32_t slice_base, svbool_t pg, svuint8_t zn) { SME_ACLE_FUNC(svwrite_hor_za8, _u8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za8_u8_1( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za8_u8_1ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[TILESLICE]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za8_u8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za8_u8_1ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za8_u8_1(uint32_t slice_base, svbool_t pg, svuint8_t zn) { uint32_t slice = slice_base + 15; SME_ACLE_FUNC(svwrite_hor_za8, _u8, _m)(0, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_u16( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za16_u16ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_u16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za16_u16ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_u16(uint32_t slice_base, svbool_t pg, svuint16_t zn) { SME_ACLE_FUNC(svwrite_hor_za16, _u16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_u16_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za16_u16_1ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_u16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za16_u16_1ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_u16_1(uint32_t slice_base, svbool_t pg, svuint16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_hor_za16, _u16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za32_u32( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za32_u32ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za32_u32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za32_u32ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za32_u32(uint32_t slice_base, svbool_t pg, svuint32_t zn) { SME_ACLE_FUNC(svwrite_hor_za32, _u32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za32_u32_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za32_u32_1ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 3, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za32_u32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za32_u32_1ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za32_u32_1(uint32_t slice_base, svbool_t pg, svuint32_t zn) { uint32_t slice = slice_base + 3; SME_ACLE_FUNC(svwrite_hor_za32, _u32, _m)(3, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za64_u64( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za64_u64ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za64_u64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za64_u64ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za64_u64(uint32_t slice_base, svbool_t pg, svuint64_t zn) { SME_ACLE_FUNC(svwrite_hor_za64, _u64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za64_u64_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za64_u64_1ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 7, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za64_u64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za64_u64_1ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za64_u64_1(uint32_t slice_base, svbool_t pg, svuint64_t zn) { uint32_t slice = slice_base + 1; SME_ACLE_FUNC(svwrite_hor_za64, _u64, _m)(7, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_f16( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za16_f16ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8f16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_f16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za16_f16ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_f16(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { SME_ACLE_FUNC(svwrite_hor_za16, _f16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_f16_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za16_f16_1ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8f16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_f16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8f16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za16_f16_1ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8f16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_f16_1(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_hor_za16, _f16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_bf16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za16_bf16ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8bf16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_bf16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za16_bf16ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_bf16(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { SME_ACLE_FUNC(svwrite_hor_za16, _bf16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za16_bf16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za16_bf16_1ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8bf16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za16_bf16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8bf16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za16_bf16_1ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv8bf16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za16_bf16_1(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_hor_za16, _bf16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za32_f32( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za32_f32ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4f32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za32_f32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za32_f32ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za32_f32(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { SME_ACLE_FUNC(svwrite_hor_za32, _f32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za32_f32_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za32_f32_1ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4f32(i32 3, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za32_f32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4f32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za32_f32_1ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv4f32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za32_f32_1(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { uint32_t slice = slice_base + 3; SME_ACLE_FUNC(svwrite_hor_za32, _f32, _m)(3, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za64_f64( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za64_f64ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2f64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za64_f64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za64_f64ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za64_f64(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { SME_ACLE_FUNC(svwrite_hor_za64, _f64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za64_f64_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za64_f64_1ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2f64(i32 7, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za64_f64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2f64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za64_f64_1ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.horiz.nxv2f64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za64_f64_1(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { uint32_t slice = slice_base + 1; SME_ACLE_FUNC(svwrite_hor_za64, _f64, _m)(7, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s8( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za128_s8ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za128_s8ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s8(uint32_t slice_base, svbool_t pg, svint8_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s8_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za128_s8_1ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 15, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za128_s8_1ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s8_1(uint32_t slice_base, svbool_t pg, svint8_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s8, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_s16ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_s16ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s16(uint32_t slice_base, svbool_t pg, svint16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_s16_1ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_s16_1ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s16_1(uint32_t slice_base, svbool_t pg, svint16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s32( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_s32ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_s32ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s32(uint32_t slice_base, svbool_t pg, svint32_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s32_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_s32_1ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_s32_1ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s32_1(uint32_t slice_base, svbool_t pg, svint32_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s32, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s64( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_s64ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_s64ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s64(uint32_t slice_base, svbool_t pg, svint64_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_s64_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_s64_1ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_s64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_s64_1ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_s64_1(uint32_t slice_base, svbool_t pg, svint64_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _s64, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u8( -// CHECK-CXX-LABEL: @_Z25test_svwrite_hor_za128_u8ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_hor_za128_u8ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u8(uint32_t slice_base, svbool_t pg, svuint8_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u8_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za128_u8_1ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 15, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za128_u8_1ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u8_1(uint32_t slice_base, svbool_t pg, svuint8_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u8, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_u16ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_u16ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u16(uint32_t slice_base, svbool_t pg, svuint16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_u16_1ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_u16_1ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u16_1(uint32_t slice_base, svbool_t pg, svuint16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u32( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_u32ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_u32ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u32(uint32_t slice_base, svbool_t pg, svuint32_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u32_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_u32_1ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_u32_1ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u32_1(uint32_t slice_base, svbool_t pg, svuint32_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u32, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u64( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_u64ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_u64ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u64(uint32_t slice_base, svbool_t pg, svuint64_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_u64_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_u64_1ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_u64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_u64_1ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_u64_1(uint32_t slice_base, svbool_t pg, svuint64_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _u64, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_f16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_f16ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8f16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_f16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_f16ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_f16(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _f16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_f16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_f16_1ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8f16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_f16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8f16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_f16_1ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8f16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_f16_1(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _f16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_bf16( -// CHECK-CXX-LABEL: @_Z27test_svwrite_hor_za128_bf16ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8bf16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_bf16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_hor_za128_bf16ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_bf16(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _bf16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_bf16_1( -// CHECK-CXX-LABEL: @_Z29test_svwrite_hor_za128_bf16_1ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8bf16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_bf16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8bf16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z29test_svwrite_hor_za128_bf16_1ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv8bf16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_bf16_1(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _bf16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_f32( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_f32ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4f32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_f32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_f32ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_f32(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _f32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_f32_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_f32_1ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4f32(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_f32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4f32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_f32_1ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv4f32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_f32_1(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _f32, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_f64( -// CHECK-CXX-LABEL: @_Z26test_svwrite_hor_za128_f64ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2f64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_f64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_hor_za128_f64ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_f64(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _f64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_hor_za128_f64_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_hor_za128_f64_1ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2f64(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_hor_za128_f64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2f64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_hor_za128_f64_1ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.horiz.nxv2f64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_hor_za128_f64_1(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { SME_ACLE_FUNC(svwrite_hor_za128, _f64, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za8_s8( -// CHECK-CXX-LABEL: @_Z23test_svwrite_ver_za8_s8ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za8_s8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svwrite_ver_za8_s8ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za8_s8(uint32_t slice_base, svbool_t pg, svint8_t zn) { SME_ACLE_FUNC(svwrite_ver_za8, _s8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za8_s8_1( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za8_s8_1ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[TILESLICE]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za8_s8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za8_s8_1ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za8_s8_1(uint32_t slice_base, svbool_t pg, svint8_t zn) { uint32_t slice = slice_base + 15; SME_ACLE_FUNC(svwrite_ver_za8, _s8, _m)(0, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_s16( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za16_s16ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_s16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za16_s16ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_s16(uint32_t slice_base, svbool_t pg, svint16_t zn) { SME_ACLE_FUNC(svwrite_ver_za16, _s16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_s16_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za16_s16_1ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_s16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za16_s16_1ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_s16_1(uint32_t slice_base, svbool_t pg, svint16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_ver_za16, _s16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za32_s32( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za32_s32ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za32_s32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za32_s32ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za32_s32(uint32_t slice_base, svbool_t pg, svint32_t zn) { SME_ACLE_FUNC(svwrite_ver_za32, _s32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za32_s32_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za32_s32_1ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 3, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za32_s32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za32_s32_1ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za32_s32_1(uint32_t slice_base, svbool_t pg, svint32_t zn) { uint32_t slice = slice_base + 3; SME_ACLE_FUNC(svwrite_ver_za32, _s32, _m)(3, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za64_s64( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za64_s64ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za64_s64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za64_s64ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za64_s64(uint32_t slice_base, svbool_t pg, svint64_t zn) { SME_ACLE_FUNC(svwrite_ver_za64, _s64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za64_s64_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za64_s64_1ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 7, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za64_s64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za64_s64_1ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za64_s64_1(uint32_t slice_base, svbool_t pg, svint64_t zn) { uint32_t slice = slice_base + 1; SME_ACLE_FUNC(svwrite_ver_za64, _s64, _m)(7, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za8_u8( -// CHECK-CXX-LABEL: @_Z23test_svwrite_ver_za8_u8ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za8_u8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z23test_svwrite_ver_za8_u8ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za8_u8(uint32_t slice_base, svbool_t pg, svuint8_t zn) { SME_ACLE_FUNC(svwrite_ver_za8, _u8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za8_u8_1( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za8_u8_1ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15 -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[TILESLICE]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za8_u8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za8_u8_1ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 15 +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv16i8(i32 0, i32 [[ADD]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za8_u8_1(uint32_t slice_base, svbool_t pg, svuint8_t zn) { uint32_t slice = slice_base + 15; SME_ACLE_FUNC(svwrite_ver_za8, _u8, _m)(0, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_u16( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za16_u16ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_u16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za16_u16ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_u16(uint32_t slice_base, svbool_t pg, svuint16_t zn) { SME_ACLE_FUNC(svwrite_ver_za16, _u16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_u16_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za16_u16_1ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_u16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za16_u16_1ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8i16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_u16_1(uint32_t slice_base, svbool_t pg, svuint16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_ver_za16, _u16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za32_u32( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za32_u32ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za32_u32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za32_u32ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za32_u32(uint32_t slice_base, svbool_t pg, svuint32_t zn) { SME_ACLE_FUNC(svwrite_ver_za32, _u32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za32_u32_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za32_u32_1ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 3, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za32_u32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za32_u32_1ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4i32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za32_u32_1(uint32_t slice_base, svbool_t pg, svuint32_t zn) { uint32_t slice = slice_base + 3; SME_ACLE_FUNC(svwrite_ver_za32, _u32, _m)(3, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za64_u64( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za64_u64ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za64_u64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za64_u64ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za64_u64(uint32_t slice_base, svbool_t pg, svuint64_t zn) { SME_ACLE_FUNC(svwrite_ver_za64, _u64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za64_u64_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za64_u64_1ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 7, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za64_u64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za64_u64_1ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2i64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za64_u64_1(uint32_t slice_base, svbool_t pg, svuint64_t zn) { uint32_t slice = slice_base + 1; SME_ACLE_FUNC(svwrite_ver_za64, _u64, _m)(7, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_f16( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za16_f16ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8f16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_f16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za16_f16ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_f16(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { SME_ACLE_FUNC(svwrite_ver_za16, _f16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_f16_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za16_f16_1ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8f16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_f16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8f16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za16_f16_1ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8f16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_f16_1(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_ver_za16, _f16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_bf16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za16_bf16ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8bf16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_bf16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za16_bf16ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_bf16(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { SME_ACLE_FUNC(svwrite_ver_za16, _bf16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za16_bf16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za16_bf16_1ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 7 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8bf16(i32 1, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za16_bf16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8bf16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za16_bf16_1ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 7 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv8bf16(i32 1, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za16_bf16_1(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { uint32_t slice = slice_base + 7; SME_ACLE_FUNC(svwrite_ver_za16, _bf16, _m)(1, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za32_f32( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za32_f32ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4f32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za32_f32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za32_f32ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za32_f32(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { SME_ACLE_FUNC(svwrite_ver_za32, _f32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za32_f32_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za32_f32_1ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 3 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4f32(i32 3, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za32_f32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4f32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za32_f32_1ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 3 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv4f32(i32 3, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za32_f32_1(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { uint32_t slice = slice_base + 3; SME_ACLE_FUNC(svwrite_ver_za32, _f32, _m)(3, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za64_f64( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za64_f64ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2f64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za64_f64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za64_f64ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za64_f64(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { SME_ACLE_FUNC(svwrite_ver_za64, _f64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za64_f64_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za64_f64_1ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 1 -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2f64(i32 7, i32 [[TILESLICE]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za64_f64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2f64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za64_f64_1ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[ADD:%.*]] = add i32 [[SLICE_BASE]], 1 +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.write.vert.nxv2f64(i32 7, i32 [[ADD]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za64_f64_1(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { uint32_t slice = slice_base + 1; SME_ACLE_FUNC(svwrite_ver_za64, _f64, _m)(7, slice, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s8( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za128_s8ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za128_s8ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s8(uint32_t slice_base, svbool_t pg, svint8_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s8_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za128_s8_1ju10__SVBool_tu10__SVInt8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 15, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za128_s8_1ju10__SVBool_tu10__SVInt8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s8_1(uint32_t slice_base, svbool_t pg, svint8_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s8, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_s16ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_s16ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s16(uint32_t slice_base, svbool_t pg, svint16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_s16_1ju10__SVBool_tu11__SVInt16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_s16_1ju10__SVBool_tu11__SVInt16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s16_1(uint32_t slice_base, svbool_t pg, svint16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s32( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_s32ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_s32ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s32(uint32_t slice_base, svbool_t pg, svint32_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s32_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_s32_1ju10__SVBool_tu11__SVInt32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_s32_1ju10__SVBool_tu11__SVInt32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s32_1(uint32_t slice_base, svbool_t pg, svint32_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s32, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s64( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_s64ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_s64ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s64(uint32_t slice_base, svbool_t pg, svint64_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_s64_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_s64_1ju10__SVBool_tu11__SVInt64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_s64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_s64_1ju10__SVBool_tu11__SVInt64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_s64_1(uint32_t slice_base, svbool_t pg, svint64_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _s64, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u8( -// CHECK-CXX-LABEL: @_Z25test_svwrite_ver_za128_u8ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 0, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u8( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z25test_svwrite_ver_za128_u8ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 0, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u8(uint32_t slice_base, svbool_t pg, svuint8_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u8, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u8_1( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za128_u8_1ju10__SVBool_tu11__SVUint8_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 15, i32 [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u8_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za128_u8_1ju10__SVBool_tu11__SVUint8_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv16i8(i32 15, i32 [[SLICE_BASE]], [[PG]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u8_1(uint32_t slice_base, svbool_t pg, svuint8_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u8, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_u16ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_u16ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u16(uint32_t slice_base, svbool_t pg, svuint16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_u16_1ju10__SVBool_tu12__SVUint16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_u16_1ju10__SVBool_tu12__SVUint16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8i16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u16_1(uint32_t slice_base, svbool_t pg, svuint16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u32( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_u32ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_u32ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u32(uint32_t slice_base, svbool_t pg, svuint32_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u32_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_u32_1ju10__SVBool_tu12__SVUint32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_u32_1ju10__SVBool_tu12__SVUint32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4i32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u32_1(uint32_t slice_base, svbool_t pg, svuint32_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u32, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u64( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_u64ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_u64ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u64(uint32_t slice_base, svbool_t pg, svuint64_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_u64_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_u64_1ju10__SVBool_tu12__SVUint64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_u64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_u64_1ju10__SVBool_tu12__SVUint64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2i64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_u64_1(uint32_t slice_base, svbool_t pg, svuint64_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _u64, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_f16( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_f16ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8f16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_f16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_f16ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8f16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_f16(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _f16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_f16_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_f16_1ju10__SVBool_tu13__SVFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8f16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_f16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8f16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_f16_1ju10__SVBool_tu13__SVFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8f16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_f16_1(uint32_t slice_base, svbool_t pg, svfloat16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _f16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_bf16( -// CHECK-CXX-LABEL: @_Z27test_svwrite_ver_za128_bf16ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8bf16(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_bf16( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z27test_svwrite_ver_za128_bf16ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8bf16(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_bf16(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _bf16, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_bf16_1( -// CHECK-CXX-LABEL: @_Z29test_svwrite_ver_za128_bf16_1ju10__SVBool_tu14__SVBFloat16_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8bf16(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_bf16_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8bf16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z29test_svwrite_ver_za128_bf16_1ju10__SVBool_tu14__SVBFloat16_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv8bf16(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_bf16_1(uint32_t slice_base, svbool_t pg, svbfloat16_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _bf16, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_f32( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_f32ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4f32(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_f32( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_f32ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4f32(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_f32(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _f32, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_f32_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_f32_1ju10__SVBool_tu13__SVFloat32_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4f32(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_f32_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4f32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_f32_1ju10__SVBool_tu13__SVFloat32_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv4f32(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_f32_1(uint32_t slice_base, svbool_t pg, svfloat32_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _f32, _m)(15, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_f64( -// CHECK-CXX-LABEL: @_Z26test_svwrite_ver_za128_f64ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2f64(i32 0, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_f64( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z26test_svwrite_ver_za128_f64ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2f64(i32 0, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_f64(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _f64, _m)(0, slice_base, pg, zn); } -// CHECK-C-LABEL: @test_svwrite_ver_za128_f64_1( -// CHECK-CXX-LABEL: @_Z28test_svwrite_ver_za128_f64_1ju10__SVBool_tu13__SVFloat64_t( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2f64(i32 15, i32 [[SLICE_BASE:%.*]], [[TMP0]], [[ZN:%.*]]) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svwrite_ver_za128_f64_1( +// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2f64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z28test_svwrite_ver_za128_f64_1ju10__SVBool_tu13__SVFloat64_t( +// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], [[PG:%.*]], [[ZN:%.*]]) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG]]) +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.writeq.vert.nxv2f64(i32 15, i32 [[SLICE_BASE]], [[TMP0]], [[ZN]]) +// CHECK-CXX-NEXT: ret void // void test_svwrite_ver_za128_f64_1(uint32_t slice_base, svbool_t pg, svfloat64_t zn) { SME_ACLE_FUNC(svwrite_ver_za128, _f64, _m)(15, slice_base, pg, zn); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c index 3ff9f6346c4921..750eead7c705e2 100644 --- a/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c +++ b/clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c @@ -1,3 +1,4 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3 // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX @@ -5,42 +6,68 @@ #include -// CHECK-C-LABEL: @test_svzero_mask_za( -// CHECK-CXX-LABEL: @_Z19test_svzero_mask_zav( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 0) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svzero_mask_za( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.zero(i32 0) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z19test_svzero_mask_zav( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.zero(i32 0) +// CHECK-CXX-NEXT: ret void // void test_svzero_mask_za() { svzero_mask_za(0); } -// CHECK-C-LABEL: @test_svzero_mask_za_1( -// CHECK-CXX-LABEL: @_Z21test_svzero_mask_za_1v( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 176) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svzero_mask_za_1( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.zero(i32 176) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svzero_mask_za_1v( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.zero(i32 176) +// CHECK-CXX-NEXT: ret void // void test_svzero_mask_za_1() { svzero_mask_za(176); } -// CHECK-C-LABEL: @test_svzero_mask_za_2( -// CHECK-CXX-LABEL: @_Z21test_svzero_mask_za_2v( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svzero_mask_za_2( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z21test_svzero_mask_za_2v( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) +// CHECK-CXX-NEXT: ret void // void test_svzero_mask_za_2() { svzero_mask_za(255); } -// CHECK-C-LABEL: @test_svzero_za( -// CHECK-CXX-LABEL: @_Z14test_svzero_zav( -// CHECK-NEXT: entry: -// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) -// CHECK-NEXT: ret void +// CHECK-C-LABEL: define dso_local void @test_svzero_za( +// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-C-NEXT: entry: +// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) +// CHECK-C-NEXT: ret void +// +// CHECK-CXX-LABEL: define dso_local void @_Z14test_svzero_zav( +// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] { +// CHECK-CXX-NEXT: entry: +// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255) +// CHECK-CXX-NEXT: ret void // void test_svzero_za() { svzero_za(); } +//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +// CHECK: {{.*}} diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c index 217329134b1439..12533fa7169868 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c @@ -15,13 +15,13 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1_bf16( +// CHECK-LABEL: @test_svld1_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8bf16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svld1_bf16u10__SVBool_tPKu6__bf16( +// CPP-CHECK-LABEL: @_Z15test_svld1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8bf16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -32,14 +32,14 @@ svbfloat16_t test_svld1_bf16(svbool_t pg, const bfloat16_t *base) return SVE_ACLE_FUNC(svld1,_bf16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_bf16( +// CHECK-LABEL: @test_svld1_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8bf16.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svld1_vnum_bf16u10__SVBool_tPKu6__bf16l( +// CPP-CHECK-LABEL: @_Z20test_svld1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c index 94d6f978666734..c3a5186b1e8b35 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c @@ -14,12 +14,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1_s8( +// CHECK-LABEL: @test_svld1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[BASE:%.*]], i32 1, [[PG:%.*]], zeroinitializer) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld1_s8u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z13test_svld1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[BASE:%.*]], i32 1, [[PG:%.*]], zeroinitializer) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -29,13 +29,13 @@ svint8_t test_svld1_s8(svbool_t pg, const int8_t *base) return SVE_ACLE_FUNC(svld1,_s8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_s16( +// CHECK-LABEL: @test_svld1_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_s16u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z14test_svld1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -46,13 +46,13 @@ svint16_t test_svld1_s16(svbool_t pg, const int16_t *base) return SVE_ACLE_FUNC(svld1,_s16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_s32( +// CHECK-LABEL: @test_svld1_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_s32u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z14test_svld1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -63,13 +63,13 @@ svint32_t test_svld1_s32(svbool_t pg, const int32_t *base) return SVE_ACLE_FUNC(svld1,_s32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_s64( +// CHECK-LABEL: @test_svld1_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i64.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_s64u10__SVBool_tPKl( +// CPP-CHECK-LABEL: @_Z14test_svld1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i64.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -80,12 +80,12 @@ svint64_t test_svld1_s64(svbool_t pg, const int64_t *base) return SVE_ACLE_FUNC(svld1,_s64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_u8( +// CHECK-LABEL: @test_svld1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[BASE:%.*]], i32 1, [[PG:%.*]], zeroinitializer) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld1_u8u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z13test_svld1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[BASE:%.*]], i32 1, [[PG:%.*]], zeroinitializer) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -95,13 +95,13 @@ svuint8_t test_svld1_u8(svbool_t pg, const uint8_t *base) return SVE_ACLE_FUNC(svld1,_u8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_u16( +// CHECK-LABEL: @test_svld1_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_u16u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z14test_svld1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -112,13 +112,13 @@ svuint16_t test_svld1_u16(svbool_t pg, const uint16_t *base) return SVE_ACLE_FUNC(svld1,_u16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_u32( +// CHECK-LABEL: @test_svld1_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_u32u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z14test_svld1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -129,13 +129,13 @@ svuint32_t test_svld1_u32(svbool_t pg, const uint32_t *base) return SVE_ACLE_FUNC(svld1,_u32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_u64( +// CHECK-LABEL: @test_svld1_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i64.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_u64u10__SVBool_tPKm( +// CPP-CHECK-LABEL: @_Z14test_svld1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i64.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -146,13 +146,13 @@ svuint64_t test_svld1_u64(svbool_t pg, const uint64_t *base) return SVE_ACLE_FUNC(svld1,_u64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_f16( +// CHECK-LABEL: @test_svld1_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8f16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_f16u10__SVBool_tPKDh( +// CPP-CHECK-LABEL: @_Z14test_svld1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8f16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -163,13 +163,13 @@ svfloat16_t test_svld1_f16(svbool_t pg, const float16_t *base) return SVE_ACLE_FUNC(svld1,_f16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_f32( +// CHECK-LABEL: @test_svld1_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4f32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_f32u10__SVBool_tPKf( +// CPP-CHECK-LABEL: @_Z14test_svld1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4f32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -180,13 +180,13 @@ svfloat32_t test_svld1_f32(svbool_t pg, const float32_t *base) return SVE_ACLE_FUNC(svld1,_f32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_f64( +// CHECK-LABEL: @test_svld1_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2f64.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld1_f64u10__SVBool_tPKd( +// CPP-CHECK-LABEL: @_Z14test_svld1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2f64.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -197,13 +197,13 @@ svfloat64_t test_svld1_f64(svbool_t pg, const float64_t *base) return SVE_ACLE_FUNC(svld1,_f64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_s8( +// CHECK-LABEL: @test_svld1_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld1_vnum_s8u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z18test_svld1_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer) @@ -214,14 +214,14 @@ svint8_t test_svld1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_s16( +// CHECK-LABEL: @test_svld1_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i16.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_s16u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,14 +233,14 @@ svint16_t test_svld1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_s32( +// CHECK-LABEL: @test_svld1_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i32.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_s32u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -252,14 +252,14 @@ svint32_t test_svld1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_s64( +// CHECK-LABEL: @test_svld1_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i64.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_s64u10__SVBool_tPKll( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -271,13 +271,13 @@ svint64_t test_svld1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_u8( +// CHECK-LABEL: @test_svld1_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld1_vnum_u8u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z18test_svld1_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv16i8.p0(ptr [[TMP0]], i32 1, [[PG:%.*]], zeroinitializer) @@ -288,14 +288,14 @@ svuint8_t test_svld1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_u16( +// CHECK-LABEL: @test_svld1_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8i16.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_u16u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -307,14 +307,14 @@ svuint16_t test_svld1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_u32( +// CHECK-LABEL: @test_svld1_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4i32.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_u32u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -326,14 +326,14 @@ svuint32_t test_svld1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_u64( +// CHECK-LABEL: @test_svld1_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2i64.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_u64u10__SVBool_tPKml( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -345,14 +345,14 @@ svuint64_t test_svld1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_f16( +// CHECK-LABEL: @test_svld1_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv8f16.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_f16u10__SVBool_tPKDhl( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -364,14 +364,14 @@ svfloat16_t test_svld1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum return SVE_ACLE_FUNC(svld1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_f32( +// CHECK-LABEL: @test_svld1_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv4f32.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_f32u10__SVBool_tPKfl( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -383,14 +383,14 @@ svfloat32_t test_svld1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum return SVE_ACLE_FUNC(svld1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_vnum_f64( +// CHECK-LABEL: @test_svld1_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.masked.load.nxv2f64.p0(ptr [[TMP1]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld1_vnum_f64u10__SVBool_tPKdl( +// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -402,13 +402,13 @@ svfloat64_t test_svld1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum return SVE_ACLE_FUNC(svld1_vnum,_f64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_s32( +// CHECK-LABEL: @test_svld1_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z29test_svld1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -418,13 +418,13 @@ svint32_t test_svld1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_s64( +// CHECK-LABEL: @test_svld1_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z29test_svld1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -434,13 +434,13 @@ svint64_t test_svld1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_u32( +// CHECK-LABEL: @test_svld1_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z29test_svld1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -450,13 +450,13 @@ svuint32_t test_svld1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_u64( +// CHECK-LABEL: @test_svld1_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z29test_svld1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -466,13 +466,13 @@ svuint64_t test_svld1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_f32( +// CHECK-LABEL: @test_svld1_gather_u32base_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z29test_svld1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -482,13 +482,13 @@ svfloat32_t test_svld1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1_gather, _u32base, _f32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_f64( +// CHECK-LABEL: @test_svld1_gather_u64base_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z29test_svld1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -498,13 +498,13 @@ svfloat64_t test_svld1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1_gather, _u64base, _f64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s32offset_s32( +// CHECK-LABEL: @test_svld1_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -514,13 +514,13 @@ svint32_t test_svld1_gather_s32offset_s32(svbool_t pg, const int32_t *base, svin return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s64offset_s64( +// CHECK-LABEL: @test_svld1_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -530,13 +530,13 @@ svint64_t test_svld1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svin return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s32offset_u32( +// CHECK-LABEL: @test_svld1_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -546,13 +546,13 @@ svuint32_t test_svld1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, sv return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s64offset_u64( +// CHECK-LABEL: @test_svld1_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -562,13 +562,13 @@ svuint64_t test_svld1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, sv return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s32offset_f32( +// CHECK-LABEL: @test_svld1_gather_s32offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -578,13 +578,13 @@ svfloat32_t test_svld1_gather_s32offset_f32(svbool_t pg, const float32_t *base, return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s64offset_f64( +// CHECK-LABEL: @test_svld1_gather_s64offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -594,13 +594,13 @@ svfloat64_t test_svld1_gather_s64offset_f64(svbool_t pg, const float64_t *base, return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32offset_s32( +// CHECK-LABEL: @test_svld1_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -610,13 +610,13 @@ svint32_t test_svld1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svui return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64offset_s64( +// CHECK-LABEL: @test_svld1_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -626,13 +626,13 @@ svint64_t test_svld1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svui return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32offset_u32( +// CHECK-LABEL: @test_svld1_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -642,13 +642,13 @@ svuint32_t test_svld1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, sv return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64offset_u64( +// CHECK-LABEL: @test_svld1_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -658,13 +658,13 @@ svuint64_t test_svld1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, sv return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32offset_f32( +// CHECK-LABEL: @test_svld1_gather_u32offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -674,13 +674,13 @@ svfloat32_t test_svld1_gather_u32offset_f32(svbool_t pg, const float32_t *base, return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64offset_f64( +// CHECK-LABEL: @test_svld1_gather_u64offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -690,13 +690,13 @@ svfloat64_t test_svld1_gather_u64offset_f64(svbool_t pg, const float64_t *base, return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svld1_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svld1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -706,13 +706,13 @@ svint32_t test_svld1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, in return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svld1_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svld1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -722,13 +722,13 @@ svint64_t test_svld1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, in return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svld1_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svld1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -738,13 +738,13 @@ svuint32_t test_svld1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, i return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svld1_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svld1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -754,13 +754,13 @@ svuint64_t test_svld1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, i return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_offset_f32( +// CHECK-LABEL: @test_svld1_gather_u32base_offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svld1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -770,13 +770,13 @@ svfloat32_t test_svld1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_f32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_offset_f64( +// CHECK-LABEL: @test_svld1_gather_u64base_offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svld1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -786,13 +786,13 @@ svfloat64_t test_svld1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_f64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s32index_s32( +// CHECK-LABEL: @test_svld1_gather_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -802,13 +802,13 @@ svint32_t test_svld1_gather_s32index_s32(svbool_t pg, const int32_t *base, svint return SVE_ACLE_FUNC(svld1_gather_, s32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s64index_s64( +// CHECK-LABEL: @test_svld1_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -818,13 +818,13 @@ svint64_t test_svld1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint return SVE_ACLE_FUNC(svld1_gather_, s64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s32index_u32( +// CHECK-LABEL: @test_svld1_gather_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -834,13 +834,13 @@ svuint32_t test_svld1_gather_s32index_u32(svbool_t pg, const uint32_t *base, svi return SVE_ACLE_FUNC(svld1_gather_, s32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s64index_u64( +// CHECK-LABEL: @test_svld1_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -850,13 +850,13 @@ svuint64_t test_svld1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svi return SVE_ACLE_FUNC(svld1_gather_, s64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s32index_f32( +// CHECK-LABEL: @test_svld1_gather_s32index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -866,13 +866,13 @@ svfloat32_t test_svld1_gather_s32index_f32(svbool_t pg, const float32_t *base, s return SVE_ACLE_FUNC(svld1_gather_, s32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_s64index_f64( +// CHECK-LABEL: @test_svld1_gather_s64index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -882,13 +882,13 @@ svfloat64_t test_svld1_gather_s64index_f64(svbool_t pg, const float64_t *base, s return SVE_ACLE_FUNC(svld1_gather_, s64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32index_s32( +// CHECK-LABEL: @test_svld1_gather_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -898,13 +898,13 @@ svint32_t test_svld1_gather_u32index_s32(svbool_t pg, const int32_t *base, svuin return SVE_ACLE_FUNC(svld1_gather_, u32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64index_s64( +// CHECK-LABEL: @test_svld1_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -914,13 +914,13 @@ svint64_t test_svld1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuin return SVE_ACLE_FUNC(svld1_gather_, u64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32index_u32( +// CHECK-LABEL: @test_svld1_gather_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -930,13 +930,13 @@ svuint32_t test_svld1_gather_u32index_u32(svbool_t pg, const uint32_t *base, svu return SVE_ACLE_FUNC(svld1_gather_, u32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64index_u64( +// CHECK-LABEL: @test_svld1_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -946,13 +946,13 @@ svuint64_t test_svld1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svu return SVE_ACLE_FUNC(svld1_gather_, u64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32index_f32( +// CHECK-LABEL: @test_svld1_gather_u32index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -962,13 +962,13 @@ svfloat32_t test_svld1_gather_u32index_f32(svbool_t pg, const float32_t *base, s return SVE_ACLE_FUNC(svld1_gather_, u32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64index_f64( +// CHECK-LABEL: @test_svld1_gather_u64index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svld1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -978,14 +978,14 @@ svfloat64_t test_svld1_gather_u64index_f64(svbool_t pg, const float64_t *base, s return SVE_ACLE_FUNC(svld1_gather_, u64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_index_s32( +// CHECK-LABEL: @test_svld1_gather_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svld1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -996,14 +996,14 @@ svint32_t test_svld1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_index_s64( +// CHECK-LABEL: @test_svld1_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svld1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 @@ -1014,14 +1014,14 @@ svint64_t test_svld1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_index_u32( +// CHECK-LABEL: @test_svld1_gather_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svld1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -1032,14 +1032,14 @@ svuint32_t test_svld1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, in return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_index_u64( +// CHECK-LABEL: @test_svld1_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svld1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 @@ -1050,14 +1050,14 @@ svuint64_t test_svld1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, in return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_u64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u32base_index_f32( +// CHECK-LABEL: @test_svld1_gather_u32base_index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svld1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -1068,14 +1068,14 @@ svfloat32_t test_svld1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, i return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_f32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1_gather_u64base_index_f64( +// CHECK-LABEL: @test_svld1_gather_u64base_index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svld1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c index 1ffce741daaff8..321628b125f3ab 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_s16( +// CHECK-LABEL: @test_svld1sb_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sb_s16u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z16test_svld1sb_s16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -33,14 +33,14 @@ svint16_t test_svld1sb_s16(svbool_t pg, const int8_t *base) return svld1sb_s16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_s32( +// CHECK-LABEL: @test_svld1sb_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sb_s32u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z16test_svld1sb_s32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -52,14 +52,14 @@ svint32_t test_svld1sb_s32(svbool_t pg, const int8_t *base) return svld1sb_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_s64( +// CHECK-LABEL: @test_svld1sb_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sb_s64u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z16test_svld1sb_s64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -71,14 +71,14 @@ svint64_t test_svld1sb_s64(svbool_t pg, const int8_t *base) return svld1sb_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_u16( +// CHECK-LABEL: @test_svld1sb_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sb_u16u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z16test_svld1sb_u16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -90,14 +90,14 @@ svuint16_t test_svld1sb_u16(svbool_t pg, const int8_t *base) return svld1sb_u16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_u32( +// CHECK-LABEL: @test_svld1sb_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sb_u32u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z16test_svld1sb_u32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -109,14 +109,14 @@ svuint32_t test_svld1sb_u32(svbool_t pg, const int8_t *base) return svld1sb_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_u64( +// CHECK-LABEL: @test_svld1sb_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sb_u64u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z16test_svld1sb_u64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -128,7 +128,7 @@ svuint64_t test_svld1sb_u64(svbool_t pg, const int8_t *base) return svld1sb_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_vnum_s16( +// CHECK-LABEL: @test_svld1sb_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -136,7 +136,7 @@ svuint64_t test_svld1sb_u64(svbool_t pg, const int8_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sb_vnum_s16u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -149,7 +149,7 @@ svint16_t test_svld1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) return svld1sb_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_vnum_s32( +// CHECK-LABEL: @test_svld1sb_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -157,7 +157,7 @@ svint16_t test_svld1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sb_vnum_s32u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -170,7 +170,7 @@ svint32_t test_svld1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) return svld1sb_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_vnum_s64( +// CHECK-LABEL: @test_svld1sb_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -178,7 +178,7 @@ svint32_t test_svld1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sb_vnum_s64u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -191,7 +191,7 @@ svint64_t test_svld1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) return svld1sb_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_vnum_u16( +// CHECK-LABEL: @test_svld1sb_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -199,7 +199,7 @@ svint64_t test_svld1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sb_vnum_u16u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -212,7 +212,7 @@ svuint16_t test_svld1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum) return svld1sb_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_vnum_u32( +// CHECK-LABEL: @test_svld1sb_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -220,7 +220,7 @@ svuint16_t test_svld1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sb_vnum_u32u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,7 +233,7 @@ svuint32_t test_svld1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum) return svld1sb_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_vnum_u64( +// CHECK-LABEL: @test_svld1sb_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -241,7 +241,7 @@ svuint32_t test_svld1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sb_vnum_u64u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -254,14 +254,14 @@ svuint64_t test_svld1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum) return svld1sb_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u32base_s32( +// CHECK-LABEL: @test_svld1sb_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -272,14 +272,14 @@ svint32_t test_svld1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u64base_s64( +// CHECK-LABEL: @test_svld1sb_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -290,14 +290,14 @@ svint64_t test_svld1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u32base_u32( +// CHECK-LABEL: @test_svld1sb_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -308,14 +308,14 @@ svuint32_t test_svld1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u64base_u64( +// CHECK-LABEL: @test_svld1sb_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -326,14 +326,14 @@ svuint64_t test_svld1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_s32offset_s32( +// CHECK-LABEL: @test_svld1sb_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -344,14 +344,14 @@ svint32_t test_svld1sb_gather_s32offset_s32(svbool_t pg, const int8_t *base, svi return SVE_ACLE_FUNC(svld1sb_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_s64offset_s64( +// CHECK-LABEL: @test_svld1sb_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -362,14 +362,14 @@ svint64_t test_svld1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, svi return SVE_ACLE_FUNC(svld1sb_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_s32offset_u32( +// CHECK-LABEL: @test_svld1sb_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -380,14 +380,14 @@ svuint32_t test_svld1sb_gather_s32offset_u32(svbool_t pg, const int8_t *base, sv return SVE_ACLE_FUNC(svld1sb_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_s64offset_u64( +// CHECK-LABEL: @test_svld1sb_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -398,14 +398,14 @@ svuint64_t test_svld1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, sv return SVE_ACLE_FUNC(svld1sb_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u32offset_s32( +// CHECK-LABEL: @test_svld1sb_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -416,14 +416,14 @@ svint32_t test_svld1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, svu return SVE_ACLE_FUNC(svld1sb_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u64offset_s64( +// CHECK-LABEL: @test_svld1sb_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -434,14 +434,14 @@ svint64_t test_svld1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, svu return SVE_ACLE_FUNC(svld1sb_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u32offset_u32( +// CHECK-LABEL: @test_svld1sb_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -452,14 +452,14 @@ svuint32_t test_svld1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, sv return SVE_ACLE_FUNC(svld1sb_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u64offset_u64( +// CHECK-LABEL: @test_svld1sb_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -470,14 +470,14 @@ svuint64_t test_svld1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, sv return SVE_ACLE_FUNC(svld1sb_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svld1sb_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -488,14 +488,14 @@ svint32_t test_svld1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svld1sb_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -506,14 +506,14 @@ svint64_t test_svld1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svld1sb_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -524,14 +524,14 @@ svuint32_t test_svld1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sb_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svld1sb_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c index 1b89ecf04c9afc..a72892fe962221 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_s32( +// CHECK-LABEL: @test_svld1sh_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sh_s32u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z16test_svld1sh_s32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -33,14 +33,14 @@ svint32_t test_svld1sh_s32(svbool_t pg, const int16_t *base) return svld1sh_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_s64( +// CHECK-LABEL: @test_svld1sh_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sh_s64u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z16test_svld1sh_s64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -52,14 +52,14 @@ svint64_t test_svld1sh_s64(svbool_t pg, const int16_t *base) return svld1sh_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_u32( +// CHECK-LABEL: @test_svld1sh_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sh_u32u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z16test_svld1sh_u32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -71,14 +71,14 @@ svuint32_t test_svld1sh_u32(svbool_t pg, const int16_t *base) return svld1sh_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_u64( +// CHECK-LABEL: @test_svld1sh_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sh_u64u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z16test_svld1sh_u64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -90,7 +90,7 @@ svuint64_t test_svld1sh_u64(svbool_t pg, const int16_t *base) return svld1sh_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_vnum_s32( +// CHECK-LABEL: @test_svld1sh_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -98,7 +98,7 @@ svuint64_t test_svld1sh_u64(svbool_t pg, const int16_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sh_vnum_s32u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_s32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -111,7 +111,7 @@ svint32_t test_svld1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum) return svld1sh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_vnum_s64( +// CHECK-LABEL: @test_svld1sh_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -119,7 +119,7 @@ svint32_t test_svld1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sh_vnum_s64u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_s64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -132,7 +132,7 @@ svint64_t test_svld1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum) return svld1sh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_vnum_u32( +// CHECK-LABEL: @test_svld1sh_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -140,7 +140,7 @@ svint64_t test_svld1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sh_vnum_u32u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_u32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -153,7 +153,7 @@ svuint32_t test_svld1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnum) return svld1sh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_vnum_u64( +// CHECK-LABEL: @test_svld1sh_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -161,7 +161,7 @@ svuint32_t test_svld1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sh_vnum_u64u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_u64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -174,14 +174,14 @@ svuint64_t test_svld1sh_vnum_u64(svbool_t pg, const int16_t *base, int64_t vnum) return svld1sh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32base_s32( +// CHECK-LABEL: @test_svld1sh_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -192,14 +192,14 @@ svint32_t test_svld1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64base_s64( +// CHECK-LABEL: @test_svld1sh_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -210,14 +210,14 @@ svint64_t test_svld1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32base_u32( +// CHECK-LABEL: @test_svld1sh_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -228,14 +228,14 @@ svuint32_t test_svld1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64base_u64( +// CHECK-LABEL: @test_svld1sh_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -246,14 +246,14 @@ svuint64_t test_svld1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s32offset_s32( +// CHECK-LABEL: @test_svld1sh_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -264,14 +264,14 @@ svint32_t test_svld1sh_gather_s32offset_s32(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s64offset_s64( +// CHECK-LABEL: @test_svld1sh_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -282,14 +282,14 @@ svint64_t test_svld1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s32offset_u32( +// CHECK-LABEL: @test_svld1sh_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -300,14 +300,14 @@ svuint32_t test_svld1sh_gather_s32offset_u32(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svld1sh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s64offset_u64( +// CHECK-LABEL: @test_svld1sh_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -318,14 +318,14 @@ svuint64_t test_svld1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svld1sh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32offset_s32( +// CHECK-LABEL: @test_svld1sh_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -336,14 +336,14 @@ svint32_t test_svld1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64offset_s64( +// CHECK-LABEL: @test_svld1sh_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -354,14 +354,14 @@ svint64_t test_svld1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32offset_u32( +// CHECK-LABEL: @test_svld1sh_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -372,14 +372,14 @@ svuint32_t test_svld1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svld1sh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64offset_u64( +// CHECK-LABEL: @test_svld1sh_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -390,14 +390,14 @@ svuint64_t test_svld1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svld1sh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svld1sh_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -408,14 +408,14 @@ svint32_t test_svld1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svld1sh_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -426,14 +426,14 @@ svint64_t test_svld1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svld1sh_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -444,14 +444,14 @@ svuint32_t test_svld1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svld1sh_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -462,14 +462,14 @@ svuint64_t test_svld1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s32index_s32( +// CHECK-LABEL: @test_svld1sh_gather_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -480,14 +480,14 @@ svint32_t test_svld1sh_gather_s32index_s32(svbool_t pg, const int16_t *base, svi return SVE_ACLE_FUNC(svld1sh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s64index_s64( +// CHECK-LABEL: @test_svld1sh_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -498,14 +498,14 @@ svint64_t test_svld1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, svi return SVE_ACLE_FUNC(svld1sh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s32index_u32( +// CHECK-LABEL: @test_svld1sh_gather_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -516,14 +516,14 @@ svuint32_t test_svld1sh_gather_s32index_u32(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_s64index_u64( +// CHECK-LABEL: @test_svld1sh_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -534,14 +534,14 @@ svuint64_t test_svld1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32index_s32( +// CHECK-LABEL: @test_svld1sh_gather_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -552,14 +552,14 @@ svint32_t test_svld1sh_gather_u32index_s32(svbool_t pg, const int16_t *base, svu return SVE_ACLE_FUNC(svld1sh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64index_s64( +// CHECK-LABEL: @test_svld1sh_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -570,14 +570,14 @@ svint64_t test_svld1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, svu return SVE_ACLE_FUNC(svld1sh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32index_u32( +// CHECK-LABEL: @test_svld1sh_gather_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -588,14 +588,14 @@ svuint32_t test_svld1sh_gather_u32index_u32(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64index_u64( +// CHECK-LABEL: @test_svld1sh_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -606,7 +606,7 @@ svuint64_t test_svld1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, sv return SVE_ACLE_FUNC(svld1sh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32base_index_s32( +// CHECK-LABEL: @test_svld1sh_gather_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -614,7 +614,7 @@ svuint64_t test_svld1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, sv // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -626,7 +626,7 @@ svint32_t test_svld1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, i return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64base_index_s64( +// CHECK-LABEL: @test_svld1sh_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -634,7 +634,7 @@ svint32_t test_svld1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, i // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -646,7 +646,7 @@ svint64_t test_svld1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u32base_index_u32( +// CHECK-LABEL: @test_svld1sh_gather_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -654,7 +654,7 @@ svint64_t test_svld1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -666,7 +666,7 @@ svuint32_t test_svld1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sh_gather_u64base_index_u64( +// CHECK-LABEL: @test_svld1sh_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -674,7 +674,7 @@ svuint32_t test_svld1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c index bd5aa89225405e..8921c50fca533f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_s64( +// CHECK-LABEL: @test_svld1sw_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sw_s64u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z16test_svld1sw_s64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -33,14 +33,14 @@ svint64_t test_svld1sw_s64(svbool_t pg, const int32_t *base) return svld1sw_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_u64( +// CHECK-LABEL: @test_svld1sw_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1sw_u64u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z16test_svld1sw_u64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -52,7 +52,7 @@ svuint64_t test_svld1sw_u64(svbool_t pg, const int32_t *base) return svld1sw_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_vnum_s64( +// CHECK-LABEL: @test_svld1sw_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -60,7 +60,7 @@ svuint64_t test_svld1sw_u64(svbool_t pg, const int32_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sw_vnum_s64u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z21test_svld1sw_vnum_s64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -73,7 +73,7 @@ svint64_t test_svld1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum) return svld1sw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_vnum_u64( +// CHECK-LABEL: @test_svld1sw_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -81,7 +81,7 @@ svint64_t test_svld1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1sw_vnum_u64u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z21test_svld1sw_vnum_u64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -94,14 +94,14 @@ svuint64_t test_svld1sw_vnum_u64(svbool_t pg, const int32_t *base, int64_t vnum) return svld1sw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64base_s64( +// CHECK-LABEL: @test_svld1sw_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -112,14 +112,14 @@ svint64_t test_svld1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64base_u64( +// CHECK-LABEL: @test_svld1sw_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -130,14 +130,14 @@ svuint64_t test_svld1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_s64offset_s64( +// CHECK-LABEL: @test_svld1sw_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -148,14 +148,14 @@ svint64_t test_svld1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, sv return SVE_ACLE_FUNC(svld1sw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_s64offset_u64( +// CHECK-LABEL: @test_svld1sw_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -166,14 +166,14 @@ svuint64_t test_svld1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, s return SVE_ACLE_FUNC(svld1sw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64offset_s64( +// CHECK-LABEL: @test_svld1sw_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -184,14 +184,14 @@ svint64_t test_svld1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, sv return SVE_ACLE_FUNC(svld1sw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64offset_u64( +// CHECK-LABEL: @test_svld1sw_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -202,14 +202,14 @@ svuint64_t test_svld1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, s return SVE_ACLE_FUNC(svld1sw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svld1sw_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -220,14 +220,14 @@ svint64_t test_svld1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svld1sw_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -238,14 +238,14 @@ svuint64_t test_svld1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_s64index_s64( +// CHECK-LABEL: @test_svld1sw_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -256,14 +256,14 @@ svint64_t test_svld1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, svi return SVE_ACLE_FUNC(svld1sw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_s64index_u64( +// CHECK-LABEL: @test_svld1sw_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -274,14 +274,14 @@ svuint64_t test_svld1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, sv return SVE_ACLE_FUNC(svld1sw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64index_s64( +// CHECK-LABEL: @test_svld1sw_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -292,14 +292,14 @@ svint64_t test_svld1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, svu return SVE_ACLE_FUNC(svld1sw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64index_u64( +// CHECK-LABEL: @test_svld1sw_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -310,7 +310,7 @@ svuint64_t test_svld1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, sv return SVE_ACLE_FUNC(svld1sw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64base_index_s64( +// CHECK-LABEL: @test_svld1sw_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -318,7 +318,7 @@ svuint64_t test_svld1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, sv // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -330,7 +330,7 @@ svint64_t test_svld1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1sw_gather_u64base_index_u64( +// CHECK-LABEL: @test_svld1sw_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -338,7 +338,7 @@ svint64_t test_svld1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c index 03e4a5961f1c3e..9adb2f36f44f79 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_s16( +// CHECK-LABEL: @test_svld1ub_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1ub_s16u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z16test_svld1ub_s16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -33,14 +33,14 @@ svint16_t test_svld1ub_s16(svbool_t pg, const uint8_t *base) return svld1ub_s16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_s32( +// CHECK-LABEL: @test_svld1ub_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1ub_s32u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z16test_svld1ub_s32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -52,14 +52,14 @@ svint32_t test_svld1ub_s32(svbool_t pg, const uint8_t *base) return svld1ub_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_s64( +// CHECK-LABEL: @test_svld1ub_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1ub_s64u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z16test_svld1ub_s64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -71,14 +71,14 @@ svint64_t test_svld1ub_s64(svbool_t pg, const uint8_t *base) return svld1ub_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_u16( +// CHECK-LABEL: @test_svld1ub_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1ub_u16u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z16test_svld1ub_u16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv8i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -90,14 +90,14 @@ svuint16_t test_svld1ub_u16(svbool_t pg, const uint8_t *base) return svld1ub_u16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_u32( +// CHECK-LABEL: @test_svld1ub_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1ub_u32u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z16test_svld1ub_u32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -109,14 +109,14 @@ svuint32_t test_svld1ub_u32(svbool_t pg, const uint8_t *base) return svld1ub_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_u64( +// CHECK-LABEL: @test_svld1ub_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1ub_u64u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z16test_svld1ub_u64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i8.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -128,7 +128,7 @@ svuint64_t test_svld1ub_u64(svbool_t pg, const uint8_t *base) return svld1ub_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_vnum_s16( +// CHECK-LABEL: @test_svld1ub_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -136,7 +136,7 @@ svuint64_t test_svld1ub_u64(svbool_t pg, const uint8_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1ub_vnum_s16u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -149,7 +149,7 @@ svint16_t test_svld1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum) return svld1ub_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_vnum_s32( +// CHECK-LABEL: @test_svld1ub_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -157,7 +157,7 @@ svint16_t test_svld1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1ub_vnum_s32u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -170,7 +170,7 @@ svint32_t test_svld1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum) return svld1ub_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_vnum_s64( +// CHECK-LABEL: @test_svld1ub_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -178,7 +178,7 @@ svint32_t test_svld1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1ub_vnum_s64u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -191,7 +191,7 @@ svint64_t test_svld1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum) return svld1ub_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_vnum_u16( +// CHECK-LABEL: @test_svld1ub_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -199,7 +199,7 @@ svint64_t test_svld1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1ub_vnum_u16u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -212,7 +212,7 @@ svuint16_t test_svld1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnum) return svld1ub_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_vnum_u32( +// CHECK-LABEL: @test_svld1ub_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -220,7 +220,7 @@ svuint16_t test_svld1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1ub_vnum_u32u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,7 +233,7 @@ svuint32_t test_svld1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnum) return svld1ub_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_vnum_u64( +// CHECK-LABEL: @test_svld1ub_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -241,7 +241,7 @@ svuint32_t test_svld1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1ub_vnum_u64u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -254,14 +254,14 @@ svuint64_t test_svld1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnum) return svld1ub_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u32base_s32( +// CHECK-LABEL: @test_svld1ub_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -272,14 +272,14 @@ svint32_t test_svld1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u64base_s64( +// CHECK-LABEL: @test_svld1ub_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -290,14 +290,14 @@ svint64_t test_svld1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u32base_u32( +// CHECK-LABEL: @test_svld1ub_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -308,14 +308,14 @@ svuint32_t test_svld1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u64base_u64( +// CHECK-LABEL: @test_svld1ub_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -326,14 +326,14 @@ svuint64_t test_svld1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_s32offset_s32( +// CHECK-LABEL: @test_svld1ub_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -344,14 +344,14 @@ svint32_t test_svld1ub_gather_s32offset_s32(svbool_t pg, const uint8_t *base, sv return SVE_ACLE_FUNC(svld1ub_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_s64offset_s64( +// CHECK-LABEL: @test_svld1ub_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -362,14 +362,14 @@ svint64_t test_svld1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, sv return SVE_ACLE_FUNC(svld1ub_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_s32offset_u32( +// CHECK-LABEL: @test_svld1ub_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -380,14 +380,14 @@ svuint32_t test_svld1ub_gather_s32offset_u32(svbool_t pg, const uint8_t *base, s return SVE_ACLE_FUNC(svld1ub_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_s64offset_u64( +// CHECK-LABEL: @test_svld1ub_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -398,14 +398,14 @@ svuint64_t test_svld1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, s return SVE_ACLE_FUNC(svld1ub_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u32offset_s32( +// CHECK-LABEL: @test_svld1ub_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -416,14 +416,14 @@ svint32_t test_svld1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, sv return SVE_ACLE_FUNC(svld1ub_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u64offset_s64( +// CHECK-LABEL: @test_svld1ub_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -434,14 +434,14 @@ svint64_t test_svld1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, sv return SVE_ACLE_FUNC(svld1ub_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u32offset_u32( +// CHECK-LABEL: @test_svld1ub_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -452,14 +452,14 @@ svuint32_t test_svld1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, s return SVE_ACLE_FUNC(svld1ub_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u64offset_u64( +// CHECK-LABEL: @test_svld1ub_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -470,14 +470,14 @@ svuint64_t test_svld1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, s return SVE_ACLE_FUNC(svld1ub_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svld1ub_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -488,14 +488,14 @@ svint32_t test_svld1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svld1ub_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -506,14 +506,14 @@ svint64_t test_svld1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svld1ub_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -524,14 +524,14 @@ svuint32_t test_svld1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1ub_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svld1ub_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c index d22c255bbf32d0..de2b975f3d6140 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_s32( +// CHECK-LABEL: @test_svld1uh_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1uh_s32u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z16test_svld1uh_s32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -33,14 +33,14 @@ svint32_t test_svld1uh_s32(svbool_t pg, const uint16_t *base) return svld1uh_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_s64( +// CHECK-LABEL: @test_svld1uh_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1uh_s64u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z16test_svld1uh_s64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -52,14 +52,14 @@ svint64_t test_svld1uh_s64(svbool_t pg, const uint16_t *base) return svld1uh_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_u32( +// CHECK-LABEL: @test_svld1uh_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1uh_u32u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z16test_svld1uh_u32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv4i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -71,14 +71,14 @@ svuint32_t test_svld1uh_u32(svbool_t pg, const uint16_t *base) return svld1uh_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_u64( +// CHECK-LABEL: @test_svld1uh_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1uh_u64u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z16test_svld1uh_u64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i16.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -90,7 +90,7 @@ svuint64_t test_svld1uh_u64(svbool_t pg, const uint16_t *base) return svld1uh_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_vnum_s32( +// CHECK-LABEL: @test_svld1uh_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -98,7 +98,7 @@ svuint64_t test_svld1uh_u64(svbool_t pg, const uint16_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1uh_vnum_s32u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_s32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -111,7 +111,7 @@ svint32_t test_svld1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnum) return svld1uh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_vnum_s64( +// CHECK-LABEL: @test_svld1uh_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -119,7 +119,7 @@ svint32_t test_svld1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1uh_vnum_s64u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_s64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -132,7 +132,7 @@ svint64_t test_svld1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnum) return svld1uh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_vnum_u32( +// CHECK-LABEL: @test_svld1uh_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -140,7 +140,7 @@ svint64_t test_svld1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1uh_vnum_u32u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_u32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -153,7 +153,7 @@ svuint32_t test_svld1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vnum return svld1uh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_vnum_u64( +// CHECK-LABEL: @test_svld1uh_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -161,7 +161,7 @@ svuint32_t test_svld1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1uh_vnum_u64u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_u64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -174,14 +174,14 @@ svuint64_t test_svld1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vnum return svld1uh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32base_s32( +// CHECK-LABEL: @test_svld1uh_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -192,14 +192,14 @@ svint32_t test_svld1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64base_s64( +// CHECK-LABEL: @test_svld1uh_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -210,14 +210,14 @@ svint64_t test_svld1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32base_u32( +// CHECK-LABEL: @test_svld1uh_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -228,14 +228,14 @@ svuint32_t test_svld1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64base_u64( +// CHECK-LABEL: @test_svld1uh_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -246,14 +246,14 @@ svuint64_t test_svld1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s32offset_s32( +// CHECK-LABEL: @test_svld1uh_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -264,14 +264,14 @@ svint32_t test_svld1uh_gather_s32offset_s32(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s64offset_s64( +// CHECK-LABEL: @test_svld1uh_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -282,14 +282,14 @@ svint64_t test_svld1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s32offset_u32( +// CHECK-LABEL: @test_svld1uh_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -300,14 +300,14 @@ svuint32_t test_svld1uh_gather_s32offset_u32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svld1uh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s64offset_u64( +// CHECK-LABEL: @test_svld1uh_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -318,14 +318,14 @@ svuint64_t test_svld1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svld1uh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32offset_s32( +// CHECK-LABEL: @test_svld1uh_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -336,14 +336,14 @@ svint32_t test_svld1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64offset_s64( +// CHECK-LABEL: @test_svld1uh_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -354,14 +354,14 @@ svint64_t test_svld1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32offset_u32( +// CHECK-LABEL: @test_svld1uh_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -372,14 +372,14 @@ svuint32_t test_svld1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svld1uh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64offset_u64( +// CHECK-LABEL: @test_svld1uh_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -390,14 +390,14 @@ svuint64_t test_svld1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svld1uh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svld1uh_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -408,14 +408,14 @@ svint32_t test_svld1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svld1uh_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -426,14 +426,14 @@ svint64_t test_svld1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svld1uh_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -444,14 +444,14 @@ svuint32_t test_svld1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svld1uh_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -462,14 +462,14 @@ svuint64_t test_svld1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s32index_s32( +// CHECK-LABEL: @test_svld1uh_gather_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -480,14 +480,14 @@ svint32_t test_svld1uh_gather_s32index_s32(svbool_t pg, const uint16_t *base, sv return SVE_ACLE_FUNC(svld1uh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s64index_s64( +// CHECK-LABEL: @test_svld1uh_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -498,14 +498,14 @@ svint64_t test_svld1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, sv return SVE_ACLE_FUNC(svld1uh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s32index_u32( +// CHECK-LABEL: @test_svld1uh_gather_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -516,14 +516,14 @@ svuint32_t test_svld1uh_gather_s32index_u32(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_s64index_u64( +// CHECK-LABEL: @test_svld1uh_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -534,14 +534,14 @@ svuint64_t test_svld1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32index_s32( +// CHECK-LABEL: @test_svld1uh_gather_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -552,14 +552,14 @@ svint32_t test_svld1uh_gather_u32index_s32(svbool_t pg, const uint16_t *base, sv return SVE_ACLE_FUNC(svld1uh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64index_s64( +// CHECK-LABEL: @test_svld1uh_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -570,14 +570,14 @@ svint64_t test_svld1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, sv return SVE_ACLE_FUNC(svld1uh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32index_u32( +// CHECK-LABEL: @test_svld1uh_gather_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -588,14 +588,14 @@ svuint32_t test_svld1uh_gather_u32index_u32(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64index_u64( +// CHECK-LABEL: @test_svld1uh_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -606,7 +606,7 @@ svuint64_t test_svld1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, s return SVE_ACLE_FUNC(svld1uh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32base_index_s32( +// CHECK-LABEL: @test_svld1uh_gather_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -614,7 +614,7 @@ svuint64_t test_svld1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, s // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -626,7 +626,7 @@ svint32_t test_svld1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, i return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64base_index_s64( +// CHECK-LABEL: @test_svld1uh_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -634,7 +634,7 @@ svint32_t test_svld1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, i // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -646,7 +646,7 @@ svint64_t test_svld1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u32base_index_u32( +// CHECK-LABEL: @test_svld1uh_gather_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -654,7 +654,7 @@ svint64_t test_svld1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -666,7 +666,7 @@ svuint32_t test_svld1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uh_gather_u64base_index_u64( +// CHECK-LABEL: @test_svld1uh_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -674,7 +674,7 @@ svuint32_t test_svld1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c index a2df984e42ada8..bb1d3b56750f4e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_s64( +// CHECK-LABEL: @test_svld1uw_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1uw_s64u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z16test_svld1uw_s64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -33,14 +33,14 @@ svint64_t test_svld1uw_s64(svbool_t pg, const uint32_t *base) return svld1uw_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_u64( +// CHECK-LABEL: @test_svld1uw_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svld1uw_u64u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z16test_svld1uw_u64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.masked.load.nxv2i32.p0(ptr [[BASE:%.*]], i32 1, [[TMP0]], zeroinitializer) @@ -52,7 +52,7 @@ svuint64_t test_svld1uw_u64(svbool_t pg, const uint32_t *base) return svld1uw_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_vnum_s64( +// CHECK-LABEL: @test_svld1uw_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -60,7 +60,7 @@ svuint64_t test_svld1uw_u64(svbool_t pg, const uint32_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1uw_vnum_s64u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z21test_svld1uw_vnum_s64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -73,7 +73,7 @@ svint64_t test_svld1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnum) return svld1uw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_vnum_u64( +// CHECK-LABEL: @test_svld1uw_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -81,7 +81,7 @@ svint64_t test_svld1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svld1uw_vnum_u64u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z21test_svld1uw_vnum_u64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -94,14 +94,14 @@ svuint64_t test_svld1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum return svld1uw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64base_s64( +// CHECK-LABEL: @test_svld1uw_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -112,14 +112,14 @@ svint64_t test_svld1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64base_u64( +// CHECK-LABEL: @test_svld1uw_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svld1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svld1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -130,14 +130,14 @@ svuint64_t test_svld1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_s64offset_s64( +// CHECK-LABEL: @test_svld1uw_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -148,14 +148,14 @@ svint64_t test_svld1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, s return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_s64offset_u64( +// CHECK-LABEL: @test_svld1uw_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -166,14 +166,14 @@ svuint64_t test_svld1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64offset_s64( +// CHECK-LABEL: @test_svld1uw_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -184,14 +184,14 @@ svint64_t test_svld1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, s return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64offset_u64( +// CHECK-LABEL: @test_svld1uw_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svld1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -202,14 +202,14 @@ svuint64_t test_svld1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svld1uw_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -220,14 +220,14 @@ svint64_t test_svld1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svld1uw_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svld1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svld1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -238,14 +238,14 @@ svuint64_t test_svld1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_s64index_s64( +// CHECK-LABEL: @test_svld1uw_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -256,14 +256,14 @@ svint64_t test_svld1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, sv return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_s64index_u64( +// CHECK-LABEL: @test_svld1uw_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -274,14 +274,14 @@ svuint64_t test_svld1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, s return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64index_s64( +// CHECK-LABEL: @test_svld1uw_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -292,14 +292,14 @@ svint64_t test_svld1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, sv return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64index_u64( +// CHECK-LABEL: @test_svld1uw_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svld1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -310,7 +310,7 @@ svuint64_t test_svld1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, s return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64base_index_s64( +// CHECK-LABEL: @test_svld1uw_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -318,7 +318,7 @@ svuint64_t test_svld1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, s // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -330,7 +330,7 @@ svint64_t test_svld1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svld1uw_gather_u64base_index_u64( +// CHECK-LABEL: @test_svld1uw_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -338,7 +338,7 @@ svint64_t test_svld1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svld1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svld1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c index dc15f62c558d14..38ae15f858f62a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld2_bf16( +// CHECK-LABEL: @test_svld2_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -25,7 +25,7 @@ // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv16bf16.nxv8bf16( [[TMP3]], [[TMP4]], i64 8) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svld2_bf16u10__SVBool_tPKu6__bf16( +// CPP-CHECK-LABEL: @_Z15test_svld2_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -41,7 +41,7 @@ svbfloat16x2_t test_svld2_bf16(svbool_t pg, const bfloat16_t *base) } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_bf16( +// CHECK-LABEL: @test_svld2_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -52,7 +52,7 @@ svbfloat16x2_t test_svld2_bf16(svbool_t pg, const bfloat16_t *base) // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv16bf16.nxv8bf16( [[TMP4]], [[TMP5]], i64 8) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svld2_vnum_bf16u10__SVBool_tPKu6__bf16l( +// CPP-CHECK-LABEL: @_Z20test_svld2_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c index d5991cfd580ab1..84946783cd9fad 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld2_s8( +// CHECK-LABEL: @test_svld2_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , } [[TMP0]], 0 @@ -24,7 +24,7 @@ // CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv32i8.nxv16i8( [[TMP2]], [[TMP3]], i64 16) // CHECK-NEXT: ret [[TMP4]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld2_s8u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z13test_svld2_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , } [[TMP0]], 0 @@ -38,7 +38,7 @@ svint8x2_t test_svld2_s8(svbool_t pg, const int8_t *base) return SVE_ACLE_FUNC(svld2,_s8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_s16( +// CHECK-LABEL: @test_svld2_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -48,7 +48,7 @@ svint8x2_t test_svld2_s8(svbool_t pg, const int8_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv16i16.nxv8i16( [[TMP3]], [[TMP4]], i64 8) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_s16u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z14test_svld2_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -63,7 +63,7 @@ svint16x2_t test_svld2_s16(svbool_t pg, const int16_t *base) return SVE_ACLE_FUNC(svld2,_s16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_s32( +// CHECK-LABEL: @test_svld2_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -73,7 +73,7 @@ svint16x2_t test_svld2_s16(svbool_t pg, const int16_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv8i32.nxv4i32( [[TMP3]], [[TMP4]], i64 4) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_s32u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z14test_svld2_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -88,7 +88,7 @@ svint32x2_t test_svld2_s32(svbool_t pg, const int32_t *base) return SVE_ACLE_FUNC(svld2,_s32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_s64( +// CHECK-LABEL: @test_svld2_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -98,7 +98,7 @@ svint32x2_t test_svld2_s32(svbool_t pg, const int32_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv4i64.nxv2i64( [[TMP3]], [[TMP4]], i64 2) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_s64u10__SVBool_tPKl( +// CPP-CHECK-LABEL: @_Z14test_svld2_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -113,7 +113,7 @@ svint64x2_t test_svld2_s64(svbool_t pg, const int64_t *base) return SVE_ACLE_FUNC(svld2,_s64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_u8( +// CHECK-LABEL: @test_svld2_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , } [[TMP0]], 0 @@ -122,7 +122,7 @@ svint64x2_t test_svld2_s64(svbool_t pg, const int64_t *base) // CHECK-NEXT: [[TMP4:%.*]] = tail call @llvm.vector.insert.nxv32i8.nxv16i8( [[TMP2]], [[TMP3]], i64 16) // CHECK-NEXT: ret [[TMP4]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld2_u8u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z13test_svld2_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , } [[TMP0]], 0 @@ -136,7 +136,7 @@ svuint8x2_t test_svld2_u8(svbool_t pg, const uint8_t *base) return SVE_ACLE_FUNC(svld2,_u8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_u16( +// CHECK-LABEL: @test_svld2_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -146,7 +146,7 @@ svuint8x2_t test_svld2_u8(svbool_t pg, const uint8_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv16i16.nxv8i16( [[TMP3]], [[TMP4]], i64 8) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_u16u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z14test_svld2_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -161,7 +161,7 @@ svuint16x2_t test_svld2_u16(svbool_t pg, const uint16_t *base) return SVE_ACLE_FUNC(svld2,_u16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_u32( +// CHECK-LABEL: @test_svld2_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -171,7 +171,7 @@ svuint16x2_t test_svld2_u16(svbool_t pg, const uint16_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv8i32.nxv4i32( [[TMP3]], [[TMP4]], i64 4) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_u32u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z14test_svld2_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -186,7 +186,7 @@ svuint32x2_t test_svld2_u32(svbool_t pg, const uint32_t *base) return SVE_ACLE_FUNC(svld2,_u32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_u64( +// CHECK-LABEL: @test_svld2_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -196,7 +196,7 @@ svuint32x2_t test_svld2_u32(svbool_t pg, const uint32_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv4i64.nxv2i64( [[TMP3]], [[TMP4]], i64 2) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_u64u10__SVBool_tPKm( +// CPP-CHECK-LABEL: @_Z14test_svld2_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -211,7 +211,7 @@ svuint64x2_t test_svld2_u64(svbool_t pg, const uint64_t *base) return SVE_ACLE_FUNC(svld2,_u64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_f16( +// CHECK-LABEL: @test_svld2_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -221,7 +221,7 @@ svuint64x2_t test_svld2_u64(svbool_t pg, const uint64_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv16f16.nxv8f16( [[TMP3]], [[TMP4]], i64 8) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_f16u10__SVBool_tPKDh( +// CPP-CHECK-LABEL: @_Z14test_svld2_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -236,7 +236,7 @@ svfloat16x2_t test_svld2_f16(svbool_t pg, const float16_t *base) return SVE_ACLE_FUNC(svld2,_f16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_f32( +// CHECK-LABEL: @test_svld2_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -246,7 +246,7 @@ svfloat16x2_t test_svld2_f16(svbool_t pg, const float16_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv8f32.nxv4f32( [[TMP3]], [[TMP4]], i64 4) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_f32u10__SVBool_tPKf( +// CPP-CHECK-LABEL: @_Z14test_svld2_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -261,7 +261,7 @@ svfloat32x2_t test_svld2_f32(svbool_t pg, const float32_t *base) return SVE_ACLE_FUNC(svld2,_f32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_f64( +// CHECK-LABEL: @test_svld2_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -271,7 +271,7 @@ svfloat32x2_t test_svld2_f32(svbool_t pg, const float32_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv4f64.nxv2f64( [[TMP3]], [[TMP4]], i64 2) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld2_f64u10__SVBool_tPKd( +// CPP-CHECK-LABEL: @_Z14test_svld2_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -286,7 +286,7 @@ svfloat64x2_t test_svld2_f64(svbool_t pg, const float64_t *base) return SVE_ACLE_FUNC(svld2,_f64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_s8( +// CHECK-LABEL: @test_svld2_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -296,7 +296,7 @@ svfloat64x2_t test_svld2_f64(svbool_t pg, const float64_t *base) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv32i8.nxv16i8( [[TMP3]], [[TMP4]], i64 16) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld2_vnum_s8u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z18test_svld2_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -311,7 +311,7 @@ svint8x2_t test_svld2_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld2_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_s16( +// CHECK-LABEL: @test_svld2_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -322,7 +322,7 @@ svint8x2_t test_svld2_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv16i16.nxv8i16( [[TMP4]], [[TMP5]], i64 8) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_s16u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -338,7 +338,7 @@ svint16x2_t test_svld2_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld2_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_s32( +// CHECK-LABEL: @test_svld2_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -349,7 +349,7 @@ svint16x2_t test_svld2_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv8i32.nxv4i32( [[TMP4]], [[TMP5]], i64 4) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_s32u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -365,7 +365,7 @@ svint32x2_t test_svld2_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld2_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_s64( +// CHECK-LABEL: @test_svld2_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -376,7 +376,7 @@ svint32x2_t test_svld2_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv4i64.nxv2i64( [[TMP4]], [[TMP5]], i64 2) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_s64u10__SVBool_tPKll( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -392,7 +392,7 @@ svint64x2_t test_svld2_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld2_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_u8( +// CHECK-LABEL: @test_svld2_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -402,7 +402,7 @@ svint64x2_t test_svld2_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) // CHECK-NEXT: [[TMP5:%.*]] = tail call @llvm.vector.insert.nxv32i8.nxv16i8( [[TMP3]], [[TMP4]], i64 16) // CHECK-NEXT: ret [[TMP5]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld2_vnum_u8u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z18test_svld2_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , } @llvm.aarch64.sve.ld2.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -417,7 +417,7 @@ svuint8x2_t test_svld2_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld2_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_u16( +// CHECK-LABEL: @test_svld2_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -428,7 +428,7 @@ svuint8x2_t test_svld2_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv16i16.nxv8i16( [[TMP4]], [[TMP5]], i64 8) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_u16u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -444,7 +444,7 @@ svuint16x2_t test_svld2_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum return SVE_ACLE_FUNC(svld2_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_u32( +// CHECK-LABEL: @test_svld2_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -455,7 +455,7 @@ svuint16x2_t test_svld2_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv8i32.nxv4i32( [[TMP4]], [[TMP5]], i64 4) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_u32u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -471,7 +471,7 @@ svuint32x2_t test_svld2_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum return SVE_ACLE_FUNC(svld2_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_u64( +// CHECK-LABEL: @test_svld2_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -482,7 +482,7 @@ svuint32x2_t test_svld2_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv4i64.nxv2i64( [[TMP4]], [[TMP5]], i64 2) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_u64u10__SVBool_tPKml( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -498,7 +498,7 @@ svuint64x2_t test_svld2_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum return SVE_ACLE_FUNC(svld2_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_f16( +// CHECK-LABEL: @test_svld2_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -509,7 +509,7 @@ svuint64x2_t test_svld2_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv16f16.nxv8f16( [[TMP4]], [[TMP5]], i64 8) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_f16u10__SVBool_tPKDhl( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -525,7 +525,7 @@ svfloat16x2_t test_svld2_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn return SVE_ACLE_FUNC(svld2_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_f32( +// CHECK-LABEL: @test_svld2_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -536,7 +536,7 @@ svfloat16x2_t test_svld2_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv8f32.nxv4f32( [[TMP4]], [[TMP5]], i64 4) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_f32u10__SVBool_tPKfl( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -552,7 +552,7 @@ svfloat32x2_t test_svld2_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn return SVE_ACLE_FUNC(svld2_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld2_vnum_f64( +// CHECK-LABEL: @test_svld2_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -563,7 +563,7 @@ svfloat32x2_t test_svld2_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv4f64.nxv2f64( [[TMP4]], [[TMP5]], i64 2) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld2_vnum_f64u10__SVBool_tPKdl( +// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c index da3ebc06f4179a..90b3674cb1d289 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld3_bf16( +// CHECK-LABEL: @test_svld3_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -27,7 +27,7 @@ // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv24bf16.nxv8bf16( [[TMP5]], [[TMP6]], i64 16) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svld3_bf16u10__SVBool_tPKu6__bf16( +// CPP-CHECK-LABEL: @_Z15test_svld3_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -44,7 +44,7 @@ svbfloat16x3_t test_svld3_bf16(svbool_t pg, const bfloat16_t *base) return SVE_ACLE_FUNC(svld3,_bf16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_bf16( +// CHECK-LABEL: @test_svld3_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -57,7 +57,7 @@ svbfloat16x3_t test_svld3_bf16(svbool_t pg, const bfloat16_t *base) // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv24bf16.nxv8bf16( [[TMP6]], [[TMP7]], i64 16) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svld3_vnum_bf16u10__SVBool_tPKu6__bf16l( +// CPP-CHECK-LABEL: @_Z20test_svld3_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c index ebcffe37ae8d38..c56ef67007c801 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld3_s8( +// CHECK-LABEL: @test_svld3_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , } [[TMP0]], 0 @@ -26,7 +26,7 @@ // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv48i8.nxv16i8( [[TMP4]], [[TMP5]], i64 32) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld3_s8u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z13test_svld3_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , } [[TMP0]], 0 @@ -42,7 +42,7 @@ svint8x3_t test_svld3_s8(svbool_t pg, const int8_t *base) return SVE_ACLE_FUNC(svld3,_s8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_s16( +// CHECK-LABEL: @test_svld3_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -54,7 +54,7 @@ svint8x3_t test_svld3_s8(svbool_t pg, const int8_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv24i16.nxv8i16( [[TMP5]], [[TMP6]], i64 16) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_s16u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z14test_svld3_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -71,7 +71,7 @@ svint16x3_t test_svld3_s16(svbool_t pg, const int16_t *base) return SVE_ACLE_FUNC(svld3,_s16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_s32( +// CHECK-LABEL: @test_svld3_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -83,7 +83,7 @@ svint16x3_t test_svld3_s16(svbool_t pg, const int16_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv12i32.nxv4i32( [[TMP5]], [[TMP6]], i64 8) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_s32u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z14test_svld3_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -100,7 +100,7 @@ svint32x3_t test_svld3_s32(svbool_t pg, const int32_t *base) return SVE_ACLE_FUNC(svld3,_s32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_s64( +// CHECK-LABEL: @test_svld3_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -112,7 +112,7 @@ svint32x3_t test_svld3_s32(svbool_t pg, const int32_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv6i64.nxv2i64( [[TMP5]], [[TMP6]], i64 4) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_s64u10__SVBool_tPKl( +// CPP-CHECK-LABEL: @_Z14test_svld3_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -129,7 +129,7 @@ svint64x3_t test_svld3_s64(svbool_t pg, const int64_t *base) return SVE_ACLE_FUNC(svld3,_s64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_u8( +// CHECK-LABEL: @test_svld3_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , } [[TMP0]], 0 @@ -140,7 +140,7 @@ svint64x3_t test_svld3_s64(svbool_t pg, const int64_t *base) // CHECK-NEXT: [[TMP6:%.*]] = tail call @llvm.vector.insert.nxv48i8.nxv16i8( [[TMP4]], [[TMP5]], i64 32) // CHECK-NEXT: ret [[TMP6]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld3_u8u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z13test_svld3_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , } [[TMP0]], 0 @@ -156,7 +156,7 @@ svuint8x3_t test_svld3_u8(svbool_t pg, const uint8_t *base) return SVE_ACLE_FUNC(svld3,_u8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_u16( +// CHECK-LABEL: @test_svld3_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -168,7 +168,7 @@ svuint8x3_t test_svld3_u8(svbool_t pg, const uint8_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv24i16.nxv8i16( [[TMP5]], [[TMP6]], i64 16) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_u16u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z14test_svld3_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -185,7 +185,7 @@ svuint16x3_t test_svld3_u16(svbool_t pg, const uint16_t *base) return SVE_ACLE_FUNC(svld3,_u16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_u32( +// CHECK-LABEL: @test_svld3_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -197,7 +197,7 @@ svuint16x3_t test_svld3_u16(svbool_t pg, const uint16_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv12i32.nxv4i32( [[TMP5]], [[TMP6]], i64 8) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_u32u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z14test_svld3_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -214,7 +214,7 @@ svuint32x3_t test_svld3_u32(svbool_t pg, const uint32_t *base) return SVE_ACLE_FUNC(svld3,_u32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_u64( +// CHECK-LABEL: @test_svld3_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -226,7 +226,7 @@ svuint32x3_t test_svld3_u32(svbool_t pg, const uint32_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv6i64.nxv2i64( [[TMP5]], [[TMP6]], i64 4) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_u64u10__SVBool_tPKm( +// CPP-CHECK-LABEL: @_Z14test_svld3_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -243,7 +243,7 @@ svuint64x3_t test_svld3_u64(svbool_t pg, const uint64_t *base) return SVE_ACLE_FUNC(svld3,_u64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_f16( +// CHECK-LABEL: @test_svld3_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -255,7 +255,7 @@ svuint64x3_t test_svld3_u64(svbool_t pg, const uint64_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv24f16.nxv8f16( [[TMP5]], [[TMP6]], i64 16) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_f16u10__SVBool_tPKDh( +// CPP-CHECK-LABEL: @_Z14test_svld3_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -272,7 +272,7 @@ svfloat16x3_t test_svld3_f16(svbool_t pg, const float16_t *base) return SVE_ACLE_FUNC(svld3,_f16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_f32( +// CHECK-LABEL: @test_svld3_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -284,7 +284,7 @@ svfloat16x3_t test_svld3_f16(svbool_t pg, const float16_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv12f32.nxv4f32( [[TMP5]], [[TMP6]], i64 8) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_f32u10__SVBool_tPKf( +// CPP-CHECK-LABEL: @_Z14test_svld3_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -301,7 +301,7 @@ svfloat32x3_t test_svld3_f32(svbool_t pg, const float32_t *base) return SVE_ACLE_FUNC(svld3,_f32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_f64( +// CHECK-LABEL: @test_svld3_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -313,7 +313,7 @@ svfloat32x3_t test_svld3_f32(svbool_t pg, const float32_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv6f64.nxv2f64( [[TMP5]], [[TMP6]], i64 4) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld3_f64u10__SVBool_tPKd( +// CPP-CHECK-LABEL: @_Z14test_svld3_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -330,7 +330,7 @@ svfloat64x3_t test_svld3_f64(svbool_t pg, const float64_t *base) return SVE_ACLE_FUNC(svld3,_f64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_s8( +// CHECK-LABEL: @test_svld3_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -342,7 +342,7 @@ svfloat64x3_t test_svld3_f64(svbool_t pg, const float64_t *base) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv48i8.nxv16i8( [[TMP5]], [[TMP6]], i64 32) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld3_vnum_s8u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z18test_svld3_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -359,7 +359,7 @@ svint8x3_t test_svld3_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld3_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_s16( +// CHECK-LABEL: @test_svld3_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -372,7 +372,7 @@ svint8x3_t test_svld3_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv24i16.nxv8i16( [[TMP6]], [[TMP7]], i64 16) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_s16u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -390,7 +390,7 @@ svint16x3_t test_svld3_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld3_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_s32( +// CHECK-LABEL: @test_svld3_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -403,7 +403,7 @@ svint16x3_t test_svld3_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv12i32.nxv4i32( [[TMP6]], [[TMP7]], i64 8) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_s32u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -421,7 +421,7 @@ svint32x3_t test_svld3_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld3_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_s64( +// CHECK-LABEL: @test_svld3_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -434,7 +434,7 @@ svint32x3_t test_svld3_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv6i64.nxv2i64( [[TMP6]], [[TMP7]], i64 4) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_s64u10__SVBool_tPKll( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -452,7 +452,7 @@ svint64x3_t test_svld3_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld3_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_u8( +// CHECK-LABEL: @test_svld3_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -464,7 +464,7 @@ svint64x3_t test_svld3_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) // CHECK-NEXT: [[TMP7:%.*]] = tail call @llvm.vector.insert.nxv48i8.nxv16i8( [[TMP5]], [[TMP6]], i64 32) // CHECK-NEXT: ret [[TMP7]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld3_vnum_u8u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z18test_svld3_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , } @llvm.aarch64.sve.ld3.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -481,7 +481,7 @@ svuint8x3_t test_svld3_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld3_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_u16( +// CHECK-LABEL: @test_svld3_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -494,7 +494,7 @@ svuint8x3_t test_svld3_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv24i16.nxv8i16( [[TMP6]], [[TMP7]], i64 16) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_u16u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -512,7 +512,7 @@ svuint16x3_t test_svld3_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum return SVE_ACLE_FUNC(svld3_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_u32( +// CHECK-LABEL: @test_svld3_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -525,7 +525,7 @@ svuint16x3_t test_svld3_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv12i32.nxv4i32( [[TMP6]], [[TMP7]], i64 8) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_u32u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -543,7 +543,7 @@ svuint32x3_t test_svld3_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum return SVE_ACLE_FUNC(svld3_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_u64( +// CHECK-LABEL: @test_svld3_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -556,7 +556,7 @@ svuint32x3_t test_svld3_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv6i64.nxv2i64( [[TMP6]], [[TMP7]], i64 4) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_u64u10__SVBool_tPKml( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -574,7 +574,7 @@ svuint64x3_t test_svld3_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum return SVE_ACLE_FUNC(svld3_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_f16( +// CHECK-LABEL: @test_svld3_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -587,7 +587,7 @@ svuint64x3_t test_svld3_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv24f16.nxv8f16( [[TMP6]], [[TMP7]], i64 16) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_f16u10__SVBool_tPKDhl( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -605,7 +605,7 @@ svfloat16x3_t test_svld3_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn return SVE_ACLE_FUNC(svld3_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_f32( +// CHECK-LABEL: @test_svld3_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -618,7 +618,7 @@ svfloat16x3_t test_svld3_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv12f32.nxv4f32( [[TMP6]], [[TMP7]], i64 8) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_f32u10__SVBool_tPKfl( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -636,7 +636,7 @@ svfloat32x3_t test_svld3_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn return SVE_ACLE_FUNC(svld3_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld3_vnum_f64( +// CHECK-LABEL: @test_svld3_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -649,7 +649,7 @@ svfloat32x3_t test_svld3_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv6f64.nxv2f64( [[TMP6]], [[TMP7]], i64 4) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld3_vnum_f64u10__SVBool_tPKdl( +// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c index fc15b957d66bfc..be00d117523be6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld4_bf16( +// CHECK-LABEL: @test_svld4_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -29,7 +29,7 @@ // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv32bf16.nxv8bf16( [[TMP7]], [[TMP8]], i64 24) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svld4_bf16u10__SVBool_tPKu6__bf16( +// CPP-CHECK-LABEL: @_Z15test_svld4_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -48,7 +48,7 @@ svbfloat16x4_t test_svld4_bf16(svbool_t pg, const bfloat16_t *base) return SVE_ACLE_FUNC(svld4,_bf16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_bf16( +// CHECK-LABEL: @test_svld4_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -63,7 +63,7 @@ svbfloat16x4_t test_svld4_bf16(svbool_t pg, const bfloat16_t *base) // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv32bf16.nxv8bf16( [[TMP8]], [[TMP9]], i64 24) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svld4_vnum_bf16u10__SVBool_tPKu6__bf16l( +// CPP-CHECK-LABEL: @_Z20test_svld4_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c index 75c0b334b1dfef..c75c85f939df1f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svld4_s8( +// CHECK-LABEL: @test_svld4_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , , } [[TMP0]], 0 @@ -28,7 +28,7 @@ // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv64i8.nxv16i8( [[TMP6]], [[TMP7]], i64 48) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld4_s8u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z13test_svld4_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , , } [[TMP0]], 0 @@ -46,7 +46,7 @@ svint8x4_t test_svld4_s8(svbool_t pg, const int8_t *base) return SVE_ACLE_FUNC(svld4,_s8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_s16( +// CHECK-LABEL: @test_svld4_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -60,7 +60,7 @@ svint8x4_t test_svld4_s8(svbool_t pg, const int8_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv32i16.nxv8i16( [[TMP7]], [[TMP8]], i64 24) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_s16u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z14test_svld4_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -79,7 +79,7 @@ svint16x4_t test_svld4_s16(svbool_t pg, const int16_t *base) return SVE_ACLE_FUNC(svld4,_s16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_s32( +// CHECK-LABEL: @test_svld4_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -93,7 +93,7 @@ svint16x4_t test_svld4_s16(svbool_t pg, const int16_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv16i32.nxv4i32( [[TMP7]], [[TMP8]], i64 12) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_s32u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z14test_svld4_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -112,7 +112,7 @@ svint32x4_t test_svld4_s32(svbool_t pg, const int32_t *base) return SVE_ACLE_FUNC(svld4,_s32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_s64( +// CHECK-LABEL: @test_svld4_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -126,7 +126,7 @@ svint32x4_t test_svld4_s32(svbool_t pg, const int32_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv8i64.nxv2i64( [[TMP7]], [[TMP8]], i64 6) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_s64u10__SVBool_tPKl( +// CPP-CHECK-LABEL: @_Z14test_svld4_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -145,7 +145,7 @@ svint64x4_t test_svld4_s64(svbool_t pg, const int64_t *base) return SVE_ACLE_FUNC(svld4,_s64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_u8( +// CHECK-LABEL: @test_svld4_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , , } [[TMP0]], 0 @@ -158,7 +158,7 @@ svint64x4_t test_svld4_s64(svbool_t pg, const int64_t *base) // CHECK-NEXT: [[TMP8:%.*]] = tail call @llvm.vector.insert.nxv64i8.nxv16i8( [[TMP6]], [[TMP7]], i64 48) // CHECK-NEXT: ret [[TMP8]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svld4_u8u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z13test_svld4_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { , , , } [[TMP0]], 0 @@ -176,7 +176,7 @@ svuint8x4_t test_svld4_u8(svbool_t pg, const uint8_t *base) return SVE_ACLE_FUNC(svld4,_u8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_u16( +// CHECK-LABEL: @test_svld4_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -190,7 +190,7 @@ svuint8x4_t test_svld4_u8(svbool_t pg, const uint8_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv32i16.nxv8i16( [[TMP7]], [[TMP8]], i64 24) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_u16u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z14test_svld4_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -209,7 +209,7 @@ svuint16x4_t test_svld4_u16(svbool_t pg, const uint16_t *base) return SVE_ACLE_FUNC(svld4,_u16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_u32( +// CHECK-LABEL: @test_svld4_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -223,7 +223,7 @@ svuint16x4_t test_svld4_u16(svbool_t pg, const uint16_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv16i32.nxv4i32( [[TMP7]], [[TMP8]], i64 12) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_u32u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z14test_svld4_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -242,7 +242,7 @@ svuint32x4_t test_svld4_u32(svbool_t pg, const uint32_t *base) return SVE_ACLE_FUNC(svld4,_u32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_u64( +// CHECK-LABEL: @test_svld4_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -256,7 +256,7 @@ svuint32x4_t test_svld4_u32(svbool_t pg, const uint32_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv8i64.nxv2i64( [[TMP7]], [[TMP8]], i64 6) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_u64u10__SVBool_tPKm( +// CPP-CHECK-LABEL: @_Z14test_svld4_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -275,7 +275,7 @@ svuint64x4_t test_svld4_u64(svbool_t pg, const uint64_t *base) return SVE_ACLE_FUNC(svld4,_u64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_f16( +// CHECK-LABEL: @test_svld4_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -289,7 +289,7 @@ svuint64x4_t test_svld4_u64(svbool_t pg, const uint64_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv32f16.nxv8f16( [[TMP7]], [[TMP8]], i64 24) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_f16u10__SVBool_tPKDh( +// CPP-CHECK-LABEL: @_Z14test_svld4_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -308,7 +308,7 @@ svfloat16x4_t test_svld4_f16(svbool_t pg, const float16_t *base) return SVE_ACLE_FUNC(svld4,_f16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_f32( +// CHECK-LABEL: @test_svld4_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -322,7 +322,7 @@ svfloat16x4_t test_svld4_f16(svbool_t pg, const float16_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv16f32.nxv4f32( [[TMP7]], [[TMP8]], i64 12) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_f32u10__SVBool_tPKf( +// CPP-CHECK-LABEL: @_Z14test_svld4_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -341,7 +341,7 @@ svfloat32x4_t test_svld4_f32(svbool_t pg, const float32_t *base) return SVE_ACLE_FUNC(svld4,_f32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_f64( +// CHECK-LABEL: @test_svld4_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -355,7 +355,7 @@ svfloat32x4_t test_svld4_f32(svbool_t pg, const float32_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv8f64.nxv2f64( [[TMP7]], [[TMP8]], i64 6) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svld4_f64u10__SVBool_tPKd( +// CPP-CHECK-LABEL: @_Z14test_svld4_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -374,7 +374,7 @@ svfloat64x4_t test_svld4_f64(svbool_t pg, const float64_t *base) return SVE_ACLE_FUNC(svld4,_f64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_s8( +// CHECK-LABEL: @test_svld4_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -388,7 +388,7 @@ svfloat64x4_t test_svld4_f64(svbool_t pg, const float64_t *base) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv64i8.nxv16i8( [[TMP7]], [[TMP8]], i64 48) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld4_vnum_s8u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z18test_svld4_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -407,7 +407,7 @@ svint8x4_t test_svld4_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld4_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_s16( +// CHECK-LABEL: @test_svld4_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -422,7 +422,7 @@ svint8x4_t test_svld4_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv32i16.nxv8i16( [[TMP8]], [[TMP9]], i64 24) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_s16u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -442,7 +442,7 @@ svint16x4_t test_svld4_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld4_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_s32( +// CHECK-LABEL: @test_svld4_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -457,7 +457,7 @@ svint16x4_t test_svld4_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv16i32.nxv4i32( [[TMP8]], [[TMP9]], i64 12) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_s32u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -477,7 +477,7 @@ svint32x4_t test_svld4_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld4_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_s64( +// CHECK-LABEL: @test_svld4_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -492,7 +492,7 @@ svint32x4_t test_svld4_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv8i64.nxv2i64( [[TMP8]], [[TMP9]], i64 6) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_s64u10__SVBool_tPKll( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -512,7 +512,7 @@ svint64x4_t test_svld4_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld4_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_u8( +// CHECK-LABEL: @test_svld4_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -526,7 +526,7 @@ svint64x4_t test_svld4_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) // CHECK-NEXT: [[TMP9:%.*]] = tail call @llvm.vector.insert.nxv64i8.nxv16i8( [[TMP7]], [[TMP8]], i64 48) // CHECK-NEXT: ret [[TMP9]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svld4_vnum_u8u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z18test_svld4_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call { , , , } @llvm.aarch64.sve.ld4.sret.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -545,7 +545,7 @@ svuint8x4_t test_svld4_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svld4_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_u16( +// CHECK-LABEL: @test_svld4_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -560,7 +560,7 @@ svuint8x4_t test_svld4_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv32i16.nxv8i16( [[TMP8]], [[TMP9]], i64 24) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_u16u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -580,7 +580,7 @@ svuint16x4_t test_svld4_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum return SVE_ACLE_FUNC(svld4_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_u32( +// CHECK-LABEL: @test_svld4_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -595,7 +595,7 @@ svuint16x4_t test_svld4_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv16i32.nxv4i32( [[TMP8]], [[TMP9]], i64 12) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_u32u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -615,7 +615,7 @@ svuint32x4_t test_svld4_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum return SVE_ACLE_FUNC(svld4_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_u64( +// CHECK-LABEL: @test_svld4_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -630,7 +630,7 @@ svuint32x4_t test_svld4_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv8i64.nxv2i64( [[TMP8]], [[TMP9]], i64 6) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_u64u10__SVBool_tPKml( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -650,7 +650,7 @@ svuint64x4_t test_svld4_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum return SVE_ACLE_FUNC(svld4_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_f16( +// CHECK-LABEL: @test_svld4_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -665,7 +665,7 @@ svuint64x4_t test_svld4_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv32f16.nxv8f16( [[TMP8]], [[TMP9]], i64 24) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_f16u10__SVBool_tPKDhl( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -685,7 +685,7 @@ svfloat16x4_t test_svld4_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn return SVE_ACLE_FUNC(svld4_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_f32( +// CHECK-LABEL: @test_svld4_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -700,7 +700,7 @@ svfloat16x4_t test_svld4_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv16f32.nxv4f32( [[TMP8]], [[TMP9]], i64 12) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_f32u10__SVBool_tPKfl( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -720,7 +720,7 @@ svfloat32x4_t test_svld4_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn return SVE_ACLE_FUNC(svld4_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svld4_vnum_f64( +// CHECK-LABEL: @test_svld4_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -735,7 +735,7 @@ svfloat32x4_t test_svld4_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn // CHECK-NEXT: [[TMP10:%.*]] = tail call @llvm.vector.insert.nxv8f64.nxv2f64( [[TMP8]], [[TMP9]], i64 6) // CHECK-NEXT: ret [[TMP10]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svld4_vnum_f64u10__SVBool_tPKdl( +// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c index 89b68766e83bba..e9d516d63a14f4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c @@ -15,13 +15,13 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_bf16( +// CHECK-LABEL: @test_svldff1_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z17test_svldff1_bf16u10__SVBool_tPKu6__bf16( +// CPP-CHECK-LABEL: @_Z17test_svldff1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -32,14 +32,14 @@ svbfloat16_t test_svldff1_bf16(svbool_t pg, const bfloat16_t *base) return SVE_ACLE_FUNC(svldff1,_bf16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_bf16( +// CHECK-LABEL: @test_svldff1_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z22test_svldff1_vnum_bf16u10__SVBool_tPKu6__bf16l( +// CPP-CHECK-LABEL: @_Z22test_svldff1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c index cce5641c885fe5..ef0e4de8da2ef7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c @@ -14,12 +14,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_s8( +// CHECK-LABEL: @test_svldff1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svldff1_s8u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z15test_svldff1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -29,13 +29,13 @@ svint8_t test_svldff1_s8(svbool_t pg, const int8_t *base) return SVE_ACLE_FUNC(svldff1,_s8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_s16( +// CHECK-LABEL: @test_svldff1_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_s16u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z16test_svldff1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -46,13 +46,13 @@ svint16_t test_svldff1_s16(svbool_t pg, const int16_t *base) return SVE_ACLE_FUNC(svldff1,_s16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_s32( +// CHECK-LABEL: @test_svldff1_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_s32u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z16test_svldff1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -63,13 +63,13 @@ svint32_t test_svldff1_s32(svbool_t pg, const int32_t *base) return SVE_ACLE_FUNC(svldff1,_s32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_s64( +// CHECK-LABEL: @test_svldff1_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_s64u10__SVBool_tPKl( +// CPP-CHECK-LABEL: @_Z16test_svldff1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -80,12 +80,12 @@ svint64_t test_svldff1_s64(svbool_t pg, const int64_t *base) return SVE_ACLE_FUNC(svldff1,_s64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_u8( +// CHECK-LABEL: @test_svldff1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svldff1_u8u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z15test_svldff1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -95,13 +95,13 @@ svuint8_t test_svldff1_u8(svbool_t pg, const uint8_t *base) return SVE_ACLE_FUNC(svldff1,_u8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_u16( +// CHECK-LABEL: @test_svldff1_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_u16u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z16test_svldff1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -112,13 +112,13 @@ svuint16_t test_svldff1_u16(svbool_t pg, const uint16_t *base) return SVE_ACLE_FUNC(svldff1,_u16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_u32( +// CHECK-LABEL: @test_svldff1_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_u32u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z16test_svldff1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -129,13 +129,13 @@ svuint32_t test_svldff1_u32(svbool_t pg, const uint32_t *base) return SVE_ACLE_FUNC(svldff1,_u32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_u64( +// CHECK-LABEL: @test_svldff1_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_u64u10__SVBool_tPKm( +// CPP-CHECK-LABEL: @_Z16test_svldff1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -146,13 +146,13 @@ svuint64_t test_svldff1_u64(svbool_t pg, const uint64_t *base) return SVE_ACLE_FUNC(svldff1,_u64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_f16( +// CHECK-LABEL: @test_svldff1_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_f16u10__SVBool_tPKDh( +// CPP-CHECK-LABEL: @_Z16test_svldff1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -163,13 +163,13 @@ svfloat16_t test_svldff1_f16(svbool_t pg, const float16_t *base) return SVE_ACLE_FUNC(svldff1,_f16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_f32( +// CHECK-LABEL: @test_svldff1_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_f32u10__SVBool_tPKf( +// CPP-CHECK-LABEL: @_Z16test_svldff1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -180,13 +180,13 @@ svfloat32_t test_svldff1_f32(svbool_t pg, const float32_t *base) return SVE_ACLE_FUNC(svldff1,_f32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_f64( +// CHECK-LABEL: @test_svldff1_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldff1_f64u10__SVBool_tPKd( +// CPP-CHECK-LABEL: @_Z16test_svldff1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -197,13 +197,13 @@ svfloat64_t test_svldff1_f64(svbool_t pg, const float64_t *base) return SVE_ACLE_FUNC(svldff1,_f64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_s8( +// CHECK-LABEL: @test_svldff1_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svldff1_vnum_s8u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z20test_svldff1_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -214,14 +214,14 @@ svint8_t test_svldff1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldff1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_s16( +// CHECK-LABEL: @test_svldff1_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_s16u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,14 +233,14 @@ svint16_t test_svldff1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldff1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_s32( +// CHECK-LABEL: @test_svldff1_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_s32u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -252,14 +252,14 @@ svint32_t test_svldff1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldff1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_s64( +// CHECK-LABEL: @test_svldff1_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_s64u10__SVBool_tPKll( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -271,13 +271,13 @@ svint64_t test_svldff1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldff1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_u8( +// CHECK-LABEL: @test_svldff1_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svldff1_vnum_u8u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z20test_svldff1_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -288,14 +288,14 @@ svuint8_t test_svldff1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldff1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_u16( +// CHECK-LABEL: @test_svldff1_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_u16u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -307,14 +307,14 @@ svuint16_t test_svldff1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum return SVE_ACLE_FUNC(svldff1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_u32( +// CHECK-LABEL: @test_svldff1_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_u32u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -326,14 +326,14 @@ svuint32_t test_svldff1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum return SVE_ACLE_FUNC(svldff1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_u64( +// CHECK-LABEL: @test_svldff1_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_u64u10__SVBool_tPKml( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -345,14 +345,14 @@ svuint64_t test_svldff1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum return SVE_ACLE_FUNC(svldff1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_f16( +// CHECK-LABEL: @test_svldff1_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_f16u10__SVBool_tPKDhl( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -364,14 +364,14 @@ svfloat16_t test_svldff1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn return SVE_ACLE_FUNC(svldff1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_f32( +// CHECK-LABEL: @test_svldff1_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_f32u10__SVBool_tPKfl( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -383,14 +383,14 @@ svfloat32_t test_svldff1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn return SVE_ACLE_FUNC(svldff1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_vnum_f64( +// CHECK-LABEL: @test_svldff1_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldff1_vnum_f64u10__SVBool_tPKdl( +// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -402,13 +402,13 @@ svfloat64_t test_svldff1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vn return SVE_ACLE_FUNC(svldff1_vnum,_f64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_s32( +// CHECK-LABEL: @test_svldff1_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svldff1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -418,13 +418,13 @@ svint32_t test_svldff1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_s64( +// CHECK-LABEL: @test_svldff1_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svldff1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -434,13 +434,13 @@ svint64_t test_svldff1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_u32( +// CHECK-LABEL: @test_svldff1_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svldff1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -450,13 +450,13 @@ svuint32_t test_svldff1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_u64( +// CHECK-LABEL: @test_svldff1_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svldff1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -466,13 +466,13 @@ svuint64_t test_svldff1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_f32( +// CHECK-LABEL: @test_svldff1_gather_u32base_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svldff1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -482,13 +482,13 @@ svfloat32_t test_svldff1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1_gather, _u32base, _f32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_f64( +// CHECK-LABEL: @test_svldff1_gather_u64base_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svldff1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -498,13 +498,13 @@ svfloat64_t test_svldff1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1_gather, _u64base, _f64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s32offset_s32( +// CHECK-LABEL: @test_svldff1_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -514,13 +514,13 @@ svint32_t test_svldff1_gather_s32offset_s32(svbool_t pg, const int32_t *base, sv return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s64offset_s64( +// CHECK-LABEL: @test_svldff1_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -530,13 +530,13 @@ svint64_t test_svldff1_gather_s64offset_s64(svbool_t pg, const int64_t *base, sv return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s32offset_u32( +// CHECK-LABEL: @test_svldff1_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -546,13 +546,13 @@ svuint32_t test_svldff1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s64offset_u64( +// CHECK-LABEL: @test_svldff1_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -562,13 +562,13 @@ svuint64_t test_svldff1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s32offset_f32( +// CHECK-LABEL: @test_svldff1_gather_s32offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -578,13 +578,13 @@ svfloat32_t test_svldff1_gather_s32offset_f32(svbool_t pg, const float32_t *base return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s64offset_f64( +// CHECK-LABEL: @test_svldff1_gather_s64offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -594,13 +594,13 @@ svfloat64_t test_svldff1_gather_s64offset_f64(svbool_t pg, const float64_t *base return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32offset_s32( +// CHECK-LABEL: @test_svldff1_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -610,13 +610,13 @@ svint32_t test_svldff1_gather_u32offset_s32(svbool_t pg, const int32_t *base, sv return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64offset_s64( +// CHECK-LABEL: @test_svldff1_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -626,13 +626,13 @@ svint64_t test_svldff1_gather_u64offset_s64(svbool_t pg, const int64_t *base, sv return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32offset_u32( +// CHECK-LABEL: @test_svldff1_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -642,13 +642,13 @@ svuint32_t test_svldff1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64offset_u64( +// CHECK-LABEL: @test_svldff1_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -658,13 +658,13 @@ svuint64_t test_svldff1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32offset_f32( +// CHECK-LABEL: @test_svldff1_gather_u32offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -674,13 +674,13 @@ svfloat32_t test_svldff1_gather_u32offset_f32(svbool_t pg, const float32_t *base return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64offset_f64( +// CHECK-LABEL: @test_svldff1_gather_u64offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -690,13 +690,13 @@ svfloat64_t test_svldff1_gather_u64offset_f64(svbool_t pg, const float64_t *base return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svldff1_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svldff1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -706,13 +706,13 @@ svint32_t test_svldff1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svldff1_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svldff1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -722,13 +722,13 @@ svint64_t test_svldff1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svldff1_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svldff1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -738,13 +738,13 @@ svuint32_t test_svldff1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svldff1_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svldff1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -754,13 +754,13 @@ svuint64_t test_svldff1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_offset_f32( +// CHECK-LABEL: @test_svldff1_gather_u32base_offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svldff1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -770,13 +770,13 @@ svfloat32_t test_svldff1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_f32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_offset_f64( +// CHECK-LABEL: @test_svldff1_gather_u64base_offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z38test_svldff1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -786,13 +786,13 @@ svfloat64_t test_svldff1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_f64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s32index_s32( +// CHECK-LABEL: @test_svldff1_gather_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -802,13 +802,13 @@ svint32_t test_svldff1_gather_s32index_s32(svbool_t pg, const int32_t *base, svi return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s64index_s64( +// CHECK-LABEL: @test_svldff1_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -818,13 +818,13 @@ svint64_t test_svldff1_gather_s64index_s64(svbool_t pg, const int64_t *base, svi return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s32index_u32( +// CHECK-LABEL: @test_svldff1_gather_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -834,13 +834,13 @@ svuint32_t test_svldff1_gather_s32index_u32(svbool_t pg, const uint32_t *base, s return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s64index_u64( +// CHECK-LABEL: @test_svldff1_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -850,13 +850,13 @@ svuint64_t test_svldff1_gather_s64index_u64(svbool_t pg, const uint64_t *base, s return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s32index_f32( +// CHECK-LABEL: @test_svldff1_gather_s32index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -866,13 +866,13 @@ svfloat32_t test_svldff1_gather_s32index_f32(svbool_t pg, const float32_t *base, return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_s64index_f64( +// CHECK-LABEL: @test_svldff1_gather_s64index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -882,13 +882,13 @@ svfloat64_t test_svldff1_gather_s64index_f64(svbool_t pg, const float64_t *base, return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32index_s32( +// CHECK-LABEL: @test_svldff1_gather_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -898,13 +898,13 @@ svint32_t test_svldff1_gather_u32index_s32(svbool_t pg, const int32_t *base, svu return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64index_s64( +// CHECK-LABEL: @test_svldff1_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -914,13 +914,13 @@ svint64_t test_svldff1_gather_u64index_s64(svbool_t pg, const int64_t *base, svu return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32index_u32( +// CHECK-LABEL: @test_svldff1_gather_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -930,13 +930,13 @@ svuint32_t test_svldff1_gather_u32index_u32(svbool_t pg, const uint32_t *base, s return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64index_u64( +// CHECK-LABEL: @test_svldff1_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -946,13 +946,13 @@ svuint64_t test_svldff1_gather_u64index_u64(svbool_t pg, const uint64_t *base, s return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32index_f32( +// CHECK-LABEL: @test_svldff1_gather_u32index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -962,13 +962,13 @@ svfloat32_t test_svldff1_gather_u32index_f32(svbool_t pg, const float32_t *base, return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64index_f64( +// CHECK-LABEL: @test_svldff1_gather_u64index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svldff1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -978,14 +978,14 @@ svfloat64_t test_svldff1_gather_u64index_f64(svbool_t pg, const float64_t *base, return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_index_s32( +// CHECK-LABEL: @test_svldff1_gather_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svldff1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -996,14 +996,14 @@ svint32_t test_svldff1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, i return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_index_s64( +// CHECK-LABEL: @test_svldff1_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svldff1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 @@ -1014,14 +1014,14 @@ svint64_t test_svldff1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, i return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_index_u32( +// CHECK-LABEL: @test_svldff1_gather_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svldff1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -1032,14 +1032,14 @@ svuint32_t test_svldff1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_index_u64( +// CHECK-LABEL: @test_svldff1_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svldff1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 @@ -1050,14 +1050,14 @@ svuint64_t test_svldff1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_u64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u32base_index_f32( +// CHECK-LABEL: @test_svldff1_gather_u32base_index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svldff1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -1068,14 +1068,14 @@ svfloat32_t test_svldff1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_f32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1_gather_u64base_index_f64( +// CHECK-LABEL: @test_svldff1_gather_u64base_index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svldff1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c index 6fdec4cddb99af..00077bde953f22 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_s16( +// CHECK-LABEL: @test_svldff1sb_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sb_s16u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldff1sb_s16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -33,14 +33,14 @@ svint16_t test_svldff1sb_s16(svbool_t pg, const int8_t *base) return svldff1sb_s16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_s32( +// CHECK-LABEL: @test_svldff1sb_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sb_s32u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldff1sb_s32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -52,14 +52,14 @@ svint32_t test_svldff1sb_s32(svbool_t pg, const int8_t *base) return svldff1sb_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_s64( +// CHECK-LABEL: @test_svldff1sb_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sb_s64u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldff1sb_s64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -71,14 +71,14 @@ svint64_t test_svldff1sb_s64(svbool_t pg, const int8_t *base) return svldff1sb_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_u16( +// CHECK-LABEL: @test_svldff1sb_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sb_u16u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldff1sb_u16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -90,14 +90,14 @@ svuint16_t test_svldff1sb_u16(svbool_t pg, const int8_t *base) return svldff1sb_u16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_u32( +// CHECK-LABEL: @test_svldff1sb_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sb_u32u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldff1sb_u32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -109,14 +109,14 @@ svuint32_t test_svldff1sb_u32(svbool_t pg, const int8_t *base) return svldff1sb_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_u64( +// CHECK-LABEL: @test_svldff1sb_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sb_u64u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldff1sb_u64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -128,7 +128,7 @@ svuint64_t test_svldff1sb_u64(svbool_t pg, const int8_t *base) return svldff1sb_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_vnum_s16( +// CHECK-LABEL: @test_svldff1sb_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -136,7 +136,7 @@ svuint64_t test_svldff1sb_u64(svbool_t pg, const int8_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sb_vnum_s16u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -149,7 +149,7 @@ svint16_t test_svldff1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) return svldff1sb_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_vnum_s32( +// CHECK-LABEL: @test_svldff1sb_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -157,7 +157,7 @@ svint16_t test_svldff1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sb_vnum_s32u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -170,7 +170,7 @@ svint32_t test_svldff1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) return svldff1sb_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_vnum_s64( +// CHECK-LABEL: @test_svldff1sb_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -178,7 +178,7 @@ svint32_t test_svldff1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sb_vnum_s64u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -191,7 +191,7 @@ svint64_t test_svldff1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) return svldff1sb_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_vnum_u16( +// CHECK-LABEL: @test_svldff1sb_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -199,7 +199,7 @@ svint64_t test_svldff1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sb_vnum_u16u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -212,7 +212,7 @@ svuint16_t test_svldff1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum return svldff1sb_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_vnum_u32( +// CHECK-LABEL: @test_svldff1sb_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -220,7 +220,7 @@ svuint16_t test_svldff1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sb_vnum_u32u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,7 +233,7 @@ svuint32_t test_svldff1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum return svldff1sb_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_vnum_u64( +// CHECK-LABEL: @test_svldff1sb_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -241,7 +241,7 @@ svuint32_t test_svldff1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sb_vnum_u64u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -254,14 +254,14 @@ svuint64_t test_svldff1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum return svldff1sb_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u32base_s32( +// CHECK-LABEL: @test_svldff1sb_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -272,14 +272,14 @@ svint32_t test_svldff1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u64base_s64( +// CHECK-LABEL: @test_svldff1sb_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -290,14 +290,14 @@ svint64_t test_svldff1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u32base_u32( +// CHECK-LABEL: @test_svldff1sb_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -308,14 +308,14 @@ svuint32_t test_svldff1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u64base_u64( +// CHECK-LABEL: @test_svldff1sb_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -326,14 +326,14 @@ svuint64_t test_svldff1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_s32offset_s32( +// CHECK-LABEL: @test_svldff1sb_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -344,14 +344,14 @@ svint32_t test_svldff1sb_gather_s32offset_s32(svbool_t pg, const int8_t *base, s return SVE_ACLE_FUNC(svldff1sb_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_s64offset_s64( +// CHECK-LABEL: @test_svldff1sb_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -362,14 +362,14 @@ svint64_t test_svldff1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, s return SVE_ACLE_FUNC(svldff1sb_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_s32offset_u32( +// CHECK-LABEL: @test_svldff1sb_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -380,14 +380,14 @@ svuint32_t test_svldff1sb_gather_s32offset_u32(svbool_t pg, const int8_t *base, return SVE_ACLE_FUNC(svldff1sb_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_s64offset_u64( +// CHECK-LABEL: @test_svldff1sb_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -398,14 +398,14 @@ svuint64_t test_svldff1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, return SVE_ACLE_FUNC(svldff1sb_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u32offset_s32( +// CHECK-LABEL: @test_svldff1sb_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -416,14 +416,14 @@ svint32_t test_svldff1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, s return SVE_ACLE_FUNC(svldff1sb_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u64offset_s64( +// CHECK-LABEL: @test_svldff1sb_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -434,14 +434,14 @@ svint64_t test_svldff1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, s return SVE_ACLE_FUNC(svldff1sb_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u32offset_u32( +// CHECK-LABEL: @test_svldff1sb_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -452,14 +452,14 @@ svuint32_t test_svldff1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, return SVE_ACLE_FUNC(svldff1sb_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u64offset_u64( +// CHECK-LABEL: @test_svldff1sb_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -470,14 +470,14 @@ svuint64_t test_svldff1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, return SVE_ACLE_FUNC(svldff1sb_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svldff1sb_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -488,14 +488,14 @@ svint32_t test_svldff1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svldff1sb_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -506,14 +506,14 @@ svint64_t test_svldff1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svldff1sb_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -524,14 +524,14 @@ svuint32_t test_svldff1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t base return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sb_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svldff1sb_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c index ff5c3498c27254..fd326def0a269f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_s32( +// CHECK-LABEL: @test_svldff1sh_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sh_s32u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldff1sh_s32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -33,14 +33,14 @@ svint32_t test_svldff1sh_s32(svbool_t pg, const int16_t *base) return svldff1sh_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_s64( +// CHECK-LABEL: @test_svldff1sh_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sh_s64u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldff1sh_s64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -52,14 +52,14 @@ svint64_t test_svldff1sh_s64(svbool_t pg, const int16_t *base) return svldff1sh_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_u32( +// CHECK-LABEL: @test_svldff1sh_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sh_u32u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldff1sh_u32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -71,14 +71,14 @@ svuint32_t test_svldff1sh_u32(svbool_t pg, const int16_t *base) return svldff1sh_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_u64( +// CHECK-LABEL: @test_svldff1sh_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sh_u64u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldff1sh_u64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -90,7 +90,7 @@ svuint64_t test_svldff1sh_u64(svbool_t pg, const int16_t *base) return svldff1sh_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_vnum_s32( +// CHECK-LABEL: @test_svldff1sh_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -98,7 +98,7 @@ svuint64_t test_svldff1sh_u64(svbool_t pg, const int16_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sh_vnum_s32u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_s32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -111,7 +111,7 @@ svint32_t test_svldff1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum return svldff1sh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_vnum_s64( +// CHECK-LABEL: @test_svldff1sh_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -119,7 +119,7 @@ svint32_t test_svldff1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sh_vnum_s64u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_s64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -132,7 +132,7 @@ svint64_t test_svldff1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum return svldff1sh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_vnum_u32( +// CHECK-LABEL: @test_svldff1sh_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -140,7 +140,7 @@ svint64_t test_svldff1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sh_vnum_u32u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_u32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -153,7 +153,7 @@ svuint32_t test_svldff1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnu return svldff1sh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_vnum_u64( +// CHECK-LABEL: @test_svldff1sh_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -161,7 +161,7 @@ svuint32_t test_svldff1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sh_vnum_u64u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_u64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -174,14 +174,14 @@ svuint64_t test_svldff1sh_vnum_u64(svbool_t pg, const int16_t *base, int64_t vnu return svldff1sh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32base_s32( +// CHECK-LABEL: @test_svldff1sh_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -192,14 +192,14 @@ svint32_t test_svldff1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64base_s64( +// CHECK-LABEL: @test_svldff1sh_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -210,14 +210,14 @@ svint64_t test_svldff1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32base_u32( +// CHECK-LABEL: @test_svldff1sh_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -228,14 +228,14 @@ svuint32_t test_svldff1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64base_u64( +// CHECK-LABEL: @test_svldff1sh_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -246,14 +246,14 @@ svuint64_t test_svldff1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s32offset_s32( +// CHECK-LABEL: @test_svldff1sh_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -264,14 +264,14 @@ svint32_t test_svldff1sh_gather_s32offset_s32(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s64offset_s64( +// CHECK-LABEL: @test_svldff1sh_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -282,14 +282,14 @@ svint64_t test_svldff1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s32offset_u32( +// CHECK-LABEL: @test_svldff1sh_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -300,14 +300,14 @@ svuint32_t test_svldff1sh_gather_s32offset_u32(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s64offset_u64( +// CHECK-LABEL: @test_svldff1sh_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -318,14 +318,14 @@ svuint64_t test_svldff1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32offset_s32( +// CHECK-LABEL: @test_svldff1sh_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -336,14 +336,14 @@ svint32_t test_svldff1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64offset_s64( +// CHECK-LABEL: @test_svldff1sh_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -354,14 +354,14 @@ svint64_t test_svldff1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32offset_u32( +// CHECK-LABEL: @test_svldff1sh_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -372,14 +372,14 @@ svuint32_t test_svldff1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64offset_u64( +// CHECK-LABEL: @test_svldff1sh_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -390,14 +390,14 @@ svuint64_t test_svldff1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svldff1sh_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -408,14 +408,14 @@ svint32_t test_svldff1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svldff1sh_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -426,14 +426,14 @@ svint64_t test_svldff1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svldff1sh_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -444,14 +444,14 @@ svuint32_t test_svldff1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t base return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svldff1sh_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -462,14 +462,14 @@ svuint64_t test_svldff1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t base return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s32index_s32( +// CHECK-LABEL: @test_svldff1sh_gather_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -480,14 +480,14 @@ svint32_t test_svldff1sh_gather_s32index_s32(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svldff1sh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s64index_s64( +// CHECK-LABEL: @test_svldff1sh_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -498,14 +498,14 @@ svint64_t test_svldff1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svldff1sh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s32index_u32( +// CHECK-LABEL: @test_svldff1sh_gather_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -516,14 +516,14 @@ svuint32_t test_svldff1sh_gather_s32index_u32(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_s64index_u64( +// CHECK-LABEL: @test_svldff1sh_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -534,14 +534,14 @@ svuint64_t test_svldff1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32index_s32( +// CHECK-LABEL: @test_svldff1sh_gather_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -552,14 +552,14 @@ svint32_t test_svldff1sh_gather_u32index_s32(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svldff1sh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64index_s64( +// CHECK-LABEL: @test_svldff1sh_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -570,14 +570,14 @@ svint64_t test_svldff1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, s return SVE_ACLE_FUNC(svldff1sh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32index_u32( +// CHECK-LABEL: @test_svldff1sh_gather_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -588,14 +588,14 @@ svuint32_t test_svldff1sh_gather_u32index_u32(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64index_u64( +// CHECK-LABEL: @test_svldff1sh_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -606,7 +606,7 @@ svuint64_t test_svldff1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, return SVE_ACLE_FUNC(svldff1sh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32base_index_s32( +// CHECK-LABEL: @test_svldff1sh_gather_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -614,7 +614,7 @@ svuint64_t test_svldff1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -626,7 +626,7 @@ svint32_t test_svldff1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64base_index_s64( +// CHECK-LABEL: @test_svldff1sh_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -634,7 +634,7 @@ svint32_t test_svldff1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -646,7 +646,7 @@ svint64_t test_svldff1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u32base_index_u32( +// CHECK-LABEL: @test_svldff1sh_gather_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -654,7 +654,7 @@ svint64_t test_svldff1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -666,7 +666,7 @@ svuint32_t test_svldff1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sh_gather_u64base_index_u64( +// CHECK-LABEL: @test_svldff1sh_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -674,7 +674,7 @@ svuint32_t test_svldff1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c index 4d445b06746b68..848be449bff82f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_s64( +// CHECK-LABEL: @test_svldff1sw_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sw_s64u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z18test_svldff1sw_s64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -33,14 +33,14 @@ svint64_t test_svldff1sw_s64(svbool_t pg, const int32_t *base) return svldff1sw_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_u64( +// CHECK-LABEL: @test_svldff1sw_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1sw_u64u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z18test_svldff1sw_u64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -52,7 +52,7 @@ svuint64_t test_svldff1sw_u64(svbool_t pg, const int32_t *base) return svldff1sw_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_vnum_s64( +// CHECK-LABEL: @test_svldff1sw_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -60,7 +60,7 @@ svuint64_t test_svldff1sw_u64(svbool_t pg, const int32_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sw_vnum_s64u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z23test_svldff1sw_vnum_s64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -73,7 +73,7 @@ svint64_t test_svldff1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum return svldff1sw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_vnum_u64( +// CHECK-LABEL: @test_svldff1sw_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -81,7 +81,7 @@ svint64_t test_svldff1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1sw_vnum_u64u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z23test_svldff1sw_vnum_u64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -94,14 +94,14 @@ svuint64_t test_svldff1sw_vnum_u64(svbool_t pg, const int32_t *base, int64_t vnu return svldff1sw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64base_s64( +// CHECK-LABEL: @test_svldff1sw_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -112,14 +112,14 @@ svint64_t test_svldff1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64base_u64( +// CHECK-LABEL: @test_svldff1sw_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -130,14 +130,14 @@ svuint64_t test_svldff1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_s64offset_s64( +// CHECK-LABEL: @test_svldff1sw_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -148,14 +148,14 @@ svint64_t test_svldff1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, return SVE_ACLE_FUNC(svldff1sw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_s64offset_u64( +// CHECK-LABEL: @test_svldff1sw_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -166,14 +166,14 @@ svuint64_t test_svldff1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, return SVE_ACLE_FUNC(svldff1sw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64offset_s64( +// CHECK-LABEL: @test_svldff1sw_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -184,14 +184,14 @@ svint64_t test_svldff1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, return SVE_ACLE_FUNC(svldff1sw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64offset_u64( +// CHECK-LABEL: @test_svldff1sw_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -202,14 +202,14 @@ svuint64_t test_svldff1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, return SVE_ACLE_FUNC(svldff1sw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svldff1sw_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -220,14 +220,14 @@ svint64_t test_svldff1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svldff1sw_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -238,14 +238,14 @@ svuint64_t test_svldff1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t base return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_s64index_s64( +// CHECK-LABEL: @test_svldff1sw_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -256,14 +256,14 @@ svint64_t test_svldff1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, s return SVE_ACLE_FUNC(svldff1sw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_s64index_u64( +// CHECK-LABEL: @test_svldff1sw_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -274,14 +274,14 @@ svuint64_t test_svldff1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, return SVE_ACLE_FUNC(svldff1sw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64index_s64( +// CHECK-LABEL: @test_svldff1sw_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -292,14 +292,14 @@ svint64_t test_svldff1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, s return SVE_ACLE_FUNC(svldff1sw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64index_u64( +// CHECK-LABEL: @test_svldff1sw_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -310,7 +310,7 @@ svuint64_t test_svldff1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, return SVE_ACLE_FUNC(svldff1sw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64base_index_s64( +// CHECK-LABEL: @test_svldff1sw_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -318,7 +318,7 @@ svuint64_t test_svldff1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -330,7 +330,7 @@ svint64_t test_svldff1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1sw_gather_u64base_index_u64( +// CHECK-LABEL: @test_svldff1sw_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -338,7 +338,7 @@ svint64_t test_svldff1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c index 695bf20c858580..33283973575b07 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_s16( +// CHECK-LABEL: @test_svldff1ub_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1ub_s16u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldff1ub_s16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -33,14 +33,14 @@ svint16_t test_svldff1ub_s16(svbool_t pg, const uint8_t *base) return svldff1ub_s16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_s32( +// CHECK-LABEL: @test_svldff1ub_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1ub_s32u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldff1ub_s32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -52,14 +52,14 @@ svint32_t test_svldff1ub_s32(svbool_t pg, const uint8_t *base) return svldff1ub_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_s64( +// CHECK-LABEL: @test_svldff1ub_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1ub_s64u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldff1ub_s64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -71,14 +71,14 @@ svint64_t test_svldff1ub_s64(svbool_t pg, const uint8_t *base) return svldff1ub_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_u16( +// CHECK-LABEL: @test_svldff1ub_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1ub_u16u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldff1ub_u16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -90,14 +90,14 @@ svuint16_t test_svldff1ub_u16(svbool_t pg, const uint8_t *base) return svldff1ub_u16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_u32( +// CHECK-LABEL: @test_svldff1ub_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1ub_u32u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldff1ub_u32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -109,14 +109,14 @@ svuint32_t test_svldff1ub_u32(svbool_t pg, const uint8_t *base) return svldff1ub_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_u64( +// CHECK-LABEL: @test_svldff1ub_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1ub_u64u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldff1ub_u64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -128,7 +128,7 @@ svuint64_t test_svldff1ub_u64(svbool_t pg, const uint8_t *base) return svldff1ub_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_vnum_s16( +// CHECK-LABEL: @test_svldff1ub_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -136,7 +136,7 @@ svuint64_t test_svldff1ub_u64(svbool_t pg, const uint8_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1ub_vnum_s16u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -149,7 +149,7 @@ svint16_t test_svldff1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum return svldff1ub_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_vnum_s32( +// CHECK-LABEL: @test_svldff1ub_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -157,7 +157,7 @@ svint16_t test_svldff1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1ub_vnum_s32u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -170,7 +170,7 @@ svint32_t test_svldff1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum return svldff1ub_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_vnum_s64( +// CHECK-LABEL: @test_svldff1ub_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -178,7 +178,7 @@ svint32_t test_svldff1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1ub_vnum_s64u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -191,7 +191,7 @@ svint64_t test_svldff1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum return svldff1ub_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_vnum_u16( +// CHECK-LABEL: @test_svldff1ub_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -199,7 +199,7 @@ svint64_t test_svldff1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1ub_vnum_u16u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -212,7 +212,7 @@ svuint16_t test_svldff1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnu return svldff1ub_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_vnum_u32( +// CHECK-LABEL: @test_svldff1ub_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -220,7 +220,7 @@ svuint16_t test_svldff1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1ub_vnum_u32u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,7 +233,7 @@ svuint32_t test_svldff1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnu return svldff1ub_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_vnum_u64( +// CHECK-LABEL: @test_svldff1ub_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -241,7 +241,7 @@ svuint32_t test_svldff1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1ub_vnum_u64u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -254,14 +254,14 @@ svuint64_t test_svldff1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnu return svldff1ub_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u32base_s32( +// CHECK-LABEL: @test_svldff1ub_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -272,14 +272,14 @@ svint32_t test_svldff1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u64base_s64( +// CHECK-LABEL: @test_svldff1ub_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -290,14 +290,14 @@ svint64_t test_svldff1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u32base_u32( +// CHECK-LABEL: @test_svldff1ub_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -308,14 +308,14 @@ svuint32_t test_svldff1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u64base_u64( +// CHECK-LABEL: @test_svldff1ub_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -326,14 +326,14 @@ svuint64_t test_svldff1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_s32offset_s32( +// CHECK-LABEL: @test_svldff1ub_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -344,14 +344,14 @@ svint32_t test_svldff1ub_gather_s32offset_s32(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_s64offset_s64( +// CHECK-LABEL: @test_svldff1ub_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -362,14 +362,14 @@ svint64_t test_svldff1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_s32offset_u32( +// CHECK-LABEL: @test_svldff1ub_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -380,14 +380,14 @@ svuint32_t test_svldff1ub_gather_s32offset_u32(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_s64offset_u64( +// CHECK-LABEL: @test_svldff1ub_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -398,14 +398,14 @@ svuint64_t test_svldff1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u32offset_s32( +// CHECK-LABEL: @test_svldff1ub_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -416,14 +416,14 @@ svint32_t test_svldff1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u64offset_s64( +// CHECK-LABEL: @test_svldff1ub_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -434,14 +434,14 @@ svint64_t test_svldff1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u32offset_u32( +// CHECK-LABEL: @test_svldff1ub_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -452,14 +452,14 @@ svuint32_t test_svldff1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u64offset_u64( +// CHECK-LABEL: @test_svldff1ub_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -470,14 +470,14 @@ svuint64_t test_svldff1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, return SVE_ACLE_FUNC(svldff1ub_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svldff1ub_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -488,14 +488,14 @@ svint32_t test_svldff1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svldff1ub_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -506,14 +506,14 @@ svint64_t test_svldff1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svldff1ub_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -524,14 +524,14 @@ svuint32_t test_svldff1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t base return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1ub_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svldff1ub_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c index 522befc15b6cb6..81f14ae7ff7218 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_s32( +// CHECK-LABEL: @test_svldff1uh_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1uh_s32u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldff1uh_s32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -33,14 +33,14 @@ svint32_t test_svldff1uh_s32(svbool_t pg, const uint16_t *base) return svldff1uh_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_s64( +// CHECK-LABEL: @test_svldff1uh_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1uh_s64u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldff1uh_s64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -52,14 +52,14 @@ svint64_t test_svldff1uh_s64(svbool_t pg, const uint16_t *base) return svldff1uh_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_u32( +// CHECK-LABEL: @test_svldff1uh_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1uh_u32u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldff1uh_u32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -71,14 +71,14 @@ svuint32_t test_svldff1uh_u32(svbool_t pg, const uint16_t *base) return svldff1uh_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_u64( +// CHECK-LABEL: @test_svldff1uh_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1uh_u64u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldff1uh_u64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -90,7 +90,7 @@ svuint64_t test_svldff1uh_u64(svbool_t pg, const uint16_t *base) return svldff1uh_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_vnum_s32( +// CHECK-LABEL: @test_svldff1uh_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -98,7 +98,7 @@ svuint64_t test_svldff1uh_u64(svbool_t pg, const uint16_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1uh_vnum_s32u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_s32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -111,7 +111,7 @@ svint32_t test_svldff1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnu return svldff1uh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_vnum_s64( +// CHECK-LABEL: @test_svldff1uh_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -119,7 +119,7 @@ svint32_t test_svldff1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1uh_vnum_s64u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_s64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -132,7 +132,7 @@ svint64_t test_svldff1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnu return svldff1uh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_vnum_u32( +// CHECK-LABEL: @test_svldff1uh_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -140,7 +140,7 @@ svint64_t test_svldff1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1uh_vnum_u32u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_u32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -153,7 +153,7 @@ svuint32_t test_svldff1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vn return svldff1uh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_vnum_u64( +// CHECK-LABEL: @test_svldff1uh_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -161,7 +161,7 @@ svuint32_t test_svldff1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vn // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1uh_vnum_u64u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_u64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -174,14 +174,14 @@ svuint64_t test_svldff1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vn return svldff1uh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32base_s32( +// CHECK-LABEL: @test_svldff1uh_gather_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -192,14 +192,14 @@ svint32_t test_svldff1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64base_s64( +// CHECK-LABEL: @test_svldff1uh_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -210,14 +210,14 @@ svint64_t test_svldff1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32base_u32( +// CHECK-LABEL: @test_svldff1uh_gather_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) @@ -228,14 +228,14 @@ svuint32_t test_svldff1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64base_u64( +// CHECK-LABEL: @test_svldff1uh_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -246,14 +246,14 @@ svuint64_t test_svldff1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s32offset_s32( +// CHECK-LABEL: @test_svldff1uh_gather_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -264,14 +264,14 @@ svint32_t test_svldff1uh_gather_s32offset_s32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s64offset_s64( +// CHECK-LABEL: @test_svldff1uh_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -282,14 +282,14 @@ svint64_t test_svldff1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s32offset_u32( +// CHECK-LABEL: @test_svldff1uh_gather_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -300,14 +300,14 @@ svuint32_t test_svldff1uh_gather_s32offset_u32(svbool_t pg, const uint16_t *base return SVE_ACLE_FUNC(svldff1uh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s64offset_u64( +// CHECK-LABEL: @test_svldff1uh_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -318,14 +318,14 @@ svuint64_t test_svldff1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base return SVE_ACLE_FUNC(svldff1uh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32offset_s32( +// CHECK-LABEL: @test_svldff1uh_gather_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -336,14 +336,14 @@ svint32_t test_svldff1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64offset_s64( +// CHECK-LABEL: @test_svldff1uh_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -354,14 +354,14 @@ svint64_t test_svldff1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32offset_u32( +// CHECK-LABEL: @test_svldff1uh_gather_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -372,14 +372,14 @@ svuint32_t test_svldff1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base return SVE_ACLE_FUNC(svldff1uh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64offset_u64( +// CHECK-LABEL: @test_svldff1uh_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -390,14 +390,14 @@ svuint64_t test_svldff1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base return SVE_ACLE_FUNC(svldff1uh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32base_offset_s32( +// CHECK-LABEL: @test_svldff1uh_gather_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -408,14 +408,14 @@ svint32_t test_svldff1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svldff1uh_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -426,14 +426,14 @@ svint64_t test_svldff1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32base_offset_u32( +// CHECK-LABEL: @test_svldff1uh_gather_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -444,14 +444,14 @@ svuint32_t test_svldff1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t base return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svldff1uh_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -462,14 +462,14 @@ svuint64_t test_svldff1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t base return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s32index_s32( +// CHECK-LABEL: @test_svldff1uh_gather_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -480,14 +480,14 @@ svint32_t test_svldff1uh_gather_s32index_s32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s64index_s64( +// CHECK-LABEL: @test_svldff1uh_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -498,14 +498,14 @@ svint64_t test_svldff1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s32index_u32( +// CHECK-LABEL: @test_svldff1uh_gather_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -516,14 +516,14 @@ svuint32_t test_svldff1uh_gather_s32index_u32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_s64index_u64( +// CHECK-LABEL: @test_svldff1uh_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -534,14 +534,14 @@ svuint64_t test_svldff1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32index_s32( +// CHECK-LABEL: @test_svldff1uh_gather_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -552,14 +552,14 @@ svint32_t test_svldff1uh_gather_u32index_s32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64index_s64( +// CHECK-LABEL: @test_svldff1uh_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -570,14 +570,14 @@ svint64_t test_svldff1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32index_u32( +// CHECK-LABEL: @test_svldff1uh_gather_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -588,14 +588,14 @@ svuint32_t test_svldff1uh_gather_u32index_u32(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64index_u64( +// CHECK-LABEL: @test_svldff1uh_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -606,7 +606,7 @@ svuint64_t test_svldff1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, return SVE_ACLE_FUNC(svldff1uh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32base_index_s32( +// CHECK-LABEL: @test_svldff1uh_gather_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -614,7 +614,7 @@ svuint64_t test_svldff1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -626,7 +626,7 @@ svint32_t test_svldff1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64base_index_s64( +// CHECK-LABEL: @test_svldff1uh_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -634,7 +634,7 @@ svint32_t test_svldff1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -646,7 +646,7 @@ svint64_t test_svldff1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u32base_index_u32( +// CHECK-LABEL: @test_svldff1uh_gather_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -654,7 +654,7 @@ svint64_t test_svldff1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -666,7 +666,7 @@ svuint32_t test_svldff1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uh_gather_u64base_index_u64( +// CHECK-LABEL: @test_svldff1uh_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 @@ -674,7 +674,7 @@ svuint32_t test_svldff1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c index 573e52fad1bdb4..c1a647ba2d1734 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_s64( +// CHECK-LABEL: @test_svldff1uw_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1uw_s64u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z18test_svldff1uw_s64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -33,14 +33,14 @@ svint64_t test_svldff1uw_s64(svbool_t pg, const uint32_t *base) return svldff1uw_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_u64( +// CHECK-LABEL: @test_svldff1uw_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldff1uw_u64u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z18test_svldff1uw_u64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -52,7 +52,7 @@ svuint64_t test_svldff1uw_u64(svbool_t pg, const uint32_t *base) return svldff1uw_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_vnum_s64( +// CHECK-LABEL: @test_svldff1uw_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -60,7 +60,7 @@ svuint64_t test_svldff1uw_u64(svbool_t pg, const uint32_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1uw_vnum_s64u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z23test_svldff1uw_vnum_s64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -73,7 +73,7 @@ svint64_t test_svldff1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnu return svldff1uw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_vnum_u64( +// CHECK-LABEL: @test_svldff1uw_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -81,7 +81,7 @@ svint64_t test_svldff1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldff1uw_vnum_u64u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z23test_svldff1uw_vnum_u64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -94,14 +94,14 @@ svuint64_t test_svldff1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vn return svldff1uw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64base_s64( +// CHECK-LABEL: @test_svldff1uw_gather_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -112,14 +112,14 @@ svint64_t test_svldff1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64base_u64( +// CHECK-LABEL: @test_svldff1uw_gather_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svldff1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z33test_svldff1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) @@ -130,14 +130,14 @@ svuint64_t test_svldff1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_s64offset_s64( +// CHECK-LABEL: @test_svldff1uw_gather_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -148,14 +148,14 @@ svint64_t test_svldff1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_s64offset_u64( +// CHECK-LABEL: @test_svldff1uw_gather_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -166,14 +166,14 @@ svuint64_t test_svldff1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64offset_s64( +// CHECK-LABEL: @test_svldff1uw_gather_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -184,14 +184,14 @@ svint64_t test_svldff1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64offset_u64( +// CHECK-LABEL: @test_svldff1uw_gather_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z35test_svldff1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -202,14 +202,14 @@ svuint64_t test_svldff1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64base_offset_s64( +// CHECK-LABEL: @test_svldff1uw_gather_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -220,14 +220,14 @@ svint64_t test_svldff1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64base_offset_u64( +// CHECK-LABEL: @test_svldff1uw_gather_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z40test_svldff1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z40test_svldff1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -238,14 +238,14 @@ svuint64_t test_svldff1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t base return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_s64index_s64( +// CHECK-LABEL: @test_svldff1uw_gather_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -256,14 +256,14 @@ svint64_t test_svldff1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_s64index_u64( +// CHECK-LABEL: @test_svldff1uw_gather_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -274,14 +274,14 @@ svuint64_t test_svldff1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64index_s64( +// CHECK-LABEL: @test_svldff1uw_gather_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -292,14 +292,14 @@ svint64_t test_svldff1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64index_u64( +// CHECK-LABEL: @test_svldff1uw_gather_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z34test_svldff1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -310,7 +310,7 @@ svuint64_t test_svldff1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64base_index_s64( +// CHECK-LABEL: @test_svldff1uw_gather_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -318,7 +318,7 @@ svuint64_t test_svldff1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -330,7 +330,7 @@ svint64_t test_svldff1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: define {{[^@]+}}@test_svldff1uw_gather_u64base_index_u64( +// CHECK-LABEL: @test_svldff1uw_gather_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -338,7 +338,7 @@ svint64_t test_svldff1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z39test_svldff1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z39test_svldff1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c index c93122fcca0a5e..23893e1e0eda5f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c @@ -14,13 +14,13 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_bf16( +// CHECK-LABEL: @test_svldnf1_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z17test_svldnf1_bf16u10__SVBool_tPKu6__bf16( +// CPP-CHECK-LABEL: @_Z17test_svldnf1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -31,14 +31,14 @@ svbfloat16_t test_svldnf1_bf16(svbool_t pg, const bfloat16_t *base) return SVE_ACLE_FUNC(svldnf1,_bf16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_bf16( +// CHECK-LABEL: @test_svldnf1_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z22test_svldnf1_vnum_bf16u10__SVBool_tPKu6__bf16l( +// CPP-CHECK-LABEL: @_Z22test_svldnf1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c index b7b6e33f831972..7b47c2c12b5f74 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c @@ -14,12 +14,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_s8( +// CHECK-LABEL: @test_svldnf1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svldnf1_s8u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z15test_svldnf1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -29,13 +29,13 @@ svint8_t test_svldnf1_s8(svbool_t pg, const int8_t *base) return SVE_ACLE_FUNC(svldnf1,_s8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_s16( +// CHECK-LABEL: @test_svldnf1_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_s16u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -46,13 +46,13 @@ svint16_t test_svldnf1_s16(svbool_t pg, const int16_t *base) return SVE_ACLE_FUNC(svldnf1,_s16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_s32( +// CHECK-LABEL: @test_svldnf1_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_s32u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -63,13 +63,13 @@ svint32_t test_svldnf1_s32(svbool_t pg, const int32_t *base) return SVE_ACLE_FUNC(svldnf1,_s32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_s64( +// CHECK-LABEL: @test_svldnf1_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_s64u10__SVBool_tPKl( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -80,12 +80,12 @@ svint64_t test_svldnf1_s64(svbool_t pg, const int64_t *base) return SVE_ACLE_FUNC(svldnf1,_s64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_u8( +// CHECK-LABEL: @test_svldnf1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svldnf1_u8u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z15test_svldnf1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -95,13 +95,13 @@ svuint8_t test_svldnf1_u8(svbool_t pg, const uint8_t *base) return SVE_ACLE_FUNC(svldnf1,_u8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_u16( +// CHECK-LABEL: @test_svldnf1_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_u16u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -112,13 +112,13 @@ svuint16_t test_svldnf1_u16(svbool_t pg, const uint16_t *base) return SVE_ACLE_FUNC(svldnf1,_u16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_u32( +// CHECK-LABEL: @test_svldnf1_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_u32u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -129,13 +129,13 @@ svuint32_t test_svldnf1_u32(svbool_t pg, const uint32_t *base) return SVE_ACLE_FUNC(svldnf1,_u32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_u64( +// CHECK-LABEL: @test_svldnf1_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_u64u10__SVBool_tPKm( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -146,13 +146,13 @@ svuint64_t test_svldnf1_u64(svbool_t pg, const uint64_t *base) return SVE_ACLE_FUNC(svldnf1,_u64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_f16( +// CHECK-LABEL: @test_svldnf1_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_f16u10__SVBool_tPKDh( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -163,13 +163,13 @@ svfloat16_t test_svldnf1_f16(svbool_t pg, const float16_t *base) return SVE_ACLE_FUNC(svldnf1,_f16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_f32( +// CHECK-LABEL: @test_svldnf1_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_f32u10__SVBool_tPKf( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -180,13 +180,13 @@ svfloat32_t test_svldnf1_f32(svbool_t pg, const float32_t *base) return SVE_ACLE_FUNC(svldnf1,_f32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_f64( +// CHECK-LABEL: @test_svldnf1_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnf1_f64u10__SVBool_tPKd( +// CPP-CHECK-LABEL: @_Z16test_svldnf1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -197,13 +197,13 @@ svfloat64_t test_svldnf1_f64(svbool_t pg, const float64_t *base) return SVE_ACLE_FUNC(svldnf1,_f64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_s8( +// CHECK-LABEL: @test_svldnf1_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svldnf1_vnum_s8u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z20test_svldnf1_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -214,14 +214,14 @@ svint8_t test_svldnf1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnf1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_s16( +// CHECK-LABEL: @test_svldnf1_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_s16u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,14 +233,14 @@ svint16_t test_svldnf1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnf1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_s32( +// CHECK-LABEL: @test_svldnf1_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_s32u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -252,14 +252,14 @@ svint32_t test_svldnf1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnf1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_s64( +// CHECK-LABEL: @test_svldnf1_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_s64u10__SVBool_tPKll( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -271,13 +271,13 @@ svint64_t test_svldnf1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnf1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_u8( +// CHECK-LABEL: @test_svldnf1_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svldnf1_vnum_u8u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z20test_svldnf1_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -288,14 +288,14 @@ svuint8_t test_svldnf1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnf1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_u16( +// CHECK-LABEL: @test_svldnf1_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_u16u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -307,14 +307,14 @@ svuint16_t test_svldnf1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum return SVE_ACLE_FUNC(svldnf1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_u32( +// CHECK-LABEL: @test_svldnf1_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_u32u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -326,14 +326,14 @@ svuint32_t test_svldnf1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum return SVE_ACLE_FUNC(svldnf1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_u64( +// CHECK-LABEL: @test_svldnf1_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_u64u10__SVBool_tPKml( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -345,14 +345,14 @@ svuint64_t test_svldnf1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum return SVE_ACLE_FUNC(svldnf1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_f16( +// CHECK-LABEL: @test_svldnf1_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_f16u10__SVBool_tPKDhl( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -364,14 +364,14 @@ svfloat16_t test_svldnf1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn return SVE_ACLE_FUNC(svldnf1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_f32( +// CHECK-LABEL: @test_svldnf1_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_f32u10__SVBool_tPKfl( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -383,14 +383,14 @@ svfloat32_t test_svldnf1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn return SVE_ACLE_FUNC(svldnf1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1_vnum_f64( +// CHECK-LABEL: @test_svldnf1_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnf1_vnum_f64u10__SVBool_tPKdl( +// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c index aa10b95a9d929f..f5c89606eed2db 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c @@ -5,14 +5,14 @@ // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s #include -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_s16( +// CHECK-LABEL: @test_svldnf1sb_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sb_s16u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -24,14 +24,14 @@ svint16_t test_svldnf1sb_s16(svbool_t pg, const int8_t *base) return svldnf1sb_s16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_s32( +// CHECK-LABEL: @test_svldnf1sb_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sb_s32u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -43,14 +43,14 @@ svint32_t test_svldnf1sb_s32(svbool_t pg, const int8_t *base) return svldnf1sb_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_s64( +// CHECK-LABEL: @test_svldnf1sb_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sb_s64u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -62,14 +62,14 @@ svint64_t test_svldnf1sb_s64(svbool_t pg, const int8_t *base) return svldnf1sb_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_u16( +// CHECK-LABEL: @test_svldnf1sb_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sb_u16u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u16u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -81,14 +81,14 @@ svuint16_t test_svldnf1sb_u16(svbool_t pg, const int8_t *base) return svldnf1sb_u16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_u32( +// CHECK-LABEL: @test_svldnf1sb_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sb_u32u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u32u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -100,14 +100,14 @@ svuint32_t test_svldnf1sb_u32(svbool_t pg, const int8_t *base) return svldnf1sb_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_u64( +// CHECK-LABEL: @test_svldnf1sb_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sb_u64u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u64u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -119,7 +119,7 @@ svuint64_t test_svldnf1sb_u64(svbool_t pg, const int8_t *base) return svldnf1sb_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_vnum_s16( +// CHECK-LABEL: @test_svldnf1sb_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -127,7 +127,7 @@ svuint64_t test_svldnf1sb_u64(svbool_t pg, const int8_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sb_vnum_s16u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -140,7 +140,7 @@ svint16_t test_svldnf1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) return svldnf1sb_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_vnum_s32( +// CHECK-LABEL: @test_svldnf1sb_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -148,7 +148,7 @@ svint16_t test_svldnf1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sb_vnum_s32u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -161,7 +161,7 @@ svint32_t test_svldnf1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) return svldnf1sb_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_vnum_s64( +// CHECK-LABEL: @test_svldnf1sb_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -169,7 +169,7 @@ svint32_t test_svldnf1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sb_vnum_s64u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -182,7 +182,7 @@ svint64_t test_svldnf1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) return svldnf1sb_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_vnum_u16( +// CHECK-LABEL: @test_svldnf1sb_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -190,7 +190,7 @@ svint64_t test_svldnf1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sb_vnum_u16u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u16u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -203,7 +203,7 @@ svuint16_t test_svldnf1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum return svldnf1sb_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_vnum_u32( +// CHECK-LABEL: @test_svldnf1sb_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -211,7 +211,7 @@ svuint16_t test_svldnf1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sb_vnum_u32u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u32u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -224,7 +224,7 @@ svuint32_t test_svldnf1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum return svldnf1sb_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sb_vnum_u64( +// CHECK-LABEL: @test_svldnf1sb_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -232,7 +232,7 @@ svuint32_t test_svldnf1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sb_vnum_u64u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u64u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c index 02ba7d9a892a96..73f8a7db982fe6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c @@ -5,14 +5,14 @@ // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s #include -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_s32( +// CHECK-LABEL: @test_svldnf1sh_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sh_s32u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_s32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -24,14 +24,14 @@ svint32_t test_svldnf1sh_s32(svbool_t pg, const int16_t *base) return svldnf1sh_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_s64( +// CHECK-LABEL: @test_svldnf1sh_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sh_s64u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_s64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -43,14 +43,14 @@ svint64_t test_svldnf1sh_s64(svbool_t pg, const int16_t *base) return svldnf1sh_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_u32( +// CHECK-LABEL: @test_svldnf1sh_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sh_u32u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_u32u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -62,14 +62,14 @@ svuint32_t test_svldnf1sh_u32(svbool_t pg, const int16_t *base) return svldnf1sh_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_u64( +// CHECK-LABEL: @test_svldnf1sh_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sh_u64u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_u64u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -81,7 +81,7 @@ svuint64_t test_svldnf1sh_u64(svbool_t pg, const int16_t *base) return svldnf1sh_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_vnum_s32( +// CHECK-LABEL: @test_svldnf1sh_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -89,7 +89,7 @@ svuint64_t test_svldnf1sh_u64(svbool_t pg, const int16_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sh_vnum_s32u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_s32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -102,7 +102,7 @@ svint32_t test_svldnf1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum return svldnf1sh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_vnum_s64( +// CHECK-LABEL: @test_svldnf1sh_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -110,7 +110,7 @@ svint32_t test_svldnf1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sh_vnum_s64u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_s64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -123,7 +123,7 @@ svint64_t test_svldnf1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum return svldnf1sh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_vnum_u32( +// CHECK-LABEL: @test_svldnf1sh_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -131,7 +131,7 @@ svint64_t test_svldnf1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sh_vnum_u32u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_u32u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -144,7 +144,7 @@ svuint32_t test_svldnf1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnu return svldnf1sh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sh_vnum_u64( +// CHECK-LABEL: @test_svldnf1sh_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -152,7 +152,7 @@ svuint32_t test_svldnf1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sh_vnum_u64u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_u64u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c index 7d4dc332d93023..812a4bcd1199cf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c @@ -5,14 +5,14 @@ // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s #include -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sw_s64( +// CHECK-LABEL: @test_svldnf1sw_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sw_s64u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sw_s64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -24,14 +24,14 @@ svint64_t test_svldnf1sw_s64(svbool_t pg, const int32_t *base) return svldnf1sw_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sw_u64( +// CHECK-LABEL: @test_svldnf1sw_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1sw_u64u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z18test_svldnf1sw_u64u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -43,7 +43,7 @@ svuint64_t test_svldnf1sw_u64(svbool_t pg, const int32_t *base) return svldnf1sw_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sw_vnum_s64( +// CHECK-LABEL: @test_svldnf1sw_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -51,7 +51,7 @@ svuint64_t test_svldnf1sw_u64(svbool_t pg, const int32_t *base) // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sw_vnum_s64u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sw_vnum_s64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -64,7 +64,7 @@ svint64_t test_svldnf1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum return svldnf1sw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1sw_vnum_u64( +// CHECK-LABEL: @test_svldnf1sw_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -72,7 +72,7 @@ svint64_t test_svldnf1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1sw_vnum_u64u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z23test_svldnf1sw_vnum_u64u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c index c7b1655303f446..119b9ee954bf2a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c @@ -5,14 +5,14 @@ // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s #include -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_s16( +// CHECK-LABEL: @test_svldnf1ub_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1ub_s16u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -24,14 +24,14 @@ svint16_t test_svldnf1ub_s16(svbool_t pg, const uint8_t *base) return svldnf1ub_s16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_s32( +// CHECK-LABEL: @test_svldnf1ub_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1ub_s32u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -43,14 +43,14 @@ svint32_t test_svldnf1ub_s32(svbool_t pg, const uint8_t *base) return svldnf1ub_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_s64( +// CHECK-LABEL: @test_svldnf1ub_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1ub_s64u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -62,14 +62,14 @@ svint64_t test_svldnf1ub_s64(svbool_t pg, const uint8_t *base) return svldnf1ub_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_u16( +// CHECK-LABEL: @test_svldnf1ub_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1ub_u16u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u16u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -81,14 +81,14 @@ svuint16_t test_svldnf1ub_u16(svbool_t pg, const uint8_t *base) return svldnf1ub_u16(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_u32( +// CHECK-LABEL: @test_svldnf1ub_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1ub_u32u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u32u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -100,14 +100,14 @@ svuint32_t test_svldnf1ub_u32(svbool_t pg, const uint8_t *base) return svldnf1ub_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_u64( +// CHECK-LABEL: @test_svldnf1ub_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1ub_u64u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u64u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], ptr [[BASE:%.*]]) @@ -119,7 +119,7 @@ svuint64_t test_svldnf1ub_u64(svbool_t pg, const uint8_t *base) return svldnf1ub_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_vnum_s16( +// CHECK-LABEL: @test_svldnf1ub_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -127,7 +127,7 @@ svuint64_t test_svldnf1ub_u64(svbool_t pg, const uint8_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1ub_vnum_s16u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -140,7 +140,7 @@ svint16_t test_svldnf1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum return svldnf1ub_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_vnum_s32( +// CHECK-LABEL: @test_svldnf1ub_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -148,7 +148,7 @@ svint16_t test_svldnf1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1ub_vnum_s32u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -161,7 +161,7 @@ svint32_t test_svldnf1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum return svldnf1ub_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_vnum_s64( +// CHECK-LABEL: @test_svldnf1ub_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -169,7 +169,7 @@ svint32_t test_svldnf1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1ub_vnum_s64u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -182,7 +182,7 @@ svint64_t test_svldnf1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum return svldnf1ub_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_vnum_u16( +// CHECK-LABEL: @test_svldnf1ub_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -190,7 +190,7 @@ svint64_t test_svldnf1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1ub_vnum_u16u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u16u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -203,7 +203,7 @@ svuint16_t test_svldnf1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnu return svldnf1ub_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_vnum_u32( +// CHECK-LABEL: @test_svldnf1ub_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -211,7 +211,7 @@ svuint16_t test_svldnf1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1ub_vnum_u32u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u32u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -224,7 +224,7 @@ svuint32_t test_svldnf1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnu return svldnf1ub_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1ub_vnum_u64( +// CHECK-LABEL: @test_svldnf1ub_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -232,7 +232,7 @@ svuint32_t test_svldnf1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1ub_vnum_u64u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u64u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c index e27bd96e6b8a83..f2bb7982d798f4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c @@ -5,14 +5,14 @@ // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s #include -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_s32( +// CHECK-LABEL: @test_svldnf1uh_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1uh_s32u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_s32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -24,14 +24,14 @@ svint32_t test_svldnf1uh_s32(svbool_t pg, const uint16_t *base) return svldnf1uh_s32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_s64( +// CHECK-LABEL: @test_svldnf1uh_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1uh_s64u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_s64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -43,14 +43,14 @@ svint64_t test_svldnf1uh_s64(svbool_t pg, const uint16_t *base) return svldnf1uh_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_u32( +// CHECK-LABEL: @test_svldnf1uh_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1uh_u32u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_u32u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -62,14 +62,14 @@ svuint32_t test_svldnf1uh_u32(svbool_t pg, const uint16_t *base) return svldnf1uh_u32(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_u64( +// CHECK-LABEL: @test_svldnf1uh_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1uh_u64u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_u64u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -81,7 +81,7 @@ svuint64_t test_svldnf1uh_u64(svbool_t pg, const uint16_t *base) return svldnf1uh_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_vnum_s32( +// CHECK-LABEL: @test_svldnf1uh_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -89,7 +89,7 @@ svuint64_t test_svldnf1uh_u64(svbool_t pg, const uint16_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1uh_vnum_s32u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_s32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -102,7 +102,7 @@ svint32_t test_svldnf1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnu return svldnf1uh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_vnum_s64( +// CHECK-LABEL: @test_svldnf1uh_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -110,7 +110,7 @@ svint32_t test_svldnf1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1uh_vnum_s64u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_s64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -123,7 +123,7 @@ svint64_t test_svldnf1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnu return svldnf1uh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_vnum_u32( +// CHECK-LABEL: @test_svldnf1uh_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -131,7 +131,7 @@ svint64_t test_svldnf1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1uh_vnum_u32u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_u32u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -144,7 +144,7 @@ svuint32_t test_svldnf1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vn return svldnf1uh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uh_vnum_u64( +// CHECK-LABEL: @test_svldnf1uh_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -152,7 +152,7 @@ svuint32_t test_svldnf1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vn // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1uh_vnum_u64u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_u64u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c index 6d459132e891e0..2e8fc486384c2b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c @@ -5,14 +5,14 @@ // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -S -disable-O0-optnone -Werror -o /dev/null %s #include -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uw_s64( +// CHECK-LABEL: @test_svldnf1uw_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1uw_s64u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z18test_svldnf1uw_s64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -24,14 +24,14 @@ svint64_t test_svldnf1uw_s64(svbool_t pg, const uint32_t *base) return svldnf1uw_s64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uw_u64( +// CHECK-LABEL: @test_svldnf1uw_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svldnf1uw_u64u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z18test_svldnf1uw_u64u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -43,7 +43,7 @@ svuint64_t test_svldnf1uw_u64(svbool_t pg, const uint32_t *base) return svldnf1uw_u64(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uw_vnum_s64( +// CHECK-LABEL: @test_svldnf1uw_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -51,7 +51,7 @@ svuint64_t test_svldnf1uw_u64(svbool_t pg, const uint32_t *base) // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1uw_vnum_s64u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1uw_vnum_s64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -64,7 +64,7 @@ svint64_t test_svldnf1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnu return svldnf1uw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnf1uw_vnum_u64( +// CHECK-LABEL: @test_svldnf1uw_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -72,7 +72,7 @@ svint64_t test_svldnf1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnu // CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to // CHECK-NEXT: ret [[TMP3]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z23test_svldnf1uw_vnum_u64u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z23test_svldnf1uw_vnum_u64u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c index 7d0fdbe42b73dd..2ce42fe44128a6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c @@ -15,13 +15,13 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_bf16( +// CHECK-LABEL: @test_svldnt1_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z17test_svldnt1_bf16u10__SVBool_tPKu6__bf16( +// CPP-CHECK-LABEL: @_Z17test_svldnt1_bf16u10__SVBool_tPKu6__bf16( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], ptr [[BASE:%.*]]) @@ -32,14 +32,14 @@ svbfloat16_t test_svldnt1_bf16(svbool_t pg, const bfloat16_t *base) return SVE_ACLE_FUNC(svldnt1,_bf16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_bf16( +// CHECK-LABEL: @test_svldnt1_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z22test_svldnt1_vnum_bf16u10__SVBool_tPKu6__bf16l( +// CPP-CHECK-LABEL: @_Z22test_svldnt1_vnum_bf16u10__SVBool_tPKu6__bf16l( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c index bec42ce14ed57c..d5d77ebed5a310 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c @@ -15,12 +15,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_s8( +// CHECK-LABEL: @test_svldnt1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svldnt1_s8u10__SVBool_tPKa( +// CPP-CHECK-LABEL: @_Z15test_svldnt1_s8u10__SVBool_tPKa( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -30,13 +30,13 @@ svint8_t test_svldnt1_s8(svbool_t pg, const int8_t *base) return SVE_ACLE_FUNC(svldnt1,_s8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_s16( +// CHECK-LABEL: @test_svldnt1_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_s16u10__SVBool_tPKs( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_s16u10__SVBool_tPKs( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -47,13 +47,13 @@ svint16_t test_svldnt1_s16(svbool_t pg, const int16_t *base) return SVE_ACLE_FUNC(svldnt1,_s16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_s32( +// CHECK-LABEL: @test_svldnt1_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_s32u10__SVBool_tPKi( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_s32u10__SVBool_tPKi( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -64,13 +64,13 @@ svint32_t test_svldnt1_s32(svbool_t pg, const int32_t *base) return SVE_ACLE_FUNC(svldnt1,_s32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_s64( +// CHECK-LABEL: @test_svldnt1_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_s64u10__SVBool_tPKl( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_s64u10__SVBool_tPKl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -81,12 +81,12 @@ svint64_t test_svldnt1_s64(svbool_t pg, const int64_t *base) return SVE_ACLE_FUNC(svldnt1,_s64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_u8( +// CHECK-LABEL: @test_svldnt1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP0]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svldnt1_u8u10__SVBool_tPKh( +// CPP-CHECK-LABEL: @_Z15test_svldnt1_u8u10__SVBool_tPKh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret [[TMP0]] @@ -96,13 +96,13 @@ svuint8_t test_svldnt1_u8(svbool_t pg, const uint8_t *base) return SVE_ACLE_FUNC(svldnt1,_u8,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_u16( +// CHECK-LABEL: @test_svldnt1_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_u16u10__SVBool_tPKt( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_u16u10__SVBool_tPKt( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], ptr [[BASE:%.*]]) @@ -113,13 +113,13 @@ svuint16_t test_svldnt1_u16(svbool_t pg, const uint16_t *base) return SVE_ACLE_FUNC(svldnt1,_u16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_u32( +// CHECK-LABEL: @test_svldnt1_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_u32u10__SVBool_tPKj( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_u32u10__SVBool_tPKj( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], ptr [[BASE:%.*]]) @@ -130,13 +130,13 @@ svuint32_t test_svldnt1_u32(svbool_t pg, const uint32_t *base) return SVE_ACLE_FUNC(svldnt1,_u32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_u64( +// CHECK-LABEL: @test_svldnt1_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_u64u10__SVBool_tPKm( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_u64u10__SVBool_tPKm( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], ptr [[BASE:%.*]]) @@ -147,13 +147,13 @@ svuint64_t test_svldnt1_u64(svbool_t pg, const uint64_t *base) return SVE_ACLE_FUNC(svldnt1,_u64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_f16( +// CHECK-LABEL: @test_svldnt1_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_f16u10__SVBool_tPKDh( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_f16u10__SVBool_tPKDh( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], ptr [[BASE:%.*]]) @@ -164,13 +164,13 @@ svfloat16_t test_svldnt1_f16(svbool_t pg, const float16_t *base) return SVE_ACLE_FUNC(svldnt1,_f16,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_f32( +// CHECK-LABEL: @test_svldnt1_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_f32u10__SVBool_tPKf( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_f32u10__SVBool_tPKf( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], ptr [[BASE:%.*]]) @@ -181,13 +181,13 @@ svfloat32_t test_svldnt1_f32(svbool_t pg, const float32_t *base) return SVE_ACLE_FUNC(svldnt1,_f32,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_f64( +// CHECK-LABEL: @test_svldnt1_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svldnt1_f64u10__SVBool_tPKd( +// CPP-CHECK-LABEL: @_Z16test_svldnt1_f64u10__SVBool_tPKd( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], ptr [[BASE:%.*]]) @@ -198,13 +198,13 @@ svfloat64_t test_svldnt1_f64(svbool_t pg, const float64_t *base) return SVE_ACLE_FUNC(svldnt1,_f64,,)(pg, base); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_s8( +// CHECK-LABEL: @test_svldnt1_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svldnt1_vnum_s8u10__SVBool_tPKal( +// CPP-CHECK-LABEL: @_Z20test_svldnt1_vnum_s8u10__SVBool_tPKal( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -215,14 +215,14 @@ svint8_t test_svldnt1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnt1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_s16( +// CHECK-LABEL: @test_svldnt1_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_s16u10__SVBool_tPKsl( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s16u10__SVBool_tPKsl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -234,14 +234,14 @@ svint16_t test_svldnt1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnt1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_s32( +// CHECK-LABEL: @test_svldnt1_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_s32u10__SVBool_tPKil( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s32u10__SVBool_tPKil( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -253,14 +253,14 @@ svint32_t test_svldnt1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnt1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_s64( +// CHECK-LABEL: @test_svldnt1_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_s64u10__SVBool_tPKll( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s64u10__SVBool_tPKll( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -272,13 +272,13 @@ svint64_t test_svldnt1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnt1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_u8( +// CHECK-LABEL: @test_svldnt1_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret [[TMP1]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svldnt1_vnum_u8u10__SVBool_tPKhl( +// CPP-CHECK-LABEL: @_Z20test_svldnt1_vnum_u8u10__SVBool_tPKhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], ptr [[TMP0]]) @@ -289,14 +289,14 @@ svuint8_t test_svldnt1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) return SVE_ACLE_FUNC(svldnt1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_u16( +// CHECK-LABEL: @test_svldnt1_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_u16u10__SVBool_tPKtl( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u16u10__SVBool_tPKtl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -308,14 +308,14 @@ svuint16_t test_svldnt1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum return SVE_ACLE_FUNC(svldnt1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_u32( +// CHECK-LABEL: @test_svldnt1_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_u32u10__SVBool_tPKjl( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u32u10__SVBool_tPKjl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -327,14 +327,14 @@ svuint32_t test_svldnt1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum return SVE_ACLE_FUNC(svldnt1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_u64( +// CHECK-LABEL: @test_svldnt1_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_u64u10__SVBool_tPKml( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u64u10__SVBool_tPKml( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -346,14 +346,14 @@ svuint64_t test_svldnt1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum return SVE_ACLE_FUNC(svldnt1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_f16( +// CHECK-LABEL: @test_svldnt1_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_f16u10__SVBool_tPKDhl( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f16u10__SVBool_tPKDhl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -365,14 +365,14 @@ svfloat16_t test_svldnt1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vn return SVE_ACLE_FUNC(svldnt1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_f32( +// CHECK-LABEL: @test_svldnt1_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_f32u10__SVBool_tPKfl( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f32u10__SVBool_tPKfl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -384,14 +384,14 @@ svfloat32_t test_svldnt1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vn return SVE_ACLE_FUNC(svldnt1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: define {{[^@]+}}@test_svldnt1_vnum_f64( +// CHECK-LABEL: @test_svldnt1_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP2:%.*]] = tail call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret [[TMP2]] // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svldnt1_vnum_f64u10__SVBool_tPKdl( +// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f64u10__SVBool_tPKdl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c index 96179f9d7d2dd2..4c584de625b987 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c @@ -14,12 +14,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svprfb( +// CHECK-LABEL: @test_svprfb( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z11test_svprfbu10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z11test_svprfbu10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 0) // CPP-CHECK-NEXT: ret void @@ -29,12 +29,12 @@ void test_svprfb(svbool_t pg, const void *base) return svprfb(pg, base, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_1( +// CHECK-LABEL: @test_svprfb_1( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 1) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_1u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_1u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 1) // CPP-CHECK-NEXT: ret void @@ -44,12 +44,12 @@ void test_svprfb_1(svbool_t pg, const void *base) return svprfb(pg, base, SV_PLDL1STRM); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_2( +// CHECK-LABEL: @test_svprfb_2( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 2) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_2u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_2u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 2) // CPP-CHECK-NEXT: ret void @@ -59,12 +59,12 @@ void test_svprfb_2(svbool_t pg, const void *base) return svprfb(pg, base, SV_PLDL2KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_3( +// CHECK-LABEL: @test_svprfb_3( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 3) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_3u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_3u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 3) // CPP-CHECK-NEXT: ret void @@ -74,12 +74,12 @@ void test_svprfb_3(svbool_t pg, const void *base) return svprfb(pg, base, SV_PLDL2STRM); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_4( +// CHECK-LABEL: @test_svprfb_4( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 4) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_4u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_4u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 4) // CPP-CHECK-NEXT: ret void @@ -89,12 +89,12 @@ void test_svprfb_4(svbool_t pg, const void *base) return svprfb(pg, base, SV_PLDL3KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_5( +// CHECK-LABEL: @test_svprfb_5( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 5) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_5u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_5u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 5) // CPP-CHECK-NEXT: ret void @@ -104,12 +104,12 @@ void test_svprfb_5(svbool_t pg, const void *base) return svprfb(pg, base, SV_PLDL3STRM); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_6( +// CHECK-LABEL: @test_svprfb_6( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 8) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_6u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_6u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 8) // CPP-CHECK-NEXT: ret void @@ -119,12 +119,12 @@ void test_svprfb_6(svbool_t pg, const void *base) return svprfb(pg, base, SV_PSTL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_7( +// CHECK-LABEL: @test_svprfb_7( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 9) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_7u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_7u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 9) // CPP-CHECK-NEXT: ret void @@ -134,12 +134,12 @@ void test_svprfb_7(svbool_t pg, const void *base) return svprfb(pg, base, SV_PSTL1STRM); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_8( +// CHECK-LABEL: @test_svprfb_8( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 10) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_8u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_8u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 10) // CPP-CHECK-NEXT: ret void @@ -149,12 +149,12 @@ void test_svprfb_8(svbool_t pg, const void *base) return svprfb(pg, base, SV_PSTL2KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_9( +// CHECK-LABEL: @test_svprfb_9( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 11) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svprfb_9u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z13test_svprfb_9u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 11) // CPP-CHECK-NEXT: ret void @@ -164,12 +164,12 @@ void test_svprfb_9(svbool_t pg, const void *base) return svprfb(pg, base, SV_PSTL2STRM); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_10( +// CHECK-LABEL: @test_svprfb_10( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 12) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svprfb_10u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z14test_svprfb_10u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 12) // CPP-CHECK-NEXT: ret void @@ -179,12 +179,12 @@ void test_svprfb_10(svbool_t pg, const void *base) return svprfb(pg, base, SV_PSTL3KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_11( +// CHECK-LABEL: @test_svprfb_11( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 13) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svprfb_11u10__SVBool_tPKv( +// CPP-CHECK-LABEL: @_Z14test_svprfb_11u10__SVBool_tPKv( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[BASE:%.*]], i32 13) // CPP-CHECK-NEXT: ret void @@ -194,13 +194,13 @@ void test_svprfb_11(svbool_t pg, const void *base) return svprfb(pg, base, SV_PSTL3STRM); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_vnum( +// CHECK-LABEL: @test_svprfb_vnum( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[TMP0]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svprfb_vnumu10__SVBool_tPKvl( +// CPP-CHECK-LABEL: @_Z16test_svprfb_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], ptr [[TMP0]], i32 0) @@ -211,13 +211,13 @@ void test_svprfb_vnum(svbool_t pg, const void *base, int64_t vnum) return svprfb_vnum(pg, base, vnum, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_u32base( +// CHECK-LABEL: @test_svprfb_gather_u32base( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z26test_svprfb_gather_u32baseu10__SVBool_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z26test_svprfb_gather_u32baseu10__SVBool_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) @@ -228,13 +228,13 @@ void test_svprfb_gather_u32base(svbool_t pg, svuint32_t bases) return SVE_ACLE_FUNC(svprfb_gather,_u32base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_u64base( +// CHECK-LABEL: @test_svprfb_gather_u64base( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z26test_svprfb_gather_u64baseu10__SVBool_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z26test_svprfb_gather_u64baseu10__SVBool_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) @@ -245,13 +245,13 @@ void test_svprfb_gather_u64base(svbool_t pg, svuint64_t bases) return SVE_ACLE_FUNC(svprfb_gather,_u64base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_s32offset( +// CHECK-LABEL: @test_svprfb_gather_s32offset( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z28test_svprfb_gather_s32offsetu10__SVBool_tPKvu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_s32offsetu10__SVBool_tPKvu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) @@ -262,13 +262,13 @@ void test_svprfb_gather_s32offset(svbool_t pg, const void *base, svint32_t offse return SVE_ACLE_FUNC(svprfb_gather_,s32,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_s64offset( +// CHECK-LABEL: @test_svprfb_gather_s64offset( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z28test_svprfb_gather_s64offsetu10__SVBool_tPKvu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_s64offsetu10__SVBool_tPKvu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) @@ -279,13 +279,13 @@ void test_svprfb_gather_s64offset(svbool_t pg, const void *base, svint64_t offse return SVE_ACLE_FUNC(svprfb_gather_,s64,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_u32offset( +// CHECK-LABEL: @test_svprfb_gather_u32offset( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z28test_svprfb_gather_u32offsetu10__SVBool_tPKvu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_u32offsetu10__SVBool_tPKvu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) @@ -296,13 +296,13 @@ void test_svprfb_gather_u32offset(svbool_t pg, const void *base, svuint32_t offs return SVE_ACLE_FUNC(svprfb_gather_,u32,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_u64offset( +// CHECK-LABEL: @test_svprfb_gather_u64offset( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z28test_svprfb_gather_u64offsetu10__SVBool_tPKvu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_u64offsetu10__SVBool_tPKvu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) @@ -313,13 +313,13 @@ void test_svprfb_gather_u64offset(svbool_t pg, const void *base, svuint64_t offs return SVE_ACLE_FUNC(svprfb_gather_,u64,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_u32base_offset( +// CHECK-LABEL: @test_svprfb_gather_u32base_offset( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svprfb_gather_u32base_offsetu10__SVBool_tu12__SVUint32_tl( +// CPP-CHECK-LABEL: @_Z33test_svprfb_gather_u32base_offsetu10__SVBool_tu12__SVUint32_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) @@ -331,13 +331,13 @@ void test_svprfb_gather_u32base_offset(svbool_t pg, svuint32_t bases, int64_t of return SVE_ACLE_FUNC(svprfb_gather,_u32base,_offset,)(pg, bases, offset, SV_PLDL1KEEP); } -// CHECK-LABEL: define {{[^@]+}}@test_svprfb_gather_u64base_offset( +// CHECK-LABEL: @test_svprfb_gather_u64base_offset( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z33test_svprfb_gather_u64base_offsetu10__SVBool_tu12__SVUint64_tl( +// CPP-CHECK-LABEL: @_Z33test_svprfb_gather_u64base_offsetu10__SVBool_tu12__SVUint64_tl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c index 8c91341fa8772c..4034a2b98776cd 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c @@ -221,15 +221,15 @@ void test_svprfd_11(svbool_t pg, const void *base) // CHECK-LABEL: @test_svprfd_vnum( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], ptr [[TMP2]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] +// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], ptr [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svprfd_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], ptr [[TMP2]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] +// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], ptr [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfd_vnum(svbool_t pg, const void *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c index 538fe9cdf7ce24..adb4a051f906e4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c @@ -221,15 +221,15 @@ void test_svprfh_11(svbool_t pg, const void *base) // CHECK-LABEL: @test_svprfh_vnum( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], ptr [[TMP2]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] +// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], ptr [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svprfh_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], ptr [[TMP2]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] +// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], ptr [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfh_vnum(svbool_t pg, const void *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c index 8f00aefe616258..13b63f7a2d846c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c @@ -221,15 +221,15 @@ void test_svprfw_11(svbool_t pg, const void *base) // CHECK-LABEL: @test_svprfw_vnum( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] -// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], ptr [[TMP2]], i32 0) +// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] +// CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], ptr [[TMP1]], i32 0) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z16test_svprfw_vnumu10__SVBool_tPKvl( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] -// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], ptr [[TMP2]], i32 0) +// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] +// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], ptr [[TMP1]], i32 0) // CPP-CHECK-NEXT: ret void // void test_svprfw_vnum(svbool_t pg, const void *base, int64_t vnum) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c index b58be9ad397948..c4fe461c709b5f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c @@ -367,6 +367,7 @@ svint32_t test_svreinterpret_s32_s16(svint16_t op) return SVE_ACLE_FUNC(svreinterpret_s32,_s16,,)(op); } +// // CHECK-LABEL: @test_svreinterpret_s32_s32( // CHECK-NEXT: entry: // CHECK-NEXT: ret [[OP:%.*]] @@ -498,7 +499,6 @@ svint32_t test_svreinterpret_s32_f64(svfloat64_t op) return SVE_ACLE_FUNC(svreinterpret_s32,_f64,,)(op); } -// // CHECK-LABEL: @test_svreinterpret_s64_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c index d5021da8afb346..dad5c592a38daa 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svsetffr( // CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.setffr() +// CHECK-NEXT: tail call void @llvm.aarch64.sve.setffr() // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z13test_svsetffrv( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.setffr() +// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.setffr() // CPP-CHECK-NEXT: ret void // void test_svsetffr() diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c index f9ddbf96971463..f64deb9553f0cf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c @@ -15,13 +15,13 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst1_bf16( +// CHECK-LABEL: @test_svst1_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv8bf16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svst1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( +// CPP-CHECK-LABEL: @_Z15test_svst1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8bf16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -32,14 +32,14 @@ void test_svst1_bf16(svbool_t pg, bfloat16_t *base, svbfloat16_t data) return SVE_ACLE_FUNC(svst1,_bf16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_bf16( +// CHECK-LABEL: @test_svst1_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv8bf16.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svst1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( +// CPP-CHECK-LABEL: @_Z20test_svst1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c index 83e68a7e753fd3..508e8c132b030f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c @@ -14,12 +14,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst1_s8( +// CHECK-LABEL: @test_svst1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst1_s8u10__SVBool_tPau10__SVInt8_t( +// CPP-CHECK-LABEL: @_Z13test_svst1_s8u10__SVBool_tPau10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[PG:%.*]]) // CPP-CHECK-NEXT: ret void @@ -29,13 +29,13 @@ void test_svst1_s8(svbool_t pg, int8_t *base, svint8_t data) return SVE_ACLE_FUNC(svst1,_s8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_s16( +// CHECK-LABEL: @test_svst1_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_s16u10__SVBool_tPsu11__SVInt16_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_s16u10__SVBool_tPsu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -46,13 +46,13 @@ void test_svst1_s16(svbool_t pg, int16_t *base, svint16_t data) return SVE_ACLE_FUNC(svst1,_s16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_s32( +// CHECK-LABEL: @test_svst1_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_s32u10__SVBool_tPiu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_s32u10__SVBool_tPiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -63,13 +63,13 @@ void test_svst1_s32(svbool_t pg, int32_t *base, svint32_t data) return SVE_ACLE_FUNC(svst1,_s32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_s64( +// CHECK-LABEL: @test_svst1_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_s64u10__SVBool_tPlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_s64u10__SVBool_tPlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -80,12 +80,12 @@ void test_svst1_s64(svbool_t pg, int64_t *base, svint64_t data) return SVE_ACLE_FUNC(svst1,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_u8( +// CHECK-LABEL: @test_svst1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst1_u8u10__SVBool_tPhu11__SVUint8_t( +// CPP-CHECK-LABEL: @_Z13test_svst1_u8u10__SVBool_tPhu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[PG:%.*]]) // CPP-CHECK-NEXT: ret void @@ -95,13 +95,13 @@ void test_svst1_u8(svbool_t pg, uint8_t *base, svuint8_t data) return SVE_ACLE_FUNC(svst1,_u8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_u16( +// CHECK-LABEL: @test_svst1_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_u16u10__SVBool_tPtu12__SVUint16_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_u16u10__SVBool_tPtu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -112,13 +112,13 @@ void test_svst1_u16(svbool_t pg, uint16_t *base, svuint16_t data) return SVE_ACLE_FUNC(svst1,_u16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_u32( +// CHECK-LABEL: @test_svst1_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_u32u10__SVBool_tPju12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_u32u10__SVBool_tPju12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -129,13 +129,13 @@ void test_svst1_u32(svbool_t pg, uint32_t *base, svuint32_t data) return SVE_ACLE_FUNC(svst1,_u32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_u64( +// CHECK-LABEL: @test_svst1_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_u64u10__SVBool_tPmu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_u64u10__SVBool_tPmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -146,13 +146,13 @@ void test_svst1_u64(svbool_t pg, uint64_t *base, svuint64_t data) return SVE_ACLE_FUNC(svst1,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_f16( +// CHECK-LABEL: @test_svst1_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv8f16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_f16u10__SVBool_tPDhu13__SVFloat16_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_f16u10__SVBool_tPDhu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv8f16.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -163,13 +163,13 @@ void test_svst1_f16(svbool_t pg, float16_t *base, svfloat16_t data) return SVE_ACLE_FUNC(svst1,_f16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_f32( +// CHECK-LABEL: @test_svst1_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv4f32.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_f32u10__SVBool_tPfu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_f32u10__SVBool_tPfu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv4f32.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -180,13 +180,13 @@ void test_svst1_f32(svbool_t pg, float32_t *base, svfloat32_t data) return SVE_ACLE_FUNC(svst1,_f32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_f64( +// CHECK-LABEL: @test_svst1_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.masked.store.nxv2f64.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst1_f64u10__SVBool_tPdu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z14test_svst1_f64u10__SVBool_tPdu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv2f64.p0( [[DATA:%.*]], ptr [[BASE:%.*]], i32 1, [[TMP0]]) @@ -197,13 +197,13 @@ void test_svst1_f64(svbool_t pg, float64_t *base, svfloat64_t data) return SVE_ACLE_FUNC(svst1,_f64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_s8( +// CHECK-LABEL: @test_svst1_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[TMP0]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( +// CPP-CHECK-LABEL: @_Z18test_svst1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[TMP0]], i32 1, [[PG:%.*]]) @@ -214,14 +214,14 @@ void test_svst1_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8_t data) return SVE_ACLE_FUNC(svst1_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_s16( +// CHECK-LABEL: @test_svst1_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -233,14 +233,14 @@ void test_svst1_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16_t dat return SVE_ACLE_FUNC(svst1_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_s32( +// CHECK-LABEL: @test_svst1_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -252,14 +252,14 @@ void test_svst1_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32_t dat return SVE_ACLE_FUNC(svst1_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_s64( +// CHECK-LABEL: @test_svst1_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -271,13 +271,13 @@ void test_svst1_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64_t dat return SVE_ACLE_FUNC(svst1_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_u8( +// CHECK-LABEL: @test_svst1_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[TMP0]], i32 1, [[PG:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( +// CPP-CHECK-LABEL: @_Z18test_svst1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: tail call void @llvm.masked.store.nxv16i8.p0( [[DATA:%.*]], ptr [[TMP0]], i32 1, [[PG:%.*]]) @@ -288,14 +288,14 @@ void test_svst1_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8_t data return SVE_ACLE_FUNC(svst1_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_u16( +// CHECK-LABEL: @test_svst1_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv8i16.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -307,14 +307,14 @@ void test_svst1_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16_t d return SVE_ACLE_FUNC(svst1_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_u32( +// CHECK-LABEL: @test_svst1_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv4i32.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -326,14 +326,14 @@ void test_svst1_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32_t d return SVE_ACLE_FUNC(svst1_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_u64( +// CHECK-LABEL: @test_svst1_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv2i64.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -345,14 +345,14 @@ void test_svst1_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64_t d return SVE_ACLE_FUNC(svst1_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_f16( +// CHECK-LABEL: @test_svst1_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv8f16.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -364,14 +364,14 @@ void test_svst1_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16_t return SVE_ACLE_FUNC(svst1_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_f32( +// CHECK-LABEL: @test_svst1_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv4f32.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -383,14 +383,14 @@ void test_svst1_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32_t return SVE_ACLE_FUNC(svst1_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_vnum_f64( +// CHECK-LABEL: @test_svst1_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.masked.store.nxv2f64.p0( [[DATA:%.*]], ptr [[TMP1]], i32 1, [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -402,13 +402,13 @@ void test_svst1_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64_t return SVE_ACLE_FUNC(svst1_vnum,_f64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_s32( +// CHECK-LABEL: @test_svst1_scatter_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svst1_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) @@ -419,13 +419,13 @@ void test_svst1_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t dat return SVE_ACLE_FUNC(svst1_scatter,_u32base,,_s32)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_s64( +// CHECK-LABEL: @test_svst1_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svst1_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) @@ -436,13 +436,13 @@ void test_svst1_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t dat return SVE_ACLE_FUNC(svst1_scatter,_u64base,,_s64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_u32( +// CHECK-LABEL: @test_svst1_scatter_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svst1_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) @@ -453,13 +453,13 @@ void test_svst1_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t da return SVE_ACLE_FUNC(svst1_scatter,_u32base,,_u32)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_u64( +// CHECK-LABEL: @test_svst1_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svst1_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) @@ -470,13 +470,13 @@ void test_svst1_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t da return SVE_ACLE_FUNC(svst1_scatter,_u64base,,_u64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_f32( +// CHECK-LABEL: @test_svst1_scatter_u32base_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svst1_scatter_u32base_f32u10__SVBool_tu12__SVUint32_tu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_f32u10__SVBool_tu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) @@ -487,13 +487,13 @@ void test_svst1_scatter_u32base_f32(svbool_t pg, svuint32_t bases, svfloat32_t d return SVE_ACLE_FUNC(svst1_scatter,_u32base,,_f32)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_f64( +// CHECK-LABEL: @test_svst1_scatter_u64base_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z30test_svst1_scatter_u64base_f64u10__SVBool_tu12__SVUint64_tu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_f64u10__SVBool_tu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) @@ -504,13 +504,13 @@ void test_svst1_scatter_u64base_f64(svbool_t pg, svuint64_t bases, svfloat64_t d return SVE_ACLE_FUNC(svst1_scatter,_u64base,,_f64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s32offset_s32( +// CHECK-LABEL: @test_svst1_scatter_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_s32offset_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -521,13 +521,13 @@ void test_svst1_scatter_s32offset_s32(svbool_t pg, int32_t *base, svint32_t offs return SVE_ACLE_FUNC(svst1_scatter_,s32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s64offset_s64( +// CHECK-LABEL: @test_svst1_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_s64offset_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -538,13 +538,13 @@ void test_svst1_scatter_s64offset_s64(svbool_t pg, int64_t *base, svint64_t offs return SVE_ACLE_FUNC(svst1_scatter_,s64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s32offset_u32( +// CHECK-LABEL: @test_svst1_scatter_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_s32offset_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -555,13 +555,13 @@ void test_svst1_scatter_s32offset_u32(svbool_t pg, uint32_t *base, svint32_t off return SVE_ACLE_FUNC(svst1_scatter_,s32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s64offset_u64( +// CHECK-LABEL: @test_svst1_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_s64offset_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -572,13 +572,13 @@ void test_svst1_scatter_s64offset_u64(svbool_t pg, uint64_t *base, svint64_t off return SVE_ACLE_FUNC(svst1_scatter_,s64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s32offset_f32( +// CHECK-LABEL: @test_svst1_scatter_s32offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_s32offset_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -589,13 +589,13 @@ void test_svst1_scatter_s32offset_f32(svbool_t pg, float32_t *base, svint32_t of return SVE_ACLE_FUNC(svst1_scatter_,s32,offset,_f32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s64offset_f64( +// CHECK-LABEL: @test_svst1_scatter_s64offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_s64offset_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -606,13 +606,13 @@ void test_svst1_scatter_s64offset_f64(svbool_t pg, float64_t *base, svint64_t of return SVE_ACLE_FUNC(svst1_scatter_,s64,offset,_f64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32offset_s32( +// CHECK-LABEL: @test_svst1_scatter_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_u32offset_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -623,13 +623,13 @@ void test_svst1_scatter_u32offset_s32(svbool_t pg, int32_t *base, svuint32_t off return SVE_ACLE_FUNC(svst1_scatter_,u32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64offset_s64( +// CHECK-LABEL: @test_svst1_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_u64offset_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -640,13 +640,13 @@ void test_svst1_scatter_u64offset_s64(svbool_t pg, int64_t *base, svuint64_t off return SVE_ACLE_FUNC(svst1_scatter_,u64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32offset_u32( +// CHECK-LABEL: @test_svst1_scatter_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_u32offset_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -657,13 +657,13 @@ void test_svst1_scatter_u32offset_u32(svbool_t pg, uint32_t *base, svuint32_t of return SVE_ACLE_FUNC(svst1_scatter_,u32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64offset_u64( +// CHECK-LABEL: @test_svst1_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_u64offset_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -674,13 +674,13 @@ void test_svst1_scatter_u64offset_u64(svbool_t pg, uint64_t *base, svuint64_t of return SVE_ACLE_FUNC(svst1_scatter_,u64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32offset_f32( +// CHECK-LABEL: @test_svst1_scatter_u32offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_u32offset_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -691,13 +691,13 @@ void test_svst1_scatter_u32offset_f32(svbool_t pg, float32_t *base, svuint32_t o return SVE_ACLE_FUNC(svst1_scatter_,u32,offset,_f32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64offset_f64( +// CHECK-LABEL: @test_svst1_scatter_u64offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z32test_svst1_scatter_u64offset_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[OFFSETS:%.*]]) @@ -708,13 +708,13 @@ void test_svst1_scatter_u64offset_f64(svbool_t pg, float64_t *base, svuint64_t o return SVE_ACLE_FUNC(svst1_scatter_,u64,offset,_f64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_offset_s32( +// CHECK-LABEL: @test_svst1_scatter_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svst1_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -725,13 +725,13 @@ void test_svst1_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_ return SVE_ACLE_FUNC(svst1_scatter,_u32base,_offset,_s32)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_offset_s64( +// CHECK-LABEL: @test_svst1_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svst1_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -742,13 +742,13 @@ void test_svst1_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_ return SVE_ACLE_FUNC(svst1_scatter,_u64base,_offset,_s64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_offset_u32( +// CHECK-LABEL: @test_svst1_scatter_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svst1_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -759,13 +759,13 @@ void test_svst1_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_ return SVE_ACLE_FUNC(svst1_scatter,_u32base,_offset,_u32)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_offset_u64( +// CHECK-LABEL: @test_svst1_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svst1_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -776,13 +776,13 @@ void test_svst1_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_ return SVE_ACLE_FUNC(svst1_scatter,_u64base,_offset,_u64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_offset_f32( +// CHECK-LABEL: @test_svst1_scatter_u32base_offset_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svst1_scatter_u32base_offset_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -793,13 +793,13 @@ void test_svst1_scatter_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_ return SVE_ACLE_FUNC(svst1_scatter,_u32base,_offset,_f32)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_offset_f64( +// CHECK-LABEL: @test_svst1_scatter_u64base_offset_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z37test_svst1_scatter_u64base_offset_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) @@ -810,13 +810,13 @@ void test_svst1_scatter_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_ return SVE_ACLE_FUNC(svst1_scatter,_u64base,_offset,_f64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s32index_s32( +// CHECK-LABEL: @test_svst1_scatter_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_s32index_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -827,13 +827,13 @@ void test_svst1_scatter_s32index_s32(svbool_t pg, int32_t *base, svint32_t indic return SVE_ACLE_FUNC(svst1_scatter_,s32,index,_s32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s64index_s64( +// CHECK-LABEL: @test_svst1_scatter_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_s64index_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -844,13 +844,13 @@ void test_svst1_scatter_s64index_s64(svbool_t pg, int64_t *base, svint64_t indic return SVE_ACLE_FUNC(svst1_scatter_,s64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s32index_u32( +// CHECK-LABEL: @test_svst1_scatter_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_s32index_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -861,13 +861,13 @@ void test_svst1_scatter_s32index_u32(svbool_t pg, uint32_t *base, svint32_t indi return SVE_ACLE_FUNC(svst1_scatter_,s32,index,_u32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s64index_u64( +// CHECK-LABEL: @test_svst1_scatter_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_s64index_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -878,13 +878,13 @@ void test_svst1_scatter_s64index_u64(svbool_t pg, uint64_t *base, svint64_t indi return SVE_ACLE_FUNC(svst1_scatter_,s64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s32index_f32( +// CHECK-LABEL: @test_svst1_scatter_s32index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_s32index_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -895,13 +895,13 @@ void test_svst1_scatter_s32index_f32(svbool_t pg, float32_t *base, svint32_t ind return SVE_ACLE_FUNC(svst1_scatter_,s32,index,_f32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_s64index_f64( +// CHECK-LABEL: @test_svst1_scatter_s64index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_s64index_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -912,13 +912,13 @@ void test_svst1_scatter_s64index_f64(svbool_t pg, float64_t *base, svint64_t ind return SVE_ACLE_FUNC(svst1_scatter_,s64,index,_f64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32index_s32( +// CHECK-LABEL: @test_svst1_scatter_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_u32index_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -929,13 +929,13 @@ void test_svst1_scatter_u32index_s32(svbool_t pg, int32_t *base, svuint32_t indi return SVE_ACLE_FUNC(svst1_scatter_,u32,index,_s32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64index_s64( +// CHECK-LABEL: @test_svst1_scatter_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_u64index_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -946,13 +946,13 @@ void test_svst1_scatter_u64index_s64(svbool_t pg, int64_t *base, svuint64_t indi return SVE_ACLE_FUNC(svst1_scatter_,u64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32index_u32( +// CHECK-LABEL: @test_svst1_scatter_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_u32index_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -963,13 +963,13 @@ void test_svst1_scatter_u32index_u32(svbool_t pg, uint32_t *base, svuint32_t ind return SVE_ACLE_FUNC(svst1_scatter_,u32,index,_u32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64index_u64( +// CHECK-LABEL: @test_svst1_scatter_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_u64index_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -980,13 +980,13 @@ void test_svst1_scatter_u64index_u64(svbool_t pg, uint64_t *base, svuint64_t ind return SVE_ACLE_FUNC(svst1_scatter_,u64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32index_f32( +// CHECK-LABEL: @test_svst1_scatter_u32index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_u32index_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -997,13 +997,13 @@ void test_svst1_scatter_u32index_f32(svbool_t pg, float32_t *base, svuint32_t in return SVE_ACLE_FUNC(svst1_scatter_,u32,index,_f32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64index_f64( +// CHECK-LABEL: @test_svst1_scatter_u64index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z31test_svst1_scatter_u64index_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]], [[INDICES:%.*]]) @@ -1014,14 +1014,14 @@ void test_svst1_scatter_u64index_f64(svbool_t pg, float64_t *base, svuint64_t in return SVE_ACLE_FUNC(svst1_scatter_,u64,index,_f64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_index_s32( +// CHECK-LABEL: @test_svst1_scatter_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svst1_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -1033,14 +1033,14 @@ void test_svst1_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t return SVE_ACLE_FUNC(svst1_scatter,_u32base,_index,_s32)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_index_s64( +// CHECK-LABEL: @test_svst1_scatter_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svst1_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 @@ -1052,14 +1052,14 @@ void test_svst1_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t return SVE_ACLE_FUNC(svst1_scatter,_u64base,_index,_s64)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_index_u32( +// CHECK-LABEL: @test_svst1_scatter_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svst1_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -1071,14 +1071,14 @@ void test_svst1_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t return SVE_ACLE_FUNC(svst1_scatter,_u32base,_index,_u32)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_index_u64( +// CHECK-LABEL: @test_svst1_scatter_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svst1_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 @@ -1090,14 +1090,14 @@ void test_svst1_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t return SVE_ACLE_FUNC(svst1_scatter,_u64base,_index,_u64)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u32base_index_f32( +// CHECK-LABEL: @test_svst1_scatter_u32base_index_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svst1_scatter_u32base_index_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 @@ -1109,14 +1109,14 @@ void test_svst1_scatter_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t return SVE_ACLE_FUNC(svst1_scatter,_u32base,_index,_f32)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1_scatter_u64base_index_f64( +// CHECK-LABEL: @test_svst1_scatter_u64base_index_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z36test_svst1_scatter_u64base_index_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c index 0f47658c561ea4..5694f09bb3882b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c @@ -11,7 +11,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_s16( +// CHECK-LABEL: @test_svst1b_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -23,7 +23,7 @@ void test_svst1b_s16(svbool_t pg, int8_t *base, svint16_t data) return SVE_ACLE_FUNC(svst1b,_s16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_s32( +// CHECK-LABEL: @test_svst1b_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -35,7 +35,7 @@ void test_svst1b_s32(svbool_t pg, int8_t *base, svint32_t data) return SVE_ACLE_FUNC(svst1b,_s32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_s64( +// CHECK-LABEL: @test_svst1b_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -47,7 +47,7 @@ void test_svst1b_s64(svbool_t pg, int8_t *base, svint64_t data) return SVE_ACLE_FUNC(svst1b,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_u16( +// CHECK-LABEL: @test_svst1b_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -59,7 +59,7 @@ void test_svst1b_u16(svbool_t pg, uint8_t *base, svuint16_t data) return SVE_ACLE_FUNC(svst1b,_u16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_u32( +// CHECK-LABEL: @test_svst1b_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -71,7 +71,7 @@ void test_svst1b_u32(svbool_t pg, uint8_t *base, svuint32_t data) return SVE_ACLE_FUNC(svst1b,_u32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_u64( +// CHECK-LABEL: @test_svst1b_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -83,7 +83,7 @@ void test_svst1b_u64(svbool_t pg, uint8_t *base, svuint64_t data) return SVE_ACLE_FUNC(svst1b,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_vnum_s16( +// CHECK-LABEL: @test_svst1b_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -96,7 +96,7 @@ void test_svst1b_vnum_s16(svbool_t pg, int8_t *base, int64_t vnum, svint16_t dat return SVE_ACLE_FUNC(svst1b_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_vnum_s32( +// CHECK-LABEL: @test_svst1b_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -109,7 +109,7 @@ void test_svst1b_vnum_s32(svbool_t pg, int8_t *base, int64_t vnum, svint32_t dat return SVE_ACLE_FUNC(svst1b_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_vnum_s64( +// CHECK-LABEL: @test_svst1b_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -122,7 +122,7 @@ void test_svst1b_vnum_s64(svbool_t pg, int8_t *base, int64_t vnum, svint64_t dat return SVE_ACLE_FUNC(svst1b_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_vnum_u16( +// CHECK-LABEL: @test_svst1b_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -135,7 +135,7 @@ void test_svst1b_vnum_u16(svbool_t pg, uint8_t *base, int64_t vnum, svuint16_t d return SVE_ACLE_FUNC(svst1b_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_vnum_u32( +// CHECK-LABEL: @test_svst1b_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -148,7 +148,7 @@ void test_svst1b_vnum_u32(svbool_t pg, uint8_t *base, int64_t vnum, svuint32_t d return SVE_ACLE_FUNC(svst1b_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_vnum_u64( +// CHECK-LABEL: @test_svst1b_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -161,7 +161,7 @@ void test_svst1b_vnum_u64(svbool_t pg, uint8_t *base, int64_t vnum, svuint64_t d return SVE_ACLE_FUNC(svst1b_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u32base_s32( +// CHECK-LABEL: @test_svst1b_scatter_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -173,7 +173,7 @@ void test_svst1b_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t da return SVE_ACLE_FUNC(svst1b_scatter,_u32base,,_s32)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u64base_s64( +// CHECK-LABEL: @test_svst1b_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -185,7 +185,7 @@ void test_svst1b_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t da return SVE_ACLE_FUNC(svst1b_scatter,_u64base,,_s64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u32base_u32( +// CHECK-LABEL: @test_svst1b_scatter_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -197,7 +197,7 @@ void test_svst1b_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t d return SVE_ACLE_FUNC(svst1b_scatter,_u32base,,_u32)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u64base_u64( +// CHECK-LABEL: @test_svst1b_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -209,7 +209,7 @@ void test_svst1b_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t d return SVE_ACLE_FUNC(svst1b_scatter,_u64base,,_u64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_s32offset_s32( +// CHECK-LABEL: @test_svst1b_scatter_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -221,7 +221,7 @@ void test_svst1b_scatter_s32offset_s32(svbool_t pg, int8_t *base, svint32_t offs return SVE_ACLE_FUNC(svst1b_scatter_,s32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_s64offset_s64( +// CHECK-LABEL: @test_svst1b_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -233,7 +233,7 @@ void test_svst1b_scatter_s64offset_s64(svbool_t pg, int8_t *base, svint64_t offs return SVE_ACLE_FUNC(svst1b_scatter_,s64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_s32offset_u32( +// CHECK-LABEL: @test_svst1b_scatter_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -245,7 +245,7 @@ void test_svst1b_scatter_s32offset_u32(svbool_t pg, uint8_t *base, svint32_t off return SVE_ACLE_FUNC(svst1b_scatter_,s32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_s64offset_u64( +// CHECK-LABEL: @test_svst1b_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -257,7 +257,7 @@ void test_svst1b_scatter_s64offset_u64(svbool_t pg, uint8_t *base, svint64_t off return SVE_ACLE_FUNC(svst1b_scatter_,s64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u32offset_s32( +// CHECK-LABEL: @test_svst1b_scatter_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -269,7 +269,7 @@ void test_svst1b_scatter_u32offset_s32(svbool_t pg, int8_t *base, svuint32_t off return SVE_ACLE_FUNC(svst1b_scatter_,u32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u64offset_s64( +// CHECK-LABEL: @test_svst1b_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -281,7 +281,7 @@ void test_svst1b_scatter_u64offset_s64(svbool_t pg, int8_t *base, svuint64_t off return SVE_ACLE_FUNC(svst1b_scatter_,u64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u32offset_u32( +// CHECK-LABEL: @test_svst1b_scatter_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -293,7 +293,7 @@ void test_svst1b_scatter_u32offset_u32(svbool_t pg, uint8_t *base, svuint32_t of return SVE_ACLE_FUNC(svst1b_scatter_,u32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u64offset_u64( +// CHECK-LABEL: @test_svst1b_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -305,7 +305,7 @@ void test_svst1b_scatter_u64offset_u64(svbool_t pg, uint8_t *base, svuint64_t of return SVE_ACLE_FUNC(svst1b_scatter_,u64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u32base_offset_s32( +// CHECK-LABEL: @test_svst1b_scatter_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -317,7 +317,7 @@ void test_svst1b_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64 return SVE_ACLE_FUNC(svst1b_scatter,_u32base,_offset,_s32)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u64base_offset_s64( +// CHECK-LABEL: @test_svst1b_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -329,7 +329,7 @@ void test_svst1b_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64 return SVE_ACLE_FUNC(svst1b_scatter,_u64base,_offset,_s64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u32base_offset_u32( +// CHECK-LABEL: @test_svst1b_scatter_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -341,7 +341,7 @@ void test_svst1b_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64 return SVE_ACLE_FUNC(svst1b_scatter,_u32base,_offset,_u32)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1b_scatter_u64base_offset_u64( +// CHECK-LABEL: @test_svst1b_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c index 23a9a053455ac9..e36788f22e71a3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c @@ -11,7 +11,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_s32( +// CHECK-LABEL: @test_svst1h_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -23,7 +23,7 @@ void test_svst1h_s32(svbool_t pg, int16_t *base, svint32_t data) return SVE_ACLE_FUNC(svst1h,_s32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_s64( +// CHECK-LABEL: @test_svst1h_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -35,7 +35,7 @@ void test_svst1h_s64(svbool_t pg, int16_t *base, svint64_t data) return SVE_ACLE_FUNC(svst1h,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_u32( +// CHECK-LABEL: @test_svst1h_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -47,7 +47,7 @@ void test_svst1h_u32(svbool_t pg, uint16_t *base, svuint32_t data) return SVE_ACLE_FUNC(svst1h,_u32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_u64( +// CHECK-LABEL: @test_svst1h_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -59,7 +59,7 @@ void test_svst1h_u64(svbool_t pg, uint16_t *base, svuint64_t data) return SVE_ACLE_FUNC(svst1h,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_vnum_s32( +// CHECK-LABEL: @test_svst1h_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -72,7 +72,7 @@ void test_svst1h_vnum_s32(svbool_t pg, int16_t *base, int64_t vnum, svint32_t da return SVE_ACLE_FUNC(svst1h_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_vnum_s64( +// CHECK-LABEL: @test_svst1h_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -85,7 +85,7 @@ void test_svst1h_vnum_s64(svbool_t pg, int16_t *base, int64_t vnum, svint64_t da return SVE_ACLE_FUNC(svst1h_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_vnum_u32( +// CHECK-LABEL: @test_svst1h_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -98,7 +98,7 @@ void test_svst1h_vnum_u32(svbool_t pg, uint16_t *base, int64_t vnum, svuint32_t return SVE_ACLE_FUNC(svst1h_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_vnum_u64( +// CHECK-LABEL: @test_svst1h_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -111,7 +111,7 @@ void test_svst1h_vnum_u64(svbool_t pg, uint16_t *base, int64_t vnum, svuint64_t return SVE_ACLE_FUNC(svst1h_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32base_s32( +// CHECK-LABEL: @test_svst1h_scatter_u32base_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -123,7 +123,7 @@ void test_svst1h_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t da return SVE_ACLE_FUNC(svst1h_scatter,_u32base,,_s32)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64base_s64( +// CHECK-LABEL: @test_svst1h_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -135,7 +135,7 @@ void test_svst1h_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t da return SVE_ACLE_FUNC(svst1h_scatter,_u64base,,_s64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32base_u32( +// CHECK-LABEL: @test_svst1h_scatter_u32base_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -147,7 +147,7 @@ void test_svst1h_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t d return SVE_ACLE_FUNC(svst1h_scatter,_u32base,,_u32)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64base_u64( +// CHECK-LABEL: @test_svst1h_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -159,7 +159,7 @@ void test_svst1h_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t d return SVE_ACLE_FUNC(svst1h_scatter,_u64base,,_u64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s32offset_s32( +// CHECK-LABEL: @test_svst1h_scatter_s32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -171,7 +171,7 @@ void test_svst1h_scatter_s32offset_s32(svbool_t pg, int16_t *base, svint32_t off return SVE_ACLE_FUNC(svst1h_scatter_,s32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s64offset_s64( +// CHECK-LABEL: @test_svst1h_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -183,7 +183,7 @@ void test_svst1h_scatter_s64offset_s64(svbool_t pg, int16_t *base, svint64_t off return SVE_ACLE_FUNC(svst1h_scatter_,s64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s32offset_u32( +// CHECK-LABEL: @test_svst1h_scatter_s32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -195,7 +195,7 @@ void test_svst1h_scatter_s32offset_u32(svbool_t pg, uint16_t *base, svint32_t of return SVE_ACLE_FUNC(svst1h_scatter_,s32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s64offset_u64( +// CHECK-LABEL: @test_svst1h_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -207,7 +207,7 @@ void test_svst1h_scatter_s64offset_u64(svbool_t pg, uint16_t *base, svint64_t of return SVE_ACLE_FUNC(svst1h_scatter_,s64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32offset_s32( +// CHECK-LABEL: @test_svst1h_scatter_u32offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -219,7 +219,7 @@ void test_svst1h_scatter_u32offset_s32(svbool_t pg, int16_t *base, svuint32_t of return SVE_ACLE_FUNC(svst1h_scatter_,u32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64offset_s64( +// CHECK-LABEL: @test_svst1h_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -231,7 +231,7 @@ void test_svst1h_scatter_u64offset_s64(svbool_t pg, int16_t *base, svuint64_t of return SVE_ACLE_FUNC(svst1h_scatter_,u64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32offset_u32( +// CHECK-LABEL: @test_svst1h_scatter_u32offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -243,7 +243,7 @@ void test_svst1h_scatter_u32offset_u32(svbool_t pg, uint16_t *base, svuint32_t o return SVE_ACLE_FUNC(svst1h_scatter_,u32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64offset_u64( +// CHECK-LABEL: @test_svst1h_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -255,7 +255,7 @@ void test_svst1h_scatter_u64offset_u64(svbool_t pg, uint16_t *base, svuint64_t o return SVE_ACLE_FUNC(svst1h_scatter_,u64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32base_offset_s32( +// CHECK-LABEL: @test_svst1h_scatter_u32base_offset_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -267,7 +267,7 @@ void test_svst1h_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64 return SVE_ACLE_FUNC(svst1h_scatter,_u32base,_offset,_s32)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64base_offset_s64( +// CHECK-LABEL: @test_svst1h_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -279,7 +279,7 @@ void test_svst1h_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64 return SVE_ACLE_FUNC(svst1h_scatter,_u64base,_offset,_s64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32base_offset_u32( +// CHECK-LABEL: @test_svst1h_scatter_u32base_offset_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -291,7 +291,7 @@ void test_svst1h_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64 return SVE_ACLE_FUNC(svst1h_scatter,_u32base,_offset,_u32)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64base_offset_u64( +// CHECK-LABEL: @test_svst1h_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -303,7 +303,7 @@ void test_svst1h_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64 return SVE_ACLE_FUNC(svst1h_scatter,_u64base,_offset,_u64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s32index_s32( +// CHECK-LABEL: @test_svst1h_scatter_s32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -315,7 +315,7 @@ void test_svst1h_scatter_s32index_s32(svbool_t pg, int16_t *base, svint32_t indi return SVE_ACLE_FUNC(svst1h_scatter_,s32,index,_s32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s64index_s64( +// CHECK-LABEL: @test_svst1h_scatter_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -327,7 +327,7 @@ void test_svst1h_scatter_s64index_s64(svbool_t pg, int16_t *base, svint64_t indi return SVE_ACLE_FUNC(svst1h_scatter_,s64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s32index_u32( +// CHECK-LABEL: @test_svst1h_scatter_s32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -339,7 +339,7 @@ void test_svst1h_scatter_s32index_u32(svbool_t pg, uint16_t *base, svint32_t ind return SVE_ACLE_FUNC(svst1h_scatter_,s32,index,_u32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_s64index_u64( +// CHECK-LABEL: @test_svst1h_scatter_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -351,7 +351,7 @@ void test_svst1h_scatter_s64index_u64(svbool_t pg, uint16_t *base, svint64_t ind return SVE_ACLE_FUNC(svst1h_scatter_,s64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32index_s32( +// CHECK-LABEL: @test_svst1h_scatter_u32index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -363,7 +363,7 @@ void test_svst1h_scatter_u32index_s32(svbool_t pg, int16_t *base, svuint32_t ind return SVE_ACLE_FUNC(svst1h_scatter_,u32,index,_s32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64index_s64( +// CHECK-LABEL: @test_svst1h_scatter_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -375,7 +375,7 @@ void test_svst1h_scatter_u64index_s64(svbool_t pg, int16_t *base, svuint64_t ind return SVE_ACLE_FUNC(svst1h_scatter_,u64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32index_u32( +// CHECK-LABEL: @test_svst1h_scatter_u32index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -387,7 +387,7 @@ void test_svst1h_scatter_u32index_u32(svbool_t pg, uint16_t *base, svuint32_t in return SVE_ACLE_FUNC(svst1h_scatter_,u32,index,_u32)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64index_u64( +// CHECK-LABEL: @test_svst1h_scatter_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -399,7 +399,7 @@ void test_svst1h_scatter_u64index_u64(svbool_t pg, uint16_t *base, svuint64_t in return SVE_ACLE_FUNC(svst1h_scatter_,u64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32base_index_s32( +// CHECK-LABEL: @test_svst1h_scatter_u32base_index_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -412,7 +412,7 @@ void test_svst1h_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_ return SVE_ACLE_FUNC(svst1h_scatter,_u32base,_index,_s32)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64base_index_s64( +// CHECK-LABEL: @test_svst1h_scatter_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -425,7 +425,7 @@ void test_svst1h_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_ return SVE_ACLE_FUNC(svst1h_scatter,_u64base,_index,_s64)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u32base_index_u32( +// CHECK-LABEL: @test_svst1h_scatter_u32base_index_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) @@ -438,7 +438,7 @@ void test_svst1h_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_ return SVE_ACLE_FUNC(svst1h_scatter,_u32base,_index,_u32)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1h_scatter_u64base_index_u64( +// CHECK-LABEL: @test_svst1h_scatter_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c index b2f69613911400..841f6926f1e1b8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c @@ -12,7 +12,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_s64( +// CHECK-LABEL: @test_svst1w_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -24,7 +24,7 @@ void test_svst1w_s64(svbool_t pg, int32_t *base, svint64_t data) return SVE_ACLE_FUNC(svst1w,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_u64( +// CHECK-LABEL: @test_svst1w_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = trunc [[DATA:%.*]] to @@ -36,7 +36,7 @@ void test_svst1w_u64(svbool_t pg, uint32_t *base, svuint64_t data) return SVE_ACLE_FUNC(svst1w,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_vnum_s64( +// CHECK-LABEL: @test_svst1w_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -49,7 +49,7 @@ void test_svst1w_vnum_s64(svbool_t pg, int32_t *base, int64_t vnum, svint64_t da return SVE_ACLE_FUNC(svst1w_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_vnum_u64( +// CHECK-LABEL: @test_svst1w_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -62,7 +62,7 @@ void test_svst1w_vnum_u64(svbool_t pg, uint32_t *base, int64_t vnum, svuint64_t return SVE_ACLE_FUNC(svst1w_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64base_s64( +// CHECK-LABEL: @test_svst1w_scatter_u64base_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -74,7 +74,7 @@ void test_svst1w_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t da return SVE_ACLE_FUNC(svst1w_scatter,_u64base,,_s64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64base_u64( +// CHECK-LABEL: @test_svst1w_scatter_u64base_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -86,7 +86,7 @@ void test_svst1w_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t d return SVE_ACLE_FUNC(svst1w_scatter,_u64base,,_u64)(pg, bases, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_s64offset_s64( +// CHECK-LABEL: @test_svst1w_scatter_s64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -98,7 +98,7 @@ void test_svst1w_scatter_s64offset_s64(svbool_t pg, int32_t *base, svint64_t off return SVE_ACLE_FUNC(svst1w_scatter_,s64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_s64offset_u64( +// CHECK-LABEL: @test_svst1w_scatter_s64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -110,7 +110,7 @@ void test_svst1w_scatter_s64offset_u64(svbool_t pg, uint32_t *base, svint64_t of return SVE_ACLE_FUNC(svst1w_scatter_,s64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64offset_s64( +// CHECK-LABEL: @test_svst1w_scatter_u64offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -122,7 +122,7 @@ void test_svst1w_scatter_u64offset_s64(svbool_t pg, int32_t *base, svuint64_t of return SVE_ACLE_FUNC(svst1w_scatter_,u64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64offset_u64( +// CHECK-LABEL: @test_svst1w_scatter_u64offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -134,7 +134,7 @@ void test_svst1w_scatter_u64offset_u64(svbool_t pg, uint32_t *base, svuint64_t o return SVE_ACLE_FUNC(svst1w_scatter_,u64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64base_offset_s64( +// CHECK-LABEL: @test_svst1w_scatter_u64base_offset_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -146,7 +146,7 @@ void test_svst1w_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64 return SVE_ACLE_FUNC(svst1w_scatter,_u64base,_offset,_s64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64base_offset_u64( +// CHECK-LABEL: @test_svst1w_scatter_u64base_offset_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -158,7 +158,7 @@ void test_svst1w_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64 return SVE_ACLE_FUNC(svst1w_scatter,_u64base,_offset,_u64)(pg, bases, offset, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_s64index_s64( +// CHECK-LABEL: @test_svst1w_scatter_s64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -170,7 +170,7 @@ void test_svst1w_scatter_s64index_s64(svbool_t pg, int32_t *base, svint64_t indi return SVE_ACLE_FUNC(svst1w_scatter_,s64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_s64index_u64( +// CHECK-LABEL: @test_svst1w_scatter_s64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -182,7 +182,7 @@ void test_svst1w_scatter_s64index_u64(svbool_t pg, uint32_t *base, svint64_t ind return SVE_ACLE_FUNC(svst1w_scatter_,s64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64index_s64( +// CHECK-LABEL: @test_svst1w_scatter_u64index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -194,7 +194,7 @@ void test_svst1w_scatter_u64index_s64(svbool_t pg, int32_t *base, svuint64_t ind return SVE_ACLE_FUNC(svst1w_scatter_,u64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64index_u64( +// CHECK-LABEL: @test_svst1w_scatter_u64index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -206,7 +206,7 @@ void test_svst1w_scatter_u64index_u64(svbool_t pg, uint32_t *base, svuint64_t in return SVE_ACLE_FUNC(svst1w_scatter_,u64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64base_index_s64( +// CHECK-LABEL: @test_svst1w_scatter_u64base_index_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) @@ -219,7 +219,7 @@ void test_svst1w_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_ return SVE_ACLE_FUNC(svst1w_scatter,_u64base,_index,_s64)(pg, bases, index, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst1w_scatter_u64base_index_u64( +// CHECK-LABEL: @test_svst1w_scatter_u64base_index_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c index fcfa7eb5768363..abe59567b03871 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c @@ -14,7 +14,7 @@ #else #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst2_bf16( +// CHECK-LABEL: @test_svst2_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8bf16.nxv16bf16( [[DATA:%.*]], i64 0) @@ -22,7 +22,7 @@ // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svst2_bf16u10__SVBool_tPu6__bf1614svbfloat16x2_t( +// CPP-CHECK-LABEL: @_Z15test_svst2_bf16u10__SVBool_tPu6__bf1614svbfloat16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8bf16.nxv16bf16( [[DATA:%.*]], i64 0) @@ -35,7 +35,7 @@ void test_svst2_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x2_t data) return SVE_ACLE_FUNC(svst2,_bf16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_bf16( +// CHECK-LABEL: @test_svst2_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -44,7 +44,7 @@ void test_svst2_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svst2_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x2_t( +// CPP-CHECK-LABEL: @_Z20test_svst2_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c index 3235a8b9e11155..6a6632d51b1c04 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c @@ -14,14 +14,14 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst2_s8( +// CHECK-LABEL: @test_svst2_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA]], i64 16) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst2_s8u10__SVBool_tPa10svint8x2_t( +// CPP-CHECK-LABEL: @_Z13test_svst2_s8u10__SVBool_tPa10svint8x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA]], i64 16) @@ -33,7 +33,7 @@ void test_svst2_s8(svbool_t pg, int8_t *base, svint8x2_t data) return SVE_ACLE_FUNC(svst2,_s8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_s16( +// CHECK-LABEL: @test_svst2_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv16i16( [[DATA:%.*]], i64 0) @@ -41,7 +41,7 @@ void test_svst2_s8(svbool_t pg, int8_t *base, svint8x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_s16u10__SVBool_tPs11svint16x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_s16u10__SVBool_tPs11svint16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv16i16( [[DATA:%.*]], i64 0) @@ -54,7 +54,7 @@ void test_svst2_s16(svbool_t pg, int16_t *base, svint16x2_t data) return SVE_ACLE_FUNC(svst2,_s16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_s32( +// CHECK-LABEL: @test_svst2_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv8i32( [[DATA:%.*]], i64 0) @@ -62,7 +62,7 @@ void test_svst2_s16(svbool_t pg, int16_t *base, svint16x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_s32u10__SVBool_tPi11svint32x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_s32u10__SVBool_tPi11svint32x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv8i32( [[DATA:%.*]], i64 0) @@ -75,7 +75,7 @@ void test_svst2_s32(svbool_t pg, int32_t *base, svint32x2_t data) return SVE_ACLE_FUNC(svst2,_s32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_s64( +// CHECK-LABEL: @test_svst2_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv4i64( [[DATA:%.*]], i64 0) @@ -83,7 +83,7 @@ void test_svst2_s32(svbool_t pg, int32_t *base, svint32x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_s64u10__SVBool_tPl11svint64x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_s64u10__SVBool_tPl11svint64x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv4i64( [[DATA:%.*]], i64 0) @@ -96,14 +96,14 @@ void test_svst2_s64(svbool_t pg, int64_t *base, svint64x2_t data) return SVE_ACLE_FUNC(svst2,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_u8( +// CHECK-LABEL: @test_svst2_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA]], i64 16) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst2_u8u10__SVBool_tPh11svuint8x2_t( +// CPP-CHECK-LABEL: @_Z13test_svst2_u8u10__SVBool_tPh11svuint8x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA]], i64 16) @@ -115,7 +115,7 @@ void test_svst2_u8(svbool_t pg, uint8_t *base, svuint8x2_t data) return SVE_ACLE_FUNC(svst2,_u8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_u16( +// CHECK-LABEL: @test_svst2_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv16i16( [[DATA:%.*]], i64 0) @@ -123,7 +123,7 @@ void test_svst2_u8(svbool_t pg, uint8_t *base, svuint8x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_u16u10__SVBool_tPt12svuint16x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_u16u10__SVBool_tPt12svuint16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv16i16( [[DATA:%.*]], i64 0) @@ -136,7 +136,7 @@ void test_svst2_u16(svbool_t pg, uint16_t *base, svuint16x2_t data) return SVE_ACLE_FUNC(svst2,_u16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_u32( +// CHECK-LABEL: @test_svst2_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv8i32( [[DATA:%.*]], i64 0) @@ -144,7 +144,7 @@ void test_svst2_u16(svbool_t pg, uint16_t *base, svuint16x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_u32u10__SVBool_tPj12svuint32x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_u32u10__SVBool_tPj12svuint32x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv8i32( [[DATA:%.*]], i64 0) @@ -157,7 +157,7 @@ void test_svst2_u32(svbool_t pg, uint32_t *base, svuint32x2_t data) return SVE_ACLE_FUNC(svst2,_u32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_u64( +// CHECK-LABEL: @test_svst2_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv4i64( [[DATA:%.*]], i64 0) @@ -165,7 +165,7 @@ void test_svst2_u32(svbool_t pg, uint32_t *base, svuint32x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_u64u10__SVBool_tPm12svuint64x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_u64u10__SVBool_tPm12svuint64x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv4i64( [[DATA:%.*]], i64 0) @@ -178,7 +178,7 @@ void test_svst2_u64(svbool_t pg, uint64_t *base, svuint64x2_t data) return SVE_ACLE_FUNC(svst2,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_f16( +// CHECK-LABEL: @test_svst2_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8f16.nxv16f16( [[DATA:%.*]], i64 0) @@ -186,7 +186,7 @@ void test_svst2_u64(svbool_t pg, uint64_t *base, svuint64x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_f16u10__SVBool_tPDh13svfloat16x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_f16u10__SVBool_tPDh13svfloat16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8f16.nxv16f16( [[DATA:%.*]], i64 0) @@ -199,7 +199,7 @@ void test_svst2_f16(svbool_t pg, float16_t *base, svfloat16x2_t data) return SVE_ACLE_FUNC(svst2,_f16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_f32( +// CHECK-LABEL: @test_svst2_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4f32.nxv8f32( [[DATA:%.*]], i64 0) @@ -207,7 +207,7 @@ void test_svst2_f16(svbool_t pg, float16_t *base, svfloat16x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_f32u10__SVBool_tPf13svfloat32x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_f32u10__SVBool_tPf13svfloat32x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4f32.nxv8f32( [[DATA:%.*]], i64 0) @@ -220,7 +220,7 @@ void test_svst2_f32(svbool_t pg, float32_t *base, svfloat32x2_t data) return SVE_ACLE_FUNC(svst2,_f32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_f64( +// CHECK-LABEL: @test_svst2_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2f64.nxv4f64( [[DATA:%.*]], i64 0) @@ -228,7 +228,7 @@ void test_svst2_f32(svbool_t pg, float32_t *base, svfloat32x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP1]], [[TMP2]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst2_f64u10__SVBool_tPd13svfloat64x2_t( +// CPP-CHECK-LABEL: @_Z14test_svst2_f64u10__SVBool_tPd13svfloat64x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2f64.nxv4f64( [[DATA:%.*]], i64 0) @@ -241,7 +241,7 @@ void test_svst2_f64(svbool_t pg, float64_t *base, svfloat64x2_t data) return SVE_ACLE_FUNC(svst2,_f64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_s8( +// CHECK-LABEL: @test_svst2_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) @@ -249,7 +249,7 @@ void test_svst2_f64(svbool_t pg, float64_t *base, svfloat64x2_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP1]], [[TMP2]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst2_vnum_s8u10__SVBool_tPal10svint8x2_t( +// CPP-CHECK-LABEL: @_Z18test_svst2_vnum_s8u10__SVBool_tPal10svint8x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) @@ -262,7 +262,7 @@ void test_svst2_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x2_t data return SVE_ACLE_FUNC(svst2_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_s16( +// CHECK-LABEL: @test_svst2_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -271,7 +271,7 @@ void test_svst2_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x2_t data // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_s16u10__SVBool_tPsl11svint16x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s16u10__SVBool_tPsl11svint16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -285,7 +285,7 @@ void test_svst2_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x2_t d return SVE_ACLE_FUNC(svst2_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_s32( +// CHECK-LABEL: @test_svst2_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -294,7 +294,7 @@ void test_svst2_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x2_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_s32u10__SVBool_tPil11svint32x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s32u10__SVBool_tPil11svint32x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -308,7 +308,7 @@ void test_svst2_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x2_t d return SVE_ACLE_FUNC(svst2_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_s64( +// CHECK-LABEL: @test_svst2_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -317,7 +317,7 @@ void test_svst2_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x2_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_s64u10__SVBool_tPll11svint64x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s64u10__SVBool_tPll11svint64x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -331,7 +331,7 @@ void test_svst2_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x2_t d return SVE_ACLE_FUNC(svst2_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_u8( +// CHECK-LABEL: @test_svst2_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) @@ -339,7 +339,7 @@ void test_svst2_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x2_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP1]], [[TMP2]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst2_vnum_u8u10__SVBool_tPhl11svuint8x2_t( +// CPP-CHECK-LABEL: @_Z18test_svst2_vnum_u8u10__SVBool_tPhl11svuint8x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv32i8( [[DATA:%.*]], i64 0) @@ -352,7 +352,7 @@ void test_svst2_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x2_t da return SVE_ACLE_FUNC(svst2_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_u16( +// CHECK-LABEL: @test_svst2_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -361,7 +361,7 @@ void test_svst2_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x2_t da // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_u16u10__SVBool_tPtl12svuint16x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u16u10__SVBool_tPtl12svuint16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -375,7 +375,7 @@ void test_svst2_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x2_t return SVE_ACLE_FUNC(svst2_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_u32( +// CHECK-LABEL: @test_svst2_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -384,7 +384,7 @@ void test_svst2_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x2_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_u32u10__SVBool_tPjl12svuint32x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u32u10__SVBool_tPjl12svuint32x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -398,7 +398,7 @@ void test_svst2_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x2_t return SVE_ACLE_FUNC(svst2_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_u64( +// CHECK-LABEL: @test_svst2_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -407,7 +407,7 @@ void test_svst2_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x2_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_u64u10__SVBool_tPml12svuint64x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u64u10__SVBool_tPml12svuint64x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -421,7 +421,7 @@ void test_svst2_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x2_t return SVE_ACLE_FUNC(svst2_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_f16( +// CHECK-LABEL: @test_svst2_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -430,7 +430,7 @@ void test_svst2_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x2_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_f16u10__SVBool_tPDhl13svfloat16x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f16u10__SVBool_tPDhl13svfloat16x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -444,7 +444,7 @@ void test_svst2_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x2 return SVE_ACLE_FUNC(svst2_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_f32( +// CHECK-LABEL: @test_svst2_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -453,7 +453,7 @@ void test_svst2_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x2 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_f32u10__SVBool_tPfl13svfloat32x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f32u10__SVBool_tPfl13svfloat32x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -467,7 +467,7 @@ void test_svst2_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x2 return SVE_ACLE_FUNC(svst2_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst2_vnum_f64( +// CHECK-LABEL: @test_svst2_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -476,7 +476,7 @@ void test_svst2_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x2 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP2]], [[TMP3]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst2_vnum_f64u10__SVBool_tPdl13svfloat64x2_t( +// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f64u10__SVBool_tPdl13svfloat64x2_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c index 096699191e8849..30954b4eaac4cb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst3_bf16( +// CHECK-LABEL: @test_svst3_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8bf16.nxv24bf16( [[DATA:%.*]], i64 0) @@ -24,7 +24,7 @@ // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svst3_bf16u10__SVBool_tPu6__bf1614svbfloat16x3_t( +// CPP-CHECK-LABEL: @_Z15test_svst3_bf16u10__SVBool_tPu6__bf1614svbfloat16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8bf16.nxv24bf16( [[DATA:%.*]], i64 0) @@ -38,7 +38,7 @@ void test_svst3_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x3_t data) return SVE_ACLE_FUNC(svst3,_bf16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_bf16( +// CHECK-LABEL: @test_svst3_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -48,7 +48,7 @@ void test_svst3_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svst3_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x3_t( +// CPP-CHECK-LABEL: @_Z20test_svst3_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c index a962f0734dc9a2..d78c7d81b95302 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c @@ -14,7 +14,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst3_s8( +// CHECK-LABEL: @test_svst3_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA]], i64 16) @@ -22,7 +22,7 @@ // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst3_s8u10__SVBool_tPa10svint8x3_t( +// CPP-CHECK-LABEL: @_Z13test_svst3_s8u10__SVBool_tPa10svint8x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA]], i64 16) @@ -35,7 +35,7 @@ void test_svst3_s8(svbool_t pg, int8_t *base, svint8x3_t data) return SVE_ACLE_FUNC(svst3,_s8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_s16( +// CHECK-LABEL: @test_svst3_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv24i16( [[DATA:%.*]], i64 0) @@ -44,7 +44,7 @@ void test_svst3_s8(svbool_t pg, int8_t *base, svint8x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_s16u10__SVBool_tPs11svint16x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_s16u10__SVBool_tPs11svint16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv24i16( [[DATA:%.*]], i64 0) @@ -58,7 +58,7 @@ void test_svst3_s16(svbool_t pg, int16_t *base, svint16x3_t data) return SVE_ACLE_FUNC(svst3,_s16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_s32( +// CHECK-LABEL: @test_svst3_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv12i32( [[DATA:%.*]], i64 0) @@ -67,7 +67,7 @@ void test_svst3_s16(svbool_t pg, int16_t *base, svint16x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_s32u10__SVBool_tPi11svint32x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_s32u10__SVBool_tPi11svint32x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv12i32( [[DATA:%.*]], i64 0) @@ -81,7 +81,7 @@ void test_svst3_s32(svbool_t pg, int32_t *base, svint32x3_t data) return SVE_ACLE_FUNC(svst3,_s32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_s64( +// CHECK-LABEL: @test_svst3_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv6i64( [[DATA:%.*]], i64 0) @@ -90,7 +90,7 @@ void test_svst3_s32(svbool_t pg, int32_t *base, svint32x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_s64u10__SVBool_tPl11svint64x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_s64u10__SVBool_tPl11svint64x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv6i64( [[DATA:%.*]], i64 0) @@ -104,7 +104,7 @@ void test_svst3_s64(svbool_t pg, int64_t *base, svint64x3_t data) return SVE_ACLE_FUNC(svst3,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_u8( +// CHECK-LABEL: @test_svst3_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA]], i64 16) @@ -112,7 +112,7 @@ void test_svst3_s64(svbool_t pg, int64_t *base, svint64x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst3_u8u10__SVBool_tPh11svuint8x3_t( +// CPP-CHECK-LABEL: @_Z13test_svst3_u8u10__SVBool_tPh11svuint8x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA]], i64 16) @@ -125,7 +125,7 @@ void test_svst3_u8(svbool_t pg, uint8_t *base, svuint8x3_t data) return SVE_ACLE_FUNC(svst3,_u8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_u16( +// CHECK-LABEL: @test_svst3_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv24i16( [[DATA:%.*]], i64 0) @@ -134,7 +134,7 @@ void test_svst3_u8(svbool_t pg, uint8_t *base, svuint8x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_u16u10__SVBool_tPt12svuint16x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_u16u10__SVBool_tPt12svuint16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv24i16( [[DATA:%.*]], i64 0) @@ -148,7 +148,7 @@ void test_svst3_u16(svbool_t pg, uint16_t *base, svuint16x3_t data) return SVE_ACLE_FUNC(svst3,_u16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_u32( +// CHECK-LABEL: @test_svst3_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv12i32( [[DATA:%.*]], i64 0) @@ -157,7 +157,7 @@ void test_svst3_u16(svbool_t pg, uint16_t *base, svuint16x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_u32u10__SVBool_tPj12svuint32x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_u32u10__SVBool_tPj12svuint32x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv12i32( [[DATA:%.*]], i64 0) @@ -171,7 +171,7 @@ void test_svst3_u32(svbool_t pg, uint32_t *base, svuint32x3_t data) return SVE_ACLE_FUNC(svst3,_u32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_u64( +// CHECK-LABEL: @test_svst3_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv6i64( [[DATA:%.*]], i64 0) @@ -180,7 +180,7 @@ void test_svst3_u32(svbool_t pg, uint32_t *base, svuint32x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_u64u10__SVBool_tPm12svuint64x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_u64u10__SVBool_tPm12svuint64x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv6i64( [[DATA:%.*]], i64 0) @@ -194,7 +194,7 @@ void test_svst3_u64(svbool_t pg, uint64_t *base, svuint64x3_t data) return SVE_ACLE_FUNC(svst3,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_f16( +// CHECK-LABEL: @test_svst3_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8f16.nxv24f16( [[DATA:%.*]], i64 0) @@ -203,7 +203,7 @@ void test_svst3_u64(svbool_t pg, uint64_t *base, svuint64x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_f16u10__SVBool_tPDh13svfloat16x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_f16u10__SVBool_tPDh13svfloat16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8f16.nxv24f16( [[DATA:%.*]], i64 0) @@ -217,7 +217,7 @@ void test_svst3_f16(svbool_t pg, float16_t *base, svfloat16x3_t data) return SVE_ACLE_FUNC(svst3,_f16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_f32( +// CHECK-LABEL: @test_svst3_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4f32.nxv12f32( [[DATA:%.*]], i64 0) @@ -226,7 +226,7 @@ void test_svst3_f16(svbool_t pg, float16_t *base, svfloat16x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_f32u10__SVBool_tPf13svfloat32x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_f32u10__SVBool_tPf13svfloat32x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4f32.nxv12f32( [[DATA:%.*]], i64 0) @@ -240,7 +240,7 @@ void test_svst3_f32(svbool_t pg, float32_t *base, svfloat32x3_t data) return SVE_ACLE_FUNC(svst3,_f32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_f64( +// CHECK-LABEL: @test_svst3_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2f64.nxv6f64( [[DATA:%.*]], i64 0) @@ -249,7 +249,7 @@ void test_svst3_f32(svbool_t pg, float32_t *base, svfloat32x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst3_f64u10__SVBool_tPd13svfloat64x3_t( +// CPP-CHECK-LABEL: @_Z14test_svst3_f64u10__SVBool_tPd13svfloat64x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2f64.nxv6f64( [[DATA:%.*]], i64 0) @@ -263,7 +263,7 @@ void test_svst3_f64(svbool_t pg, float64_t *base, svfloat64x3_t data) return SVE_ACLE_FUNC(svst3,_f64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_s8( +// CHECK-LABEL: @test_svst3_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) @@ -272,7 +272,7 @@ void test_svst3_f64(svbool_t pg, float64_t *base, svfloat64x3_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst3_vnum_s8u10__SVBool_tPal10svint8x3_t( +// CPP-CHECK-LABEL: @_Z18test_svst3_vnum_s8u10__SVBool_tPal10svint8x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) @@ -286,7 +286,7 @@ void test_svst3_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x3_t data return SVE_ACLE_FUNC(svst3_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_s16( +// CHECK-LABEL: @test_svst3_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -296,7 +296,7 @@ void test_svst3_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x3_t data // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_s16u10__SVBool_tPsl11svint16x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s16u10__SVBool_tPsl11svint16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -311,7 +311,7 @@ void test_svst3_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x3_t d return SVE_ACLE_FUNC(svst3_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_s32( +// CHECK-LABEL: @test_svst3_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -321,7 +321,7 @@ void test_svst3_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x3_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_s32u10__SVBool_tPil11svint32x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s32u10__SVBool_tPil11svint32x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -336,7 +336,7 @@ void test_svst3_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x3_t d return SVE_ACLE_FUNC(svst3_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_s64( +// CHECK-LABEL: @test_svst3_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -346,7 +346,7 @@ void test_svst3_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x3_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_s64u10__SVBool_tPll11svint64x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s64u10__SVBool_tPll11svint64x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -361,7 +361,7 @@ void test_svst3_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x3_t d return SVE_ACLE_FUNC(svst3_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_u8( +// CHECK-LABEL: @test_svst3_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) @@ -370,7 +370,7 @@ void test_svst3_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x3_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst3_vnum_u8u10__SVBool_tPhl11svuint8x3_t( +// CPP-CHECK-LABEL: @_Z18test_svst3_vnum_u8u10__SVBool_tPhl11svuint8x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv48i8( [[DATA:%.*]], i64 0) @@ -384,7 +384,7 @@ void test_svst3_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x3_t da return SVE_ACLE_FUNC(svst3_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_u16( +// CHECK-LABEL: @test_svst3_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -394,7 +394,7 @@ void test_svst3_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x3_t da // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_u16u10__SVBool_tPtl12svuint16x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u16u10__SVBool_tPtl12svuint16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -409,7 +409,7 @@ void test_svst3_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x3_t return SVE_ACLE_FUNC(svst3_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_u32( +// CHECK-LABEL: @test_svst3_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -419,7 +419,7 @@ void test_svst3_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x3_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_u32u10__SVBool_tPjl12svuint32x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u32u10__SVBool_tPjl12svuint32x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -434,7 +434,7 @@ void test_svst3_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x3_t return SVE_ACLE_FUNC(svst3_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_u64( +// CHECK-LABEL: @test_svst3_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -444,7 +444,7 @@ void test_svst3_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x3_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_u64u10__SVBool_tPml12svuint64x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u64u10__SVBool_tPml12svuint64x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -459,7 +459,7 @@ void test_svst3_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x3_t return SVE_ACLE_FUNC(svst3_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_f16( +// CHECK-LABEL: @test_svst3_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -469,7 +469,7 @@ void test_svst3_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x3_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_f16u10__SVBool_tPDhl13svfloat16x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f16u10__SVBool_tPDhl13svfloat16x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -484,7 +484,7 @@ void test_svst3_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x3 return SVE_ACLE_FUNC(svst3_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_f32( +// CHECK-LABEL: @test_svst3_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -494,7 +494,7 @@ void test_svst3_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x3 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_f32u10__SVBool_tPfl13svfloat32x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f32u10__SVBool_tPfl13svfloat32x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -509,7 +509,7 @@ void test_svst3_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x3 return SVE_ACLE_FUNC(svst3_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst3_vnum_f64( +// CHECK-LABEL: @test_svst3_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -519,7 +519,7 @@ void test_svst3_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x3 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst3_vnum_f64u10__SVBool_tPdl13svfloat64x3_t( +// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f64u10__SVBool_tPdl13svfloat64x3_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c index 484fc6333b577d..bf5afb9458ee1e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c @@ -15,7 +15,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst4_bf16( +// CHECK-LABEL: @test_svst4_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8bf16.nxv32bf16( [[DATA:%.*]], i64 0) @@ -25,7 +25,7 @@ // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svst4_bf16u10__SVBool_tPu6__bf1614svbfloat16x4_t( +// CPP-CHECK-LABEL: @_Z15test_svst4_bf16u10__SVBool_tPu6__bf1614svbfloat16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8bf16.nxv32bf16( [[DATA:%.*]], i64 0) @@ -40,7 +40,7 @@ void test_svst4_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x4_t data) return SVE_ACLE_FUNC(svst4,_bf16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_bf16( +// CHECK-LABEL: @test_svst4_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -51,7 +51,7 @@ void test_svst4_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svst4_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x4_t( +// CPP-CHECK-LABEL: @_Z20test_svst4_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c index 774460c9151926..fc8bdcd34ece0c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c @@ -14,7 +14,7 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svst4_s8( +// CHECK-LABEL: @test_svst4_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA]], i64 16) @@ -23,7 +23,7 @@ // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst4_s8u10__SVBool_tPa10svint8x4_t( +// CPP-CHECK-LABEL: @_Z13test_svst4_s8u10__SVBool_tPa10svint8x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA]], i64 16) @@ -37,7 +37,7 @@ void test_svst4_s8(svbool_t pg, int8_t *base, svint8x4_t data) return SVE_ACLE_FUNC(svst4,_s8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_s16( +// CHECK-LABEL: @test_svst4_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv32i16( [[DATA:%.*]], i64 0) @@ -47,7 +47,7 @@ void test_svst4_s8(svbool_t pg, int8_t *base, svint8x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_s16u10__SVBool_tPs11svint16x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_s16u10__SVBool_tPs11svint16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv32i16( [[DATA:%.*]], i64 0) @@ -62,7 +62,7 @@ void test_svst4_s16(svbool_t pg, int16_t *base, svint16x4_t data) return SVE_ACLE_FUNC(svst4,_s16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_s32( +// CHECK-LABEL: @test_svst4_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv16i32( [[DATA:%.*]], i64 0) @@ -72,7 +72,7 @@ void test_svst4_s16(svbool_t pg, int16_t *base, svint16x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_s32u10__SVBool_tPi11svint32x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_s32u10__SVBool_tPi11svint32x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv16i32( [[DATA:%.*]], i64 0) @@ -87,7 +87,7 @@ void test_svst4_s32(svbool_t pg, int32_t *base, svint32x4_t data) return SVE_ACLE_FUNC(svst4,_s32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_s64( +// CHECK-LABEL: @test_svst4_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv8i64( [[DATA:%.*]], i64 0) @@ -97,7 +97,7 @@ void test_svst4_s32(svbool_t pg, int32_t *base, svint32x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_s64u10__SVBool_tPl11svint64x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_s64u10__SVBool_tPl11svint64x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv8i64( [[DATA:%.*]], i64 0) @@ -112,7 +112,7 @@ void test_svst4_s64(svbool_t pg, int64_t *base, svint64x4_t data) return SVE_ACLE_FUNC(svst4,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_u8( +// CHECK-LABEL: @test_svst4_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA]], i64 16) @@ -121,7 +121,7 @@ void test_svst4_s64(svbool_t pg, int64_t *base, svint64x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z13test_svst4_u8u10__SVBool_tPh11svuint8x4_t( +// CPP-CHECK-LABEL: @_Z13test_svst4_u8u10__SVBool_tPh11svuint8x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA]], i64 16) @@ -135,7 +135,7 @@ void test_svst4_u8(svbool_t pg, uint8_t *base, svuint8x4_t data) return SVE_ACLE_FUNC(svst4,_u8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_u16( +// CHECK-LABEL: @test_svst4_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv32i16( [[DATA:%.*]], i64 0) @@ -145,7 +145,7 @@ void test_svst4_u8(svbool_t pg, uint8_t *base, svuint8x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_u16u10__SVBool_tPt12svuint16x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_u16u10__SVBool_tPt12svuint16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8i16.nxv32i16( [[DATA:%.*]], i64 0) @@ -160,7 +160,7 @@ void test_svst4_u16(svbool_t pg, uint16_t *base, svuint16x4_t data) return SVE_ACLE_FUNC(svst4,_u16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_u32( +// CHECK-LABEL: @test_svst4_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv16i32( [[DATA:%.*]], i64 0) @@ -170,7 +170,7 @@ void test_svst4_u16(svbool_t pg, uint16_t *base, svuint16x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_u32u10__SVBool_tPj12svuint32x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_u32u10__SVBool_tPj12svuint32x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4i32.nxv16i32( [[DATA:%.*]], i64 0) @@ -185,7 +185,7 @@ void test_svst4_u32(svbool_t pg, uint32_t *base, svuint32x4_t data) return SVE_ACLE_FUNC(svst4,_u32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_u64( +// CHECK-LABEL: @test_svst4_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv8i64( [[DATA:%.*]], i64 0) @@ -195,7 +195,7 @@ void test_svst4_u32(svbool_t pg, uint32_t *base, svuint32x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_u64u10__SVBool_tPm12svuint64x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_u64u10__SVBool_tPm12svuint64x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2i64.nxv8i64( [[DATA:%.*]], i64 0) @@ -210,7 +210,7 @@ void test_svst4_u64(svbool_t pg, uint64_t *base, svuint64x4_t data) return SVE_ACLE_FUNC(svst4,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_f16( +// CHECK-LABEL: @test_svst4_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8f16.nxv32f16( [[DATA:%.*]], i64 0) @@ -220,7 +220,7 @@ void test_svst4_u64(svbool_t pg, uint64_t *base, svuint64x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_f16u10__SVBool_tPDh13svfloat16x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_f16u10__SVBool_tPDh13svfloat16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv8f16.nxv32f16( [[DATA:%.*]], i64 0) @@ -235,7 +235,7 @@ void test_svst4_f16(svbool_t pg, float16_t *base, svfloat16x4_t data) return SVE_ACLE_FUNC(svst4,_f16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_f32( +// CHECK-LABEL: @test_svst4_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4f32.nxv16f32( [[DATA:%.*]], i64 0) @@ -245,7 +245,7 @@ void test_svst4_f16(svbool_t pg, float16_t *base, svfloat16x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_f32u10__SVBool_tPf13svfloat32x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_f32u10__SVBool_tPf13svfloat32x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv4f32.nxv16f32( [[DATA:%.*]], i64 0) @@ -260,7 +260,7 @@ void test_svst4_f32(svbool_t pg, float32_t *base, svfloat32x4_t data) return SVE_ACLE_FUNC(svst4,_f32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_f64( +// CHECK-LABEL: @test_svst4_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2f64.nxv8f64( [[DATA:%.*]], i64 0) @@ -270,7 +270,7 @@ void test_svst4_f32(svbool_t pg, float32_t *base, svfloat32x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z14test_svst4_f64u10__SVBool_tPd13svfloat64x4_t( +// CPP-CHECK-LABEL: @_Z14test_svst4_f64u10__SVBool_tPd13svfloat64x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv2f64.nxv8f64( [[DATA:%.*]], i64 0) @@ -285,7 +285,7 @@ void test_svst4_f64(svbool_t pg, float64_t *base, svfloat64x4_t data) return SVE_ACLE_FUNC(svst4,_f64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_s8( +// CHECK-LABEL: @test_svst4_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) @@ -295,7 +295,7 @@ void test_svst4_f64(svbool_t pg, float64_t *base, svfloat64x4_t data) // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst4_vnum_s8u10__SVBool_tPal10svint8x4_t( +// CPP-CHECK-LABEL: @_Z18test_svst4_vnum_s8u10__SVBool_tPal10svint8x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) @@ -310,7 +310,7 @@ void test_svst4_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x4_t data return SVE_ACLE_FUNC(svst4_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_s16( +// CHECK-LABEL: @test_svst4_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -321,7 +321,7 @@ void test_svst4_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x4_t data // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_s16u10__SVBool_tPsl11svint16x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s16u10__SVBool_tPsl11svint16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -337,7 +337,7 @@ void test_svst4_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x4_t d return SVE_ACLE_FUNC(svst4_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_s32( +// CHECK-LABEL: @test_svst4_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -348,7 +348,7 @@ void test_svst4_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x4_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_s32u10__SVBool_tPil11svint32x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s32u10__SVBool_tPil11svint32x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -364,7 +364,7 @@ void test_svst4_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x4_t d return SVE_ACLE_FUNC(svst4_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_s64( +// CHECK-LABEL: @test_svst4_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -375,7 +375,7 @@ void test_svst4_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x4_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_s64u10__SVBool_tPll11svint64x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s64u10__SVBool_tPll11svint64x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -391,7 +391,7 @@ void test_svst4_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x4_t d return SVE_ACLE_FUNC(svst4_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_u8( +// CHECK-LABEL: @test_svst4_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) @@ -401,7 +401,7 @@ void test_svst4_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x4_t d // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z18test_svst4_vnum_u8u10__SVBool_tPhl11svuint8x4_t( +// CPP-CHECK-LABEL: @_Z18test_svst4_vnum_u8u10__SVBool_tPhl11svuint8x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call @llvm.vector.extract.nxv16i8.nxv64i8( [[DATA:%.*]], i64 0) @@ -416,7 +416,7 @@ void test_svst4_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x4_t da return SVE_ACLE_FUNC(svst4_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_u16( +// CHECK-LABEL: @test_svst4_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -427,7 +427,7 @@ void test_svst4_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x4_t da // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_u16u10__SVBool_tPtl12svuint16x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u16u10__SVBool_tPtl12svuint16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -443,7 +443,7 @@ void test_svst4_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x4_t return SVE_ACLE_FUNC(svst4_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_u32( +// CHECK-LABEL: @test_svst4_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -454,7 +454,7 @@ void test_svst4_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x4_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_u32u10__SVBool_tPjl12svuint32x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u32u10__SVBool_tPjl12svuint32x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -470,7 +470,7 @@ void test_svst4_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x4_t return SVE_ACLE_FUNC(svst4_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_u64( +// CHECK-LABEL: @test_svst4_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -481,7 +481,7 @@ void test_svst4_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x4_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_u64u10__SVBool_tPml12svuint64x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u64u10__SVBool_tPml12svuint64x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -497,7 +497,7 @@ void test_svst4_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x4_t return SVE_ACLE_FUNC(svst4_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_f16( +// CHECK-LABEL: @test_svst4_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -508,7 +508,7 @@ void test_svst4_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x4_t // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_f16u10__SVBool_tPDhl13svfloat16x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f16u10__SVBool_tPDhl13svfloat16x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -524,7 +524,7 @@ void test_svst4_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x4 return SVE_ACLE_FUNC(svst4_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_f32( +// CHECK-LABEL: @test_svst4_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -535,7 +535,7 @@ void test_svst4_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x4 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_f32u10__SVBool_tPfl13svfloat32x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f32u10__SVBool_tPfl13svfloat32x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -551,7 +551,7 @@ void test_svst4_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x4 return SVE_ACLE_FUNC(svst4_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svst4_vnum_f64( +// CHECK-LABEL: @test_svst4_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -562,7 +562,7 @@ void test_svst4_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x4 // CHECK-NEXT: tail call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z19test_svst4_vnum_f64u10__SVBool_tPdl13svfloat64x4_t( +// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f64u10__SVBool_tPdl13svfloat64x4_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c index f1fa19bb5e84ca..b19c12038f5713 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c @@ -15,13 +15,13 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_bf16( +// CHECK-LABEL: @test_svstnt1_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z17test_svstnt1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( +// CPP-CHECK-LABEL: @_Z17test_svstnt1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -32,14 +32,14 @@ void test_svstnt1_bf16(svbool_t pg, bfloat16_t *base, svbfloat16_t data) return SVE_ACLE_FUNC(svstnt1,_bf16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_bf16( +// CHECK-LABEL: @test_svstnt1_vnum_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z22test_svstnt1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( +// CPP-CHECK-LABEL: @_Z22test_svstnt1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c index 1392157c8701bc..2ddb154091a102 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c @@ -15,12 +15,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_s8( +// CHECK-LABEL: @test_svstnt1_s8( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svstnt1_s8u10__SVBool_tPau10__SVInt8_t( +// CPP-CHECK-LABEL: @_Z15test_svstnt1_s8u10__SVBool_tPau10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void @@ -30,13 +30,13 @@ void test_svstnt1_s8(svbool_t pg, int8_t *base, svint8_t data) return SVE_ACLE_FUNC(svstnt1,_s8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_s16( +// CHECK-LABEL: @test_svstnt1_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_s16u10__SVBool_tPsu11__SVInt16_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_s16u10__SVBool_tPsu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -47,13 +47,13 @@ void test_svstnt1_s16(svbool_t pg, int16_t *base, svint16_t data) return SVE_ACLE_FUNC(svstnt1,_s16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_s32( +// CHECK-LABEL: @test_svstnt1_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_s32u10__SVBool_tPiu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_s32u10__SVBool_tPiu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -64,13 +64,13 @@ void test_svstnt1_s32(svbool_t pg, int32_t *base, svint32_t data) return SVE_ACLE_FUNC(svstnt1,_s32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_s64( +// CHECK-LABEL: @test_svstnt1_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_s64u10__SVBool_tPlu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_s64u10__SVBool_tPlu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -81,12 +81,12 @@ void test_svstnt1_s64(svbool_t pg, int64_t *base, svint64_t data) return SVE_ACLE_FUNC(svstnt1,_s64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_u8( +// CHECK-LABEL: @test_svstnt1_u8( // CHECK-NEXT: entry: // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z15test_svstnt1_u8u10__SVBool_tPhu11__SVUint8_t( +// CPP-CHECK-LABEL: @_Z15test_svstnt1_u8u10__SVBool_tPhu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[BASE:%.*]]) // CPP-CHECK-NEXT: ret void @@ -96,13 +96,13 @@ void test_svstnt1_u8(svbool_t pg, uint8_t *base, svuint8_t data) return SVE_ACLE_FUNC(svstnt1,_u8,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_u16( +// CHECK-LABEL: @test_svstnt1_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_u16u10__SVBool_tPtu12__SVUint16_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_u16u10__SVBool_tPtu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -113,13 +113,13 @@ void test_svstnt1_u16(svbool_t pg, uint16_t *base, svuint16_t data) return SVE_ACLE_FUNC(svstnt1,_u16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_u32( +// CHECK-LABEL: @test_svstnt1_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_u32u10__SVBool_tPju12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_u32u10__SVBool_tPju12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -130,13 +130,13 @@ void test_svstnt1_u32(svbool_t pg, uint32_t *base, svuint32_t data) return SVE_ACLE_FUNC(svstnt1,_u32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_u64( +// CHECK-LABEL: @test_svstnt1_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_u64u10__SVBool_tPmu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_u64u10__SVBool_tPmu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -147,13 +147,13 @@ void test_svstnt1_u64(svbool_t pg, uint64_t *base, svuint64_t data) return SVE_ACLE_FUNC(svstnt1,_u64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_f16( +// CHECK-LABEL: @test_svstnt1_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_f16u10__SVBool_tPDhu13__SVFloat16_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_f16u10__SVBool_tPDhu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -164,13 +164,13 @@ void test_svstnt1_f16(svbool_t pg, float16_t *base, svfloat16_t data) return SVE_ACLE_FUNC(svstnt1,_f16,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_f32( +// CHECK-LABEL: @test_svstnt1_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_f32u10__SVBool_tPfu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_f32u10__SVBool_tPfu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -181,13 +181,13 @@ void test_svstnt1_f32(svbool_t pg, float32_t *base, svfloat32_t data) return SVE_ACLE_FUNC(svstnt1,_f32,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_f64( +// CHECK-LABEL: @test_svstnt1_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z16test_svstnt1_f64u10__SVBool_tPdu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z16test_svstnt1_f64u10__SVBool_tPdu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[BASE:%.*]]) @@ -198,13 +198,13 @@ void test_svstnt1_f64(svbool_t pg, float64_t *base, svfloat64_t data) return SVE_ACLE_FUNC(svstnt1,_f64,,)(pg, base, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_s8( +// CHECK-LABEL: @test_svstnt1_vnum_s8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svstnt1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( +// CPP-CHECK-LABEL: @_Z20test_svstnt1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[TMP0]]) @@ -215,14 +215,14 @@ void test_svstnt1_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8_t data return SVE_ACLE_FUNC(svstnt1_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_s16( +// CHECK-LABEL: @test_svstnt1_vnum_s16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -234,14 +234,14 @@ void test_svstnt1_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16_t d return SVE_ACLE_FUNC(svstnt1_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_s32( +// CHECK-LABEL: @test_svstnt1_vnum_s32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -253,14 +253,14 @@ void test_svstnt1_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32_t d return SVE_ACLE_FUNC(svstnt1_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_s64( +// CHECK-LABEL: @test_svstnt1_vnum_s64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -272,13 +272,13 @@ void test_svstnt1_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64_t d return SVE_ACLE_FUNC(svstnt1_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_u8( +// CHECK-LABEL: @test_svstnt1_vnum_u8( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[TMP0]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z20test_svstnt1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( +// CPP-CHECK-LABEL: @_Z20test_svstnt1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], ptr [[TMP0]]) @@ -289,14 +289,14 @@ void test_svstnt1_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8_t da return SVE_ACLE_FUNC(svstnt1_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_u16( +// CHECK-LABEL: @test_svstnt1_vnum_u16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -308,14 +308,14 @@ void test_svstnt1_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16_t return SVE_ACLE_FUNC(svstnt1_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_u32( +// CHECK-LABEL: @test_svstnt1_vnum_u32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -327,14 +327,14 @@ void test_svstnt1_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32_t return SVE_ACLE_FUNC(svstnt1_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_u64( +// CHECK-LABEL: @test_svstnt1_vnum_u64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -346,14 +346,14 @@ void test_svstnt1_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64_t return SVE_ACLE_FUNC(svstnt1_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_f16( +// CHECK-LABEL: @test_svstnt1_vnum_f16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -365,14 +365,14 @@ void test_svstnt1_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16 return SVE_ACLE_FUNC(svstnt1_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_f32( +// CHECK-LABEL: @test_svstnt1_vnum_f32( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] @@ -384,14 +384,14 @@ void test_svstnt1_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32 return SVE_ACLE_FUNC(svstnt1_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: define {{[^@]+}}@test_svstnt1_vnum_f64( +// CHECK-LABEL: @test_svstnt1_vnum_f64( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] // CHECK-NEXT: tail call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], ptr [[TMP1]]) // CHECK-NEXT: ret void // -// CPP-CHECK-LABEL: define {{[^@]+}}@_Z21test_svstnt1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( +// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( // CPP-CHECK-NEXT: entry: // CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) // CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , ptr [[BASE:%.*]], i64 [[VNUM:%.*]] diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c index 90f96f40154bc7..61182ca526079a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c @@ -7,12 +7,12 @@ // CHECK-LABEL: @test_svwrffr( // CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) +// CHECK-NEXT: tail call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) // CHECK-NEXT: ret void // // CPP-CHECK-LABEL: @_Z12test_svwrffru10__SVBool_t( // CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) +// CPP-CHECK-NEXT: tail call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) // CPP-CHECK-NEXT: ret void // void test_svwrffr(svbool_t op)