Rewrite #37
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first commit for the rewrite stuff: |
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to convert old configs:
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!! early stage and very experimental !! |
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Great work Oliver! |
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if you have wishes about what should be changed, now is the right time |
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Versioning / release systemi have split the sources into riocore and riogui,
a tag is also set when I publish a new version on pypi Documentationi'm often too lazy for documentaries, but i'll try to do better :) PMOD / ChipKit (Slots -> Modules):this are only abstractions and pinout-mappings for easier reuse of modules like a Arduino-CNC-Shield to other boards. Sometimes it is difficult to assign the correct PIN of an FPGA to the pin of a connector. Expansionsif you have a small FPGA with a small number of pins, you can increase the number of inputs and outputs with an expansion-board (like shiftregisters) so you can easily create a lot of pins from 4 pins (Clock/IN/OUT/Load) -> 8,16,32,...128,... :) |
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https://github.com/multigcs/riogui/blob/main/FAQ.md Need more input :) @TurBoss ??? |
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Hello,
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Hi, there was a problem on some systems with some FPGA's, |
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I throw everything away =O <X
and start something new :)
ok, it's not that bad, I'm just doing a 'complete' rewrite of the build system.
The verilog code doesn't change much (a little naming)
The config-files will also only change minimally, but I already have an update script for that (plugin names and pin configuration).
Most of it is already working again, at the moment I'm working on the Hal component, which is now completely generated.
It was definitely necessary at some point, everything has grown so quickly and I've only ever tried to squeeze new functions into the existing structure,
it all gets messy very quickly.
I think I can release it next week and you can build running setups with it,
I have also created several test setups to test all plugins.
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