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The addition of GateResolution seems unrelated to the purpose of this PR. I think it would be best to split off that change to be reviewed/merged separately.
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This PR is doing more than just adding a block opcode. These changes should be done in a separate PR and or an issue should be opened up for them.
I also left pending questions
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Should be gtg after this.
Update acir/src/circuit/opcodes.rs Co-authored-by: Tom French <15848336+TomAFrench@users.noreply.github.com>
Update acvm/src/pwg/block.rs Co-authored-by: Tom French <15848336+TomAFrench@users.noreply.github.com>
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LGTM
Description
Summary of changes
This PR adds an opcode which abstract memory operations as read and write to blocks.
It is required for the dynamic array feature because the solver is not able to solve dynamic reads except for simple cases.
The opcode uses the memory operation of a block to emulate the block value during solving in order to resolve the read operations.
Dependency additions / changes
Solving does not return an error anymore when it cannot solve a gate, the backend should be adapted to the new solve signature.
Checklist
cargo fmt
with default settings.Additional
We will be able to use this new opcode for interfacing with barretenberg when it will expose dynamic memory.