*** Pre-CBMEM romstage console overflowed, log truncated! *** 0T Selected tRRD : 4T Selected tRTP : 5T Selected tWTR : 5T Selected tRFC : 107T Done dimm mapping Update PCI-E configuration space: PCI(0, 0, 0)[a0] = 0 PCI(0, 0, 0)[a4] = 2 PCI(0, 0, 0)[bc] = c2a00000 PCI(0, 0, 0)[a8] = 3d600000 PCI(0, 0, 0)[ac] = 2 PCI(0, 0, 0)[b8] = c0000000 PCI(0, 0, 0)[b0] = c0a00000 PCI(0, 0, 0)[b4] = c0800000 Done memory map Done io registers Done jedec reset Done MRS commands t123: 1912, 6000, 7620 ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Initializing ME: Current Operation State : Bring up ME: Current Operation Mode : Debug or Disabled by AltDisableBit ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Clean Moff->Mx wake ME: Progress Phase State : Check to see if straps say ME DISABLED ME: Wrong mode : 2 ME: FWS2: 0x100a0140 ME: Bist in progress: 0x0 ME: ICC Status : 0x0 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x1 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x1 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0xa ME: Current PM event: 0x0 ME: Progress code : 0x1 PASSED! Tell ME that DRAM is ready ME: ME is reporting as disabled, so not waiting for a response. ME: FWS2: 0x100a0140 ME: Bist in progress: 0x0 ME: ICC Status : 0x0 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x1 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x1 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0xa ME: Current PM event: 0x0 ME: Progress code : 0x1 ME: Requested BIOS Action: No DID Ack received ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Initializing ME: Current Operation State : Bring up ME: Current Operation Mode : Debug or Disabled by AltDisableBit ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Clean Moff->Mx wake ME: Progress Phase State : Check to see if straps say ME DISABLED memcfg DDR3 ref clock 133 MHz memcfg DDR3 clock 1330 MHz memcfg channel assignment: A: 0, B 1, C 2 memcfg channel[0] config (00620010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 dual rank, selected DIMMB 0 MB width x8 single rank memcfg channel[1] config (00620010): ECC inactive enhanced interleave mode on rank interleave on DIMMA 4096 MB width x8 dual rank, selected DIMMB 0 MB width x8 single rank CBMEM: IMD: root @ bffff000 254 entries. IMD: root @ bfffec00 62 entries. External stage cache: IMD: root @ c03ff000 254 entries. IMD: root @ c03fec00 62 entries. CBMEM entry for DIMM info: 0xbfffe920 src/northbridge/intel/sandybridge/romstage.c: romstage complete MTRR Range: Start=ff000000 End=0 (Size 1000000) MTRR Range: Start=0 End=1000000 (Size 1000000) MTRR Range: Start=bf800000 End=c0000000 (Size 800000) MTRR Range: Start=c0000000 End=c0800000 (Size 800000) CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'fallback/ramstage' CBFS: Found @ offset 1bb40 size 17ad9 Decompressing stage fallback/ramstage @ 0xbff2ffc0 (293336 bytes) TPM: pcr 2 measure bff2ffc0 @ 222540: 7010cb70ce1bfab2398cb3fc37467221a8946a7c TPM: command 0x14 returned 0x0 Loading module at bff30000 with entry bff30000. filesize: 0x33070 memsize: 0x47998 Processing 3367 relocs. Offset value of 0xbfe30000 coreboot-TIMELESS-heads Thu Jan 1 00:00:00 UTC 1970 ramstage starting... Normal boot. BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 2 exit 0 Enumerating buses... Show all devs... Before device enumeration. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 PCI: 00:1f.5: enabled 0 PCI: 00:1f.6: enabled 1 Compare with tree... Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 00:54: enabled 1 I2C: 00:55: enabled 1 I2C: 00:56: enabled 1 I2C: 00:57: enabled 1 I2C: 00:5c: enabled 1 I2C: 00:5d: enabled 1 I2C: 00:5e: enabled 1 I2C: 00:5f: enabled 1 PCI: 00:1f.5: enabled 0 PCI: 00:1f.6: enabled 1 Root Device scanning... root_dev_scan_bus for Root Device CPU_CLUSTER: 0 enabled DOMAIN: 0000 enabled DOMAIN: 0000 scanning... PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [8086/0154] ops PCI: 00:00.0 [8086/0154] enabled PCI: 00:01.0 [8086/0000] bus ops PCI: 00:01.0 [8086/0151] disabled PCI: 00:02.0 [8086/0000] ops PCI: 00:02.0 [8086/0166] enabled PCI: 00:04.0 [8086/0153] enabled PCI: 00:14.0 [8086/0000] ops PCI: 00:14.0 [8086/1e31] enabled PCI: 00:16.0 [8086/1e3a] ops PCI: 00:16.0 [8086/1e3a] enabled PCI: 00:16.1: Disabling device PCI: 00:16.2: Disabling device PCI: 00:16.3: Disabling device PCI: 00:19.0 [8086/1503] enabled PCI: 00:1a.0 [8086/0000] ops PCI: 00:1a.0 [8086/1e2d] enabled PCI: 00:1b.0 [8086/0000] ops PCI: 00:1b.0 [8086/1e20] enabled PCH: PCIe Root Port coalescing is enabled PCI: 00:1c.0 [8086/0000] bus ops PCI: 00:1c.0 [8086/1e10] enabled PCI: 00:1c.1 [8086/0000] bus ops PCI: 00:1c.1 [8086/1e12] enabled PCI: 00:1c.2 [8086/0000] bus ops PCI: 00:1c.2 [8086/1e14] enabled PCI: 00:1c.3: Disabling device PCI: 00:1c.3 [8086/0000] bus ops PCI: 00:1c.3 [8086/1e16] disabled PCI: 00:1c.4: Disabling device PCI: 00:1c.4: check set enabled PCI: 00:1c.5: Disabling device PCI: 00:1c.6: Disabling device PCI: 00:1c.7: Disabling device PCH: RPFN 0x76543210 -> 0xfedcb210 PCI: 00:1d.0 [8086/0000] ops PCI: 00:1d.0 [8086/1e26] enabled PCI: 00:1e.0: Disabling device PCI: 00:1e.0 [8086/2448] bus ops PCI: 00:1e.0 [8086/2448] disabled PCI: 00:1f.0 [8086/0000] bus ops PCI: 00:1f.0 [8086/1e55] enabled PCI: 00:1f.2 [8086/0000] ops PCI: 00:1f.2 [8086/1e01] enabled PCI: 00:1f.3 [8086/0000] bus ops PCI: 00:1f.3 [8086/1e22] enabled PCI: 00:1f.5: Disabling device PCI: 00:1f.5 [8086/1e09] disabled No operations PCI: 00:1f.6 [8086/1e24] enabled PCI: 00:1c.0 scanning... do_pci_scan_bridge for PCI: 00:1c.0 PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [1180/0000] ops PCI: 01:00.0 [1180/e823] enabled Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Capability: type 0x10 @ 0x40 Enabling Common Clock Configuration ASPM: Enabled L0s and L1 Capability: type 0x05 @ 0x50 Capability: type 0x01 @ 0x78 Capability: type 0x10 @ 0x80 Failed to enable LTR for dev = PCI: 01:00.0 scan_bus: scanning of bus PCI: 00:1c.0 took 986 usecs PCI: 00:1c.1 scanning... do_pci_scan_bridge for PCI: 00:1c.1 PCI: pci_scan_bus for bus 02 scan_bus: scanning of bus PCI: 00:1c.1 took 192 usecs PCI: 00:1c.2 scanning... do_pci_scan_bridge for PCI: 00:1c.2 PCI: pci_scan_bus for bus 03 scan_bus: scanning of bus PCI: 00:1c.2 took 192 usecs PCI: 00:1f.0 scanning... scan_lpc_bus for PCI: 00:1f.0 PMH7: ID 05 Revision 12 PNP: 00ff.1 enabled PNP: 0c31.0 enabled Clearing EC output queue... Discarding a garbage byte: 0x55 EC output queue has been cleared. recv_ec_data: 0x47 recv_ec_data: 0x43 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x32 recv_ec_data: 0x35 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x16 recv_ec_data: 0x03 recv_ec_data: 0x40 recv_ec_data: 0x11 EC Firmware ID GCHT25WW-3.22, Version 4.01B recv_ec_data: 0x00 recv_ec_data: 0x00 recv_ec_data: 0x90 H8: BDC detection not implemented. Assuming BDC installed recv_ec_data: 0x20 H8: WWAN detection not implemented. Assuming WWAN installed recv_ec_data: 0x30 recv_ec_data: 0x00 recv_ec_data: 0xa6 recv_ec_data: 0xa6 recv_ec_data: 0x70 PNP: 00ff.2 enabled scan_lpc_bus for PCI: 00:1f.0 done scan_bus: scanning of bus PCI: 00:1f.0 took 5761 usecs PCI: 00:1f.3 scanning... scan_generic_bus for PCI: 00:1f.3 bus: PCI: 00:1f.3[0]->I2C: 01:54 enabled bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled scan_generic_bus for PCI: 00:1f.3 done scan_bus: scanning of bus PCI: 00:1f.3 took 689 usecs scan_bus: scanning of bus DOMAIN: 0000 took 11950 usecs root_dev_scan_bus for Root Device done scan_bus: scanning of bus Root Device took 12334 usecs done FMAP: Found "FLASH" version 1.1 at 800000. FMAP: base = ff400000 size = c00000 #areas = 4 FMAP: area RW_MRC_CACHE found @ 810000 (65536 bytes) MRC: Checking cached data update for 'RW_MRC_CACHE'. flash size 0xc00000 bytes SF: Detected Opaque HW-sequencing with sector size 0x100, total 0xc00000 MRC: no data in 'RW_MRC_CACHE' MRC: cache data 'RW_MRC_CACHE' needs update. SF: Successfully written 2 bytes @ 0x810000 SF: Successfully written 2 bytes @ 0x810002 SF: Successfully written 1480 bytes @ 0x810060 BS: BS_DEV_ENUMERATE times (us): entry 0 run 17500 exit 17561 found VGA at PCI: 00:02.0 Setting up VGA for PCI: 00:02.0 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device Allocating resources... Reading resources... Root Device read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. PCI: 00:1c.0 read_resources bus 1 link: 0 PCI: 00:1c.0 read_resources bus 1 link: 0 done PCI: 00:1c.1 read_resources bus 2 link: 0 PCI: 00:1c.1 read_resources bus 2 link: 0 done PCI: 00:1c.2 read_resources bus 3 link: 0 PCI: 00:1c.2 read_resources bus 3 link: 0 done PCI: 00:1f.0 read_resources bus 0 link: 0 PNP: 00ff.1 missing read_resources PNP: 00ff.2 missing read_resources PCI: 00:1f.0 read_resources bus 0 link: 0 done PCI: 00:1f.3 read_resources bus 1 link: 0 PCI: 00:1f.3 read_resources bus 1 link: 0 done DOMAIN: 0000 read_resources bus 0 link: 0 done Root Device read_resources bus 0 link: 0 done Done reading resources. Show resources in subtree (Root Device)...After reading. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:01.0 PCI: 00:02.0 PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 PCI: 00:14.0 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 PCI: 00:1c.0 child on link 0 PCI: 01:00.0 PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 PCI: 00:1c.1 PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 PCI: 00:1c.2 child on link 0 NONE PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 NONE NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 200 index 10 NONE resource base 0 size 800000 align 22 gran 22 limit ffffffff flags 1200 index 14 NONE resource base 0 size 1000 align 12 gran 12 limit ffff flags 100 index 18 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 0c31.0 PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 PCI: 00:1f.2 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 PCI: 00:1f.3 child on link 0 I2C: 01:54 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:5c I2C: 01:5d I2C: 01:5e I2C: 01:5f PCI: 00:1f.5 PCI: 00:1f.6 PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff PCI: 00:1c.1 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done PCI: 00:1c.2 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff NONE 18 * [0x0 - 0xfff] io PCI: 00:1c.2 io: base: 1000 size: 1000 align: 12 gran: 12 limit: ffff done PCI: 00:1c.2 1c * [0x0 - 0xfff] io PCI: 00:02.0 20 * [0x1000 - 0x103f] io PCI: 00:19.0 18 * [0x1040 - 0x105f] io PCI: 00:1f.2 20 * [0x1060 - 0x107f] io PCI: 00:1f.2 10 * [0x1080 - 0x1087] io PCI: 00:1f.2 18 * [0x1088 - 0x108f] io PCI: 00:1f.2 14 * [0x1090 - 0x1093] io PCI: 00:1f.2 1c * [0x1094 - 0x1097] io DOMAIN: 0000 io: base: 1098 size: 1098 align: 12 gran: 0 limit: ffff done DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 01:00.0 10 * [0x0 - 0xff] mem PCI: 00:1c.0 mem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff PCI: 00:1c.1 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff PCI: 00:1c.1 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done PCI: 00:1c.2 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff NONE 14 * [0x0 - 0x7fffff] prefmem PCI: 00:1c.2 prefmem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done PCI: 00:1c.2 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff NONE 10 * [0x0 - 0x7fffff] mem PCI: 00:1c.2 mem: base: 800000 size: 800000 align: 22 gran: 20 limit: ffffffff done PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem PCI: 00:1c.2 24 * [0x10000000 - 0x107fffff] prefmem PCI: 00:1c.2 20 * [0x10800000 - 0x10ffffff] mem PCI: 00:02.0 10 * [0x11000000 - 0x113fffff] mem PCI: 00:1c.0 20 * [0x11400000 - 0x114fffff] mem PCI: 00:19.0 10 * [0x11500000 - 0x1151ffff] mem PCI: 00:14.0 10 * [0x11520000 - 0x1152ffff] mem PCI: 00:04.0 10 * [0x11530000 - 0x11537fff] mem PCI: 00:1b.0 10 * [0x11538000 - 0x1153bfff] mem PCI: 00:19.0 14 * [0x1153c000 - 0x1153cfff] mem PCI: 00:1f.6 10 * [0x1153d000 - 0x1153dfff] mem PCI: 00:1f.2 24 * [0x1153e000 - 0x1153e7ff] mem PCI: 00:1a.0 10 * [0x1153f000 - 0x1153f3ff] mem PCI: 00:1d.0 10 * [0x11540000 - 0x115403ff] mem PCI: 00:1f.3 10 * [0x11541000 - 0x115410ff] mem PCI: 00:16.0 10 * [0x11542000 - 0x1154200f] mem DOMAIN: 0000 mem: base: 11542010 size: 11542010 align: 28 gran: 0 limit: ffffffff done avoid_fixed_resources: DOMAIN: 0000 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff constrain_resources: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) constrain_resources: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) constrain_resources: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) skipping PNP: 00ff.2@60 fixed resource, size=0! skipping PNP: 00ff.2@62 fixed resource, size=0! skipping PNP: 00ff.2@64 fixed resource, size=0! skipping PNP: 00ff.2@66 fixed resource, size=0! avoid_fixed_resources:@DOMAIN: 0000 10000000 base 0000167c limit 0000ffff avoid_fixed_resources:@DOMAIN: 0000 10000100 base d0000000 limit efffffff Setting resources... DOMAIN: 0000 io: base:167c size:1098 align:12 gran:0 limit:ffff PCI: 00:1c.2 1c * [0x2000 - 0x2fff] io PCI: 00:02.0 20 * [0x3000 - 0x303f] io PCI: 00:19.0 18 * [0x3040 - 0x305f] io PCI: 00:1f.2 20 * [0x3060 - 0x307f] io PCI: 00:1f.2 10 * [0x3080 - 0x3087] io PCI: 00:1f.2 18 * [0x3088 - 0x308f] io PCI: 00:1f.2 14 * [0x3090 - 0x3093] io PCI: 00:1f.2 1c * [0x3094 - 0x3097] io DOMAIN: 0000 io: next_base: 3098 size: 1098 align: 12 gran: 0 done PCI: 00:1c.0 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.0 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.1 io: base:ffff size:0 align:12 gran:12 limit:ffff PCI: 00:1c.1 io: next_base: ffff size: 0 align: 12 gran: 12 done PCI: 00:1c.2 io: base:2000 size:1000 align:12 gran:12 limit:2fff NONE 18 * [0x2000 - 0x2fff] io PCI: 00:1c.2 io: next_base: 3000 size: 1000 align: 12 gran: 12 done DOMAIN: 0000 mem: base:d0000000 size:11542010 align:28 gran:0 limit:efffffff PCI: 00:02.0 18 * [0xd0000000 - 0xdfffffff] prefmem PCI: 00:1c.2 24 * [0xe0000000 - 0xe07fffff] prefmem PCI: 00:1c.2 20 * [0xe0800000 - 0xe0ffffff] mem PCI: 00:02.0 10 * [0xe1000000 - 0xe13fffff] mem PCI: 00:1c.0 20 * [0xe1400000 - 0xe14fffff] mem PCI: 00:19.0 10 * [0xe1500000 - 0xe151ffff] mem PCI: 00:14.0 10 * [0xe1520000 - 0xe152ffff] mem PCI: 00:04.0 10 * [0xe1530000 - 0xe1537fff] mem PCI: 00:1b.0 10 * [0xe1538000 - 0xe153bfff] mem PCI: 00:19.0 14 * [0xe153c000 - 0xe153cfff] mem PCI: 00:1f.6 10 * [0xe153d000 - 0xe153dfff] mem PCI: 00:1f.2 24 * [0xe153e000 - 0xe153e7ff] mem PCI: 00:1a.0 10 * [0xe153f000 - 0xe153f3ff] mem PCI: 00:1d.0 10 * [0xe1540000 - 0xe15403ff] mem PCI: 00:1f.3 10 * [0xe1541000 - 0xe15410ff] mem PCI: 00:16.0 10 * [0xe1542000 - 0xe154200f] mem DOMAIN: 0000 mem: next_base: e1542010 size: 11542010 align: 28 gran: 0 done PCI: 00:1c.0 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.0 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.0 mem: base:e1400000 size:100000 align:20 gran:20 limit:e14fffff PCI: 01:00.0 10 * [0xe1400000 - 0xe14000ff] mem PCI: 00:1c.0 mem: next_base: e1400100 size: 100000 align: 20 gran: 20 done PCI: 00:1c.1 prefmem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.1 prefmem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.1 mem: base:efffffff size:0 align:20 gran:20 limit:efffffff PCI: 00:1c.1 mem: next_base: efffffff size: 0 align: 20 gran: 20 done PCI: 00:1c.2 prefmem: base:e0000000 size:800000 align:22 gran:20 limit:e07fffff NONE 14 * [0xe0000000 - 0xe07fffff] prefmem PCI: 00:1c.2 prefmem: next_base: e0800000 size: 800000 align: 22 gran: 20 done PCI: 00:1c.2 mem: base:e0800000 size:800000 align:22 gran:20 limit:e0ffffff NONE 10 * [0xe0800000 - 0xe0ffffff] mem PCI: 00:1c.2 mem: next_base: e1000000 size: 800000 align: 22 gran: 20 done Root Device assign_resources, bus 0 link: 0 TOUUD 0x23d600000 TOLUD 0xc2a00000 TOM 0x200000000 MEBASE 0x7ffff00000 IGD decoded, subtracting 32M UMA and 2M GTT TSEG base 0xc0000000 size 8M Available memory below 4GB: 3072M Available memory above 4GB: 5078M DOMAIN: 0000 assign_resources, bus 0 link: 0 PCI: 00:02.0 10 <- [0x00e1000000 - 0x00e13fffff] size 0x00400000 gran 0x16 mem64 PCI: 00:02.0 18 <- [0x00d0000000 - 0x00dfffffff] size 0x10000000 gran 0x1c prefmem64 PCI: 00:02.0 20 <- [0x0000003000 - 0x000000303f] size 0x00000040 gran 0x06 io PCI: 00:04.0 10 <- [0x00e1530000 - 0x00e1537fff] size 0x00008000 gran 0x0f mem64 PCI: 00:14.0 10 <- [0x00e1520000 - 0x00e152ffff] size 0x00010000 gran 0x10 mem64 PCI: 00:16.0 10 <- [0x00e1542000 - 0x00e154200f] size 0x00000010 gran 0x04 mem64 PCI: 00:19.0 10 <- [0x00e1500000 - 0x00e151ffff] size 0x00020000 gran 0x11 mem PCI: 00:19.0 14 <- [0x00e153c000 - 0x00e153cfff] size 0x00001000 gran 0x0c mem PCI: 00:19.0 18 <- [0x0000003040 - 0x000000305f] size 0x00000020 gran 0x05 io PCI: 00:1a.0 10 <- [0x00e153f000 - 0x00e153f3ff] size 0x00000400 gran 0x0a mem PCI: 00:1b.0 10 <- [0x00e1538000 - 0x00e153bfff] size 0x00004000 gran 0x0e mem64 PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io PCI: 00:1c.0 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 01 prefmem PCI: 00:1c.0 20 <- [0x00e1400000 - 0x00e14fffff] size 0x00100000 gran 0x14 bus 01 mem PCI: 00:1c.0 assign_resources, bus 1 link: 0 PCI: 01:00.0 10 <- [0x00e1400000 - 0x00e14000ff] size 0x00000100 gran 0x08 mem PCI: 00:1c.0 assign_resources, bus 1 link: 0 PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io PCI: 00:1c.1 24 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 prefmem PCI: 00:1c.1 20 <- [0x00efffffff - 0x00effffffe] size 0x00000000 gran 0x14 bus 02 mem PCI: 00:1c.2 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000 gran 0x0c bus 03 io PCI: 00:1c.2 24 <- [0x00e0000000 - 0x00e07fffff] size 0x00800000 gran 0x14 bus 03 prefmem PCI: 00:1c.2 20 <- [0x00e0800000 - 0x00e0ffffff] size 0x00800000 gran 0x14 bus 03 mem PCI: 00:1c.2 assign_resources, bus 3 link: 0 NONE missing set_resources PCI: 00:1c.2 assign_resources, bus 3 link: 0 PCI: 00:1d.0 10 <- [0x00e1540000 - 0x00e15403ff] size 0x00000400 gran 0x0a mem PCI: 00:1f.0 assign_resources, bus 0 link: 0 PNP: 00ff.1 missing set_resources PNP: 00ff.2 missing set_resources PCI: 00:1f.0 assign_resources, bus 0 link: 0 PCI: 00:1f.2 10 <- [0x0000003080 - 0x0000003087] size 0x00000008 gran 0x03 io PCI: 00:1f.2 14 <- [0x0000003090 - 0x0000003093] size 0x00000004 gran 0x02 io PCI: 00:1f.2 18 <- [0x0000003088 - 0x000000308f] size 0x00000008 gran 0x03 io PCI: 00:1f.2 1c <- [0x0000003094 - 0x0000003097] size 0x00000004 gran 0x02 io PCI: 00:1f.2 20 <- [0x0000003060 - 0x000000307f] size 0x00000020 gran 0x05 io PCI: 00:1f.2 24 <- [0x00e153e000 - 0x00e153e7ff] size 0x00000800 gran 0x0b mem PCI: 00:1f.3 10 <- [0x00e1541000 - 0x00e15410ff] size 0x00000100 gran 0x08 mem64 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.3 assign_resources, bus 1 link: 0 PCI: 00:1f.6 10 <- [0x00e153d000 - 0x00e153dfff] size 0x00001000 gran 0x0c mem64 DOMAIN: 0000 assign_resources, bus 0 link: 0 Root Device assign_resources, bus 0 link: 0 Done setting resources. Show resources in subtree (Root Device)...After assigning values. Root Device child on link 0 CPU_CLUSTER: 0 CPU_CLUSTER: 0 child on link 0 APIC: 00 APIC: 00 APIC: acac DOMAIN: 0000 child on link 0 PCI: 00:00.0 DOMAIN: 0000 resource base 167c size 1098 align 12 gran 0 limit ffff flags 40040100 index 10000000 DOMAIN: 0000 resource base d0000000 size 11542010 align 28 gran 0 limit efffffff flags 40040200 index 10000100 DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 3 DOMAIN: 0000 resource base 100000 size bff00000 align 0 gran 0 limit 0 flags e0004200 index 4 DOMAIN: 0000 resource base 100000000 size 13d600000 align 0 gran 0 limit 0 flags e0004200 index 5 DOMAIN: 0000 resource base c0000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 6 DOMAIN: 0000 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 7 DOMAIN: 0000 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 8 DOMAIN: 0000 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9 DOMAIN: 0000 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a PCI: 00:00.0 PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 PCI: 00:01.0 PCI: 00:02.0 PCI: 00:02.0 resource base e1000000 size 400000 align 22 gran 22 limit e13fffff flags 60000201 index 10 PCI: 00:02.0 resource base d0000000 size 10000000 align 28 gran 28 limit dfffffff flags 60001201 index 18 PCI: 00:02.0 resource base 3000 size 40 align 6 gran 6 limit 303f flags 60000100 index 20 PCI: 00:04.0 PCI: 00:04.0 resource base e1530000 size 8000 align 15 gran 15 limit e1537fff flags 60000201 index 10 PCI: 00:14.0 PCI: 00:14.0 resource base e1520000 size 10000 align 16 gran 16 limit e152ffff flags 60000201 index 10 PCI: 00:16.0 PCI: 00:16.0 resource base e1542000 size 10 align 12 gran 4 limit e154200f flags 60000201 index 10 PCI: 00:16.1 PCI: 00:16.2 PCI: 00:16.3 PCI: 00:19.0 PCI: 00:19.0 resource base e1500000 size 20000 align 17 gran 17 limit e151ffff flags 60000200 index 10 PCI: 00:19.0 resource base e153c000 size 1000 align 12 gran 12 limit e153cfff flags 60000200 index 14 PCI: 00:19.0 resource base 3040 size 20 align 5 gran 5 limit 305f flags 60000100 index 18 PCI: 00:1a.0 PCI: 00:1a.0 resource base e153f000 size 400 align 12 gran 10 limit e153f3ff flags 60000200 index 10 PCI: 00:1b.0 PCI: 00:1b.0 resource base e1538000 size 4000 align 14 gran 14 limit e153bfff flags 60000201 index 10 PCI: 00:1c.0 child on link 0 PCI: 01:00.0 PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.0 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 PCI: 00:1c.0 resource base e1400000 size 100000 align 20 gran 20 limit e14fffff flags 60080202 index 20 PCI: 01:00.0 PCI: 01:00.0 resource base e1400000 size 100 align 12 gran 8 limit e14000ff flags 60000200 index 10 PCI: 00:1c.1 PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60081202 index 24 PCI: 00:1c.1 resource base efffffff size 0 align 20 gran 20 limit efffffff flags 60080202 index 20 PCI: 00:1c.2 child on link 0 NONE PCI: 00:1c.2 resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 60080102 index 1c PCI: 00:1c.2 resource base e0000000 size 800000 align 22 gran 20 limit e07fffff flags 60081202 index 24 PCI: 00:1c.2 resource base e0800000 size 800000 align 22 gran 20 limit e0ffffff flags 60080202 index 20 NONE NONE resource base e0800000 size 800000 align 22 gran 22 limit e0ffffff flags 40000200 index 10 NONE resource base e0000000 size 800000 align 22 gran 22 limit e07fffff flags 40001200 index 14 NONE resource base 2000 size 1000 align 12 gran 12 limit 2fff flags 40000100 index 18 PCI: 00:1c.3 PCI: 00:1c.4 PCI: 00:1c.5 PCI: 00:1c.6 PCI: 00:1c.7 PCI: 00:1d.0 PCI: 00:1d.0 resource base e1540000 size 400 align 12 gran 10 limit e15403ff flags 60000200 index 10 PCI: 00:1e.0 PCI: 00:1f.0 child on link 0 PNP: 00ff.1 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 PNP: 00ff.1 PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 PNP: 0c31.0 PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 PNP: 00ff.2 PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 PCI: 00:1f.2 PCI: 00:1f.2 resource base 3080 size 8 align 3 gran 3 limit 3087 flags 60000100 index 10 PCI: 00:1f.2 resource base 3090 size 4 align 2 gran 2 limit 3093 flags 60000100 index 14 PCI: 00:1f.2 resource base 3088 size 8 align 3 gran 3 limit 308f flags 60000100 index 18 PCI: 00:1f.2 resource base 3094 size 4 align 2 gran 2 limit 3097 flags 60000100 index 1c PCI: 00:1f.2 resource base 3060 size 20 align 5 gran 5 limit 307f flags 60000100 index 20 PCI: 00:1f.2 resource base e153e000 size 800 align 12 gran 11 limit e153e7ff flags 60000200 index 24 PCI: 00:1f.3 child on link 0 I2C: 01:54 PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 PCI: 00:1f.3 resource base e1541000 size 100 align 12 gran 8 limit e15410ff flags 60000201 index 10 I2C: 01:54 I2C: 01:55 I2C: 01:56 I2C: 01:57 I2C: 01:5c I2C: 01:5d I2C: 01:5e I2C: 01:5f PCI: 00:1f.5 PCI: 00:1f.6 PCI: 00:1f.6 resource base e153d000 size 1000 align 12 gran 12 limit e153dfff flags 60000201 index 10 Done allocating resources. BS: BS_DEV_RESOURCES times (us): entry 0 run 37527 exit 0 Enabling resources... PCI: 00:00.0 subsystem <- 17aa/21fa PCI: 00:00.0 cmd <- 06 PCI: 00:02.0 subsystem <- 17aa/21fa PCI: 00:02.0 cmd <- 03 PCI: 00:04.0 cmd <- 02 PCI: 00:14.0 subsystem <- 17aa/21fa PCI: 00:14.0 cmd <- 102 PCI: 00:16.0 subsystem <- 17aa/21fa PCI: 00:16.0 cmd <- 02 PCI: 00:19.0 subsystem <- 17aa/21f3 PCI: 00:19.0 cmd <- 103 PCI: 00:1a.0 subsystem <- 17aa/21fa PCI: 00:1a.0 cmd <- 102 PCI: 00:1b.0 subsystem <- 17aa/21fa PCI: 00:1b.0 cmd <- 102 PCI: 00:1c.0 bridge ctrl <- 0003 PCI: 00:1c.0 subsystem <- 17aa/21fa PCI: 00:1c.0 cmd <- 106 PCI: 00:1c.1 bridge ctrl <- 0003 PCI: 00:1c.1 subsystem <- 17aa/21fa PCI: 00:1c.1 cmd <- 100 PCI: 00:1c.2 bridge ctrl <- 0003 PCI: 00:1c.2 subsystem <- 17aa/21fa PCI: 00:1c.2 cmd <- 107 PCI: 00:1d.0 subsystem <- 17aa/21fa PCI: 00:1d.0 cmd <- 102 pch_decode_init PCI: 00:1f.0 subsystem <- 17aa/21fa PCI: 00:1f.0 cmd <- 107 PCI: 00:1f.2 subsystem <- 17aa/21fa PCI: 00:1f.2 cmd <- 03 PCI: 00:1f.3 subsystem <- 17aa/21fa PCI: 00:1f.3 cmd <- 103 PCI: 00:1f.6 subsystem <- 17aa/21fa PCI: 00:1f.6 cmd <- 02 PCI: 01:00.0 subsystem <- 17aa/21fa PCI: 01:00.0 cmd <- 06 done. BS: BS_DEV_ENABLE times (us): entry 0 run 1893 exit 0 Initializing devices... Root Device init ... Root Device init finished in 34 usecs CPU_CLUSTER: 0 init ... start_eip=0x00001000, code_size=0x00000031 Setting up SMI for CPU Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 Processing 12 relocs. Offset value of 0x00038000 SMM Module: stub loaded at 00038000. Will call bff4c6c7(bff73860) Installing SMM handler to 0xc0000000 Loading module at c0010000 with entry c0010121. filesize: 0x1290 memsize: 0x52b8 Processing 62 relocs. Offset value of 0xc0010000 Loading module at c0008000 with entry c0008000. filesize: 0x1a8 memsize: 0x1a8 Processing 12 relocs. Offset value of 0xc0008000 SMM Module: placing jmp sequence at c0007c00 rel16 0x03fd SMM Module: placing jmp sequence at c0007800 rel16 0x07fd SMM Module: placing jmp sequence at c0007400 rel16 0x0bfd SMM Module: stub loaded at c0008000. Will call c0010121(00000000) Initializing southbridge SMI... ... pmbase = 0x0500 SMI_STS: MCSMI PM1 PM1_STS: WAK PWRBTN PM1_EN: 0 GPE0_STS: GPIO15 GPIO14 GPIO13 GPIO11 GPIO10 GPIO9 GPIO7 GPIO6 GPIO5 GPIO4 GPIO3 GPIO1 GPIO0 EL_SCI/BATLOW ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 TCO_STS: INTRD_DET ... raise SMI# In relocation handler: cpu 0 New SMBASE=0xc0000000 IEDBASE=0xc0400000 @ 0003fc00 Writing SMRR. base = 0xc0000006, mask=0xff800800 Relocation complete. Locking SMM. Initializing CPU #0 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 156c0 size 6400 TPM: pcr 3 measure ffc35710 @ 25600: b9753d880c8eff8dcedd88ce494b703c76367591 TPM: command 0x14 returned 0x0 microcode: sig=0x306a9 pf=0x10 revision=0x1f CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Physical address space: 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 0x00000000000c0000 - 0x00000000c0000000 size 0xbff40000 type 6 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 0 0x00000000d0000000 - 0x00000000e0000000 size 0x10000000 type 1 0x00000000e0000000 - 0x0000000100000000 size 0x20000000 type 0 0x0000000100000000 - 0x000000023d600000 size 0x13d600000 type 6 MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR: default type WB/UC MTRR counts: 3/5. MTRR: WB selected as default type. MTRR: 0 base 0x00000000c0000000 mask 0x0000000ff0000000 type 0 MTRR: 1 base 0x00000000d0000000 mask 0x0000000ff0000000 type 1 MTRR: 2 base 0x00000000e0000000 mask 0x0000000fe0000000 type 0 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x00 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 Turbo is available but hidden Turbo has been enabled CPU: 0 has 2 cores, 2 threads per core CPU: 0 has core 1 CPU1: stack_base bff6a000, stack_end bff6aff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 1. After apic_write. In relocation handler: cpu 1 New SMBASE=0xbffffc00 IEDBASE=0xc0400000 @ 0003fc00 Writing SMRR. base = 0xc0000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 1. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. Initializing CPU #1 CPU: 0 has core 2 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 156c0 size 6400 TPM: pcr 3 measure ffc35710 @ 25600: b9753d880c8eff8dcedd88ce494b703c76367591 TPM: command 0x14 returned 0x0 microcode: sig=0x306a9 pf=0x10 revision=0x1f CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x01 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #1 initialized CPU2: stack_base bff69000, stack_end bff69ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 2. After apic_write. In relocation handler: cpu 2 Startup point 1. Waiting for send to finish... +New SMBASE=0xbffff800 IEDBASE=0xc0400000 @ 0003fc00 Sending STARTUP #2 to 2. After apic_write. Writing SMRR. base = 0xc0000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +After Startup. CPU: 0 has core 3 Initializing CPU #2 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 156c0 size 6400 TPM: pcr 3 measure ffc35710 @ 25600: b9753d880c8eff8dcedd88ce494b703c76367591 TPM: command 0x14 returned 0x0 microcode: sig=0x306a9 pf=0x10 revision=0x0 microcode: updated to revision 0x1f date=2018-02-07 CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x02 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #2 initialized CPU3: stack_base bff68000, stack_end bff68ff8 Asserting INIT. Waiting for send to finish... +Deasserting INIT. Waiting for send to finish... +#startup loops: 2. Sending STARTUP #1 to 3. After apic_write. In relocation handler: cpu 3 New SMBASE=0xbffff400 IEDBASE=0xc0400000 @ 0003fc00 Writing SMRR. base = 0xc0000006, mask=0xff800800 Startup point 1. Waiting for send to finish... +Sending STARTUP #2 to 3. After apic_write. Startup point 1. Waiting for send to finish... +After Startup. CPU #0 initialized Waiting for 1 CPUS to stop Initializing CPU #3 CPU: vendor Intel device 306a9 CPU: family 06, model 3a, stepping 09 Enabling cache CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'cpu_microcode_blob.bin' CBFS: Found @ offset 156c0 size 6400 TPM: pcr 3 measure ffc35710 @ 25600: b9753d880c8eff8dcedd88ce494b703c76367591 TPM: command 0x14 returned 0x0 microcode: sig=0x306a9 pf=0x10 revision=0x1f CPU: Intel(R) Core(TM) i5-3320M CPU @ 2.60GHz. MTRR: Fixed MSR 0x250 0x0606060606060606 MTRR: Fixed MSR 0x258 0x0606060606060606 MTRR: Fixed MSR 0x259 0x0000000000000000 MTRR: Fixed MSR 0x268 0x0606060606060606 MTRR: Fixed MSR 0x269 0x0606060606060606 MTRR: Fixed MSR 0x26a 0x0606060606060606 MTRR: Fixed MSR 0x26b 0x0606060606060606 MTRR: Fixed MSR 0x26c 0x0606060606060606 MTRR: Fixed MSR 0x26d 0x0606060606060606 MTRR: Fixed MSR 0x26e 0x0606060606060606 MTRR: Fixed MSR 0x26f 0x0606060606060606 call enable_fixed_mtrr() CPU physical address size: 36 bits MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Setting up local APIC... apic_id: 0x03 done. VMX status: enabled, locked model_x06ax: energy policy set to 6 model_x06ax: frequency set to 2600 CPU #3 initialized All AP CPUs stopped (1996 loops) CPU0: stack: bff6b000 - bff6c000, lowest used address bff6ba9c, stack used: 1380 bytes CPU1: stack: bff6a000 - bff6b000, lowest used address bff6ab7c, stack used: 1156 bytes CPU2: stack: bff69000 - bff6a000, lowest used address bff69b7c, stack used: 1156 bytes CPU3: stack: bff68000 - bff69000, lowest used address bff68b7c, stack used: 1156 bytes CPU_CLUSTER: 0 init finished in 356707 usecs PCI: 00:00.0 init ... Disabling PEG12. Disabling PEG11. Disabling PEG10. Disabling PEG60. Disabling Device 7. Disabling PEG IO clock. Set BIOS_RESET_CPL CPU TDP: 35 Watts PCI: 00:00.0 init finished in 1286 usecs PCI: 00:02.0 init ... GT Power Management Init IVB GT2 25W-35W Power Meter Weights GT Power Management Init (post VBIOS) Initializing VGA without OPROM. EDID: 00 ff ff ff ff ff ff 00 30 e4 d8 02 00 00 00 00 00 16 01 03 80 1c 10 78 ea 88 55 99 5b 55 8f 26 1d 50 54 00 00 00 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 60 1d 56 d8 50 00 18 30 30 40 47 00 15 9c 10 00 00 1b 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 fe 00 4c 47 20 44 69 73 70 6c 61 79 0a 20 20 00 00 00 fe 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 33 00 59 Extracted contents: header: 00 ff ff ff ff ff ff 00 serial number: 30 e4 d8 02 00 00 00 00 00 16 version: 01 03 basic params: 80 1c 10 78 ea chroma info: 88 55 99 5b 55 8f 26 1d 50 54 established: 00 00 00 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 descriptor 1: 60 1d 56 d8 50 00 18 30 30 40 47 00 15 9c 10 00 00 1b descriptor 2: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 descriptor 3: 00 00 00 fe 00 4c 47 20 44 69 73 70 6c 61 79 0a 20 20 descriptor 4: 00 00 00 fe 00 4c 50 31 32 35 57 48 32 2d 53 4c 42 33 extensions: 00 checksum: 59 Manufacturer: LGD Model 2d8 Serial Number 0 Made week 0 of 2012 EDID version: 1.3 Digital display Maximum image size: 28 cm x 16 cm Gamma: 220% Check DPMS levels DPMS levels: Standby Suspend Off Supported color formats: RGB 4:4:4, YCrCb 4:2:2 First detailed timing is preferred timing Established timings supported: Standard timings supported: Detailed timings Hex of detail: 601d56d85000183030404700159c1000001b Detailed mode (IN HEX): Clock 75200 KHz, 115 mm x 9c mm 0556 0586 05c6 062e hborder 0 0300 0304 030b 0318 vborder 0 +hsync -vsync Did detailed timing Hex of detail: 000000000000000000000000000000000000 Manufacturer-specified data, tag 0 Hex of detail: 000000fe004c4720446973706c61790a2020 ASCII string: LG Display Hex of detail: 000000fe004c503132355748322d534c4233 ASCII string: LP125WH2-SLB3 Checksum Checksum: 0x59 (valid) WARNING: EDID block does NOT fully conform to EDID 1.3. Missing name descriptor Missing monitor ranges bringing up panel at resolution 1376 x 768 Borders 0 x 0 Blank 216 x 24 Sync 64 x 7 Front porch 48 x 4 Spread spectrum clock Single channel Polarities 0, 1 Data M1=5256861, N1=8388608 Link frequency 270000 kHz Link M1=146023, N1=524288 Pixel N=9, M1=14, M2=9, P1=1 Pixel clock 150476 kHz waiting for panel powerup panel powered up PCI: 00:02.0 init finished in 265130 usecs PCI: 00:04.0 init ... PCI: 00:04.0 init finished in 30 usecs PCI: 00:14.0 init ... XHCI: Setting up controller.. done. PCI: 00:14.0 init finished in 84 usecs PCI: 00:16.0 init ... ME: FW Partition Table : OK ME: Bringup Loader Failure : NO ME: Firmware Init Complete : NO ME: Manufacturing Mode : YES ME: Boot Options Present : NO ME: Update In Progress : NO ME: Current Working State : Initializing ME: Current Operation State : Bring up ME: Current Operation Mode : Debug or Disabled by AltDisableBit ME: Error Code : No Error ME: Progress Phase : BUP Phase ME: Power Management Event : Clean Moff->Mx wake ME: Progress Phase State : Check to see if straps say ME DISABLED intel_me_path: mbp is not ready! ME: BIOS path: Error PCI: 00:16.0 init finished in 836 usecs PCI: 00:19.0 init ... PCI: 00:19.0 init finished in 30 usecs PCI: 00:1a.0 init ... EHCI: Setting up controller.. done. PCI: 00:1a.0 init finished in 90 usecs PCI: 00:1b.0 init ... Azalia: base = e1538000 Azalia: codec_mask = 09 Azalia: Initializing codec #3 Azalia: codec viddid: 80862806 Azalia: verb_size: 16 Azalia: verb loaded. Azalia: Initializing codec #0 Azalia: codec viddid: 10ec0269 Azalia: verb_size: 76 Azalia: verb loaded. PCI: 00:1b.0 init finished in 6303 usecs PCI: 00:1c.0 init ... Initializing PCH PCIe bridge. PCI: 00:1c.0 init finished in 79 usecs PCI: 00:1c.1 init ... Initializing PCH PCIe bridge. PCI: 00:1c.1 init finished in 79 usecs PCI: 00:1c.2 init ... Initializing PCH PCIe bridge. PCI: 00:1c.2 init finished in 82 usecs PCI: 00:1d.0 init ... EHCI: Setting up controller.. done. PCI: 00:1d.0 init finished in 90 usecs PCI: 00:1f.0 init ... pch: lpc_init IOAPIC: Initializing IOAPIC at 0xfec00000 IOAPIC: Bootstrap Processor Local APIC = 0x00 IOAPIC: ID = 0x02 IOAPIC: Dumping registers reg 0x0000: 0x02000000 reg 0x0001: 0x00170020 reg 0x0002: 0x00170020 Set power off after power failure. NMI sources disabled. PantherPoint PM init rtc_failed = 0x0 RTC Init Enabling BIOS updates outside of SMM... Disabling ACPI via APMC: done. pch_spi_init PCI: 00:1f.0 init finished in 921 usecs PCI: 00:1f.2 init ... SATA: Initializing... SATA: Controller in AHCI mode. ABAR: e153e000 PCI: 00:1f.2 init finished in 193 usecs PCI: 00:1f.3 init ... PCI: 00:1f.3 init finished in 36 usecs PCI: 00:1f.6 init ... PCI: 00:1f.6 init finished in 30 usecs PCI: 01:00.0 init ... PCI: 01:00.0 init finished in 44 usecs PNP: 00ff.2 init ... Keyboard init... Keyboard reset failed ACK: 0xaa PNP: 00ff.2 init finished in 127445 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:54 init ... I2C: 01:54 init finished in 60 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:55 init ... I2C: 01:55 init finished in 59 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:56 init ... I2C: 01:56 init finished in 59 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:57 init ... I2C: 01:57 init finished in 59 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5c init ... Locking EEPROM RFID init EEPROM done I2C: 01:5c init finished in 28889 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5d init ... I2C: 01:5d init finished in 59 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5e init ... I2C: 01:5e init finished in 59 usecs smbus: PCI: 00:1f.3[0]->I2C: 01:5f init ... I2C: 01:5f init finished in 59 usecs Devices initialized Show all devs... After init. Root Device: enabled 1 CPU_CLUSTER: 0: enabled 1 APIC: 00: enabled 1 APIC: acac: enabled 0 DOMAIN: 0000: enabled 1 PCI: 00:00.0: enabled 1 PCI: 00:01.0: enabled 0 PCI: 00:02.0: enabled 1 PCI: 00:14.0: enabled 1 PCI: 00:16.0: enabled 1 PCI: 00:16.1: enabled 0 PCI: 00:16.2: enabled 0 PCI: 00:16.3: enabled 0 PCI: 00:19.0: enabled 1 PCI: 00:1a.0: enabled 1 PCI: 00:1b.0: enabled 1 PCI: 00:1c.0: enabled 1 PCI: 01:00.0: enabled 1 PCI: 00:1c.1: enabled 1 PCI: 00:1c.2: enabled 1 PCI: 00:1c.3: enabled 0 PCI: 00:1c.4: enabled 0 PCI: 00:1c.5: enabled 0 PCI: 00:1c.6: enabled 0 PCI: 00:1c.7: enabled 0 PCI: 00:1d.0: enabled 1 PCI: 00:1e.0: enabled 0 PCI: 00:1f.0: enabled 1 PNP: 00ff.1: enabled 1 PNP: 0c31.0: enabled 1 PNP: 00ff.2: enabled 1 PCI: 00:1f.2: enabled 1 PCI: 00:1f.3: enabled 1 I2C: 01:54: enabled 1 I2C: 01:55: enabled 1 I2C: 01:56: enabled 1 I2C: 01:57: enabled 1 I2C: 01:5c: enabled 1 I2C: 01:5d: enabled 1 I2C: 01:5e: enabled 1 I2C: 01:5f: enabled 1 PCI: 00:1f.5: enabled 0 PCI: 00:1f.6: enabled 1 PCI: 00:04.0: enabled 1 NONE: enabled 1 APIC: 01: enabled 1 APIC: 02: enabled 1 APIC: 03: enabled 1 BS: BS_DEV_INIT times (us): entry 5 run 792036 exit 0 Finalize devices... PCI: 00:1f.0 final Devices finalized BS: BS_POST_DEVICE times (us): entry 0 run 132 exit 0 BS: BS_OS_RESUME_CHECK times (us): entry 0 run 2 exit 0 CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'fallback/dsdt.aml' CBFS: Found @ offset 33e00 size 354e TPM: pcr 3 measure ffc53e48 @ 13646: 2affee06823ac7010968558ebbf2ae976cab16d0 TPM: command 0x14 returned 0x0 CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'fallback/slic' CBFS: 'fallback/slic' not found. ACPI: Writing ACPI tables at bfef3000. ACPI: * FACS ACPI: * DSDT ACPI: * FADT ACPI: added table 1/32, length now 40 ACPI: * SSDT Found 1 CPU(s) with 4 core(s) each. PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 PSS: 2601MHz power 35000 control 0x2100 status 0x2100 PSS: 2600MHz power 35000 control 0x1a00 status 0x1a00 PSS: 2400MHz power 31561 control 0x1800 status 0x1800 PSS: 2200MHz power 28247 control 0x1600 status 0x1600 PSS: 2000MHz power 25084 control 0x1400 status 0x1400 PSS: 1800MHz power 22064 control 0x1200 status 0x1200 PSS: 1600MHz power 19135 control 0x1000 status 0x1000 PSS: 1400MHz power 16344 control 0xe00 status 0xe00 PSS: 1200MHz power 13666 control 0xc00 status 0xc00 ACPI_PIRQ_GEN: PCI: 00:02.0: pin=1 pirq=1 ACPI_PIRQ_GEN: PCI: 00:14.0: pin=1 pirq=1 ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=1 pirq=6 ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=1 pirq=1 ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=1 pirq=2 ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=2 pirq=6 ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=3 pirq=4 ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=1 pirq=4 ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=1 pirq=2 ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=2 pirq=8 ACPI_PIRQ_GEN: PCI: 00:1f.6: pin=3 pirq=1 ACPI_PIRQ_GEN: PCI: 00:04.0: pin=1 pirq=1 \_SB.PCI0.LPCB.TPM: LPC TPM PNP: 0c31.0 ACPI: added table 2/32, length now 44 ACPI: * MCFG ACPI: added table 3/32, length now 48 ACPI: * TCPA TCPA log created at bfee2000 ACPI: added table 4/32, length now 52 ACPI: * MADT ACPI: added table 5/32, length now 56 current = bfef8570 ACPI: * DMAR ACPI: added table 6/32, length now 60 current = bfef8620 CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'vbt.bin' CBFS: 'vbt.bin' not found. CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'pci8086,0166.rom' CBFS: 'pci8086,0166.rom' not found. CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'pci8086,0106.rom' CBFS: 'pci8086,0106.rom' not found. PCI Option ROM loading disabled for PCI: 00:02.0 GMA: locate_vbt_vbios: aa55 8086 0 0 3 GMA: Found valid VBT in legacy area ACPI: * HPET ACPI: added table 7/32, length now 64 ACPI: done. ACPI tables: 30304 bytes. smbios_write_tables: bfee1000 recv_ec_data: 0x47 recv_ec_data: 0x43 recv_ec_data: 0x48 recv_ec_data: 0x54 recv_ec_data: 0x32 recv_ec_data: 0x35 recv_ec_data: 0x57 recv_ec_data: 0x57 recv_ec_data: 0x16 recv_ec_data: 0x03 Create SMBIOS type 17 Root Device (LENOVO ThinkPad X230) CPU_CLUSTER: 0 (Intel SandyBridge/IvyBridge integrated Northbridge) APIC: 00 (unknown) APIC: acac (Intel SandyBridge/IvyBridge CPU) DOMAIN: 0000 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:00.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:01.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:02.0 (Intel SandyBridge/IvyBridge integrated Northbridge) PCI: 00:14.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:16.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:19.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1a.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1b.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 01:00.0 (unknown) PCI: 00:1c.1 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.4 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1c.7 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1d.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1e.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.0 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PNP: 00ff.1 (Lenovo Power Management Hardware Hub 7) PNP: 0c31.0 (LPC TPM) PNP: 00ff.2 (Lenovo H8 EC) PCI: 00:1f.2 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.3 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) I2C: 01:54 (AT24RF08C) I2C: 01:55 (AT24RF08C) I2C: 01:56 (AT24RF08C) I2C: 01:57 (AT24RF08C) I2C: 01:5c (AT24RF08C) I2C: 01:5d (AT24RF08C) I2C: 01:5e (AT24RF08C) I2C: 01:5f (AT24RF08C) PCI: 00:1f.5 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:1f.6 (Intel Series 6/7 (Cougar Point/Panther Point) Southbridge) PCI: 00:04.0 (unknown) NONE (unknown) APIC: 01 (unknown) APIC: 02 (unknown) APIC: 03 (unknown) SMBIOS tables: 647 bytes. Writing table forward entry at 0x00000500 Wrote coreboot table at: 00000500, 0x10 bytes, checksum cfec Writing coreboot table at 0xbff17000 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES 1. 0000000000001000-000000000009ffff: RAM 2. 00000000000a0000-00000000000fffff: RESERVED 3. 0000000000100000-00000000bfee0fff: RAM 4. 00000000bfee1000-00000000bff2ffff: CONFIGURATION TABLES 5. 00000000bff30000-00000000bff77fff: RAMSTAGE 6. 00000000bff78000-00000000bfffffff: CONFIGURATION TABLES 7. 00000000c0000000-00000000c29fffff: RESERVED 8. 00000000f0000000-00000000f3ffffff: RESERVED 9. 00000000fed40000-00000000fed44fff: RESERVED 10. 00000000fed90000-00000000fed91fff: RESERVED 11. 0000000100000000-000000023d5fffff: RAM CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) Wrote coreboot table at: bff17000, 0x350 bytes, checksum 6b1a coreboot table: 872 bytes. IMD ROOT 0. bffff000 00001000 IMD SMALL 1. bfffe000 00001000 CONSOLE 2. bff7e000 00080000 MRC DATA 3. bff7d000 000005c8 ROMSTG STCK 4. bff78000 00005000 RAMSTAGE 5. bff2f000 00049000 SMM BACKUP 6. bff1f000 00010000 COREBOOT 7. bff17000 00008000 ACPI 8. bfef3000 00024000 ACPI GNVS 9. bfef2000 00001000 TCPA LOG 10. bfee2000 00010000 SMBIOS 11. bfee1000 00000800 IMD small region: IMD ROOT 0. bfffec00 00000400 CAR GLOBALS 1. bfffea80 00000180 MEM INFO 2. bfffe920 00000149 ROMSTAGE 3. bfffe900 00000004 COREBOOTFWD 4. bfffe8c0 00000028 BS: BS_WRITE_TABLES times (us): entry 0 run 50453 exit 0 CBFS: 'Master Header Locator' located CBFS at [820000:bfffc0) CBFS: Locating 'fallback/payload' CBFS: Found @ offset 373c0 size 387d9d Loading segment from ROM address 0xffc573f8 data (compression=0) New segment dstaddr 0x90000 memsize 0x1080 srcaddr 0xffc57484 filesize 0x1080 Loading segment from ROM address 0xffc57414 code (compression=0) New segment dstaddr 0x1000000 memsize 0x281fe0 srcaddr 0xffc58504 filesize 0x281fe0 Loading segment from ROM address 0xffc57430 code (compression=0) New segment dstaddr 0x40000 memsize 0xb1 srcaddr 0xffeda4e4 filesize 0xb1 Loading segment from ROM address 0xffc5744c data (compression=0) New segment dstaddr 0x4000000 memsize 0x104c00 srcaddr 0xffeda595 filesize 0x104c00 Loading segment from ROM address 0xffc57468 Entry Point 0x00040000 Loading Segment: addr: 0x0000000000090000 memsz: 0x0000000000001080 filesz: 0x0000000000001080 lb: [0x00000000bff30000, 0x00000000bff77998) Post relocation: addr: 0x0000000000090000 memsz: 0x0000000000001080 filesz: 0x0000000000001080 it's not compressed! [ 0x00090000, 00091080, 0x00091080) <- ffc57484 dest 00090000, end 00091080, bouncebuffer ffffffff TPM: pcr 3 measure 00090000 @ 4224: 97ab8ddf358886d4ae834def55de1487f26c56c0 TPM: command 0x14 returned 0x0 Loading Segment: addr: 0x0000000001000000 memsz: 0x0000000000281fe0 filesz: 0x0000000000281fe0 lb: [0x00000000bff30000, 0x00000000bff77998) Post relocation: addr: 0x0000000001000000 memsz: 0x0000000000281fe0 filesz: 0x0000000000281fe0 it's not compressed! [ 0x01000000, 01281fe0, 0x01281fe0) <- ffc58504 dest 01000000, end 01281fe0, bouncebuffer ffffffff TPM: pcr 3 measure 01000000 @ 2629600: 5b9466aba0e9c41a12db52f6e2b608ab09a971be TPM: command 0x14 returned 0x0 Loading Segment: addr: 0x0000000000040000 memsz: 0x00000000000000b1 filesz: 0x00000000000000b1 lb: [0x00000000bff30000, 0x00000000bff77998) Post relocation: addr: 0x0000000000040000 memsz: 0x00000000000000b1 filesz: 0x00000000000000b1 it's not compressed! [ 0x00040000, 000400b1, 0x000400b1) <- ffeda4e4 dest 00040000, end 000400b1, bouncebuffer ffffffff TPM: pcr 3 measure 00040000 @ 177: 42b5a23aae79b2f57de55635d5436d1f81713afa TPM: command 0x14 returned 0x0 Loading Segment: addr: 0x0000000004000000 memsz: 0x0000000000104c00 filesz: 0x0000000000104c00 lb: [0x00000000bff30000, 0x00000000bff77998) Post relocation: addr: 0x0000000004000000 memsz: 0x0000000000104c00 filesz: 0x0000000000104c00 it's not compressed! [ 0x04000000, 04104c00, 0x04104c00) <- ffeda595 dest 04000000, end 04104c00, bouncebuffer ffffffff TPM: pcr 3 measure 04000000 @ 1068032: 34e77725837c3810b5bd011baacb39f0aad8d316 TPM: command 0x14 returned 0x0 Loaded segments BS: BS_PAYLOAD_LOAD times (us): entry 0 run 754261 exit 0 PCH watchdog disabled Jumping to boot code at 00040000(bff17000) CPU0: stack: bff6b000 - bff6c000, lowest used address bff6b86c, stack used: 1940 bytes coreboot-TIMELESS-heads Thu Jan 1 00:00:00 UTC 1970 romstage starting... MRC: no data in 'RW_MRC_CACHE' ME: Wrong mode : 2 ME: FWS2: 0x160a0140 ME: Bist in progress: 0x0 ME: ICC Status : 0x0 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x1 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x1 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0xa ME: Current PM event: 0x6 ME: Progress code : 0x1 PASSED! Tell ME that DRAM is ready ME: ME is reporting as disabled, so not waiting for a response. ME: FWS2: 0x160a0140 ME: Bist in progress: 0x0 ME: ICC Status : 0x0 ME: Invoke MEBx : 0x0 ME: CPU replaced : 0x0 ME: MBP ready : 0x0 ME: MFS failure : 0x1 ME: Warm reset req : 0x0 ME: CPU repl valid : 0x1 ME: (Reserved) : 0x0 ME: FW update req : 0x0 ME: (Reserved) : 0x0 ME: Current state : 0xa ME: Current PM event: 0x6 ME: Progress code : 0x1 ME: Requested BIOS Action: No DID Ack received coreboot-TIMELESS-heads Thu Jan 1 00:00:00 UTC 1970 ramstage starting... MRC: no data in 'RW_MRC_CACHE' PNP: 00ff.1 missing read_resources PNP: 00ff.2 missing read_resources skipping PNP: 00ff.2@60 fixed resource, size=0! skipping PNP: 00ff.2@62 fixed resource, size=0! skipping PNP: 00ff.2@64 fixed resource, size=0! skipping PNP: 00ff.2@66 fixed resource, size=0! NONE missing set_resources PNP: 00ff.1 missing set_resources PNP: 00ff.2 missing set_resources VMX is locked, so set_vmx will do nothing VMX is locked, so set_vmx will do nothing VMX is locked, so set_vmx will do nothing VMX is locked, so set_vmx will do nothing intel_me_path: mbp is not ready! ME: BIOS path: Error GMA: VBT couldn't be found