Implement loop-back HITL ADC/DAC tests

[ryan-summers]

Implement HITL tests for stabilizer in a loop-back configuration.

Specifically, the IIR filter should be configured to output static values, and then telemetry should be used to verify that the ADC samples then appear at the proper voltage.

We should also exercise the AFE programmable gain amplifiers in this test as well. Sample tests:

• Generate 1V output, AFE = 1x, verify 1V input
• Generate 1V output, AFE = 2x, verify 1V
• Generate 0V output, verify 0V input

This should give us a good idea that the ADC-> DAC processing routing is working as anticipated. Once data streaming is implemented, we should also be able to detect the latency from output -> input as well.