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As per the datasheet for RP2350, it has a 16-bit integer and 16-bit fractional divider for the GPIO clock outputs. However, function clock_gpio_init_int_frac() only allow 8-bit fractional part. As a result, using clock_gpio_init_int_frac() the maximum fractional divider is 255/65536.
Moreover, in clock_gpio_init() the fractional part calculated from floating point input value is cast to 8-bit unsigned integer from an input value ranging up to 65535, resulting in overflow for requested fractional part greater than approximately 0.00389.
As per the datasheet for RP2350, it has a 16-bit integer and 16-bit fractional divider for the GPIO clock outputs. However, function clock_gpio_init_int_frac() only allow 8-bit fractional part. As a result, using clock_gpio_init_int_frac() the maximum fractional divider is 255/65536.
void clock_gpio_init_int_frac(uint gpio, uint src, uint32_t div_int, uint8_t div_frac)
Moreover, in clock_gpio_init() the fractional part calculated from floating point input value is cast to 8-bit unsigned integer from an input value ranging up to 65535, resulting in overflow for requested fractional part greater than approximately 0.00389.
uint8_t frac = (uint8_t)((div - (float)div_int) * (1u << CLOCKS_CLK_GPOUT0_DIV_INT_LSB));
In RP2350, CLOCKS_CLK_GPOUT0_DIV_INT_LSB is 16.
Version SDK 2.0.0.
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