diff --git a/ra/board/ra2a1_ek/board.h b/ra/board/ra2a1_ek/board.h index b9e66ec59..9af70ca5e 100644 --- a/ra/board/ra2a1_ek/board.h +++ b/ra/board/ra2a1_ek/board.h @@ -48,14 +48,6 @@ **********************************************************************************************************************/ #define BOARD_RA2A1_EK -/* Except for BSP_CLOCK_CFG_SUBCLOCK_POPULATED and _MAIN_OSC_POPULATED, these are just default settings, not based on the board design. */ -#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) -#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) -#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) -#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS (1000U) - /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ diff --git a/ra/board/ra4m1_ek/board.h b/ra/board/ra4m1_ek/board.h index fd71f6116..28aa9b192 100644 --- a/ra/board/ra4m1_ek/board.h +++ b/ra/board/ra4m1_ek/board.h @@ -48,14 +48,6 @@ **********************************************************************************************************************/ #define BOARD_RA4M1_EK -/* Except for BSP_CLOCK_CFG_SUBCLOCK_POPULATED and _MAIN_OSC_POPULATED, these are just default settings, not based on the board design. */ -#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) -#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) -#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) -#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS (1000U) - /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ diff --git a/ra/board/ra4w1_ek/board.h b/ra/board/ra4w1_ek/board.h index ddd7c672b..cf27958c2 100644 --- a/ra/board/ra4w1_ek/board.h +++ b/ra/board/ra4w1_ek/board.h @@ -48,13 +48,6 @@ **********************************************************************************************************************/ #define BOARD_RA4W1_EK -#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (0) -#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) -#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (0) -#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS (1000U) - /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ diff --git a/ra/board/ra6m1_ek/board.h b/ra/board/ra6m1_ek/board.h index 2ee68e92f..c1b4e4cde 100644 --- a/ra/board/ra6m1_ek/board.h +++ b/ra/board/ra6m1_ek/board.h @@ -48,14 +48,6 @@ **********************************************************************************************************************/ #define BOARD_RA6M1_EK -/* Except for BSP_CLOCK_CFG_SUBCLOCK_POPULATED and _MAIN_OSC_POPULATED, these are just default settings, not based on the board design. */ -#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) -#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) -#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) -#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS (1000U) - /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ diff --git a/ra/board/ra6m2_ek/board.h b/ra/board/ra6m2_ek/board.h index 11e7ca5de..3707ad127 100644 --- a/ra/board/ra6m2_ek/board.h +++ b/ra/board/ra6m2_ek/board.h @@ -49,14 +49,6 @@ **********************************************************************************************************************/ #define BOARD_RA6M2_EK -/* Except for BSP_CLOCK_CFG_SUBCLOCK_POPULATED and _MAIN_OSC_POPULATED, these are just default settings, not based on the board design. */ -#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) -#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) -#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) -#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS (1000U) - /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ diff --git a/ra/board/ra6m3_ek/board.h b/ra/board/ra6m3_ek/board.h index cff0ea7d8..a2f01fa2c 100644 --- a/ra/board/ra6m3_ek/board.h +++ b/ra/board/ra6m3_ek/board.h @@ -49,14 +49,6 @@ **********************************************************************************************************************/ #define BOARD_RA6M3_EK -/* Except for BSP_CLOCK_CFG_SUBCLOCK_POPULATED and _MAIN_OSC_POPULATED, these are just default settings, not based on the board design. */ -#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) -#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) -#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) -#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS (1000U) - /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ diff --git a/ra/board/ra6m3g_ek/board.h b/ra/board/ra6m3g_ek/board.h index 815cf525a..b9d49cffe 100644 --- a/ra/board/ra6m3g_ek/board.h +++ b/ra/board/ra6m3g_ek/board.h @@ -49,14 +49,6 @@ **********************************************************************************************************************/ #define BOARD_RA6M3G_EK -/* Except for BSP_CLOCK_CFG_SUBCLOCK_POPULATED and _MAIN_OSC_POPULATED, these are just default settings, not based on the board design. */ -#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) -#define BSP_CLOCK_CFG_MAIN_OSC_WAIT (9) -#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) -#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) -#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS (1000U) - /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ diff --git a/ra/fsp/inc/api/rm_vee_api.h b/ra/fsp/inc/api/rm_vee_api.h new file mode 100644 index 000000000..01613318d --- /dev/null +++ b/ra/fsp/inc/api/rm_vee_api.h @@ -0,0 +1,215 @@ +/*********************************************************************************************************************** + * Copyright [2020] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_VEE_API_H +#define RM_VEE_API_H + +/*******************************************************************************************************************//** + * @defgroup RM_VEE_API Virtual EEPROM Interface + * @ingroup RENESAS_INTERFACES + * @brief Interface for Virtual EEPROM access + * + * @section RM_VEE_API_SUMMARY Summary + * The Virtual EEPROM Port configures a fail-safe key value store designed for microcontrollers on top of a lower + * level storage device. + * + * Implemented by: + * @ref RM_VEE_FLASH + * + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ + +/* Register definitions, common services and error codes. */ +#include "bsp_api.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ +#define RM_VEE_API_VERSION_MAJOR (1U) +#define RM_VEE_API_VERSION_MINOR (0U) + +/********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/* Current state of the Virtual EEPROM */ +typedef enum e_rm_vee_state +{ + RM_VEE_STATE_READY, ///< Ready + RM_VEE_STATE_BUSY, ///< Operation in progress + RM_VEE_STATE_REFRESH, ///< Refresh operation in progress + RM_VEE_STATE_OVERFLOW, ///< The amount of data written exceeds the space available + RM_VEE_STATE_HARDWARE_FAIL, ///< Lower level hardware failure +} rm_vee_state_t; + +/** User configuration structure, used in open function */ +typedef struct st_rm_vee_callback_args +{ + rm_vee_state_t state; ///< State of the Virtual EEPROM + void const * p_context; ///< Placeholder for user data. Set in @ref rm_vee_api_t::open function in::rm_vee_cfg_t. +} rm_vee_callback_args_t; + +/** User configuration structure, used in open function */ +typedef struct st_rm_vee_cfg +{ + uint32_t num_segments; ///< Number of segments to divide the volume into + uint32_t total_size; ///< Total size of the volume + uint32_t ref_data_size; ///< Size of the reference data stored at the end of the segment + uint32_t record_max_id; ///< Maximum record ID that can be used + uint16_t * rec_offset; ///< Pointer to buffer used for record offset caching + void (* p_callback)(rm_vee_callback_args_t * p_args); ///< Callback provided when a Virtual EEPROM event occurs. + void const * p_context; ///< Placeholder for user data. + void const * p_extend; ///< Pointer to hardware dependent configuration +} rm_vee_cfg_t; + +typedef struct st_rm_vee_status +{ + rm_vee_state_t state; ///< Current state of the Virtual EEPROM + uint32_t last_id; ///< Last ID written + uint32_t space_available; ///< Remaining space available in the segment + uint32_t segment_erase_count; ///< Current segment erase count +} rm_vee_status_t; + +/** Virtual EEPROM API control block. Allocate an instance specific control block to pass into the VEE API calls. + * @par Implemented as + * - @ref rm_vee_flash_instance_ctrl_t + */ +typedef void rm_vee_ctrl_t; + +/** Virtual EEPROM interface API. */ +typedef struct st_rm_vee_api +{ + /** Initializes the driver’s internal structures and opens the Flash driver. + * @par Implemented as + * - @ref RM_VEE_FLASH_Open + * + * @param[in] p_ctrl Pointer to control block. Must be declared by user. Elements set here. + * @param[in] p_cfg Pointer to configuration structure. All elements of this structure must be set by user. + */ + fsp_err_t (* open)(rm_vee_ctrl_t * const p_ctrl, rm_vee_cfg_t const * const p_cfg); + + /** Writes a record to data flash. + * @par Implemented as + * - @ref RM_VEE_FLASH_RecordWrite + * + * @param[in] p_ctrl Pointer to control block. + * @param[in] rec_id ID of record to write. + * @param[in] p_rec_data Pointer to record data to write. + * @param[in] num_bytes Length of data to write. + */ + fsp_err_t (* recordWrite)(rm_vee_ctrl_t * const p_ctrl, uint32_t const rec_id, uint8_t const * const p_rec_data, + uint32_t num_bytes); + + /** This function gets the pointer to the most recent version of a record specified by ID. + * @par Implemented as + * - @ref RM_VEE_FLASH_RecordPtrGet + * + * @param[in] p_ctrl Pointer to control block. + * @param[in] rec_id ID of record to locate. + * @param[in] pp_rec_data Pointer to set to the most recent version of the record. + * @param[in] p_num_bytes Variable to load with record length. + */ + fsp_err_t (* recordPtrGet)(rm_vee_ctrl_t * const p_ctrl, uint32_t rec_id, uint8_t ** const pp_rec_data, + uint32_t * const p_num_bytes); + + /** Writes new Reference data to the reference update area. + * @par Implemented as + * - @ref RM_VEE_FLASH_RefDataWrite + * + * @param[in] p_ctrl Pointer to control block. + * @param[in] p_ref_data Pointer to data to write to the reference data update area. + */ + fsp_err_t (* refDataWrite)(rm_vee_ctrl_t * const p_ctrl, uint8_t const * const p_ref_data); + + /** Gets a pointer to the most recent reference data. + * @par Implemented as + * - @ref RM_VEE_FLASH_RefDataPtrGet + * + * @param[in] p_ctrl Pointer to control block. + * @param[in] pp_ref_data Pointer to set to the most recent valid reference data. + */ + fsp_err_t (* refDataPtrGet)(rm_vee_ctrl_t * const p_ctrl, uint8_t ** const pp_ref_data); + + /** Get the current status of the VEE driver. + * @par Implemented as + * - @ref RM_VEE_FLASH_StatusGet + * + * @param[in] p_ctrl Pointer to control block. + * @param[in] p_status Pointer to store the current status of the VEE driver. + */ + fsp_err_t (* statusGet)(rm_vee_ctrl_t * const p_ctrl, rm_vee_status_t * const p_status); + + /** Manually start a refresh operation. + * @par Implemented as + * - @ref RM_VEE_FLASH_Refresh + * + * @param[in] p_ctrl Pointer to control block. + */ + fsp_err_t (* refresh)(rm_vee_ctrl_t * const p_ctrl); + + /** Format the Virtual EEPROM. + * @par Implemented as + * - @ref RM_VEE_FLASH_Format + * + * @param[in] p_ctrl Pointer to control block. + * @param[in] p_ref_data Optional pointer to reference data to write during format. + */ + fsp_err_t (* format)(rm_vee_ctrl_t * const p_ctrl, uint8_t const * const p_ref_data); + + /** Closes the module and lower level storage device. + * @par Implemented as + * - @ref RM_VEE_FLASH_Close + * + * @param[in] p_ctrl Control block set in @ref rm_vee_api_t::open call. + */ + fsp_err_t (* close)(rm_vee_ctrl_t * const p_ctrl); + + /** Gets version and stores it in provided pointer p_version. + * @par Implemented as + * - @ref RM_VEE_FLASH_VersionGet + * + * @param[out] p_version Code and API version used. + */ + fsp_err_t (* versionGet)(fsp_version_t * const p_version); +} rm_vee_api_t; + +/** This structure encompasses everything that is needed to use an instance of this interface. */ +typedef struct st_rm_vee_instance +{ + rm_vee_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance + rm_vee_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance + rm_vee_api_t const * p_api; ///< Pointer to the API structure for this instance +} rm_vee_instance_t; + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +/*******************************************************************************************************************//** + * @} (end defgroup RM_VEE_API) + **********************************************************************************************************************/ + +#endif /* RM_VEE_API_H */ diff --git a/ra/fsp/inc/fsp_common_api.h b/ra/fsp/inc/fsp_common_api.h index d86714a40..c4d566e82 100644 --- a/ra/fsp/inc/fsp_common_api.h +++ b/ra/fsp/inc/fsp_common_api.h @@ -102,6 +102,7 @@ typedef enum e_fsp_err FSP_ERR_NOT_ERASED = 31, ///< Erase verification failed FSP_ERR_SECTOR_RELEASE_FAILED = 32, ///< Sector release failed FSP_ERR_NOT_INITIALIZED = 33, ///< Required initialization not complete + FSP_ERR_NOT_FOUND = 34, ///< The requested item could not be found /* Start of RTOS only error codes */ FSP_ERR_INTERNAL = 100, ///< Internal error diff --git a/ra/fsp/inc/fsp_version.h b/ra/fsp/inc/fsp_version.h index aafd07354..42bb38767 100644 --- a/ra/fsp/inc/fsp_version.h +++ b/ra/fsp/inc/fsp_version.h @@ -41,7 +41,7 @@ #define FSP_VERSION_MAJOR (1U) /** FSP pack minor version. */ -#define FSP_VERSION_MINOR (2U) +#define FSP_VERSION_MINOR (3U) /** FSP pack patch version. */ #define FSP_VERSION_PATCH (0U) @@ -50,10 +50,10 @@ #define FSP_VERSION_BUILD (0U) /** Public FSP version name. */ -#define FSP_VERSION_STRING ("1.2.0") +#define FSP_VERSION_STRING ("1.3.0") /** Unique FSP version ID. */ -#define FSP_VERSION_BUILD_STRING ("Built with Renesas Arm Flexible Software Package version 1.2.0") +#define FSP_VERSION_BUILD_STRING ("Built with Renesas Advanced Flexible Software Package version 1.3.0") /********************************************************************************************************************** * Typedef definitions diff --git a/ra/fsp/inc/instances/rm_vee_flash.h b/ra/fsp/inc/instances/rm_vee_flash.h new file mode 100644 index 000000000..5fe0fe9fc --- /dev/null +++ b/ra/fsp/inc/instances/rm_vee_flash.h @@ -0,0 +1,156 @@ +/*********************************************************************************************************************** + * Copyright [2020] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +#ifndef RM_VEE_FLASH_H +#define RM_VEE_FLASH_H + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include "rm_vee_api.h" +#include "r_flash_api.h" +#include "rm_vee_flash_cfg.h" + +/* Common macro for FSP header files. There is also a corresponding FSP_FOOTER macro at the end of this file. */ +FSP_HEADER + +/*******************************************************************************************************************//** + * @addtogroup RM_VEE_FLASH + * @{ + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ +#define RM_VEE_FLASH_CODE_VERSION_MAJOR (1U) +#define RM_VEE_FLASH_CODE_VERSION_MINOR (0U) + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/** User configuration structure, used in open function */ +typedef struct st_rm_vee_flash_cfg +{ + flash_instance_t const * p_flash; ///< Pointer to a flash instance +} rm_vee_flash_cfg_t; + +/* Segment Header */ +typedef struct +{ + uint32_t refresh_cnt; + uint16_t pad; + uint16_t valid_code; +} rm_vee_seg_hdr_t; + +/* Record Header (only written to flash when variable length records are configured) */ +typedef struct +{ + uint16_t length; // length of data portion of this record + uint16_t offset; // temp value "passed to"/used at interrupt level +} rm_vee_rec_hdr_t; + +/* Record Trailer */ +typedef struct +{ + uint16_t id; + uint16_t valid_code; +} rm_vee_rec_end_t; + +/* Reference Data Update Area Header */ +typedef struct +{ + uint16_t pad; + uint16_t valid_code; // alternate area contains updated refdata +} rm_vee_ref_hdr_t; + +/** Instance control block. This is private to the FSP and should not be used or modified by the application. */ +typedef struct st_rm_vee_flash_instance_ctrl +{ + uint32_t open; + volatile uint32_t mode; + volatile uint32_t state; + uint32_t active_seg_addr; + uint32_t next_write_addr; + uint32_t ref_hdr_addr; + rm_vee_cfg_t const * p_cfg; + bool new_refdata_valid; // update area written successfully + bool factory_refdata; // update area written successfully + volatile bool irq_flag; + uint8_t xfer_buf[RM_VEE_FLASH_REFRESH_BUFFER_SIZE]; + rm_vee_seg_hdr_t seg_hdr; + rm_vee_rec_hdr_t rec_hdr; + uint8_t const * p_rec_data; + rm_vee_rec_end_t rec_end; + rm_vee_ref_hdr_t ref_hdr; + volatile flash_event_t flash_event; + flash_event_t flash_err_event; // error event from Flash driver + uint32_t last_id; // ID of last record successfully written + uint32_t refresh_type; + uint32_t refresh_src_seg_addr; + uint32_t refresh_src_rec_end_addr; // addr of first byte after last record + uint32_t refresh_src_refdata_addr; + uint32_t refresh_start_rec_id; // ID of first record copied during Refresh + uint32_t refresh_cur_rec_id; // g_rec_offset[] index used during Refresh + uint32_t refresh_dst_rec_end_addr; // addr of first byte after last record + uint32_t refresh_xfer_src_addr; + uint32_t refresh_xfer_bytes_left; + flash_instance_t const * p_flash; + uint32_t segment_size; +} rm_vee_flash_instance_ctrl_t; + +/********************************************************************************************************************** + * Exported global variables + **********************************************************************************************************************/ + +/** @cond INC_HEADER_DEFS_SEC */ +/** Filled in Interface API structure for this Instance. */ +extern const rm_vee_api_t g_rm_vee_on_flash; + +/** @endcond */ + +/*********************************************************************************************************************** + * Public APIs + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_Open(rm_vee_ctrl_t * const p_api_ctrl, rm_vee_cfg_t const * const p_cfg); +fsp_err_t RM_VEE_FLASH_RecordWrite(rm_vee_ctrl_t * const p_api_ctrl, + uint32_t const rec_id, + uint8_t const * const p_rec_data, + uint32_t const num_bytes); +fsp_err_t RM_VEE_FLASH_RecordPtrGet(rm_vee_ctrl_t * const p_api_ctrl, + uint32_t const rec_id, + uint8_t ** const pp_rec_data, + uint32_t * const p_num_bytes); +fsp_err_t RM_VEE_FLASH_RefDataWrite(rm_vee_ctrl_t * const p_api_ctrl, uint8_t const * const p_ref_data); +fsp_err_t RM_VEE_FLASH_RefDataPtrGet(rm_vee_ctrl_t * const p_api_ctrl, uint8_t ** const pp_ref_data); +fsp_err_t RM_VEE_FLASH_StatusGet(rm_vee_ctrl_t * const p_api_ctrl, rm_vee_status_t * const p_status); +fsp_err_t RM_VEE_FLASH_Refresh(rm_vee_ctrl_t * const p_api_ctrl); +fsp_err_t RM_VEE_FLASH_Format(rm_vee_ctrl_t * const p_api_ctrl, uint8_t const * const p_ref_data); +fsp_err_t RM_VEE_FLASH_Close(rm_vee_ctrl_t * const p_api_ctrl); +fsp_err_t RM_VEE_FLASH_VersionGet(fsp_version_t * const p_version); + +/* Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ +FSP_FOOTER + +#endif // RM_VEE_FLASH_H + +/*******************************************************************************************************************//** + * @} (end defgroup RM_VEE_FLASH) + **********************************************************************************************************************/ diff --git a/ra/fsp/lib/r_ble/cm4_ac6/all/libr_ble.a b/ra/fsp/lib/r_ble/cm4_ac6/all/libr_ble.a index 3c5f62ed1..98f9e8b29 100644 Binary files a/ra/fsp/lib/r_ble/cm4_ac6/all/libr_ble.a and b/ra/fsp/lib/r_ble/cm4_ac6/all/libr_ble.a differ diff --git a/ra/fsp/lib/r_ble/cm4_ac6/all_freertos/libr_ble.a b/ra/fsp/lib/r_ble/cm4_ac6/all_freertos/libr_ble.a index 0dc039965..861278652 100644 Binary files a/ra/fsp/lib/r_ble/cm4_ac6/all_freertos/libr_ble.a and b/ra/fsp/lib/r_ble/cm4_ac6/all_freertos/libr_ble.a differ diff --git a/ra/fsp/lib/r_ble/cm4_gcc/all/libr_ble.a b/ra/fsp/lib/r_ble/cm4_gcc/all/libr_ble.a index 664e2f31c..6ec820e65 100644 Binary files a/ra/fsp/lib/r_ble/cm4_gcc/all/libr_ble.a and b/ra/fsp/lib/r_ble/cm4_gcc/all/libr_ble.a differ diff --git a/ra/fsp/lib/r_ble/cm4_gcc/all_freertos/libr_ble.a b/ra/fsp/lib/r_ble/cm4_gcc/all_freertos/libr_ble.a index 43818e423..4bfa2fda3 100644 Binary files a/ra/fsp/lib/r_ble/cm4_gcc/all_freertos/libr_ble.a and b/ra/fsp/lib/r_ble/cm4_gcc/all_freertos/libr_ble.a differ diff --git a/ra/fsp/lib/r_ble/cm4_iar/all/libr_ble.a b/ra/fsp/lib/r_ble/cm4_iar/all/libr_ble.a index 7d153abff..a1aaae7d0 100644 Binary files a/ra/fsp/lib/r_ble/cm4_iar/all/libr_ble.a and b/ra/fsp/lib/r_ble/cm4_iar/all/libr_ble.a differ diff --git a/ra/fsp/lib/r_ble/cm4_iar/all_freertos/libr_ble.a b/ra/fsp/lib/r_ble/cm4_iar/all_freertos/libr_ble.a index 8aafd2d16..6904eccfb 100644 Binary files a/ra/fsp/lib/r_ble/cm4_iar/all_freertos/libr_ble.a and b/ra/fsp/lib/r_ble/cm4_iar/all_freertos/libr_ble.a differ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h index a6443fc24..52e18073c 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/renesas.h @@ -13750,7 +13750,7 @@ typedef struct /*!< (@ 0x40062000) R_SDHI0 Structure * STP has been set to 1, the buffer access error bit (ERR5 * or ERR4) in SD_INFO2 will be set accordingly.- When STP * has been set to 1 during transfer for single block write, - * the access end flag is set when SD_BUF becomes e */ + * the access end flag is set when SD_BUF becomes emp */ uint32_t : 7; __IOM uint32_t SEC : 1; /*!< [8..8] Block Count EnableSet SEC to 1 at multiple block transfer.When * SD_CMD is set as follows to start the command sequence @@ -13760,7 +13760,7 @@ typedef struct /*!< (@ 0x40062000) R_SDHI0 Structure * = 000)2. SD_CMD[15:13] = 001 in extended mode (CMD12 is * automatically issued, multiple block transfer)When the * command sequence is halted because of a communications - * error or timeout, CMD12 is not automatically */ + * error or timeout, CMD12 is not automatically i */ uint32_t : 23; } SD_STOP_b; }; @@ -13978,7 +13978,7 @@ typedef struct /*!< (@ 0x40062000) R_SDHI0 Structure * without automatic issuing of CMD12, as well as 512 bytes, * 32, 64, 128, and 256 bytes are specifiable. However, in * the reading of 32, 64, 128, and 256 bytes for the transfer - * of multiple blocks, this is restricted to mu */ + * of multiple blocks, this is restricted to mult */ uint32_t : 22; } SD_SIZE_b; }; @@ -14241,7 +14241,7 @@ typedef struct /*!< (@ 0x40082000) R_SLCDC Structure __IOM uint8_t B : 4; /*!< [7..4] B-Pattern Area */ } SEG_b[64]; }; -} R_SLCDC_Type; /*!< Size = 294 (0x126) */ +} R_SLCDC_Type; /*!< Size = 320 (0x140) */ /* =========================================================================================================================== */ /* ================ R_SPI0 ================ */ @@ -16172,7 +16172,8 @@ typedef struct /*!< (@ 0x407EC000) R_TSN Structure struct { - __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the convertedvalue. */ + __IM uint8_t TSCDRL : 8; /*!< [7..0] The calibration data stores the lower 8 bits of the converted + * value. */ } TSCDRL_b; }; @@ -16189,6 +16190,28 @@ typedef struct /*!< (@ 0x407EC000) R_TSN Structure }; } R_TSN_Type; /*!< Size = 554 (0x22a) */ +/* =========================================================================================================================== */ +/* ================ R_TSN_CAL ================ */ +/* =========================================================================================================================== */ + +/** + * @brief Temperature Sensor (R_TSN_CAL) + */ + +typedef struct /*!< (@ 0x407FB17C) R_TSN_CAL Structure */ +{ + union + { + __IM uint32_t TSCDR; /*!< (@ 0x00000000) Temperature Sensor 32 bit Calibration Data Register */ + + struct + { + __IM uint32_t TSCDR : 32; /*!< [31..0] The 32 bit TSCDR register stores temperature sensor + * calibration converted value. */ + } TSCDR_b; + }; +} R_TSN_CAL_Type; /*!< Size = 4 (0x4) */ + /* =========================================================================================================================== */ /* ================ R_TSN_CTRL ================ */ /* =========================================================================================================================== */ @@ -18461,6 +18484,7 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure #define R_SSI1_BASE 0x4004E100UL #define R_SYSTEM_BASE 0x4001E000UL #define R_TSN_BASE 0x407EC000UL + #define R_TSN_CAL_BASE 0x407FB17CUL #define R_TSN_CTRL_BASE 0x4005D000UL #define R_USB_FS0_BASE 0x40090000UL #define R_USB_HS0_BASE 0x40060000UL @@ -18603,6 +18627,7 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure #define R_SSI1 ((R_SSI0_Type *) R_SSI1_BASE) #define R_SYSTEM ((R_SYSTEM_Type *) R_SYSTEM_BASE) #define R_TSN ((R_TSN_Type *) R_TSN_BASE) + #define R_TSN_CAL ((R_TSN_CAL_Type *) R_TSN_CAL_BASE) #define R_TSN_CTRL ((R_TSN_CTRL_Type *) R_TSN_CTRL_BASE) #define R_USB_FS0 ((R_USB_FS0_Type *) R_USB_FS0_BASE) #define R_USB_HS0 ((R_USB_HS0_Type *) R_USB_HS0_BASE) @@ -23976,6 +24001,8 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure #define R_MSTP_MSTPCRC_MSTPC4_Msk (0x10UL) /*!< MSTPC4 (Bitfield-Mask: 0x01) */ #define R_MSTP_MSTPCRC_MSTPC3_Pos (3UL) /*!< MSTPC3 (Bit 3) */ #define R_MSTP_MSTPCRC_MSTPC3_Msk (0x8UL) /*!< MSTPC3 (Bitfield-Mask: 0x01) */ + #define R_MSTP_MSTPCRC_MSTPC2_Pos (2UL) /*!< MSTPC2 (Bit 2) */ + #define R_MSTP_MSTPCRC_MSTPC2_Msk (0x4UL) /*!< MSTPC2 (Bitfield-Mask: 0x01) */ #define R_MSTP_MSTPCRC_MSTPC1_Pos (1UL) /*!< MSTPC1 (Bit 1) */ #define R_MSTP_MSTPCRC_MSTPC1_Msk (0x2UL) /*!< MSTPC1 (Bitfield-Mask: 0x01) */ #define R_MSTP_MSTPCRC_MSTPC0_Pos (0UL) /*!< MSTPC0 (Bit 0) */ @@ -25962,6 +25989,14 @@ typedef struct /*!< (@ 0x40044200) R_WDT Structure #define R_TSN_TSCDRL_TSCDRL_Pos (0UL) /*!< TSCDRL (Bit 0) */ #define R_TSN_TSCDRL_TSCDRL_Msk (0xffUL) /*!< TSCDRL (Bitfield-Mask: 0xff) */ +/* =========================================================================================================================== */ +/* ================ R_TSN_CAL ================ */ +/* =========================================================================================================================== */ + +/* ========================================================= TSCDR ========================================================= */ + #define R_TSN_CAL_TSCDR_TSCDR_Pos (0UL) /*!< TSCDR (Bit 0) */ + #define R_TSN_CAL_TSCDR_TSCDR_Msk (0xffffffffUL) /*!< TSCDR (Bitfield-Mask: 0xffffffff) */ + /* =========================================================================================================================== */ /* ================ R_TSN_CTRL ================ */ /* =========================================================================================================================== */ diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/SVD/RA.svd b/ra/fsp/src/bsp/cmsis/Device/RENESAS/SVD/RA.svd index 8c98a9d68..c9bc9fc08 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/SVD/RA.svd +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/SVD/RA.svd @@ -69246,7 +69246,7 @@ The order in which the SPCMD0 to SPCMD07 registers are to be referenced is chang TSCDRL - The calibration data stores the lower 8 bits of the convertedvalue. + The calibration data stores the lower 8 bits of the converted value. 0 7 read-only @@ -69255,6 +69255,36 @@ The order in which the SPCMD0 to SPCMD07 registers are to be referenced is chang + + R_TSN_CAL + Temperature Sensor + 0x407FB17C + + 0x00 + 0x04 + registers + + + + TSCDR + Temperature Sensor 32 bit Calibration Data Register + 0x00 + 32 + read-only + 0x00 + 0x00 + + + TSCDR + The 32 bit TSCDR register stores temperature sensor calibration converted value. + 0 + 31 + read-only + + + + + R_TSN_CTRL Temperature Sensor diff --git a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c index 5122e34cf..27aa39457 100644 --- a/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c +++ b/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.c @@ -109,9 +109,11 @@ static void bsp_reset_trng_circuit(void); #endif #if defined(__ICCARM__) - #pragma weak R_BSP_WarmStart + void R_BSP_WarmStart(bsp_warm_start_event_t event); + #pragma weak R_BSP_WarmStart + #elif defined(__GNUC__) || defined(__ARMCC_VERSION) void R_BSP_WarmStart(bsp_warm_start_event_t event) __attribute__((weak)); @@ -133,6 +135,9 @@ void SystemInit (void) SCB->CPACR |= (uint32_t) CP_MASK; #endif +/* Set the VTOR to the vector table address based on the build. */ + SCB->VTOR = (uint32_t) &__Vectors; + #if BSP_FEATURE_BSP_VBATT_HAS_VBTCR1_BPWSWSTP /* Unlock VBTCR1 register. */ diff --git a/ra/fsp/src/bsp/mcu/all/bsp_clocks.c b/ra/fsp/src/bsp/mcu/all/bsp_clocks.c index f3e97ceea..2da78b629 100644 --- a/ra/fsp/src/bsp/mcu/all/bsp_clocks.c +++ b/ra/fsp/src/bsp/mcu/all/bsp_clocks.c @@ -126,11 +126,6 @@ #define BSP_PRV_NUM_CLOCKS ((uint8_t) BSP_CLOCKS_SOURCE_CLOCK_SUBCLOCK + 1U) #endif -/* Frequencies of clocks with fixed freqencies. */ -#define BSP_PRV_LOCO_FREQ (32768U) // LOCO frequency is fixed at 32768 Hz -#define BSP_PRV_SUBCLOCK_FREQ (32768U) // Subclock frequency is 32768 Hz -#define BSP_PRV_MOCO_FREQ (8000000U) // MOCO frequency is fixed at 8 MHz - /* Calculate PLLCCR value. */ #if BSP_PRV_PLL_SUPPORTED #if (1U == BSP_FEATURE_CGC_PLLCCR_TYPE) @@ -549,10 +544,10 @@ void bsp_clock_init (void) #endif g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_HOCO] = BSP_HOCO_HZ; - g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_MOCO] = BSP_PRV_MOCO_FREQ; - g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_LOCO] = BSP_PRV_LOCO_FREQ; + g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_MOCO] = BSP_MOCO_FREQ_HZ; + g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_LOCO] = BSP_LOCO_FREQ_HZ; g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC] = BSP_CFG_XTAL_HZ; - g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_SUBCLOCK] = BSP_PRV_SUBCLOCK_FREQ; + g_clock_freq[BSP_CLOCKS_SOURCE_CLOCK_SUBCLOCK] = BSP_SUBCLOCK_FREQ_HZ; #if BSP_PRV_PLL_SUPPORTED /* The PLL value will be calculated at initialization. */ @@ -645,6 +640,10 @@ void bsp_clock_init (void) * voltage mode. */ R_SYSTEM->HOCOCR = 1U; #endif + #elif BSP_FEATURE_CGC_STARTUP_OPCCR_MODE != BSP_PRV_OPERATING_MODE_HIGH_SPEED + + /* Some MCUs do not start in high speed mode. */ + bsp_prv_operating_mode_opccr_set(BSP_PRV_OPERATING_MODE_HIGH_SPEED); #endif #endif diff --git a/ra/fsp/src/bsp/mcu/all/bsp_clocks.h b/ra/fsp/src/bsp/mcu/all/bsp_clocks.h index e2fd781de..817e1357b 100644 --- a/ra/fsp/src/bsp/mcu/all/bsp_clocks.h +++ b/ra/fsp/src/bsp/mcu/all/bsp_clocks.h @@ -65,14 +65,19 @@ FSP_HEADER #endif #endif +/* Frequencies of clocks with fixed freqencies. */ +#define BSP_LOCO_FREQ_HZ (32768U) // LOCO frequency is fixed at 32768 Hz +#define BSP_SUBCLOCK_FREQ_HZ (32768U) // Subclock frequency is 32768 Hz +#define BSP_MOCO_FREQ_HZ (8000000U) // MOCO frequency is fixed at 8 MHz + #if BSP_CLOCKS_SOURCE_CLOCK_HOCO == BSP_CFG_CLOCK_SOURCE #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_HOCO_HZ) #elif BSP_CLOCKS_SOURCE_CLOCK_MOCO == BSP_CFG_CLOCK_SOURCE - #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_PRV_MOCO_FREQ) + #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_MOCO_FREQ_HZ) #elif BSP_CLOCKS_SOURCE_CLOCK_LOCO == BSP_CFG_CLOCK_SOURCE - #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_PRV_LOCO_FREQ) + #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_LOCO_FREQ_HZ) #elif BSP_CLOCKS_SOURCE_CLOCK_SUBCLOCK == BSP_CFG_CLOCK_SOURCE - #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_PRV_SUBCLOCK_FREQ) + #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_SUBCLOCK_FREQ_HZ) #elif BSP_CLOCKS_SOURCE_CLOCK_MAIN_OSC == BSP_CFG_CLOCK_SOURCE #define BSP_STARTUP_SOURCE_CLOCK_HZ (BSP_CFG_XTAL_HZ) #elif BSP_CLOCKS_SOURCE_CLOCK_PLL == BSP_CFG_CLOCK_SOURCE diff --git a/ra/fsp/src/bsp/mcu/all/bsp_common.h b/ra/fsp/src/bsp/mcu/all/bsp_common.h index 7d4d63a2a..ef18258a8 100644 --- a/ra/fsp/src/bsp/mcu/all/bsp_common.h +++ b/ra/fsp/src/bsp/mcu/all/bsp_common.h @@ -189,8 +189,6 @@ typedef enum e_bsp_warm_start_event BSP_WARM_START_POST_C ///< Called after clocks and C runtime environment have been set up } bsp_warm_start_event_t; -/** @} (end addtogroup BSP_MCU) */ - /* Private enum used in R_FSP_SystemClockHzGet. Maps clock name to base bit in SCKDIVCR. */ typedef enum e_fsp_priv_clock { @@ -280,6 +278,8 @@ void fsp_error_log(fsp_err_t err, const char * file, int32_t line); #define BSP_CFG_HANDLE_UNRECOVERABLE_ERROR(x) __BKPT((x)) #endif +/** @} (end addtogroup BSP_MCU) */ + /** Common macro for FSP header files. There is also a corresponding FSP_HEADER macro at the top of this file. */ FSP_FOOTER diff --git a/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h index 961b92ed7..4f759ed3d 100644 --- a/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra2a1/bsp_feature.h @@ -67,6 +67,7 @@ #define BSP_FEATURE_ADC_SENSOR_MIN_SAMPLING_TIME (5000U) #define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_CONTROL_AVAILABLE (0U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION32_AVAILABLE (0U) #define BSP_FEATURE_ADC_TSN_SLOPE (-3650) #define BSP_FEATURE_ADC_UNIT_0_CHANNELS (0xFF01FF) // 0 to 8, 16 to 23 in unit 0 #define BSP_FEATURE_ADC_UNIT_1_CHANNELS (0) @@ -120,6 +121,7 @@ #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (0) #define BSP_FEATURE_CGC_SODRV_MASK (0x03U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x0U) +#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (2) #define BSP_FEATURE_CRYPTO_HAS_AES (1) #define BSP_FEATURE_CRYPTO_HAS_AES_WRAPPED (0) @@ -153,6 +155,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU +#define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE (0) // Feature not available on this MCU diff --git a/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h index 2d5d1477f..ed6a3fa2b 100644 --- a/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4m1/bsp_feature.h @@ -67,6 +67,7 @@ #define BSP_FEATURE_ADC_SENSOR_MIN_SAMPLING_TIME (5000U) #define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_CONTROL_AVAILABLE (0U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION32_AVAILABLE (0U) #define BSP_FEATURE_ADC_TSN_SLOPE (-3650) #define BSP_FEATURE_ADC_UNIT_0_CHANNELS (0x3FF7FFF) // 0 to 14, 16 to 25 in unit 0 #define BSP_FEATURE_ADC_UNIT_1_CHANNELS (0) @@ -120,6 +121,7 @@ #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (1U) // RA4M1 requires that bits 16-18 of SCKDIVCR be the same as the bits for PCKB #define BSP_FEATURE_CGC_SODRV_MASK (0x03U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x0U) +#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (2) #define BSP_FEATURE_CRYPTO_HAS_AES (1) #define BSP_FEATURE_CRYPTO_HAS_AES_WRAPPED (1) @@ -153,6 +155,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU +#define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE (0) // Feature not available on this MCU diff --git a/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h index f71ac57b5..385e9ac15 100644 --- a/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra4w1/bsp_feature.h @@ -67,6 +67,7 @@ #define BSP_FEATURE_ADC_SENSOR_MIN_SAMPLING_TIME (5000U) #define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_CONTROL_AVAILABLE (0U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION32_AVAILABLE (0U) #define BSP_FEATURE_ADC_TSN_SLOPE (-3650) #define BSP_FEATURE_ADC_UNIT_0_CHANNELS (0x1A0670) // 4 to 6, 9, 10, 17, 19, 20 in unit 0 #define BSP_FEATURE_ADC_UNIT_1_CHANNELS (0) @@ -120,6 +121,7 @@ #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (1U) // RA4W1 requires that bits 16-18 of SCKDIVCR be the same as the bits for PCKB #define BSP_FEATURE_CGC_SODRV_MASK (0x03U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x0U) +#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (2) #define BSP_FEATURE_CRYPTO_HAS_AES (1) #define BSP_FEATURE_CRYPTO_HAS_AES_WRAPPED (1) @@ -153,6 +155,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU +#define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE (0) // Feature not available on this MCU #define BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE (0) // Feature not available on this MCU diff --git a/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h index 299c5caee..1a3c995c1 100644 --- a/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m1/bsp_feature.h @@ -69,8 +69,9 @@ #define BSP_FEATURE_ADC_MAX_RESOLUTION_BITS (12U) #define BSP_FEATURE_ADC_SENSORS_EXCLUSIVE (0U) #define BSP_FEATURE_ADC_SENSOR_MIN_SAMPLING_TIME (4150U) -#define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (0U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_CONTROL_AVAILABLE (1U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION32_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_SLOPE (4000) #define BSP_FEATURE_ADC_UNIT_0_CHANNELS (0x1700EF) // 0 to 3, 5 to 7, 16 to 18, and 20 in unit 0 and 0 to 2, 5 to 7, 16 to 17 in unit 1 #define BSP_FEATURE_ADC_UNIT_1_CHANNELS (0x300E7) @@ -124,6 +125,7 @@ #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (0) #define BSP_FEATURE_CGC_SODRV_MASK (0x02U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x1U) +#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (0) #define BSP_FEATURE_CRYPTO_HAS_AES (1) #define BSP_FEATURE_CRYPTO_HAS_AES_WRAPPED (1) @@ -157,6 +159,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0) // Feature not available on this MCU #define BSP_FEATURE_ETHER_MAX_CHANNELS (0) // Feature not available on this MCU +#define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE (0x2000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE (0x10000U) #define BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE (0x8000U) diff --git a/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h index 624bcc201..217c2b3e8 100644 --- a/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m2/bsp_feature.h @@ -69,8 +69,9 @@ #define BSP_FEATURE_ADC_MAX_RESOLUTION_BITS (12U) #define BSP_FEATURE_ADC_SENSORS_EXCLUSIVE (0U) #define BSP_FEATURE_ADC_SENSOR_MIN_SAMPLING_TIME (4150U) -#define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (0U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_CONTROL_AVAILABLE (1U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION32_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_SLOPE (4000) #define BSP_FEATURE_ADC_UNIT_0_CHANNELS (0x1F00FF) // 0 to 7, 16 to 20 in unit 0 and 0 to 2, 5 to 7, 16 to 18 in unit 1 #define BSP_FEATURE_ADC_UNIT_1_CHANNELS (0x700E7) @@ -124,6 +125,7 @@ #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (0) #define BSP_FEATURE_CGC_SODRV_MASK (0x02U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x1U) +#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (0) #define BSP_FEATURE_CRYPTO_HAS_AES (1) #define BSP_FEATURE_CRYPTO_HAS_AES_WRAPPED (1) @@ -157,6 +159,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0x0000070FU) #define BSP_FEATURE_ETHER_MAX_CHANNELS (1U) +#define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE (0x2000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE (0x10000U) #define BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE (0x8000U) diff --git a/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h b/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h index f4076481c..e1d5bfe6c 100644 --- a/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h +++ b/ra/fsp/src/bsp/mcu/ra6m3/bsp_feature.h @@ -69,8 +69,9 @@ #define BSP_FEATURE_ADC_MAX_RESOLUTION_BITS (12U) #define BSP_FEATURE_ADC_SENSORS_EXCLUSIVE (0U) #define BSP_FEATURE_ADC_SENSOR_MIN_SAMPLING_TIME (4150U) -#define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (0U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_CONTROL_AVAILABLE (1U) +#define BSP_FEATURE_ADC_TSN_CALIBRATION32_AVAILABLE (1U) #define BSP_FEATURE_ADC_TSN_SLOPE (4000) #define BSP_FEATURE_ADC_UNIT_0_CHANNELS (0x1F00FF) // 0 to 7, 16 to 20 in unit 0 and 0 to 3, 5 to 7, 16 to 19 in unit 1 #define BSP_FEATURE_ADC_UNIT_1_CHANNELS (0xF00EF) @@ -124,6 +125,7 @@ #define BSP_FEATURE_CGC_SCKDIVCR_BCLK_MATCHES_PCLKB (0) #define BSP_FEATURE_CGC_SODRV_MASK (0x02U) #define BSP_FEATURE_CGC_SODRV_SHIFT (0x1U) +#define BSP_FEATURE_CGC_STARTUP_OPCCR_MODE (0) #define BSP_FEATURE_CRYPTO_HAS_AES (1) #define BSP_FEATURE_CRYPTO_HAS_AES_WRAPPED (1) @@ -157,6 +159,7 @@ #define BSP_FEATURE_ETHER_FIFO_DEPTH (0x0000070FU) #define BSP_FEATURE_ETHER_MAX_CHANNELS (1U) +#define BSP_FEATURE_FLASH_DATA_FLASH_START (0x40100000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE (0x2000U) #define BSP_FEATURE_FLASH_HP_CF_REGION0_SIZE (0x10000U) #define BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE (0x8000U) diff --git a/ra/fsp/src/r_acmplp/r_acmplp.c b/ra/fsp/src/r_acmplp/r_acmplp.c index 29e28004e..752add52c 100644 --- a/ra/fsp/src/r_acmplp/r_acmplp.c +++ b/ra/fsp/src/r_acmplp/r_acmplp.c @@ -31,6 +31,9 @@ **********************************************************************************************************************/ #define ACMPLP_OPEN (0x434d504CU) +/* Number of channels. */ +#define ACMPLP_CHANNELS (2U) + /* Mask for clearing ACMPLP registers*/ #define ACMPLP_COMPMDR_CH0_CLEAR (0xF1U) #define ACMPLP_COMPFIR_CH0_CLEAR (0xF0U) @@ -76,6 +79,9 @@ static const uint8_t acmplp_filter_map[] = [COMPARATOR_FILTER_32] = 3U, }; +/* Used to keep track of opened channels. */ +static acmplp_instance_ctrl_t * gp_acmplp_ctrl[ACMPLP_CHANNELS]; + /*********************************************************************************************************************** * Global Variables **********************************************************************************************************************/ @@ -114,6 +120,7 @@ const comparator_api_t g_comparator_on_acmplp = * p_cfg->p_callback is not NULL, but ISR is not enabled. ISR must be enabled to * use callback function. * @retval FSP_ERR_ALREADY_OPEN The control block is already open or the hardware lock is taken. + * @retval FSP_ERR_IN_USE The channel is already in use. **********************************************************************************************************************/ fsp_err_t R_ACMPLP_Open (comparator_ctrl_t * const p_ctrl, comparator_cfg_t const * const p_cfg) { @@ -123,6 +130,10 @@ fsp_err_t R_ACMPLP_Open (comparator_ctrl_t * const p_ctrl, comparator_cfg_t cons FSP_ASSERT(NULL != p_cfg); FSP_ASSERT(NULL != p_instance_ctrl); + /* Verify the control block has not already been initialized. */ + FSP_ERROR_RETURN(ACMPLP_OPEN != p_instance_ctrl->open, FSP_ERR_ALREADY_OPEN); + FSP_ERROR_RETURN(NULL == gp_acmplp_ctrl[p_cfg->channel], FSP_ERR_IN_USE); + /* COMPARATOR_FILTER_16 is not supported for this implementation. */ FSP_ERROR_RETURN(COMPARATOR_FILTER_16 != p_cfg->filter, FSP_ERR_INVALID_ARGUMENT); @@ -133,10 +144,24 @@ fsp_err_t R_ACMPLP_Open (comparator_ctrl_t * const p_ctrl, comparator_cfg_t cons FSP_ASSERT(NULL != p_cfg->p_callback); } - /* Verify the control block has not already been initialized. */ - FSP_ERROR_RETURN(ACMPLP_OPEN != p_instance_ctrl->open, FSP_ERR_ALREADY_OPEN); + #if ACMPLP_CFG_CH1_IVREF0_ENABLE + + /* If ACMPLP1 uses IVREF0 as a reference input, ACMPLP0 and ACMPLP1 must use the same reference input settings. */ + uint32_t alt_channel = (p_cfg->channel + 1U) % ACMPLP_CHANNELS; + if (NULL != gp_acmplp_ctrl[alt_channel]) + { + r_acmplp_extended_cfg_t const * p_extended_cfg = (r_acmplp_extended_cfg_t const *) p_cfg->p_extend; + r_acmplp_extended_cfg_t const * p_extended_cfg_alt = + (r_acmplp_extended_cfg_t const *) gp_acmplp_ctrl[alt_channel]->p_cfg->p_extend; + FSP_ERROR_RETURN(p_extended_cfg_alt->reference_voltage == p_extended_cfg->reference_voltage, + FSP_ERR_INVALID_ARGUMENT); + } + #endif #endif + /* Save ctrl instance. */ + gp_acmplp_ctrl[p_cfg->channel] = p_instance_ctrl; + /* Save the configuration */ p_instance_ctrl->p_cfg = p_cfg; @@ -307,8 +332,26 @@ fsp_err_t R_ACMPLP_Close (comparator_ctrl_t * p_ctrl) FSP_ERROR_RETURN(ACMPLP_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN); #endif - /* Mark driver as closed */ - p_instance_ctrl->open = 0U; + { + FSP_CRITICAL_SECTION_DEFINE; + FSP_CRITICAL_SECTION_ENTER; + + /* Stop the comparator and disable output to VCOUT. */ + if (0U == p_instance_ctrl->p_cfg->channel) + { + /* Clear the Operation enable and output enable for channel 0. */ + R_ACMPLP->COMPMDR_b.C0ENB = 0U; + R_ACMPLP->COMPOCR_b.C0OE = 0U; + } + else + { + /* Clear the Operation enable and output enable for channel 1. */ + R_ACMPLP->COMPMDR_b.C1ENB = 0U; + R_ACMPLP->COMPOCR_b.C1OE = 0U; + } + + FSP_CRITICAL_SECTION_EXIT; + } /* Disable interrupt. */ if (p_instance_ctrl->p_cfg->irq >= 0) @@ -317,23 +360,17 @@ fsp_err_t R_ACMPLP_Close (comparator_ctrl_t * p_ctrl) R_FSP_IsrContextSet(p_instance_ctrl->p_cfg->irq, NULL); } - /* Stop the comparator and disable output to VCOUT. */ - FSP_CRITICAL_SECTION_DEFINE; - FSP_CRITICAL_SECTION_ENTER; - - if (0U == p_instance_ctrl->p_cfg->channel) - { - /* Clear the Operation enable and output enable */ - R_ACMPLP->COMPMDR_b.C0ENB = 0U; - R_ACMPLP->COMPOCR_b.C0OE = 0U; - } - else + /* Check if the other channel is in use. */ + acmplp_instance_ctrl_t * alt_channel = gp_acmplp_ctrl[!p_instance_ctrl->p_cfg->channel]; + if (NULL == alt_channel) { - R_ACMPLP->COMPMDR_b.C1ENB = 0U; - R_ACMPLP->COMPOCR_b.C1OE = 0U; + /* No other channels open. */ + R_BSP_MODULE_STOP(FSP_IP_ACMPLP, 0); } - FSP_CRITICAL_SECTION_EXIT; + /* Mark driver as closed */ + p_instance_ctrl->open = 0U; + gp_acmplp_ctrl[p_instance_ctrl->p_cfg->channel] = NULL; return FSP_SUCCESS; } @@ -489,18 +526,28 @@ static void acmplp_hardware_initialize (acmplp_instance_ctrl_t * const p_instanc R_ACMPLP->COMPMDR = temp_reg; #if BSP_FEATURE_ACMPLP_HAS_COMPSEL_REGISTERS + + /* Read the current state of COMPSEL1. */ + temp_reg = R_ACMPLP->COMPSEL1; #if (ACMPLP_CFG_CH1_IVREF0_ENABLE) - temp_reg = (uint8_t) (p_extend->reference_voltage); // IVREF0 + + /* If channel 0 is not open, then set the voltage reference for channel 0. */ + if (NULL == gp_acmplp_ctrl[0]) + { + temp_reg &= (uint8_t) (~R_ACMPLP_COMPSEL1_IVREF0_Msk); + temp_reg |= (uint8_t) (p_extend->reference_voltage); // IVREF0 + } + #else /* Configure the reference voltage to the comparator and Reference Voltage Selection 2 for channel 1 */ - temp_reg = (uint8_t) 1 << R_ACMPLP_COMPSEL1_C1VRF2_Pos; + temp_reg |= (uint8_t) 1 << R_ACMPLP_COMPSEL1_C1VRF2_Pos; + temp_reg &= (uint8_t) (~R_ACMPLP_COMPSEL1_IVREF1_Msk); temp_reg |= (uint8_t) (p_extend->reference_voltage << R_ACMPLP_COMPSEL1_IVREF1_Pos); // IVREF1 #endif - /* Retain CRVS for channel 0 and update CRVS for channel 1 */ - compsel1 |= temp_reg; - R_ACMPLP->COMPSEL1 = compsel1; + /* Write settings to COMPSEL1. */ + R_ACMPLP->COMPSEL1 = temp_reg; #endif /* Enable the comparator. */ diff --git a/ra/fsp/src/r_adc/r_adc.c b/ra/fsp/src/r_adc/r_adc.c index 8c53e2351..0d239692b 100644 --- a/ra/fsp/src/r_adc/r_adc.c +++ b/ra/fsp/src/r_adc/r_adc.c @@ -78,6 +78,8 @@ #define ADC_PRV_TSCR_TSN_ENABLE (R_TSN_CTRL_TSCR_TSEN_Msk | R_TSN_CTRL_TSCR_TSOE_Msk) +#define ADC_PRV_TSN_CALIBRATION_TSCDR_BITS (0x00000FFFU) + /*********************************************************************************************************************** * Typedef definitions **********************************************************************************************************************/ @@ -574,6 +576,14 @@ fsp_err_t R_ADC_InfoGet (adc_ctrl_t * p_ctrl, adc_info_t * p_adc_info) /* If calibration register is available, retrieve it from the MCU */ #if BSP_FEATURE_ADC_TSN_CALIBRATION_AVAILABLE + #if BSP_FEATURE_ADC_TSN_CALIBRATION32_AVAILABLE + + /* Read into memory. */ + uint32_t data = R_TSN_CAL->TSCDR; + + /* Read the calibration data from ROM and AND it to mask off 12bit of calibration data. */ + p_adc_info->calibration_data = (data & ADC_PRV_TSN_CALIBRATION_TSCDR_BITS); + #else /* Read into memory to prevent compiler warning when performing "|" on volatile register data. */ uint32_t high = R_TSN->TSCDRH; @@ -581,6 +591,7 @@ fsp_err_t R_ADC_InfoGet (adc_ctrl_t * p_ctrl, adc_info_t * p_adc_info) /* Read the calibration data from ROM and shift to fit into result variable. */ p_adc_info->calibration_data = ((high << 8) | low); + #endif #endif /* Provide the previously retrieved slope information */ @@ -631,6 +642,13 @@ fsp_err_t R_ADC_Close (adc_ctrl_t * p_ctrl) * "Available Functions and Register Settings of AN000 to AN002, AN007, AN100 to AN102, and AN107" in the RA6M3 * manual R01UH0886EJ0100. */ p_instance_ctrl->p_reg->ADSHCR = 0U; + +#if BSP_FEATURE_ADC_HAS_VREFAMPCNT + + /* If VREFADC is selected as the high-potential reference voltage revert it to reduce power consumption. */ + p_instance_ctrl->p_reg->VREFAMPCNT = 0U; +#endif + R_BSP_MODULE_STOP(FSP_IP_ADC, p_instance_ctrl->p_cfg->unit); /* Return the error code */ diff --git a/ra/fsp/src/r_crc/r_crc.c b/ra/fsp/src/r_crc/r_crc.c index 39ceb98e1..4976a6e72 100644 --- a/ra/fsp/src/r_crc/r_crc.c +++ b/ra/fsp/src/r_crc/r_crc.c @@ -328,8 +328,8 @@ static void crc_seed_value_update (crc_instance_ctrl_t * const p_instance_ctrl, { /* CRC seed is masked to use only the lower 8 bits*/ /* Set the starting 8-bit CRC Calculated value */ - crcdor |= (uint32_t) (R_CRC_CRCDOR_BY_CRCDOR_BY_Msk & crc_seed); - R_CRC->CRCDOR = crcdor; + crcdor |= (uint32_t) (R_CRC_CRCDOR_BY_CRCDOR_BY_Msk & crc_seed); + R_CRC->CRCDOR_BY = (uint8_t) crcdor; break; } @@ -338,8 +338,8 @@ static void crc_seed_value_update (crc_instance_ctrl_t * const p_instance_ctrl, { /* CRC seed is masked to use only the lower 16 bits*/ /* Set the starting 16-bit CRC Calculated value. */ - crcdor |= (uint32_t) (R_CRC_CRCDOR_HA_CRCDOR_HA_Msk & crc_seed); - R_CRC->CRCDOR = crcdor; + crcdor |= (uint32_t) (R_CRC_CRCDOR_HA_CRCDOR_HA_Msk & crc_seed); + R_CRC->CRCDOR_HA = (uint16_t) crcdor; break; } diff --git a/ra/fsp/src/r_flash_hp/r_flash_hp.c b/ra/fsp/src/r_flash_hp/r_flash_hp.c index 30571e88a..2d5c68e2b 100644 --- a/ra/fsp/src/r_flash_hp/r_flash_hp.c +++ b/ra/fsp/src/r_flash_hp/r_flash_hp.c @@ -530,9 +530,11 @@ fsp_err_t R_FLASH_HP_Erase (flash_ctrl_t * const p_api_ctrl, uint32_t const addr } #if (FLASH_HP_CFG_PARAM_CHECKING_ENABLE == 1) - uint32_t num_bytes = (region0_blocks * BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE) + - ((num_blocks - region0_blocks) * BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE); - + uint32_t num_bytes = (region0_blocks * BSP_FEATURE_FLASH_HP_CF_REGION0_BLOCK_SIZE); + if (num_blocks > region0_blocks) + { + num_bytes += ((num_blocks - region0_blocks) * BSP_FEATURE_FLASH_HP_CF_REGION1_BLOCK_SIZE); + } FSP_ERROR_RETURN(start_address + num_bytes <= BSP_ROM_SIZE_BYTES, FSP_ERR_INVALID_BLOCKS); #endif @@ -2167,6 +2169,8 @@ void fcu_fiferr_isr (void) flash_hp_instance_ctrl_t * p_ctrl = (flash_hp_instance_ctrl_t *) R_FSP_IsrContextGet(irq); + cb_data.p_context = p_ctrl->p_cfg->p_context; + uint32_t fastat = R_FACI_HP->FASTAT; uint32_t fstatr_errors = R_FACI_HP->FSTATR & FLASH_HP_FSTATR_ERROR_MASK; @@ -2230,6 +2234,8 @@ void fcu_frdyi_isr (void) flash_hp_instance_ctrl_t * p_ctrl = (flash_hp_instance_ctrl_t *) R_FSP_IsrContextGet(irq); + cb_data.p_context = p_ctrl->p_cfg->p_context; + /* Clear the Interrupt Request*/ R_BSP_IrqStatusClear(irq); diff --git a/ra/fsp/src/r_flash_lp/r_flash_lp.c b/ra/fsp/src/r_flash_lp/r_flash_lp.c index 2f027e1c6..32fb1387c 100644 --- a/ra/fsp/src/r_flash_lp/r_flash_lp.c +++ b/ra/fsp/src/r_flash_lp/r_flash_lp.c @@ -121,9 +121,9 @@ #define FLASH_LP_MAX_WRITE_CF_TIME_US (1411) #define FLASH_LP_MAX_WRITE_DF_TIME_US (886) #define FLASH_LP_MAX_BLANK_CHECK_TIME_US (88) -#define FLASH_LP_MAX_ERASE_CF_BLOCK_TIME_US (289000) -#define FLASH_LP_MAX_ERASE_DF_BLOCK_TIME_US (299000) -#define FLASH_LP_MAX_WRITE_EXTRA_AREA_TIME_US (592000) +#define FLASH_LP_MAX_ERASE_CF_BLOCK_TIME_US (355000) +#define FLASH_LP_MAX_ERASE_DF_BLOCK_TIME_US (354000) +#define FLASH_LP_MAX_WRITE_EXTRA_AREA_TIME_US (2289000) #define FLASH_LP_FSTATR2_ILLEGAL_ERROR_BITS (0x10) #define FLASH_LP_FSTATR2_ERASE_ERROR_BITS (0x11) @@ -411,8 +411,8 @@ fsp_err_t R_FLASH_LP_Open (flash_ctrl_t * const p_api_ctrl, flash_cfg_t const * /* If null pointers return error. */ #if (FLASH_LP_CFG_PARAM_CHECKING_ENABLE) - FSP_ASSERT(p_cfg); - FSP_ASSERT(p_ctrl); + FSP_ASSERT(NULL != p_cfg); + FSP_ASSERT(NULL != p_ctrl); /* If open return error. */ FSP_ERROR_RETURN((FLASH_HP_OPEN != p_ctrl->opened), FSP_ERR_ALREADY_OPEN); @@ -421,7 +421,7 @@ fsp_err_t R_FLASH_LP_Open (flash_ctrl_t * const p_api_ctrl, flash_cfg_t const * if (p_cfg->data_flash_bgo) { FSP_ERROR_RETURN(p_cfg->irq >= (IRQn_Type) 0, FSP_ERR_IRQ_BSP_DISABLED); - FSP_ASSERT(p_cfg->p_callback); + FSP_ASSERT(NULL != p_cfg->p_callback); } #endif @@ -680,10 +680,10 @@ fsp_err_t R_FLASH_LP_StatusGet (flash_ctrl_t * const p_api_ctrl, flash_status_t flash_lp_instance_ctrl_t * p_ctrl = (flash_lp_instance_ctrl_t *) p_api_ctrl; /* If null control block return error. */ - FSP_ASSERT(p_ctrl); + FSP_ASSERT(NULL != p_ctrl); /* If null status pointer return error. */ - FSP_ASSERT(p_status); + FSP_ASSERT(NULL != p_status); /* If control block is not open return error. */ FSP_ERROR_RETURN((FLASH_HP_OPEN == p_ctrl->opened), FSP_ERR_NOT_OPEN); @@ -874,7 +874,7 @@ fsp_err_t R_FLASH_LP_Reset (flash_ctrl_t * const p_api_ctrl) #if (FLASH_LP_CFG_PARAM_CHECKING_ENABLE) /* If null control block return error. */ - FSP_ASSERT(p_ctrl); + FSP_ASSERT(NULL != p_ctrl); /* If control block is not open return error. */ FSP_ERROR_RETURN((FLASH_HP_OPEN == p_ctrl->opened), FSP_ERR_NOT_OPEN); @@ -986,13 +986,12 @@ fsp_err_t R_FLASH_LP_InfoGet (flash_ctrl_t * const p_api_ctrl, flash_info_t * co flash_lp_instance_ctrl_t * p_ctrl = (flash_lp_instance_ctrl_t *) p_api_ctrl; /* If null control block return error. */ - FSP_ASSERT(p_ctrl); + FSP_ASSERT(NULL != p_ctrl); /* If control block is not open return error. */ FSP_ERROR_RETURN((FLASH_HP_OPEN == p_ctrl->opened), FSP_ERR_NOT_OPEN); - // todo add back the NULL != - FSP_ASSERT(p_info); + FSP_ASSERT(NULL != p_info); #else FSP_PARAMETER_NOT_USED(p_api_ctrl); #endif @@ -1047,7 +1046,7 @@ fsp_err_t R_FLASH_LP_VersionGet (fsp_version_t * const p_version) #if FLASH_LP_CFG_PARAM_CHECKING_ENABLE /* If null pointer return error. */ - FSP_ASSERT(p_version); + FSP_ASSERT(NULL != p_version); #endif /* Return the version id of the flash lp module. */ @@ -1065,7 +1064,7 @@ fsp_err_t R_FLASH_LP_VersionGet (fsp_version_t * const p_version) * current FCLK frequency. * @param p_ctrl The p control * @retval FSP_SUCCESS Success - * @retval FSP_ERR_FCLK FCLK must be >= 4 MHz. + * @retval FSP_ERR_FCLK FCLK must be 1 MHz, 2 MHz, 3 MHz or a minimum of 4 MHz. **********************************************************************************************************************/ static fsp_err_t r_flash_lp_setup (flash_lp_instance_ctrl_t * p_ctrl) { @@ -1074,8 +1073,14 @@ static fsp_err_t r_flash_lp_setup (flash_lp_instance_ctrl_t * p_ctrl) /* Get the frequency of the clock driving the flash. */ p_ctrl->flash_clock_frequency = R_FSP_SystemClockHzGet(BSP_FEATURE_FLASH_LP_FLASH_CLOCK_SRC); - /* FCLK must be a minimum of 4 MHz for Flash operations. If not return error. */ - FSP_ERROR_RETURN(p_ctrl->flash_clock_frequency >= FLASH_HP_MINIMUM_SUPPORTED_FCLK_FREQ, FSP_ERR_FCLK); + /* FCLK must be 1 MHz, 2 MHz, 3 MHz or a minimum of 4 MHz for Flash operations. If not return error. */ + if (p_ctrl->flash_clock_frequency < FLASH_HP_MINIMUM_SUPPORTED_FCLK_FREQ) + { + FSP_ERROR_RETURN((p_ctrl->flash_clock_frequency == (1 * FLASH_LP_HZ_IN_MHZ)) || + (p_ctrl->flash_clock_frequency == (2 * FLASH_LP_HZ_IN_MHZ)) || + (p_ctrl->flash_clock_frequency == (3 * FLASH_LP_HZ_IN_MHZ)), + FSP_ERR_FCLK); + } /* Get the frequency of the system clock. */ p_ctrl->system_clock_frequency = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_ICLK); @@ -1174,7 +1179,7 @@ static fsp_err_t r_flash_lp_write_read_bc_parameter_checking (flash_lp_instance_ static fsp_err_t r_flash_lp_common_parameter_checking (flash_lp_instance_ctrl_t * const p_ctrl) { /* If null control block return error. */ - FSP_ASSERT(p_ctrl); + FSP_ASSERT(NULL != p_ctrl); /* If control block is not open return error. */ FSP_ERROR_RETURN((FLASH_HP_OPEN == p_ctrl->opened), FSP_ERR_NOT_OPEN); @@ -1981,6 +1986,8 @@ void fcu_frdyi_isr (void) if (NULL != p_ctrl->p_cfg->p_callback) { + cb_data.p_context = p_ctrl->p_cfg->p_context; + /* Set data to identify callback to user, then call user callback. */ p_ctrl->p_cfg->p_callback(&cb_data); } diff --git a/ra/fsp/src/r_iic_master/r_iic_master.c b/ra/fsp/src/r_iic_master/r_iic_master.c index 1d706102b..2eb7b2a32 100644 --- a/ra/fsp/src/r_iic_master/r_iic_master.c +++ b/ra/fsp/src/r_iic_master/r_iic_master.c @@ -81,7 +81,7 @@ (TRANSFER_IRQ_END << TRANSFER_SETTINGS_IRQ_BITS) | \ (TRANSFER_ADDR_MODE_FIXED << TRANSFER_SETTINGS_DEST_ADDR_BITS)) #define IIC_MASTER_FUNCTION_ENABLE_REG_VAL (0x02U) -#define IIC_MASTER_INTERRUPT_ENABLE_INIT_MASK (0xBFU) +#define IIC_MASTER_INTERRUPT_ENABLE_INIT_MASK (0xB3U) #define IIC_MASTER_FUNCTION_ENABLE_INIT_SETTINGS (0x77U) #define IIC_MASTER_STATUS_REGISTER_2_ERR_MASK (0x1FU) #define IIC_MASTER_BUS_MODE_REGISTER_1_MASK (0x08U) @@ -631,12 +631,6 @@ static void iic_master_abort_seq_master (iic_master_instance_ctrl_t * const p_ct /* Reset */ p_ctrl->p_reg->ICCR1 = (uint8_t) (IIC_MASTER_ICCR1_ICE_BIT_MASK | IIC_MASTER_PRV_SCL_SDA_NOT_DRIVEN); - - /* Enable Interrupts: TMOIE, ALIE, STIE, SPIE, NAKIE, RIE, TIE. - * Disable Interrupt: TEIE - * (see Section 36.2.8 'I2C Bus Interrupt Enable Register (ICIER)' of the RA6M3 manual R01UH0886EJ0100). - */ - p_ctrl->p_reg->ICIER = IIC_MASTER_INTERRUPT_ENABLE_INIT_MASK; } /* Update the transfer descriptor to show no longer in-progress and an error */ @@ -647,6 +641,12 @@ static void iic_master_abort_seq_master (iic_master_instance_ctrl_t * const p_ct p_ctrl->loaded = p_ctrl->total; p_ctrl->restarted = false; } + + /* Enable Interrupts: TMOIE, ALIE, NAKIE, RIE, TIE. + * Disable Interrupt: TEIE, STIE, SPIE + * (see Section 36.2.8 'I2C Bus Interrupt Enable Register (ICIER)' of the RA6M3 manual R01UH0886EJ0100). + */ + p_ctrl->p_reg->ICIER = IIC_MASTER_INTERRUPT_ENABLE_INIT_MASK; } /*******************************************************************************************************************//** @@ -716,8 +716,8 @@ static void iic_master_open_hw_master (iic_master_instance_ctrl_t * const p_ctrl /* Ensure the HW is in master mode and does not behave as a slave to another master on the same channel. */ p_ctrl->p_reg->ICSER = 0x00; - /* Enable Interrupts: TMOIE, ALIE, STIE, SPIE, NAKIE, RIE, TIE. - * Disable Interrupt: TEIE + /* Enable Interrupts: TMOIE, ALIE, NAKIE, RIE, TIE. + * Disable Interrupt: TEIE, STIE, SPIE * (see Section 36.2.8 'I2C Bus Interrupt Enable Register (ICIER)' of the RA6M3 manual R01UH0886EJ0100). */ p_ctrl->p_reg->ICIER = IIC_MASTER_INTERRUPT_ENABLE_INIT_MASK; @@ -817,6 +817,10 @@ static fsp_err_t iic_master_run_hw_master (iic_master_instance_ctrl_t * const p_ */ NVIC_EnableIRQ(p_ctrl->p_cfg->txi_irq); + /* Enable SPIE to detect unexpected STOP condition. This is disabled between communication events as it can lead + * to undesired interrupts in multi-master setups. */ + p_ctrl->p_reg->ICIER = IIC_MASTER_INTERRUPT_ENABLE_INIT_MASK | R_IIC0_ICIER_STIE_Msk | R_IIC0_ICIER_SPIE_Msk; + /* If previous transaction did not end with restart, send a start condition */ if (!p_ctrl->restarted) { @@ -1124,6 +1128,9 @@ static void iic_master_err_master (iic_master_instance_ctrl_t * p_ctrl) { /* Get the correct event to notify the user */ event = (p_ctrl->read) ? I2C_MASTER_EVENT_RX_COMPLETE : I2C_MASTER_EVENT_TX_COMPLETE; + + /* Disable STIE/SPIE to prevent errant interrupts in multi-master scenarios */ + p_ctrl->p_reg->ICIER = IIC_MASTER_INTERRUPT_ENABLE_INIT_MASK; } else if ((errs_events & (uint8_t) IIC_MASTER_ERR_EVENT_STOP)) { diff --git a/ra/fsp/src/r_usb_basic/r_usb_basic.c b/ra/fsp/src/r_usb_basic/r_usb_basic.c index 3bd623fb2..7ec65e953 100644 --- a/ra/fsp/src/r_usb_basic/r_usb_basic.c +++ b/ra/fsp/src/r_usb_basic/r_usb_basic.c @@ -82,7 +82,7 @@ uint16_t g_usb_change_device_state[USB_NUM_USBIP]; #else /*(BSP_CFG_RTOS == 0)*/ #include "src/driver/inc/r_usb_cstd_rtos.h" usb_instance_ctrl_t g_usb_cstd_event[USB_EVENT_MAX]; -usb_callback_t * g_usb_apl_callback; +usb_callback_t * g_usb_apl_callback[USB_NUM_USBIP]; #endif /*(BSP_CFG_RTOS == 0)*/ @@ -96,7 +96,7 @@ usb_utr_t g_usb_pdata[USB_MAXPIPE_NUM + 1]; #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ -volatile uint16_t g_usb_usbmode; +volatile uint16_t g_usb_usbmode[USB_NUM_USBIP]; volatile uint16_t g_usb_open_class[USB_NUM_USBIP]; /****************************************************************************** @@ -277,8 +277,8 @@ fsp_err_t R_USB_Callback (usb_callback_t * p_callback) #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(p_callback) #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ - g_usb_apl_callback = p_callback; - err = FSP_SUCCESS; + g_usb_apl_callback[0] = p_callback; + err = FSP_SUCCESS; #else /* (BSP_CFG_RTOS == 2) */ FSP_PARAMETER_NOT_USED(*p_callback); err = FSP_ERR_USB_FAILED; @@ -306,9 +306,12 @@ fsp_err_t R_USB_Open (usb_ctrl_t * const p_api_ctrl, usb_cfg_t const * const p_c #endif #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) usb_utr_t utr; -#elif defined(BSP_MCU_GROUP_RA6M3) /* #if ( (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST ) */ +#endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ +#if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) + #if defined(BSP_MCU_GROUP_RA6M3) usb_utr_t hse_utr; -#endif + #endif /* BSP_MCU_GROUP_RA6M3 */ +#endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ usb_instance_ctrl_t * p_ctrl = (usb_instance_ctrl_t *) p_api_ctrl; @@ -321,7 +324,7 @@ fsp_err_t R_USB_Open (usb_ctrl_t * const p_api_ctrl, usb_cfg_t const * const p_c p_ctrl->type = (usb_class_t) (p_cfg->type & USB_VALUE_7FH); p_ctrl->p_context = (void *) p_cfg->p_context; #if (BSP_CFG_RTOS == 2) - g_usb_apl_callback = p_cfg->p_usb_apl_callback; + g_usb_apl_callback[p_ctrl->module_number] = p_cfg->p_usb_apl_callback; #endif #if USB_CFG_PARAM_CHECKING_ENABLE @@ -406,14 +409,31 @@ fsp_err_t R_USB_Open (usb_ctrl_t * const p_api_ctrl, usb_cfg_t const * const p_c } #if (USB_CFG_DMA == USB_CFG_ENABLE) + if (USB_IP0 == p_cfg->module_number) + { + if (0 != p_ctrl->p_transfer_tx) + { + R_DMAC_Open(p_ctrl->p_transfer_tx->p_ctrl, p_ctrl->p_transfer_tx->p_cfg); + } - /* DMA Setting */ - #if (0 != USB_DEST_ADDRESS) - R_DMAC_Open(p_ctrl->p_transfer_tx->p_ctrl, p_ctrl->p_transfer_tx->p_cfg); - #endif - #if (0 != USB_SRC_ADDRESS) - R_DMAC_Open(p_ctrl->p_transfer_rx->p_ctrl, p_ctrl->p_transfer_rx->p_cfg); - #endif + if (0 != p_ctrl->p_transfer_rx) + { + R_DMAC_Open(p_ctrl->p_transfer_rx->p_ctrl, p_ctrl->p_transfer_rx->p_cfg); + } + } + + if (USB_IP1 == p_cfg->module_number) + { + if (0 != p_ctrl->p_transfer_tx) + { + R_DMAC_Open(p_ctrl->p_transfer_tx->p_ctrl, p_ctrl->p_transfer_tx->p_cfg); + } + + if (0 != p_ctrl->p_transfer_rx) + { + R_DMAC_Open(p_ctrl->p_transfer_rx->p_ctrl, p_ctrl->p_transfer_rx->p_cfg); + } + } #endif #if (BSP_CFG_RTOS == 2) @@ -455,7 +475,7 @@ fsp_err_t R_USB_Open (usb_ctrl_t * const p_api_ctrl, usb_cfg_t const * const p_c if (USB_MODE_HOST == p_cfg->usb_mode) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - g_usb_usbmode = USB_MODE_HOST; + g_usb_usbmode[p_ctrl->module_number] = USB_MODE_HOST; utr.ip = p_ctrl->module_number; utr.ipp = usb_hstd_get_usb_ip_adr((uint16_t) p_ctrl->module_number); /* Get the USB IP base address. */ @@ -493,7 +513,7 @@ fsp_err_t R_USB_Open (usb_ctrl_t * const p_api_ctrl, usb_cfg_t const * const p_c else { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - g_usb_usbmode = USB_MODE_PERI; + g_usb_usbmode[p_ctrl->module_number] = USB_MODE_PERI; #if defined(USB_CFG_PMSC_USE) err = r_usb_pmsc_media_initialize(p_cfg->p_context); /* Register the media device driver. */ @@ -597,7 +617,7 @@ fsp_err_t R_USB_Close (usb_ctrl_t * const p_api_ctrl) FSP_ERROR_RETURN(USB_IP1 != p_ctrl->module_number, FSP_ERR_USB_PARAMETER) #endif /* #if defined(BSP_BOARD_GROUP_RA2A1) */ - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) switch ((usb_class_internal_t) p_ctrl->type) @@ -641,7 +661,7 @@ fsp_err_t R_USB_Close (usb_ctrl_t * const p_api_ctrl) { is_init[p_ctrl->module_number] = USB_NO; - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) utr.ip = p_ctrl->module_number; @@ -695,16 +715,15 @@ fsp_err_t R_USB_Close (usb_ctrl_t * const p_api_ctrl) #if defined(USB_CFG_PMSC_USE) ret_code = r_usb_pmsc_media_close(); #endif /* defined(USB_CFG_PMSC_USE) */ +#if (BSP_CFG_RTOS == 2) + usb_rtos_delete(); +#endif } else { ret_code = FSP_ERR_USB_NOT_OPEN; } -#if (BSP_CFG_RTOS == 2) - usb_rtos_delete(); -#endif - return ret_code; } @@ -748,28 +767,40 @@ fsp_err_t R_USB_Read (usb_ctrl_t * const p_api_ctrl, uint8_t * p_buf, uint32_t s #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(USB_NULL != p_api_ctrl) + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - FSP_ERROR_RETURN(USB_CLASS_END > destination, FSP_ERR_USB_PARAMETER) - #elif ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - FSP_ASSERT(destination) - FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(USB_CLASS_END > destination, FSP_ERR_USB_PARAMETER) #endif /* #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) */ + } + else + { + #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) + FSP_ASSERT(destination) + FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + #endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ + } #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - p_ctrl->type = (usb_class_t) (destination & USB_VALUE_7FH); -#elif ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - p_ctrl->device_address = destination; -#endif /* USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ + p_ctrl->type = (usb_class_t) (destination & USB_VALUE_7FH); +#endif /* #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) */ + } + else + { +#if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) + p_ctrl->device_address = destination; +#endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ + } #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(!(((USB_NULL == p_buf)) || (USB_NULL == size))) FSP_ERROR_RETURN((((uint32_t) p_buf & 0x03) == 0), FSP_ERR_USB_PARAMETER) /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) #if defined(BSP_BOARD_GROUP_RA2A1) FSP_ERROR_RETURN(USB_IP1 != p_ctrl->module_number, FSP_ERR_USB_PARAMETER) @@ -848,28 +879,40 @@ fsp_err_t R_USB_Write (usb_ctrl_t * const p_api_ctrl, uint8_t const * const p_bu #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(USB_NULL != p_api_ctrl) + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - FSP_ERROR_RETURN(USB_CLASS_END > destination, FSP_ERR_USB_PARAMETER) - #elif ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - FSP_ASSERT(destination) - FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(USB_CLASS_END > destination, FSP_ERR_USB_PARAMETER) #endif /* #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) */ + } + else + { + #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) + FSP_ASSERT(destination) + FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + #endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ + } #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - p_ctrl->type = (usb_class_t) (destination & USB_VALUE_7FH); -#elif ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - p_ctrl->device_address = destination; + p_ctrl->type = (usb_class_t) (destination & USB_VALUE_7FH); #endif /* USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ + } + else + { +#if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) + p_ctrl->device_address = destination; +#endif /* USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ + } #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(!((USB_NULL == p_buf) && (0 != size))) FSP_ERROR_RETURN((((uint32_t) p_buf & 0x03) == 0), FSP_ERR_USB_PARAMETER) /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) #if defined(BSP_BOARD_GROUP_RA2A1) FSP_ERROR_RETURN(USB_IP1 != p_ctrl->module_number, FSP_ERR_USB_PARAMETER) @@ -930,33 +973,46 @@ fsp_err_t R_USB_Stop (usb_ctrl_t * const p_api_ctrl, usb_transfer_t direction, u usb_info_t info; usb_er_t err; fsp_err_t result = FSP_ERR_USB_FAILED; + info.device_status = 0; usb_instance_ctrl_t * p_ctrl = (usb_instance_ctrl_t *) p_api_ctrl; #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(USB_NULL != p_api_ctrl) + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - FSP_ERROR_RETURN(USB_CLASS_END > destination, FSP_ERR_USB_PARAMETER) - #elif ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - FSP_ASSERT(destination) - FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(USB_CLASS_END > destination, FSP_ERR_USB_PARAMETER) #endif /* #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) */ + } + else + { + #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) + FSP_ASSERT(destination) + FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + #endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ + } #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - p_ctrl->type = (usb_class_t) (destination & USB_VALUE_7FH); -#elif ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - p_ctrl->device_address = destination; + p_ctrl->type = (usb_class_t) (destination & USB_VALUE_7FH); #endif /* USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ + } + else + { +#if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) + p_ctrl->device_address = destination; +#endif /* USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ + } #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ERROR_RETURN(!((USB_TRANSFER_WRITE != direction) && (USB_TRANSFER_READ != direction)), FSP_ERR_USB_PARAMETER) /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) #if defined(BSP_BOARD_GROUP_RA2A1) FSP_ERROR_RETURN(USB_IP1 != p_ctrl->module_number, FSP_ERR_USB_PARAMETER) @@ -1031,7 +1087,7 @@ fsp_err_t R_USB_Suspend (usb_ctrl_t * const p_api_ctrl) usb_er_t err; #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ - FSP_ERROR_RETURN(USB_MODE_PERI != g_usb_usbmode, FSP_ERR_USB_FAILED) + FSP_ERROR_RETURN(USB_MODE_PERI != g_usb_usbmode[p_ctrl->module_number], FSP_ERR_USB_FAILED) #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(USB_NULL != p_api_ctrl) @@ -1143,62 +1199,61 @@ fsp_err_t R_USB_Resume (usb_ctrl_t * const p_api_ctrl) FSP_ERROR_RETURN(USB_IP1 != p_ctrl->module_number, FSP_ERR_USB_PARAMETER) #endif - FSP_ERROR_RETURN(USB_MODE_PERI != g_usb_usbmode, FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(USB_MODE_PERI != g_usb_usbmode[p_ctrl->module_number], FSP_ERR_USB_PARAMETER) #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ ret_code = R_USB_InfoGet(p_ctrl, &info, p_ctrl->device_address); FSP_ERROR_RETURN(USB_STATUS_SUSPEND == info.device_status, FSP_ERR_USB_NOT_SUSPEND) - if (USB_MODE_HOST == g_usb_usbmode) - { - utr.ip = p_ctrl->module_number; - utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); + #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) + utr.ip = p_ctrl->module_number; + utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); - #if (BSP_CFG_RTOS == 0) - if (USB_NULL != (g_usb_change_device_state[p_ctrl->module_number] & (1 << USB_STATUS_RESUME))) - { - return FSP_ERR_USB_BUSY; - } + #if (BSP_CFG_RTOS == 0) + if (USB_NULL != (g_usb_change_device_state[p_ctrl->module_number] & (1 << USB_STATUS_RESUME))) + { + return FSP_ERR_USB_BUSY; + } - err = usb_hstd_change_device_state(&utr, - (usb_cb_t) &usb_hstd_resume_complete, - USB_DO_GLOBAL_RESUME, - p_ctrl->device_address); - if (USB_OK == err) - { - g_usb_change_device_state[p_ctrl->module_number] |= (1 << USB_STATUS_RESUME); - } - else - { - ret_code = FSP_ERR_USB_FAILED; - } + err = usb_hstd_change_device_state(&utr, + (usb_cb_t) &usb_hstd_resume_complete, + USB_DO_GLOBAL_RESUME, + p_ctrl->device_address); + if (USB_OK == err) + { + g_usb_change_device_state[p_ctrl->module_number] |= (1 << USB_STATUS_RESUME); + } + else + { + ret_code = FSP_ERR_USB_FAILED; + } - #else /* (BSP_CFG_RTOS == 0) */ - if (USB_YES == g_usb_resume_ing[p_ctrl->module_number]) - { - ret_code = FSP_ERR_USB_BUSY; - } - else - { - g_usb_resume_ing[p_ctrl->module_number] = USB_YES; - } + #else /* (BSP_CFG_RTOS == 0) */ + if (USB_YES == g_usb_resume_ing[p_ctrl->module_number]) + { + ret_code = FSP_ERR_USB_BUSY; + } + else + { + g_usb_resume_ing[p_ctrl->module_number] = USB_YES; + } - if (FSP_ERR_USB_BUSY == ret_code) - { - return ret_code; - } + if (FSP_ERR_USB_BUSY == ret_code) + { + return ret_code; + } - err = usb_hstd_change_device_state(&utr, - (usb_cb_t) &usb_hstd_resume_complete, - USB_DO_GLOBAL_RESUME, - p_ctrl->device_address); - if (USB_OK != err) - { - ret_code = FSP_ERR_USB_FAILED; - } - g_usb_resume_ing[p_ctrl->module_number] = USB_NO; - #endif /* (BSP_CFG_RTOS == 0) */ + err = usb_hstd_change_device_state(&utr, + (usb_cb_t) &usb_hstd_resume_complete, + USB_DO_GLOBAL_RESUME, + p_ctrl->device_address); + if (USB_OK != err) + { + ret_code = FSP_ERR_USB_FAILED; } + g_usb_resume_ing[p_ctrl->module_number] = USB_NO; + #endif /* (BSP_CFG_RTOS == 0) */ + #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ return ret_code; #endif /* USB_CFG_MODE == USB_CFG_PERI */ } @@ -1226,7 +1281,7 @@ fsp_err_t R_USB_VbusSet (usb_ctrl_t * const p_api_ctrl, uint16_t state) #else usb_utr_t utr; - FSP_ERROR_RETURN(USB_MODE_PERI != g_usb_usbmode, FSP_ERR_USB_FAILED) + FSP_ERROR_RETURN(USB_MODE_PERI != g_usb_usbmode[p_ctrl->module_number], FSP_ERR_USB_FAILED) #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(USB_NULL != p_api_ctrl) @@ -1279,33 +1334,38 @@ fsp_err_t R_USB_InfoGet (usb_ctrl_t * const p_api_ctrl, usb_info_t * p_info, uin FSP_ASSERT(p_api_ctrl) FSP_ASSERT(p_info) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - FSP_ASSERT(destination) - FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + FSP_ASSERT(destination) + FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) #endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ + } /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) #if defined(BSP_BOARD_GROUP_RA2A1) FSP_ERROR_RETURN(USB_IP1 != p_ctrl->module_number, FSP_ERR_USB_PARAMETER) - #endif /* #if defined(BSP_BOARD_GROUP_RA2A1) */ -#else /* USB_CFG_PARAM_CHECKING_ENABLE */ + #endif /* #if defined(BSP_BOARD_GROUP_RA2A1) */ +#else /* USB_CFG_PARAM_CHECKING_ENABLE */ FSP_PARAMETER_NOT_USED(*p_ctrl); -#endif /* USB_CFG_PARAM_CHECKING_ENABLE */ +#endif /* USB_CFG_PARAM_CHECKING_ENABLE */ + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - p_ctrl->device_address = destination; -#endif /* ( (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST ) */ + p_ctrl->device_address = destination; +#endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ + } + p_info->device_status = USB_STATUS_DETACH; /* Initialized for warning measures. */ FSP_ERROR_RETURN(0 != g_usb_open_class[p_ctrl->module_number], FSP_ERR_USB_FAILED) utr.ip = p_ctrl->module_number; - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); @@ -1593,7 +1653,7 @@ fsp_err_t R_USB_PipeRead (usb_ctrl_t * const p_api_ctrl, uint8_t * p_buf, uint32 /* Argument Checking */ FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), + (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number])), FSP_ERR_USB_PARAMETER) FSP_ERROR_RETURN(USB_NULL != (g_usb_open_class[p_ctrl->module_number] & @@ -1605,7 +1665,7 @@ fsp_err_t R_USB_PipeRead (usb_ctrl_t * const p_api_ctrl, uint8_t * p_buf, uint32 if (USB_STATUS_CONFIGURED == info.device_status) { /* PIPE Transfer set */ - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if defined(USB_CFG_HVND_USE) #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) @@ -1725,31 +1785,25 @@ fsp_err_t R_USB_PipeWrite (usb_ctrl_t * const p_api_ctrl, uint8_t * p_buf, uint3 #if USB_CFG_PARAM_CHECKING_ENABLE /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) - FSP_ERROR_RETURN((((USB_NULL != p_buf) || (USB_PIPE0 != p_ctrl->pipe)) || - (USB_MAXPIPE_NUM > p_ctrl->pipe)), + FSP_ERROR_RETURN((((USB_NULL != p_buf) || (USB_PIPE0 != p_ctrl->pipe)) || (USB_MAXPIPE_NUM > p_ctrl->pipe)), FSP_ERR_USB_PARAMETER) - #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - if (USB_MODE_PERI == g_usb_usbmode) + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) { + #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) FSP_ASSERT((USB_NULL != p_buf) && (USB_NULL == size)) + #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ } - #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ - - FSP_ERROR_RETURN(USB_NULL == (g_usb_open_class[p_ctrl->module_number] & - (1 << p_ctrl->type)), - FSP_ERR_USB_PARAMETER) /* Check USB Open device class */ - #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ + FSP_ERROR_RETURN(USB_NULL == (g_usb_open_class[p_ctrl->module_number] & (1 << p_ctrl->type)), FSP_ERR_USB_PARAMETER) /* Check USB Open device class */ + #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ ret_code = R_USB_InfoGet(p_ctrl, &info); if (USB_STATUS_CONFIGURED == info.device_status) { /* PIPE Transfer set */ - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) #if defined(USB_CFG_HVND_USE) @@ -1850,7 +1904,7 @@ fsp_err_t R_USB_PipeStop (usb_ctrl_t * const p_api_ctrl, uint8_t pipe_number) usb_utr_t utr; utr.ip = p_ctrl->module_number; - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); } @@ -1860,23 +1914,19 @@ fsp_err_t R_USB_PipeStop (usb_ctrl_t * const p_api_ctrl, uint8_t pipe_number) #if USB_CFG_PARAM_CHECKING_ENABLE /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) FSP_ERROR_RETURN(USB_PIPE0 != p_ctrl->pipe, FSP_ERR_USB_PARAMETER) FSP_ERROR_RETURN(USB_MAXPIPE_NUM > p_ctrl->pipe, FSP_ERR_USB_PARAMETER) - FSP_ERROR_RETURN(USB_NULL != (g_usb_open_class[p_ctrl->module_number] & - (1 << p_ctrl->type)), - FSP_ERR_USB_PARAMETER) /* Check USB Open device class */ + FSP_ERROR_RETURN(USB_NULL != (g_usb_open_class[p_ctrl->module_number] & (1 << p_ctrl->type)), FSP_ERR_USB_PARAMETER) /* Check USB Open device class */ #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ err = R_USB_InfoGet(p_ctrl, &info); FSP_ERROR_RETURN(USB_STATUS_CONFIGURED == info.device_status, FSP_ERR_USB_FAILED) - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) err = usb_hstd_transfer_end(&utr, p_ctrl->pipe, (uint16_t) USB_DATA_STOP); @@ -1919,50 +1969,50 @@ fsp_err_t R_USB_UsedPipesGet (usb_ctrl_t * const p_api_ctrl, uint16_t * p_pipe, info.device_status = 0; FSP_PARAMETER_NOT_USED(*p_ctrl); -#if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - usb_utr_t utr; -#else /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ +#if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) FSP_PARAMETER_NOT_USED(destination); -#endif /* ( (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST ) */ +#endif /* ( (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST ) */ #if USB_CFG_PARAM_CHECKING_ENABLE FSP_ASSERT(!((USB_NULL == p_ctrl) || (USB_NULL == p_pipe))) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - FSP_ASSERT(destination) - FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) + FSP_ASSERT(destination) + FSP_ERROR_RETURN(USB_ADDRESS5 >= destination, FSP_ERR_USB_PARAMETER) #endif /* #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) */ + } /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) #if defined(BSP_BOARD_GROUP_RA2A1) FSP_ERROR_RETURN(USB_IP1 != p_ctrl->module_number, FSP_ERR_USB_PARAMETER) #endif /* defined(BSP_BOARD_GROUP_RA2A1) */ #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) + { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - utr.ip = p_ctrl->module_number; - utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); - p_ctrl->device_address = destination; + p_ctrl->device_address = destination; #endif /* ( (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST ) */ + } R_USB_InfoGet(p_ctrl, &info, p_ctrl->device_address); FSP_ERROR_RETURN(USB_STATUS_CONFIGURED == info.device_status, FSP_ERR_USB_FAILED) /* Get PIPE Number from Endpoint address */ * p_pipe = ((uint16_t) 1 << USB_PIPE0); - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) for (pipe_no = USB_MIN_PIPE_NO; pipe_no < (USB_MAX_PIPE_NO + 1); pipe_no++) { - if (USB_TRUE == g_usb_pipe_table[utr.ip][pipe_no].use_flag) + if (USB_TRUE == g_usb_pipe_table[p_ctrl->module_number][pipe_no].use_flag) { if ((((uint16_t) p_ctrl->device_address) << USB_DEVADDRBIT) == - (uint16_t) (g_usb_pipe_table[utr.ip][pipe_no].pipe_maxp & USB_DEVSEL)) + (uint16_t) (g_usb_pipe_table[p_ctrl->module_number][pipe_no].pipe_maxp & USB_DEVSEL)) { (*p_pipe) = (uint16_t) ((*p_pipe) | (uint16_t) 1 << pipe_no); } @@ -2019,29 +2069,28 @@ fsp_err_t R_USB_PipeInfoGet (usb_ctrl_t * const p_api_ctrl, usb_pipe_t * p_info, #if USB_CFG_PARAM_CHECKING_ENABLE /* Argument Checking */ - FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number) && - (USB_MODE_HOST == g_usb_usbmode)), - FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP0 != p_ctrl->module_number) && (USB_IP1 != p_ctrl->module_number)), FSP_ERR_USB_PARAMETER) FSP_ERROR_RETURN(!(USB_MAXPIPE_NUM < p_ctrl->pipe), FSP_ERR_USB_PARAMETER) #if defined(BSP_BOARD_GROUP_RA2A1) - FSP_ERROR_RETURN(!((USB_IP1 == p_ctrl->module_number) && (USB_MODE_HOST == g_usb_usbmode)), FSP_ERR_USB_PARAMETER) + FSP_ERROR_RETURN(!((USB_IP1 == p_ctrl->module_number) && (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number])), + FSP_ERR_USB_PARAMETER) #endif #endif /* USB_CFG_PARAM_CHECKING_ENABLE */ utr.ip = p_ctrl->module_number; -#if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { +#if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); - } #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ + } R_USB_InfoGet(p_ctrl, &info, p_ctrl->device_address); FSP_ERROR_RETURN(USB_STATUS_CONFIGURED == info.device_status, FSP_ERR_USB_FAILED) - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) p_info->endpoint = usb_hstd_pipe_to_epadr(&utr, p_ctrl->pipe); @@ -2157,9 +2206,9 @@ fsp_err_t R_USB_PullUp (usb_ctrl_t * const p_api_ctrl, uint8_t state) /* Argument Checking */ FSP_ERROR_RETURN(!((USB_ON != state) && (USB_OFF != state)), FSP_ERR_USB_PARAMETER) - #endif /* #if USB_CFG_PARAM_CHECKING_ENABLE */ + #endif /* #if USB_CFG_PARAM_CHECKING_ENABLE */ - FSP_ERROR_RETURN(!(USB_MODE_HOST == g_usb_usbmode), FSP_ERR_USB_FAILED) /* Support Peri only. */ + FSP_ERROR_RETURN(!(USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]), FSP_ERR_USB_FAILED) /* Support Peri only. */ hw_usb_pcontrol_dprpu(p_ctrl->module_number, state); diff --git a/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_basic_define.h b/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_basic_define.h index c573a22e2..750cee838 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_basic_define.h +++ b/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_basic_define.h @@ -46,7 +46,7 @@ #if (BSP_CFG_RTOS == 2) /* The buffer size of interrupt info is increased to avoid overlapping interrupt events. */ - #define USB_INT_BUFSIZE (64U) /* Size of Interrupt info buffer */ + #define USB_INT_BUFSIZE (32U) /* Size of Interrupt info buffer */ #else /* #if (BSP_CFG_RTOS == 2) */ #define USB_INT_BUFSIZE (10U) /* Size of Interrupt info buffer */ #endif /* #if (BSP_CFG_RTOS == 2) */ diff --git a/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_extern.h b/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_extern.h index bc4f277e6..ee896b2a8 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_extern.h +++ b/ra/fsp/src/r_usb_basic/src/driver/inc/r_usb_extern.h @@ -56,6 +56,9 @@ extern uint16_t g_usb_hstd_ignore_cnt[][USB_MAX_PIPE_NO + 1U]; /* Ignor extern usb_hcdreg_t g_usb_hstd_device_drv[][USB_MAXDEVADDR + 1U]; /* Device driver (registration) */ extern volatile uint16_t g_usb_hstd_device_info[][USB_MAXDEVADDR + 1U][8U]; extern usb_ctrl_trans_t g_usb_ctrl_request[USB_NUM_USBIP][USB_MAXDEVADDR + 1]; + #if (BSP_CFG_RTOS == 2) +extern usb_hdl_t g_usb_hstd_sus_res_task_id[]; + #endif /* #if (BSP_CFG_RTOS == 2) */ /* port status, config num, interface class, speed, */ extern uint16_t g_usb_hstd_remort_port[]; @@ -113,11 +116,13 @@ extern uint16_t g_usb_pstd_remote_wakeup; /* Remote Wak extern uint16_t g_usb_pstd_remote_wakeup_state; /* Result for Remote wake up */ /* r_usb.c */ -extern volatile uint16_t g_usb_usbmode; /* USB mode HOST/PERI */ + +extern volatile uint16_t g_usb_usbmode[USB_NUM_USBIP]; /* USB mode HOST/PERI */ + #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) extern usb_utr_t g_usb_hdata[USB_NUM_USBIP][USB_MAXPIPE_NUM + 1]; -#endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ +#endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) extern usb_utr_t g_usb_pdata[USB_MAXPIPE_NUM + 1]; @@ -144,7 +149,7 @@ extern uint16_t g_usb_hstd_use_pipe[]; extern SemaphoreHandle_t g_usb_semaphore_hdl[]; extern usb_utr_t * get_usb_int_buf(void); -extern usb_callback_t * g_usb_apl_callback; +extern usb_callback_t * g_usb_apl_callback[USB_NUM_USBIP]; #endif /*#if (BSP_CFG_RTOS == 2)*/ /* r_usb_pbc.c */ @@ -201,8 +206,6 @@ usb_er_t usb_data_stop(usb_instance_ctrl_t * p_ctrl, usb_transfer_t type); usb_er_t usb_ctrl_stop(usb_instance_ctrl_t * p_ctrl); void usb_cstd_debug_hook(uint16_t error_code); -uint16_t usb_cstd_get_pipe_buf_value(uint16_t pipe_no); - #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) usb_er_t usb_pstd_transfer_start(usb_utr_t * ptr); usb_er_t usb_pstd_transfer_end(usb_utr_t * p_utr, uint16_t pipe); @@ -210,6 +213,11 @@ void usb_pstd_change_device_state(uint16_t state, uint16_t keyword, usb_cb_t void usb_pstd_driver_registration(usb_pcdreg_t * registinfo); void usb_pstd_driver_release(void); + #if defined(BSP_MCU_GROUP_RA6M3) +uint16_t usb_pstd_get_pipe_buf_value(uint16_t pipe_no); + + #endif /* defined(BSP_MCU_GROUP_RA6M3) */ + #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) @@ -236,6 +244,11 @@ uint8_t usb_hstd_make_pipe_reg_info(uint16_t ip_no, uint8_t * descriptor, usb_pipe_table_reg_t * pipe_table_work); + #if defined(BSP_MCU_GROUP_RA6M3) +uint16_t usb_hstd_get_pipe_buf_value(uint16_t pipe_no); + + #endif /* defined(BSP_MCU_GROUP_RA6M3) */ + #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) diff --git a/ra/fsp/src/r_usb_basic/src/driver/r_usb_cdataio.c b/ra/fsp/src/r_usb_basic/src/driver/r_usb_cdataio.c index 5eac97281..3311b8628 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/r_usb_cdataio.c +++ b/ra/fsp/src/r_usb_basic/src/driver/r_usb_cdataio.c @@ -128,10 +128,6 @@ static const uint8_t g_usb_pipe_peri[] = }; #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ -#if (BSP_CFG_RTOS == 2) -usb_utr_t g_usb_cstd_int[USB_INT_BUFSIZE]; -#endif /* #if (BSP_CFG_RTOS == 2)*/ - /****************************************************************************** * Exported global variables (to be accessed by other files) ******************************************************************************/ @@ -257,13 +253,13 @@ usb_er_t usb_ctrl_read (usb_instance_ctrl_t * p_ctrl, uint8_t * buf, uint32_t si usb_er_t err; usb_utr_t * p_tran_data; #if (BSP_CFG_RTOS == 2) - usb_utr_t tran_data; + usb_utr_t tran_data_host; #endif /* #if (BSP_CFG_RTOS == 2) */ - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if (BSP_CFG_RTOS == 2) - p_tran_data = &tran_data; + p_tran_data = &tran_data_host; #else /* #if (BSP_CFG_RTOS == 2) */ p_tran_data = &g_usb_hdata[p_ctrl->module_number][USB_PIPE0]; #endif /* #if (BSP_CFG_RTOS == 2) */ @@ -290,18 +286,18 @@ usb_er_t usb_ctrl_read (usb_instance_ctrl_t * p_ctrl, uint8_t * buf, uint32_t si } #endif #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - usb_utr_t tran_data; + usb_utr_t tran_data_peri; - if (USB_MODE_PERI == g_usb_usbmode) + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) { if (USB_ON == g_usb_pstd_pipe0_request) { return USB_QOVR; } - tran_data.ip = p_ctrl->module_number; + tran_data_peri.ip = p_ctrl->module_number; g_usb_pstd_std_request = USB_YES; - usb_pstd_ctrl_write(size, buf, &tran_data); + usb_pstd_ctrl_write(size, buf, &tran_data_peri); } #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ return USB_OK; @@ -321,13 +317,13 @@ usb_er_t usb_ctrl_write (usb_instance_ctrl_t * p_ctrl, uint8_t * buf, uint32_t s usb_er_t err; usb_utr_t * p_tran_data; #if (BSP_CFG_RTOS == 2) - usb_utr_t tran_data; + usb_utr_t tran_data_host; #endif /* #if (BSP_CFG_RTOS == 2) */ - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if (BSP_CFG_RTOS == 2) - p_tran_data = &tran_data; + p_tran_data = &tran_data_host; #else /* #if (BSP_CFG_RTOS == 2) */ p_tran_data = &g_usb_hdata[p_ctrl->module_number][USB_PIPE0]; #endif /* #if (BSP_CFG_RTOS == 2) */ @@ -356,21 +352,21 @@ usb_er_t usb_ctrl_write (usb_instance_ctrl_t * p_ctrl, uint8_t * buf, uint32_t s #endif #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) usb_instance_ctrl_t ctrl; - usb_utr_t tran_data; + usb_utr_t tran_data_peri; - tran_data.ip = p_ctrl->module_number; + tran_data_peri.ip = p_ctrl->module_number; - if (USB_MODE_PERI == g_usb_usbmode) + if (USB_MODE_PERI == g_usb_usbmode[p_ctrl->module_number]) { if ((USB_NULL == buf) && (USB_NULL == size)) { if (USB_SETUP_STATUS_ACK == p_ctrl->status) { - usb_cstd_set_buf(&tran_data, (uint16_t) USB_PIPE0); /* Set BUF */ + usb_cstd_set_buf(&tran_data_peri, (uint16_t) USB_PIPE0); /* Set BUF */ } else /* USB_STALL */ { - usb_pstd_set_stall_pipe0(&tran_data); + usb_pstd_set_stall_pipe0(&tran_data_peri); } ctrl.setup = p_ctrl->setup; /* Save setup data. */ @@ -391,7 +387,7 @@ usb_er_t usb_ctrl_write (usb_instance_ctrl_t * p_ctrl, uint8_t * buf, uint32_t s } g_usb_pstd_std_request = USB_YES; - usb_pstd_ctrl_read(size, buf, &tran_data); + usb_pstd_ctrl_read(size, buf, &tran_data_peri); } } #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ @@ -471,8 +467,23 @@ usb_er_t usb_data_read (usb_instance_ctrl_t * p_ctrl, uint8_t * buf, uint32_t si p_tran_data->ip = p_ctrl->module_number; p_tran_data->ipp = usb_hstd_get_usb_ip_adr(p_ctrl->module_number); #if (USB_CFG_DMA == USB_CFG_ENABLE) - p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; - p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + if (0 != p_ctrl->p_transfer_tx) + { + p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; + } + else + { + p_tran_data->p_transfer_tx = 0; + } + + if (0 != p_ctrl->p_transfer_rx) + { + p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + } + else + { + p_tran_data->p_transfer_rx = 0; + } #endif err = usb_hstd_transfer_start(p_tran_data); #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ @@ -494,8 +505,23 @@ usb_er_t usb_data_read (usb_instance_ctrl_t * p_ctrl, uint8_t * buf, uint32_t si p_tran_data->tranlen = size; /* Data Size */ p_tran_data->complete = (usb_cb_t) g_usb_callback[p_ctrl->type * 2]; /* Callback function */ #if (USB_CFG_DMA == USB_CFG_ENABLE) - p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; - p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + if (0 != p_ctrl->p_transfer_tx) + { + p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; + } + else + { + p_tran_data->p_transfer_tx = 0; + } + + if (0 != p_ctrl->p_transfer_rx) + { + p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + } + else + { + p_tran_data->p_transfer_rx = 0; + } #endif err = usb_pstd_transfer_start(p_tran_data); #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ @@ -540,8 +566,23 @@ usb_er_t usb_data_write (usb_instance_ctrl_t * p_ctrl, uint8_t const * const buf p_tran_data->ip = p_ctrl->module_number; p_tran_data->ipp = usb_hstd_get_usb_ip_adr(p_ctrl->module_number); #if (USB_CFG_DMA == USB_CFG_ENABLE) - p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; - p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + if (0 != p_ctrl->p_transfer_tx) + { + p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; + } + else + { + p_tran_data->p_transfer_tx = 0; + } + + if (0 != p_ctrl->p_transfer_rx) + { + p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + } + else + { + p_tran_data->p_transfer_rx = 0; + } #endif err = usb_hstd_transfer_start(p_tran_data); #endif @@ -576,8 +617,23 @@ usb_er_t usb_data_write (usb_instance_ctrl_t * p_ctrl, uint8_t const * const buf p_tran_data->keyword = pipe; /* Pipe No */ p_tran_data->complete = (usb_cb_t) g_usb_callback[(p_ctrl->type * 2) + 1]; /* Callback function */ #if (USB_CFG_DMA == USB_CFG_ENABLE) - p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; - p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + if (0 != p_ctrl->p_transfer_tx) + { + p_tran_data->p_transfer_tx = p_ctrl->p_transfer_tx; + } + else + { + p_tran_data->p_transfer_tx = 0; + } + + if (0 != p_ctrl->p_transfer_rx) + { + p_tran_data->p_transfer_rx = p_ctrl->p_transfer_rx; + } + else + { + p_tran_data->p_transfer_rx = 0; + } #endif err = usb_pstd_transfer_start(p_tran_data); #endif /* ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) */ @@ -667,208 +723,6 @@ uint8_t usb_get_usepipe (usb_instance_ctrl_t * p_ctrl, usb_transfer_t dir) return pipe; } /* End of function usb_get_usepipe() */ -#if defined(BSP_MCU_GROUP_RA6M3) - -/****************************************************************************** - * Function Name : usb_cstd_get_pipe_buf_value - * Description : Get Value for USBA Module PIPE BUF REG. - * Arguments : Pipe no. - * Return value : PIPE BUF set value. - ******************************************************************************/ -uint16_t usb_cstd_get_pipe_buf_value (uint16_t pipe_no) -{ - uint16_t pipe_buf = 0; - - switch (pipe_no) - { - #if defined(USB_CFG_HCDC_USE) - case USB_CFG_HCDC_BULK_IN: - { - #if (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); - #else /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ - pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); - #endif /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ - break; - } - - case USB_CFG_HCDC_BULK_OUT: - { - #if (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(36U)); - #else /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ - pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(72U)); - #endif /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ - break; - } - - case USB_CFG_HCDC_BULK_IN2: - { - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(72U)); - break; - } - - case USB_CFG_HCDC_BULK_OUT2: - { - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(104U)); - break; - } - #endif /* defined(USB_CFG_HCDC_USE) */ - - #if defined(USB_CFG_HMSC_USE) - case USB_PIPE1: - case USB_PIPE2: - case USB_PIPE3: - case USB_PIPE4: - case USB_PIPE5: - { - #if USB_CFG_DTC == USB_CFG_ENABLE - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); - #else /* USB_CFG_DTC == USB_CFG_ENABLE */ - pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); - #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ - break; - } - #endif /* defined(USB_CFG_HMSC_USE) */ - - #if defined(USB_CFG_PCDC_USE) - case USB_CFG_PCDC_BULK_IN: - { - #if USB_CFG_DTC == USB_CFG_ENABLE - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); - #else /* USB_CFG_DTC == USB_CFG_ENABLE */ - pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); - #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ - break; - } - - case USB_CFG_PCDC_BULK_OUT: - { - #if USB_CFG_DTC == USB_CFG_ENABLE - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(36U)); - #else /* USB_CFG_DTC == USB_CFG_ENABLE */ - pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(72U)); - #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ - break; - } - #endif /* defined(USB_CFG_PCDC_USE) */ - - #if defined(USB_CFG_PMSC_USE) - case USB_CFG_PMSC_BULK_IN: - { - #if USB_CFG_DTC == USB_CFG_ENABLE - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); - #else /* USB_CFG_DTC == USB_CFG_ENABLE */ - pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); - #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ - break; - } - - case USB_CFG_PMSC_BULK_OUT: - { - #if USB_CFG_DTC == USB_CFG_ENABLE - pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(36U)); - #else /* USB_CFG_DTC == USB_CFG_ENABLE */ - pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(72U)); - #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ - break; - } - #endif /* defined(USB_CFG_PMSC_USE) */ - - #if defined(USB_CFG_PVND_USE) || defined(USB_CFG_HVND_USE) - case USB_PIPE1: - { - pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(8U)); - break; - } - - case USB_PIPE2: - { - pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(24U)); - break; - } - - case USB_PIPE3: - { - pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(40U)); - break; - } - - case USB_PIPE4: - { - pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(56U)); - break; - } - - case USB_PIPE5: - { - pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(72U)); - break; - } - #endif /* defined(USB_CFG_PVND_USE) || defined(USB_CFG_HVND_USE) */ - - case USB_PIPE6: - { - pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(4U)); - break; - } - - case USB_PIPE7: - { - pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(5U)); - break; - } - - case USB_PIPE8: - { - pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(6U)); - break; - } - - case USB_PIPE9: - { - pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(7U)); - break; - } - - default: - { - /* Error */ - break; - } - } - - return pipe_buf; -} /* End of function usb_cstd_get_pipe_buf_value() */ - -#endif /* defined(BSP_MCU_GROUP_RA6M3) */ - -#if (BSP_CFG_RTOS == 2) - -/****************************************************************************** - * Function Name : get_usb_int_buf - * Description : USB interrupt routine. Analyze which USB interrupt occurred - * : and send message to PCD task. - * Arguments : none - * Return value : Point to the area for usb_int_t structure - ******************************************************************************/ -usb_utr_t * get_usb_int_buf (void) -{ - static uint16_t count = 0; - usb_utr_t * p; - - p = &g_usb_cstd_int[count]; - - count = ((uint16_t) (((uint16_t) (count + 1)) % USB_INT_BUFSIZE)); - - return p; -} - -/****************************************************************************** - * End of function get_usb_int_buf - ******************************************************************************/ -#endif /* #if (BSP_CFG_RTOS == 2) */ - /****************************************************************************** * End Of File ******************************************************************************/ diff --git a/ra/fsp/src/r_usb_basic/src/driver/r_usb_clibusbip.c b/ra/fsp/src/r_usb_basic/src/driver/r_usb_clibusbip.c index c7967d1a9..dd004f4a5 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/r_usb_clibusbip.c +++ b/ra/fsp/src/r_usb_basic/src/driver/r_usb_clibusbip.c @@ -21,7 +21,6 @@ /****************************************************************************** * Includes , "Project Includes" ******************************************************************************/ - #include #include @@ -388,29 +387,31 @@ void usb_set_event (usb_status_t event, usb_instance_ctrl_t * p_ctrl) case USB_STATUS_NOT_SUPPORT: case USB_STATUS_DETACH: { - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, USB_OFF); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, USB_OFF); break; } case USB_STATUS_REQUEST: { - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, USB_ON); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, USB_OFF); break; } case USB_STATUS_SUSPEND: case USB_STATUS_RESUME: { - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) p_ctrl->p_data, USB_OFF); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], + g_usb_hstd_sus_res_task_id[p_ctrl->module_number], + USB_OFF); #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ } else { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, USB_OFF); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, USB_OFF); #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ } @@ -419,10 +420,11 @@ void usb_set_event (usb_status_t event, usb_instance_ctrl_t * p_ctrl) case USB_STATUS_REQUEST_COMPLETE: { - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[p_ctrl->module_number]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) p_ctrl->p_data, USB_OFF); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], (usb_hdl_t) p_ctrl->p_data, + USB_OFF); #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ } else @@ -431,12 +433,14 @@ void usb_set_event (usb_status_t event, usb_instance_ctrl_t * p_ctrl) if (0 == p_ctrl->setup.request_length) { /* Processing for USB request has the no data stage */ - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, USB_OFF); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], (usb_hdl_t) USB_NULL, + USB_OFF); } else { /* Processing for USB request has the data state */ - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) p_ctrl->p_data, USB_OFF); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], (usb_hdl_t) p_ctrl->p_data, + USB_OFF); } #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ } @@ -450,7 +454,7 @@ void usb_set_event (usb_status_t event, usb_instance_ctrl_t * p_ctrl) #if defined(USB_CFG_HMSC_USE) case USB_STATUS_MSC_CMD_COMPLETE: #endif /* defined(USB_CFG_HMSC_USE) */ - (*g_usb_apl_callback)(&g_usb_cstd_event[count], (usb_hdl_t) p_ctrl->p_data, USB_OFF); + (*g_usb_apl_callback[p_ctrl->module_number])(&g_usb_cstd_event[count], (usb_hdl_t) p_ctrl->p_data, USB_OFF); break; default: @@ -557,7 +561,7 @@ fsp_err_t usb_cstd_rel_semaphore (usb_instance_ctrl_t * p_ctrl) ******************************************************************************/ void usb_cstd_usb_task (uint8_t module_number) { - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[module_number]) { FSP_PARAMETER_NOT_USED(module_number); #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) @@ -576,9 +580,9 @@ void usb_cstd_usb_task (uint8_t module_number) usb_class_task(); } } - /* WAIT_LOOP */ while (USB_FALSE != g_drive_search_lock); + #else /* defined(USB_CFG_HMSC_USE) */ usb_cstd_scheduler(); /* Scheduler */ @@ -674,6 +678,7 @@ uint16_t usb_cstd_remote_wakeup (usb_utr_t * p_utr) } else { + // ret_code = FSP_ERR_USB_FAILED; return USB_ERROR; } diff --git a/ra/fsp/src/r_usb_basic/src/driver/r_usb_cstd_rtos.c b/ra/fsp/src/r_usb_basic/src/driver/r_usb_cstd_rtos.c index e2b7774d9..c2d1238b0 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/r_usb_cstd_rtos.c +++ b/ra/fsp/src/r_usb_basic/src/driver/r_usb_cstd_rtos.c @@ -1255,7 +1255,7 @@ void usb_cstd_pipe_msg_re_forward (uint16_t ip_no, uint16_t pipe_no) err = xQueueReceive(g_pipe_hdl[ip_no][pipe_no], (void *) &mess, (TickType_t) (0)); if ((pdTRUE == err) && (NULL != (mess))) { - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[ip_no]) { id = USB_HCD_MBX; } @@ -1296,7 +1296,7 @@ void usb_cstd_pipe0_msg_re_forward (uint16_t ip_no) err = xQueueReceive(g_pipe0_hdl[ip_no][dev_addr], (void *) &mess, (TickType_t) (0)); if ((pdTRUE == err) && (NULL != (mess))) { - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[ip_no]) { id = USB_HCD_MBX; } diff --git a/ra/fsp/src/r_usb_basic/src/driver/r_usb_hdriver.c b/ra/fsp/src/r_usb_basic/src/driver/r_usb_hdriver.c index 6bb7fee9b..169ae2739 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/r_usb_hdriver.c +++ b/ra/fsp/src/r_usb_basic/src/driver/r_usb_hdriver.c @@ -167,6 +167,10 @@ const uint16_t g_usb_apl_devicetpl[] = }; #endif /* defined(USB_CFG_HVND_USE) */ + #if (BSP_CFG_RTOS == 2) +usb_hdl_t g_usb_hstd_sus_res_task_id[USB_NUM_USBIP]; + #endif /* #if (BSP_CFG_RTOS == 2) */ + /****************************************************************************** * Renesas USB Host Driver functions ******************************************************************************/ @@ -305,8 +309,23 @@ usb_er_t usb_hstd_transfer_start_req (usb_utr_t * ptr) p_tran_data->cur_task_hdl = xTaskGetCurrentTaskHandle(); #if ((USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_DMA == USB_CFG_ENABLE)) - p_tran_data->p_transfer_rx = ptr->p_transfer_rx; - p_tran_data->p_transfer_tx = ptr->p_transfer_tx; + if (0 != ptr->p_transfer_tx) + { + p_tran_data->p_transfer_tx = ptr->p_transfer_tx; + } + else + { + p_tran_data->p_transfer_tx = 0; + } + + if (0 != ptr->p_transfer_rx) + { + p_tran_data->p_transfer_rx = ptr->p_transfer_rx; + } + else + { + p_tran_data->p_transfer_rx = 0; + } #endif /* Send message */ diff --git a/ra/fsp/src/r_usb_basic/src/driver/r_usb_hlibusbip.c b/ra/fsp/src/r_usb_basic/src/driver/r_usb_hlibusbip.c index e4d65230f..6ad6bd431 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/r_usb_hlibusbip.c +++ b/ra/fsp/src/r_usb_basic/src/driver/r_usb_hlibusbip.c @@ -341,18 +341,21 @@ uint16_t usb_hstd_pipe2fport (usb_utr_t * ptr, uint16_t pipe) } #if ((USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_DMA == USB_CFG_ENABLE)) - if ((USB_PIPE1 == pipe) || (USB_PIPE2 == pipe)) + if ((0 != ptr->p_transfer_tx) || (0 != ptr->p_transfer_rx)) { - hw_usb_write_pipesel(ptr, pipe); - usb_dir = hw_usb_read_pipecfg(ptr); - usb_dir = usb_dir & USB_DIRFIELD; - if (0 == usb_dir) + if ((USB_PIPE1 == pipe) || (USB_PIPE2 == pipe)) { - fifo_mode = USB_D0USE; - } - else - { - fifo_mode = USB_D1USE; + hw_usb_write_pipesel(ptr, pipe); + usb_dir = hw_usb_read_pipecfg(ptr); + usb_dir = usb_dir & USB_DIRFIELD; + if (0 == usb_dir) + { + fifo_mode = USB_D0USE; + } + else + { + fifo_mode = USB_D1USE; + } } } @@ -1350,7 +1353,7 @@ uint8_t usb_hstd_make_pipe_reg_info (uint16_t ip_no, if (USB_IP1 == ip_no) { /* PIPEBUF is USBA module only */ - pipe_buf = usb_cstd_get_pipe_buf_value(pipe_no); + pipe_buf = usb_hstd_get_pipe_buf_value(pipe_no); pipe_table_work->pipe_buf = pipe_buf; } #endif /* #if defined(BSP_MCU_GROUP_RA6M3) */ @@ -1724,6 +1727,76 @@ uint16_t usb_hstd_get_pipe_peri_value (uint16_t speed, uint8_t binterval) return pipe_peri; } /* eof usb_hstd_get_pipe_peri_value() */ + #if defined(BSP_MCU_GROUP_RA6M3) + +/****************************************************************************** + * Function Name : usb_hstd_get_pipe_buf_value + * Description : Get Value for USBA Module PIPE BUF REG. + * Arguments : Pipe no. + * Return value : PIPE BUF set value. + ******************************************************************************/ +uint16_t usb_hstd_get_pipe_buf_value (uint16_t pipe_no) +{ + uint16_t pipe_buf = 0; + + switch (pipe_no) + { + #if defined(USB_CFG_HCDC_USE) + case USB_CFG_HCDC_BULK_IN: + { + #if (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); + #else /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ + pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); + #endif /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ + break; + } + + case USB_CFG_HCDC_BULK_OUT: + { + #if (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(36U)); + #else /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ + pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(72U)); + #endif /* (USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_HCDC_MULTI == USB_CFG_ENABLE) */ + break; + } + + case USB_CFG_HCDC_BULK_IN2: + { + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(72U)); + break; + } + + case USB_CFG_HCDC_BULK_OUT2: + { + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(104U)); + break; + } + #endif /* defined(USB_CFG_HCDC_USE) */ + + #if defined(USB_CFG_HMSC_USE) + case USB_PIPE1: + case USB_PIPE2: + case USB_PIPE3: + case USB_PIPE4: + case USB_PIPE5: + { + #if USB_CFG_DTC == USB_CFG_ENABLE + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); + #else /* USB_CFG_DTC == USB_CFG_ENABLE */ + pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); + #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ + break; + } + #endif /* defined(USB_CFG_HMSC_USE) */ + } + + return pipe_buf; +} /* End of function usb_hstd_get_pipe_buf_value() */ + + #endif /* defined(BSP_MCU_GROUP_RA6M3) */ + #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ /****************************************************************************** diff --git a/ra/fsp/src/r_usb_basic/src/driver/r_usb_pinthandler_usbip0.c b/ra/fsp/src/r_usb_basic/src/driver/r_usb_pinthandler_usbip0.c index 3b66d5583..21fa55f21 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/r_usb_pinthandler_usbip0.c +++ b/ra/fsp/src/r_usb_basic/src/driver/r_usb_pinthandler_usbip0.c @@ -34,6 +34,10 @@ ******************************************************************************/ usb_int_t g_usb_pstd_usb_int; + #if (BSP_CFG_RTOS == 2) +static usb_utr_t g_usb_pstd_int[USB_INT_BUFSIZE]; + #endif /* #if (BSP_CFG_RTOS == 2)*/ + /****************************************************************************** * Renesas Abstracted common Interrupt handler functions ******************************************************************************/ @@ -86,6 +90,33 @@ void usb_pstd_usb_handler (void) /****************************************************************************** * End of function usb_pstd_usb_handler ******************************************************************************/ + + #if (BSP_CFG_RTOS == 2) + +/****************************************************************************** + * Function Name : get_usb_int_buf + * Description : USB interrupt routine. Analyze which USB interrupt occurred + * : and send message to PCD task. + * Arguments : none + * Return value : Point to the area for usb_int_t structure + ******************************************************************************/ +usb_utr_t * get_usb_int_buf (void) +{ + static uint16_t count = 0; + usb_utr_t * p; + + p = &g_usb_pstd_int[count]; + + count = ((uint16_t) (((uint16_t) (count + 1)) % USB_INT_BUFSIZE)); + + return p; +} + +/****************************************************************************** + * End of function get_usb_int_buf + ******************************************************************************/ + #endif /* #if (BSP_CFG_RTOS == 2) */ + #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_REPI */ /****************************************************************************** diff --git a/ra/fsp/src/r_usb_basic/src/driver/r_usb_plibusbip.c b/ra/fsp/src/r_usb_basic/src/driver/r_usb_plibusbip.c index bbf1509d1..5e62730f1 100644 --- a/ra/fsp/src/r_usb_basic/src/driver/r_usb_plibusbip.c +++ b/ra/fsp/src/r_usb_basic/src/driver/r_usb_plibusbip.c @@ -112,18 +112,21 @@ uint16_t usb_pstd_pipe2fport (usb_utr_t * p_utr, uint16_t pipe) } #if ((USB_CFG_DTC == USB_CFG_ENABLE) || (USB_CFG_DMA == USB_CFG_ENABLE)) - if ((USB_PIPE1 == pipe) || (USB_PIPE2 == pipe)) + if ((0 != p_utr->p_transfer_tx) || (0 != p_utr->p_transfer_rx)) { - hw_usb_write_pipesel(p_utr, pipe); - usb_dir = hw_usb_read_pipecfg(p_utr); - usb_dir = usb_dir & USB_DIRFIELD; - if (0 == usb_dir) + if ((USB_PIPE1 == pipe) || (USB_PIPE2 == pipe)) { - fifo_mode = USB_D0USE; - } - else - { - fifo_mode = USB_D1USE; + hw_usb_write_pipesel(p_utr, pipe); + usb_dir = hw_usb_read_pipecfg(p_utr); + usb_dir = usb_dir & USB_DIRFIELD; + if (0 == usb_dir) + { + fifo_mode = USB_D0USE; + } + else + { + fifo_mode = USB_D1USE; + } } } #else @@ -1101,7 +1104,7 @@ uint8_t usb_pstd_set_pipe_table (uint8_t * descriptor, usb_utr_t * p_utr) #if defined(BSP_MCU_GROUP_RA6M3) if (USB_CFG_IP1 == p_utr->ip) { - pipe_buf = usb_cstd_get_pipe_buf_value(pipe_no); + pipe_buf = usb_pstd_get_pipe_buf_value(pipe_no); g_usb_pipe_table[p_utr->ip][pipe_no].pipe_buf = pipe_buf; } else @@ -1319,6 +1322,132 @@ uint8_t usb_pstd_get_pipe_no (uint8_t type, uint8_t dir, usb_utr_t * p_utr) return pipe_no; } + #if defined(BSP_MCU_GROUP_RA6M3) + +/****************************************************************************** + * Function Name : usb_pstd_get_pipe_buf_value + * Description : Get Value for USBA Module PIPE BUF REG. + * Arguments : Pipe no. + * Return value : PIPE BUF set value. + ******************************************************************************/ +uint16_t usb_pstd_get_pipe_buf_value (uint16_t pipe_no) +{ + uint16_t pipe_buf = 0; + + switch (pipe_no) + { + #if defined(USB_CFG_PCDC_USE) + case USB_CFG_PCDC_BULK_IN: + { + #if USB_CFG_DTC == USB_CFG_ENABLE + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); + #else /* USB_CFG_DTC == USB_CFG_ENABLE */ + pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); + #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ + break; + } + + case USB_CFG_PCDC_BULK_OUT: + { + #if USB_CFG_DTC == USB_CFG_ENABLE + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(36U)); + #else /* USB_CFG_DTC == USB_CFG_ENABLE */ + pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(72U)); + #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ + break; + } + #endif /* defined(USB_CFG_PCDC_USE) */ + + #if defined(USB_CFG_PMSC_USE) + case USB_CFG_PMSC_BULK_IN: + { + #if USB_CFG_DTC == USB_CFG_ENABLE + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(8U)); + #else /* USB_CFG_DTC == USB_CFG_ENABLE */ + pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(8U)); + #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ + break; + } + + case USB_CFG_PMSC_BULK_OUT: + { + #if USB_CFG_DTC == USB_CFG_ENABLE + pipe_buf = (USB_BUF_SIZE(1024U) | USB_BUF_NUMB(36U)); + #else /* USB_CFG_DTC == USB_CFG_ENABLE */ + pipe_buf = (USB_BUF_SIZE(2048U) | USB_BUF_NUMB(72U)); + #endif /* USB_CFG_DTC == USB_CFG_ENABLE */ + break; + } + #endif /* defined(USB_CFG_PMSC_USE) */ + + #if defined(USB_CFG_PVND_USE) || defined(USB_CFG_HVND_USE) + case USB_PIPE1: + { + pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(8U)); + break; + } + + case USB_PIPE2: + { + pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(24U)); + break; + } + + case USB_PIPE3: + { + pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(40U)); + break; + } + + case USB_PIPE4: + { + pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(56U)); + break; + } + + case USB_PIPE5: + { + pipe_buf = (USB_BUF_SIZE(512U) | USB_BUF_NUMB(72U)); + break; + } + #endif /* defined(USB_CFG_PVND_USE) || defined(USB_CFG_HVND_USE) */ + + case USB_PIPE6: + { + pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(4U)); + break; + } + + case USB_PIPE7: + { + pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(5U)); + break; + } + + case USB_PIPE8: + { + pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(6U)); + break; + } + + case USB_PIPE9: + { + pipe_buf = (USB_BUF_SIZE(64U) | USB_BUF_NUMB(7U)); + break; + } + + default: + { + /* Error */ + break; + } + } + + return pipe_buf; +} /* End of function usb_pstd_get_pipe_buf_value() */ + + #endif /* defined(BSP_MCU_GROUP_RA6M3) */ + #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI */ /****************************************************************************** diff --git a/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_abs.c b/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_abs.c index a4b171685..c3e5c52c8 100644 --- a/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_abs.c +++ b/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_abs.c @@ -125,7 +125,7 @@ void usb_cstd_pipe_init (usb_utr_t * ptr, uint16_t pipe) uint16_t useport = USB_CUSE; uint16_t ip_no = ptr->ip; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ip_no] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) #if (BSP_CFG_RTOS == 2) @@ -237,7 +237,7 @@ void usb_cstd_pipe_init (usb_utr_t * ptr, uint16_t pipe) ******************************************************************************/ void usb_cstd_clr_pipe_cnfg (usb_utr_t * ptr, uint16_t pipe_no) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) #if (BSP_CFG_RTOS == 2) diff --git a/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_access.c b/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_access.c index 4cd8a16d6..d6e9df43f 100644 --- a/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_access.c +++ b/ra/fsp/src/r_usb_basic/src/hw/r_usb_creg_access.c @@ -52,7 +52,7 @@ uint16_t hw_usb_read_syscfg (usb_utr_t * ptr) { uint16_t ret_code = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -130,7 +130,7 @@ void hw_usb_set_cnen (uint8_t usb_ip) ******************************************************************************/ void hw_usb_clear_cnen (usb_utr_t * ptr) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -159,7 +159,7 @@ void hw_usb_clear_cnen (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_set_hse (usb_utr_t * ptr) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -191,7 +191,7 @@ void hw_usb_set_hse (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_clear_hse (usb_utr_t * ptr) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -251,7 +251,7 @@ void hw_usb_set_dcfm (usb_utr_t * p_utr) ******************************************************************************/ void hw_usb_clear_dcfm (usb_utr_t * ptr) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -303,7 +303,7 @@ void hw_usb_clear_drpd (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_set_usbe (usb_utr_t * ptr) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -336,7 +336,7 @@ void hw_usb_set_usbe (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_clear_usbe (usb_utr_t * ptr) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -391,7 +391,7 @@ void hw_usb_set_bcctrl (usb_utr_t * ptr, uint16_t data) { FSP_PARAMETER_NOT_USED(data); - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -426,7 +426,7 @@ void hw_usb_clear_bcctrl (usb_utr_t * ptr, uint16_t data) { FSP_PARAMETER_NOT_USED(data); - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -461,7 +461,7 @@ uint16_t hw_usb_read_syssts (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -498,7 +498,7 @@ uint16_t hw_usb_read_dvstctr (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -635,7 +635,7 @@ void hw_usb_clear_vbout (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_set_utst (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -675,7 +675,7 @@ uint32_t hw_usb_read_fifo32 (usb_utr_t * ptr, uint16_t pipemode) { uint32_t data = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) switch (pipemode) @@ -752,7 +752,7 @@ uint32_t hw_usb_read_fifo32 (usb_utr_t * ptr, uint16_t pipemode) ******************************************************************************/ void hw_usb_write_fifo32 (usb_utr_t * ptr, uint16_t pipemode, uint32_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) switch (pipemode) @@ -830,7 +830,7 @@ uint16_t hw_usb_read_fifo16 (usb_utr_t * ptr, uint16_t pipemode) { uint16_t data = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) switch (pipemode) @@ -992,7 +992,7 @@ void hw_usb_write_fifo16 (usb_utr_t * ptr, uint16_t pipemode, uint16_t data) { uint16_t ip = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -1096,7 +1096,7 @@ void hw_usb_write_fifo8 (usb_utr_t * ptr, uint16_t pipemode, uint8_t data) { uint16_t ip = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -1199,7 +1199,7 @@ static void * hw_usb_get_fifosel_adr (usb_utr_t * ptr, uint16_t pipemode) { void * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) switch (pipemode) @@ -1457,7 +1457,7 @@ void hw_usb_set_mbw (usb_utr_t * ptr, uint16_t pipemode, uint16_t data) p_reg = hw_usb_get_fifosel_adr(ptr, pipemode); - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) (*p_reg) = (uint16_t) ((*p_reg) & (~USB_MBW)); @@ -1558,7 +1558,7 @@ static void * hw_usb_get_fifoctr_adr (usb_utr_t * ptr, uint16_t pipemode) { void * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) switch (pipemode) @@ -1725,7 +1725,7 @@ void hw_usb_set_bclr (usb_utr_t * ptr, uint16_t pipemode) ******************************************************************************/ void hw_usb_write_intenb (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -1761,7 +1761,7 @@ void hw_usb_write_intenb (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_set_intenb (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -1850,7 +1850,7 @@ void hw_usb_write_brdyenb (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_set_brdyenb (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -1885,7 +1885,7 @@ void hw_usb_set_brdyenb (usb_utr_t * ptr, uint16_t pipeno) ******************************************************************************/ void hw_usb_clear_brdyenb (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -1941,7 +1941,7 @@ void hw_usb_write_nrdyenb (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_set_nrdyenb (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -1976,7 +1976,7 @@ void hw_usb_set_nrdyenb (usb_utr_t * ptr, uint16_t pipeno) ******************************************************************************/ void hw_usb_clear_nrdyenb (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2034,7 +2034,7 @@ void hw_usb_write_bempenb (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_set_bempenb (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2072,7 +2072,7 @@ void hw_usb_set_bempenb (usb_utr_t * ptr, uint16_t pipeno) ******************************************************************************/ void hw_usb_clear_bempenb (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2108,7 +2108,7 @@ void hw_usb_set_sofcfg (usb_utr_t * ptr, uint16_t data) { FSP_PARAMETER_NOT_USED(data); FSP_PARAMETER_NOT_USED(*ptr); - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_REPI */ @@ -2166,7 +2166,7 @@ uint16_t hw_usb_read_intsts (uint8_t usb_ip) ******************************************************************************/ void hw_usb_write_intsts (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2251,7 +2251,7 @@ void hw_usb_write_brdysts (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_clear_sts_brdy (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2307,7 +2307,7 @@ void hw_usb_write_nrdy_sts (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_clear_status_nrdy (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2362,7 +2362,7 @@ void hw_usb_write_bempsts (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_clear_status_bemp (usb_utr_t * ptr, uint16_t pipeno) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2397,7 +2397,7 @@ uint16_t hw_usb_read_frmnum (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2541,7 +2541,7 @@ uint16_t hw_usb_read_dcpcfg (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2577,7 +2577,7 @@ uint16_t hw_usb_read_dcpcfg (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_write_dcpcfg (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2612,7 +2612,7 @@ uint16_t hw_usb_read_dcpmaxp (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2648,7 +2648,7 @@ uint16_t hw_usb_read_dcpmaxp (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_write_dcpmxps (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2712,7 +2712,7 @@ uint16_t hw_usb_read_dcpctr (uint8_t usb_ip) ******************************************************************************/ void hw_usb_write_pipesel (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2747,7 +2747,7 @@ uint16_t hw_usb_read_pipecfg (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2783,7 +2783,7 @@ uint16_t hw_usb_read_pipecfg (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_write_pipecfg (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2820,7 +2820,7 @@ void hw_usb_write_pipecfg (usb_utr_t * ptr, uint16_t data) void hw_usb_write_pipebuf (usb_utr_t * ptr, uint16_t data) { FSP_PARAMETER_NOT_USED(data); - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) @@ -2854,7 +2854,7 @@ uint16_t hw_usb_read_pipebuf (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2900,7 +2900,7 @@ uint16_t hw_usb_read_pipemaxp (usb_utr_t * ptr) { uint16_t result = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2936,7 +2936,7 @@ uint16_t hw_usb_read_pipemaxp (usb_utr_t * ptr) ******************************************************************************/ void hw_usb_write_pipemaxp (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -2970,7 +2970,7 @@ void hw_usb_write_pipemaxp (usb_utr_t * ptr, uint16_t data) ******************************************************************************/ void hw_usb_write_pipeperi (usb_utr_t * ptr, uint16_t data) { - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3009,7 +3009,7 @@ uint16_t hw_usb_read_pipectr (usb_utr_t * ptr, uint16_t pipeno) volatile uint16_t * p_reg; volatile uint16_t reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3105,7 +3105,7 @@ void hw_usb_set_csclr (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3144,7 +3144,7 @@ void hw_usb_set_aclrm (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3185,7 +3185,7 @@ void hw_usb_clear_aclrm (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3225,7 +3225,7 @@ void hw_usb_set_sqclr (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3287,7 +3287,7 @@ void hw_usb_set_sqset (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3349,7 +3349,7 @@ void hw_usb_set_pid (usb_utr_t * ptr, uint16_t pipeno, uint16_t data) { volatile uint16_t * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3417,7 +3417,7 @@ void hw_usb_clear_pid (usb_utr_t * ptr, uint16_t pipeno, uint16_t data) { volatile uint16_t * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3477,7 +3477,7 @@ void hw_usb_set_trenb (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3516,7 +3516,7 @@ void hw_usb_clear_trenb (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3556,7 +3556,7 @@ void hw_usb_set_trclr (usb_utr_t * ptr, uint16_t pipeno) { volatile uint16_t * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3596,7 +3596,7 @@ void hw_usb_write_pipetrn (usb_utr_t * ptr, uint16_t pipeno, uint16_t data) { volatile uint16_t * p_reg = 0; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP0 == ptr->ip) @@ -3637,7 +3637,7 @@ uint16_t hw_usb_read_bcctrl (usb_utr_t * ptr) FSP_PARAMETER_NOT_USED(*ptr); #if defined(BSP_MCU_GROUP_RA6M3) - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) if (USB_CFG_IP1 == ptr->ip) diff --git a/ra/fsp/src/r_usb_basic/src/hw/r_usb_dma.c b/ra/fsp/src/r_usb_basic/src/hw/r_usb_dma.c index 5d4b40815..41eea8c64 100644 --- a/ra/fsp/src/r_usb_basic/src/hw/r_usb_dma.c +++ b/ra/fsp/src/r_usb_basic/src/hw/r_usb_dma.c @@ -41,6 +41,11 @@ #if (BSP_CFG_RTOS == 0) usb_dma_int_t gs_usb_cstd_dma_int; #endif /* (BSP_CFG_RTOS == 0) */ + #if (BSP_CFG_RTOS == 2) +static usb_utr_t g_usb_cstd_int_dma[USB_INT_BUFSIZE]; + #endif /* #if (BSP_CFG_RTOS == 2)*/ + +usb_utr_t * get_usb_int_buf_dma(void); uint32_t g_usb_cstd_dma_size[USB_NUM_USBIP][USB_DMA_USE_CH_MAX]; /* DMA0 and DMA1 buffer size */ uint16_t g_usb_cstd_dma_fifo[USB_NUM_USBIP][USB_DMA_USE_CH_MAX]; /* DMA0 and DMA1 FIFO buffer size */ @@ -115,99 +120,103 @@ void usb_cstd_dma_send_start (usb_utr_t * ptr, uint16_t pipe, uint16_t useport) uint16_t ip; uint16_t ch; - if (USB_NULL != ptr) + ip = ptr->ip; + + if (USB_MODE_HOST == g_usb_usbmode[ip]) { - ip = ptr->ip; #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) p_data_ptr = gp_usb_hstd_data_ptr[ptr->ip][pipe]; #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ + } + else + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) p_data_ptr = gp_usb_pstd_data[pipe]; #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_REPI */ + } - ch = usb_cstd_dma_ref_ch_no(ptr, useport); + ch = usb_cstd_dma_ref_ch_no(ptr, useport); - dma_size = g_usb_cstd_dma_size[ip][ch]; + dma_size = g_usb_cstd_dma_size[ip][ch]; - if (USB_IP0 == ip) - { - dma_size &= ~USB_BIT_MBW16; - } - else - { + if (USB_IP0 == ip) + { + dma_size &= ~USB_BIT_MBW16; + } + else + { #if defined(BSP_MCU_GROUP_RA6M3) - dma_size &= ~USB_BIT_MBW32; + dma_size &= ~USB_BIT_MBW32; #else /* defined(BSP_MCU_GROUP_RA6M3) */ - dma_size &= ~USB_BIT_MBW16; + dma_size &= ~USB_BIT_MBW16; #endif /* defined(BSP_MCU_GROUP_RA6M3) */ - } + } - if (0U != dma_size) - { - hw_usb_clear_dreqe(ptr, useport); /* DMA Transfer request disable */ + if (0U != dma_size) + { + hw_usb_clear_dreqe(ptr, useport); /* DMA Transfer request disable */ - usb_cstd_dma_clear_ir(ptr, useport); + usb_cstd_dma_clear_ir(ptr, useport); - if (dma_size >= g_usb_cstd_dma_fifo[ip][ch]) + if (dma_size >= g_usb_cstd_dma_fifo[ip][ch]) + { + /* Fifo size block transfer */ + dma_size = (dma_size - (dma_size % g_usb_cstd_dma_fifo[ip][ch])); + } + else + { + if (USB_IP0 == ip) { - /* Fifo size block transfer */ - dma_size = (dma_size - (dma_size % g_usb_cstd_dma_fifo[ip][ch])); + /* fraction size(1-3) */ + g_usb_cstd_dma_fraction_size[ip][ch] = g_usb_cstd_dma_size[ip][ch] & USB_BIT_MBW16; } else { - if (USB_IP0 == ip) - { - /* fraction size(1-3) */ - g_usb_cstd_dma_fraction_size[ip][ch] = g_usb_cstd_dma_size[ip][ch] & USB_BIT_MBW16; - } - else - { #if defined(BSP_MCU_GROUP_RA6M3) - /* fraction size(1-3) */ - g_usb_cstd_dma_fraction_size[ip][ch] = g_usb_cstd_dma_size[ip][ch] & USB_BIT_MBW32; + /* fraction size(1-3) */ + g_usb_cstd_dma_fraction_size[ip][ch] = g_usb_cstd_dma_size[ip][ch] & USB_BIT_MBW32; #else /* defined(BSP_MCU_GROUP_RA6M3) */ - /* fraction size(1-3) */ - g_usb_cstd_dma_fraction_size[ip][ch] = g_usb_cstd_dma_size[ip][ch] & USB_BIT_MBW16; + /* fraction size(1-3) */ + g_usb_cstd_dma_fraction_size[ip][ch] = g_usb_cstd_dma_size[ip][ch] & USB_BIT_MBW16; #endif /* defined(BSP_MCU_GROUP_RA6M3) */ - } - - g_usb_cstd_dma_fraction_adr[ip][ch] = (uint32_t) (p_data_ptr + dma_size); /* fraction data address */ } - g_usb_cstd_dma_size[ip][ch] = dma_size; + g_usb_cstd_dma_fraction_adr[ip][ch] = (uint32_t) (p_data_ptr + dma_size); /* fraction data address */ + } - usb_cstd_dma_send_setting(ptr, (uint32_t) p_data_ptr, useport, dma_size); + g_usb_cstd_dma_size[ip][ch] = dma_size; - /* Changes the FIFO port by the pipe. */ - if (false == usb_check_use_usba_module(ptr)) - { - usb_cstd_chg_curpipe(ptr, pipe, useport, USB_FALSE); - } + usb_cstd_dma_send_setting(ptr, (uint32_t) p_data_ptr, useport, dma_size); - hw_usb_set_dreqe(ptr, useport); + /* Changes the FIFO port by the pipe. */ + if (false == usb_check_use_usba_module(ptr)) + { + usb_cstd_chg_curpipe(ptr, pipe, useport, USB_FALSE); + } - if (true == usb_check_use_usba_module(ptr)) - { - usb_cstd_chg_curpipe(ptr, pipe, useport, USB_FALSE); - } + hw_usb_set_dreqe(ptr, useport); + + if (true == usb_check_use_usba_module(ptr)) + { + usb_cstd_chg_curpipe(ptr, pipe, useport, USB_FALSE); } - else + } + else + { + if (USB_MODE_HOST == g_usb_usbmode[ip]) { - if (USB_MODE_HOST == g_usb_usbmode) - { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) - usb_hstd_buf_to_fifo(ptr, pipe, useport); + usb_hstd_buf_to_fifo(ptr, pipe, useport); #endif /* (USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST */ - } - else - { + } + else + { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) - usb_pstd_buf_to_fifo(pipe, useport, ptr); + usb_pstd_buf_to_fifo(pipe, useport, ptr); #endif /* (USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_REPI */ - } /* if (USB_MODE_HOST == g_usb_usbmode) */ - } /* if (0U != dma_size) */ - } /* if (USB_NULL != ptr) */ + } /* if (USB_MODE_HOST == g_usb_usbmode[ip]) */ + } /* if (0U != dma_size) */ } /****************************************************************************** @@ -230,7 +239,7 @@ void usb_cstd_dma_rcv_start (usb_utr_t * ptr, uint16_t pipe, uint16_t useport) uint16_t ch; uint16_t trncnt; - if (g_usb_usbmode == USB_MODE_HOST) + if (g_usb_usbmode[ptr->ip] == USB_MODE_HOST) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) p_data_ptr = gp_usb_hstd_data_ptr[ptr->ip][pipe]; @@ -309,7 +318,7 @@ void usb_cstd_dfifo_end (usb_utr_t * ptr, uint16_t useport) uint16_t ip; uint16_t channel; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { if (USB_CFG_IP0 == ptr->ip) { @@ -328,7 +337,7 @@ void usb_cstd_dfifo_end (usb_utr_t * ptr, uint16_t useport) channel = usb_cstd_dma_ref_ch_no(ptr, useport); pipe = g_usb_cstd_dma_pipe[ip][channel]; - if (g_usb_usbmode == USB_MODE_PERI) + if (g_usb_usbmode[ptr->ip] == USB_MODE_PERI) { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) @@ -367,7 +376,7 @@ void usb_cstd_dma_driver (void) utr.ip = (uint8_t) gs_usb_cstd_dma_int.buf[gs_usb_cstd_dma_int.rp].ip; utr.p_transfer_tx = gs_usb_cstd_dma_int.buf[gs_usb_cstd_dma_int.wp].p_cfg->p_transfer_tx; utr.p_transfer_rx = gs_usb_cstd_dma_int.buf[gs_usb_cstd_dma_int.wp].p_cfg->p_transfer_rx; - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[utr.ip]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); @@ -476,7 +485,7 @@ void usb_cstd_dma_send_continue (usb_utr_t * ptr, uint16_t useport) channel = usb_cstd_dma_ref_ch_no(ptr, useport); pipe = (uint8_t) g_usb_cstd_dma_pipe[ip][channel]; - if (g_usb_usbmode == USB_MODE_HOST) + if (g_usb_usbmode[ip] == USB_MODE_HOST) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) p_data_cnt = &g_usb_hstd_data_cnt[ptr->ip][pipe]; @@ -529,7 +538,7 @@ void usb_cstd_dma_send_continue (usb_utr_t * ptr, uint16_t useport) { /* DMA transfer function end. call callback function */ - if (g_usb_usbmode == USB_MODE_HOST) + if (g_usb_usbmode[ip] == USB_MODE_HOST) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) usb_hstd_data_end(ptr, pipe, (uint16_t) USB_DATA_NONE); @@ -594,7 +603,7 @@ void usb_cstd_dma_send_continue (usb_utr_t * ptr, uint16_t useport) if (true == cpu_write) { - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[ip]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) g_usb_hstd_data_cnt[ptr->ip][pipe] = (uint32_t) g_usb_cstd_dma_fraction_size[ip][channel]; /* fraction size(1-3) */ @@ -810,7 +819,7 @@ void usb_cstd_dma_send_complete (uint8_t ip_no, uint16_t use_port) } #if (BSP_CFG_RTOS == 2) - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[ip_no]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) utr.ip = ip_no; @@ -818,7 +827,7 @@ void usb_cstd_dma_send_complete (uint8_t ip_no, uint16_t use_port) hw_usb_clear_dreqe(&utr, use_port); /* DMA Transfer request disable */ - p_host = get_usb_int_buf(); + p_host = get_usb_int_buf_dma(); p_host->ip = ip_no; p_host->msginfo = USB_MSG_HCD_INT; p_host->keyword = USB_INT_DXFIFO; @@ -833,9 +842,11 @@ void usb_cstd_dma_send_complete (uint8_t ip_no, uint16_t use_port) else { #if ((USB_CFG_MODE & USB_CFG_PERI) == USB_CFG_PERI) + utr.ip = ip_no; + hw_usb_clear_dreqe(&utr, use_port); /* DMA Transfer request disable */ - p_peri = get_usb_int_buf(); + p_peri = get_usb_int_buf_dma(); p_peri->ip = ip_no; p_peri->msginfo = USB_MSG_PCD_INT; p_peri->keyword = USB_INT_DXFIFO; @@ -854,7 +865,7 @@ void usb_cstd_dma_send_complete (uint8_t ip_no, uint16_t use_port) gs_usb_cstd_dma_int.buf[gs_usb_cstd_dma_int.wp].p_cfg = p_cfg; utr.ip = ip_no; - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[utr.ip]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) utr.ipp = usb_hstd_get_usb_ip_adr(utr.ip); @@ -1236,6 +1247,32 @@ uint16_t usb_cstd_dma_get_crtb (usb_utr_t * p_utr) * End of function usb_cstd_dma_get_crtb ******************************************************************************/ + #if (BSP_CFG_RTOS == 2) + +/****************************************************************************** + * Function Name : get_usb_int_buf_dma + * Description : USB interrupt routine. Analyze which USB interrupt occurred + * : and send message to DMA. + * Arguments : none + * Return value : Point to the area for usb_int_t structure + ******************************************************************************/ +usb_utr_t * get_usb_int_buf_dma (void) +{ + static uint16_t count = 0; + usb_utr_t * p; + + p = &g_usb_cstd_int_dma[count]; + + count = ((uint16_t) (((uint16_t) (count + 1)) % USB_INT_BUFSIZE)); + + return p; +} + +/****************************************************************************** + * End of function get_usb_int_buf_dma + ******************************************************************************/ + #endif /* #if (BSP_CFG_RTOS == 2) */ + #endif /* USB_CFG_DMA == USB_CFG_ENABLE */ /****************************************************************************** diff --git a/ra/fsp/src/r_usb_basic/src/hw/r_usb_mcu.c b/ra/fsp/src/r_usb_basic/src/hw/r_usb_mcu.c index df80de9a5..df43f4431 100644 --- a/ra/fsp/src/r_usb_basic/src/hw/r_usb_mcu.c +++ b/ra/fsp/src/r_usb_basic/src/hw/r_usb_mcu.c @@ -501,7 +501,7 @@ uint16_t usb_chattaring (uint16_t * syssts) static void usbfs_usbi_isr (void) { /* Call USB interrupt routine */ - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[USB_IP0]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) usb_hstd_usb_handler(); /* Call interrupt routine */ @@ -530,7 +530,7 @@ static void usbfs_usbi_isr (void) static void usbhs_usbir_isr (void) { /* Condition compilation by the difference of USB function */ - if (USB_MODE_HOST == g_usb_usbmode) + if (USB_MODE_HOST == g_usb_usbmode[USB_IP1]) { #if ((USB_CFG_MODE & USB_CFG_HOST) == USB_CFG_HOST) #if USB_NUM_USBIP == 2 diff --git a/ra/fsp/src/r_usb_hmsc/src/r_usb_hmsc_driver.c b/ra/fsp/src/r_usb_hmsc/src/r_usb_hmsc_driver.c index 600dc71fa..7ec59c838 100644 --- a/ra/fsp/src/r_usb_hmsc/src/r_usb_hmsc_driver.c +++ b/ra/fsp/src/r_usb_hmsc/src/r_usb_hmsc_driver.c @@ -259,8 +259,7 @@ static void usb_hmsc_enumeration (usb_utr_t * mess) } else if (USB_SCSI == g_usb_hmsc_tmp_sub_class[mess->ip]) { - USB_PRINTF0( - "Interface subclass : SCSI transparent command set\n"); + USB_PRINTF0("Interface subclass : SCSI transparent command set\n"); } else if (USB_ATAPI_MMC5 == g_usb_hmsc_tmp_sub_class[mess->ip]) { @@ -313,10 +312,7 @@ static void usb_hmsc_enumeration (usb_utr_t * mess) { /* Send GetDescriptor(Stirng) */ iproduct = g_p_usb_hmsc_device_table[mess->ip][USB_DEV_I_PRODUCT]; - usb_hmsc_get_string_desc(mess, - g_usb_hmsc_devaddr[mess->ip], - iproduct, - usb_hmsc_class_check_result); + usb_hmsc_get_string_desc(mess, g_usb_hmsc_devaddr[mess->ip], iproduct, usb_hmsc_class_check_result); g_usb_hmsc_init_seq[mess->ip]++; } @@ -3168,8 +3164,7 @@ void usb_hmsc_class_check (usb_utr_t * ptr, uint16_t ** table) } else if (USB_SCSI == g_usb_hmsc_tmp_sub_class[ptr->ip]) { - USB_PRINTF0( - "Interface subclass : SCSI transparent command set\n"); + USB_PRINTF0("Interface subclass : SCSI transparent command set\n"); } else if (USB_ATAPI_MMC5 == g_usb_hmsc_tmp_sub_class[ptr->ip]) { diff --git a/ra/fsp/src/rm_littlefs_flash/rm_littlefs_flash.c b/ra/fsp/src/rm_littlefs_flash/rm_littlefs_flash.c index a5a5f4f97..d425b002d 100644 --- a/ra/fsp/src/rm_littlefs_flash/rm_littlefs_flash.c +++ b/ra/fsp/src/rm_littlefs_flash/rm_littlefs_flash.c @@ -36,15 +36,7 @@ #ifdef RM_LITTLEFS_FLASH_DATA_START static const uint32_t rm_littlefs_flash_data_start = RM_LITTLEFS_FLASH_DATA_START; #else - #if defined(__ARMCC_VERSION) -extern uint32_t Image$$DATA_FLASH$$Base; -static const uint32_t rm_littlefs_flash_data_start = ((uint32_t) &Image$$DATA_FLASH$$Base); - #elif defined(__GNUC__) -extern uint32_t __Data_Flash_Start; -static const uint32_t rm_littlefs_flash_data_start = ((uint32_t) &__Data_Flash_Start); - #elif defined(__ICCARM__) -static const uint32_t rm_littlefs_flash_data_start = (0x40100000); - #endif +static const uint32_t rm_littlefs_flash_data_start = BSP_FEATURE_FLASH_DATA_FLASH_START; #endif /** "RLFS" in ASCII, used to determine if channel is open. */ diff --git a/ra/fsp/src/rm_vee_flash/rm_vee_flash.c b/ra/fsp/src/rm_vee_flash/rm_vee_flash.c new file mode 100644 index 000000000..00d067bb4 --- /dev/null +++ b/ra/fsp/src/rm_vee_flash/rm_vee_flash.c @@ -0,0 +1,1960 @@ +/*********************************************************************************************************************** + * Copyright [2020] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved. + * + * This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products + * of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are + * sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use + * of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property + * right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas + * reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION + * IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT + * PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR + * DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM + * EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION + * (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, + * WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, + * OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY + * OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS. + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Includes + **********************************************************************************************************************/ +#include // memset(), memcpy(); +#include "rm_vee_flash_cfg.h" +#include "rm_vee_flash.h" + +/*********************************************************************************************************************** + * Macro definitions + **********************************************************************************************************************/ + +#ifdef RM_VEE_FLASH_DATA_START +static const uint32_t rm_vee_flash_data_start = RM_VEE_FLASH_DATA_START; +#else +static const uint32_t rm_vee_flash_data_start = BSP_FEATURE_FLASH_DATA_FLASH_START; +#endif + +/* INTERRUPT TIMEOUT VALUES (for Open() to catch user global interrupt disable) */ +#ifndef RM_VEE_FLASH_TIMEOUT_US + #define RM_VEE_FLASH_TIMEOUT_US (1000000) +#endif +#ifndef RM_VEE_FLASH_TIMEOUT_REFRESH_US + #define RM_VEE_FLASH_TIMEOUT_REFRESH_US (5000000) +#endif + +#define RM_VEE_FLASH_OPEN (0x52564545U) +#define RM_VEE_FLASH_VALID_CODE (0xBEAD) +#define RM_VEE_FLASH_ID_INVALID (UINT16_MAX) +#define RM_VEE_FLASH_DF_END_ADDRESS (rm_vee_flash_data_start + p_ctrl->p_cfg->total_size) +#define RM_VEE_FLASH_REC_OVERHEAD (sizeof(rm_vee_rec_hdr_t) + sizeof(rm_vee_rec_end_t)) +#define RM_VEE_FLASH_REF_DATA_COUNT (2) +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + #define RM_VEE_FLASH_REF_DATA_AREA_SIZE ((sizeof(rm_vee_ref_hdr_t) + \ + (p_ctrl->p_cfg->ref_data_size * RM_VEE_FLASH_REF_DATA_COUNT))) +#else + #define RM_VEE_FLASH_REF_DATA_AREA_SIZE (0) +#endif + +/* Use appropriate macros for Flash HP or LP */ +#if (BSP_FEATURE_FLASH_HP_DF_BLOCK_SIZE > 0) + #define RM_VEE_FLASH_DF_BLOCK_SIZE (BSP_FEATURE_FLASH_HP_DF_BLOCK_SIZE) +#else + #define RM_VEE_FLASH_DF_BLOCK_SIZE (BSP_FEATURE_FLASH_LP_DF_BLOCK_SIZE) +#endif + +#define RM_VEE_FLASH_DF_WRITE_SIZE (4) + +#define RM_VEE_FLASH_REC_DATA_MAX_SIZE (p_ctrl->segment_size - \ + (sizeof(rm_vee_seg_hdr_t) + (p_ctrl->p_cfg->ref_data_size * 2) + \ + sizeof(rm_vee_ref_hdr_t) + RM_VEE_FLASH_REC_OVERHEAD)) + +/* Version data structure used by error logger macro. */ +static const fsp_version_t g_vee_version = +{ + .api_version_minor = RM_VEE_API_VERSION_MINOR, + .api_version_major = RM_VEE_API_VERSION_MAJOR, + .code_version_major = RM_VEE_FLASH_CODE_VERSION_MAJOR, + .code_version_minor = RM_VEE_FLASH_CODE_VERSION_MINOR +}; + +/*********************************************************************************************************************** + * Typedef definitions + **********************************************************************************************************************/ + +/* Driver Modes */ +typedef enum e_rm_vee_flash_prv_mode +{ + RM_VEE_FLASH_PRV_MODE_NORMAL = 0, + RM_VEE_FLASH_PRV_MODE_REFRESH = RM_VEE_STATE_REFRESH, + RM_VEE_FLASH_PRV_MODE_OVERFLOW = RM_VEE_STATE_OVERFLOW, + RM_VEE_FLASH_PRV_MODE_FLASH_PE_FAIL = RM_VEE_STATE_HARDWARE_FAIL, +} rm_vee_flash_prv_mode_t; + +/* Driver States (used in NORMAL and REFRESH modes) */ +typedef enum e_rm_vee_flash_prv_states +{ + RM_VEE_FLASH_PRV_STATES_UNINITIALIZED = 0, + RM_VEE_FLASH_PRV_STATES_READY, + RM_VEE_FLASH_PRV_STATES_WRITE_REC_HDR, + RM_VEE_FLASH_PRV_STATES_WRITE_REC_DATA, + RM_VEE_FLASH_PRV_STATES_WRITE_REC_END, + RM_VEE_FLASH_PRV_STATES_WRITE_REC_REFRESH, + RM_VEE_FLASH_PRV_STATES_WRITE_NEW_REFDATA, + RM_VEE_FLASH_PRV_STATES_WRITE_NEW_REFDATA_HDR, + RM_VEE_FLASH_PRV_STATES_WRITE_REFDATA, + RM_VEE_FLASH_PRV_STATES_WRITE_SEG_HDR, + RM_VEE_FLASH_PRV_STATES_ERASE_SEG, +} rm_vee_flash_prv_states_t; + +typedef enum e_rm_vee_flash_refresh_refresh +{ + RM_VEE_FLASH_PRV_REFRESH_USER_REQ, + RM_VEE_FLASH_PRV_REFRESH_REFDATA_OVFL, + RM_VEE_FLASH_PRV_REFRESH_RECORD_OVFL +} rm_vee_flash_refresh_refresh_t; + +/*********************************************************************************************************************** + * External functions + **********************************************************************************************************************/ + +/*********************************************************************************************************************** + * Private global variables and functions + **********************************************************************************************************************/ + +/* Internal functions */ +static fsp_err_t rm_vee_internal_open(rm_vee_flash_instance_ctrl_t * const p_ctrl); +static fsp_err_t rm_vee_inspect_segments(rm_vee_flash_instance_ctrl_t * const p_ctrl); +static fsp_err_t rm_vee_refresh_next_data_source(rm_vee_flash_instance_ctrl_t * const p_ctrl); +static uint32_t rm_vee_get_next_id(rm_vee_flash_instance_ctrl_t * const p_ctrl); +static fsp_err_t rm_vee_restore_previous_seg(rm_vee_flash_instance_ctrl_t * const p_ctrl); +static fsp_err_t rm_vee_write_seg_hdr(rm_vee_flash_instance_ctrl_t * const p_ctrl); +static fsp_err_t rm_vee_init_record_xfer(rm_vee_flash_instance_ctrl_t * const p_ctrl, uint32_t id); +static fsp_err_t rm_vee_xfer_next_chunk(rm_vee_flash_instance_ctrl_t * const p_ctrl, rm_vee_flash_prv_states_t state); +static void rm_vee_flash_err_handle(rm_vee_flash_instance_ctrl_t * const p_ctrl, fsp_err_t err); +static fsp_err_t rm_vee_state_get(rm_vee_flash_instance_ctrl_t * const p_ctrl, rm_vee_state_t * p_state); +static fsp_err_t rm_vee_blocking_erase_segment(rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t seg_addr, + bool contains_refdata); +static fsp_err_t rm_vee_load_record_table(rm_vee_flash_instance_ctrl_t * const p_ctrl, bool initial_load); +static fsp_err_t rm_vee_blocking_blankcheck(rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t addr, + uint32_t num_bytes, + flash_event_t * p_event); +static fsp_err_t rm_vee_blocking_erase(rm_vee_flash_instance_ctrl_t * const p_ctrl, uint32_t addr, uint32_t num_blocks); +static fsp_err_t rm_vee_blocking_write(rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t src_addr, + uint32_t dst_addr, + uint32_t num_bytes); +static fsp_err_t rm_vee_internal_write_rec(rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t rec_id, + uint8_t const * const p_rec_data, + uint32_t num_bytes); +static fsp_err_t rm_vee_start_seg_refresh(rm_vee_flash_instance_ctrl_t * const p_ctrl, + rm_vee_flash_refresh_refresh_t refresh_type, + uint32_t rec_id, + uint32_t addr, + uint32_t num_bytes); + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT +static fsp_err_t rm_vee_inspect_new_refdata(rm_vee_flash_instance_ctrl_t * const p_ctrl); +static void rm_vee_init_refdata_xfer(rm_vee_flash_instance_ctrl_t * const p_ctrl); + +#endif + +void rm_vee_flash_callback(flash_callback_args_t * p_args); + +const rm_vee_api_t g_rm_vee_on_flash = +{ + .open = RM_VEE_FLASH_Open, + .recordWrite = RM_VEE_FLASH_RecordWrite, + .recordPtrGet = RM_VEE_FLASH_RecordPtrGet, + .refDataWrite = RM_VEE_FLASH_RefDataWrite, + .refDataPtrGet = RM_VEE_FLASH_RefDataPtrGet, + .statusGet = RM_VEE_FLASH_StatusGet, + .refresh = RM_VEE_FLASH_Refresh, + .format = RM_VEE_FLASH_Format, + .close = RM_VEE_FLASH_Close, + .versionGet = RM_VEE_FLASH_VersionGet, +}; + +/*******************************************************************************************************************//** + * @addtogroup RM_VEE_FLASH + * @{ + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * Open the RM_VEE_FLASH driver module + * + * Implements @ref rm_vee_api_t::open + * + * Initializes the driver's internal structures and opens the Flash driver. The Flash driver must be closed prior to + * opening VEE. The error code FSP_SUCCESS_RECOVERY indicates that VEE detected corrupted data; most likely due to a power + * loss during a data flash write or erase. In these cases, an automatic internal Refresh is performed and the partially + * written data is lost. + * + * @retval FSP_SUCCESS Successful. FSP_SUCCESS_RECOVERY changed to FSP_SUCCESS + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + * @retval FSP_ERR_ALREADY_OPEN This function has already been called. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * in hardware. + * @retval FSP_ERR_TIMEOUT Interrupts disabled outside of VEE + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + * @retval FSP_ERR_INVALID_ARGUMENT The supplied configuration is invalid. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_Open (rm_vee_ctrl_t * const p_api_ctrl, rm_vee_cfg_t const * const p_cfg) +{ + uint32_t i; + fsp_err_t err; + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; + +#if RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE == 1 + FSP_ASSERT(p_ctrl); + FSP_ASSERT(p_cfg); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN != p_ctrl->open, FSP_ERR_ALREADY_OPEN); + FSP_ERROR_RETURN(2 <= p_cfg->num_segments, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(BSP_DATA_FLASH_SIZE_BYTES >= p_cfg->total_size, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(0 == (p_cfg->total_size % p_cfg->num_segments), FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(0 == (p_cfg->ref_data_size % RM_VEE_FLASH_DF_WRITE_SIZE), FSP_ERR_INVALID_ARGUMENT); +#endif + + p_ctrl->p_cfg = p_cfg; + p_ctrl->p_flash = ((rm_vee_flash_cfg_t *) p_ctrl->p_cfg->p_extend)->p_flash; + p_ctrl->segment_size = p_cfg->total_size / p_cfg->num_segments; + + /* Open flash */ + err = p_ctrl->p_flash->p_api->open(p_ctrl->p_flash->p_ctrl, p_ctrl->p_flash->p_cfg); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_UNINITIALIZED; + + /* Initialize VEE */ + err = rm_vee_internal_open(p_ctrl); + + /* Do a refresh if active segment corrupted */ + if (FSP_ERR_NOT_INITIALIZED == err) + { + err = rm_vee_start_seg_refresh(p_ctrl, RM_VEE_FLASH_PRV_REFRESH_USER_REQ, 0, 0, 0); + + if (FSP_SUCCESS == err) + { + /* Block until Refresh done (Refresh and/or error condition will clear driver lock in callback function) */ + for (i = 0; i < RM_VEE_FLASH_TIMEOUT_REFRESH_US; i++) + { + if (p_ctrl->state == RM_VEE_FLASH_PRV_STATES_READY) + { + break; + } + + R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_MICROSECONDS); + } + + if (RM_VEE_FLASH_TIMEOUT_REFRESH_US == i) + { + err = FSP_ERR_TIMEOUT; + } + else if (RM_VEE_FLASH_PRV_MODE_FLASH_PE_FAIL == p_ctrl->mode) + { + err = FSP_ERR_PE_FAILURE; + } + else + { + /* Do nothing. */ + } + } + } + + /* Close Flash if fatal error */ + if (FSP_SUCCESS != err) + { + /* NOTE: If a timeout occurred, the Flash driver is "hung" in a BUSY condition and cannot close. + * This will cause an error at the next VEE open. This is considered a user development issue + * and should not be addressed by modifying the drivers. + */ + p_ctrl->p_flash->p_api->close(p_ctrl->p_flash->p_ctrl); + } + else + { + p_ctrl->seg_hdr.refresh_cnt = ((rm_vee_seg_hdr_t *) p_ctrl->active_seg_addr)->refresh_cnt; + p_ctrl->seg_hdr.pad = 0; + p_ctrl->seg_hdr.valid_code = RM_VEE_FLASH_VALID_CODE; + + p_ctrl->rec_hdr.length = 0; + p_ctrl->rec_hdr.offset = 0; + p_ctrl->p_rec_data = NULL; + + p_ctrl->rec_end.id = (uint16_t) RM_VEE_FLASH_ID_INVALID; + p_ctrl->rec_end.valid_code = RM_VEE_FLASH_VALID_CODE; + + p_ctrl->ref_hdr.pad = 0; + p_ctrl->ref_hdr.valid_code = RM_VEE_FLASH_VALID_CODE; + + p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_NORMAL; + + p_ctrl->open = RM_VEE_FLASH_OPEN; + } + + return err; +} + +/*******************************************************************************************************************//** + * Writes a record to data flash. + * + * Implements @ref rm_vee_api_t::recordWrite + * + * This function writes num_bytes of data pointed to by p_rec_data to data flash. This function returns immediately + * after starting the flash write. BE SURE NOT TO MODIFY the data buffer contents until after the write completes. This + * includes exiting the calling function when the data buffer is a local variable (stack may be used by another function + * and corrupt the data buffer contents). + * + * @retval FSP_SUCCESS Write started successfully. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + * @retval FSP_ERR_INVALID_ARGUMENT An argument contains an illegal value. + * @retval FSP_ERR_INVALID_MODE The operation cannot be started in the current mode. + * @retval FSP_ERR_IN_USE Last API call still executing. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * in hardware. + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_RecordWrite (rm_vee_ctrl_t * const p_api_ctrl, + uint32_t const rec_id, + uint8_t const * const p_rec_data, + uint32_t const num_bytes) +{ + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; + +#if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ASSERT(p_rec_data); + + FSP_ERROR_RETURN(rec_id <= p_ctrl->p_cfg->record_max_id, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(0 != num_bytes, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN((num_bytes % RM_VEE_FLASH_DF_WRITE_SIZE) == 0, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(RM_VEE_FLASH_REC_DATA_MAX_SIZE >= num_bytes, FSP_ERR_INVALID_ARGUMENT); + + FSP_ASSERT(NULL != p_rec_data); + + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_MODE_OVERFLOW != p_ctrl->mode, FSP_ERR_INVALID_MODE); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_MODE_FLASH_PE_FAIL != p_ctrl->mode, FSP_ERR_INVALID_MODE); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state, FSP_ERR_IN_USE); +#endif + + fsp_err_t err = rm_vee_internal_write_rec(p_ctrl, rec_id, p_rec_data, num_bytes); + rm_vee_flash_err_handle(p_ctrl, err); + + return err; +} + +/*******************************************************************************************************************//** + * Writes new Reference data to the reference update area. + * + * Implements @ref rm_vee_api_t::refDataWrite + * + * This function writes VEE_CFG_REF_DATA_SIZE bytes pointed to by p_ref_data to data flash. This function + * returns immediately after starting the flash write. BE SURE NOT TO MODIFY the data buffer contents until after the + * write completes. + * + * @retval FSP_SUCCESS Write started successfully. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_IN_USE Last API call still executing. + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + * @retval FSP_ERR_INVALID_MODE The operation cannot be started in the current mode. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * in hardware. + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_UNSUPPORTED Reference data is not supported in the current configuration. + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_RefDataWrite (rm_vee_ctrl_t * const p_api_ctrl, uint8_t const * const p_ref_data) +{ +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; + fsp_err_t err; + #if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ASSERT(p_ref_data); + + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_MODE_OVERFLOW != p_ctrl->mode, FSP_ERR_INVALID_MODE); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_MODE_FLASH_PE_FAIL != p_ctrl->mode, FSP_ERR_INVALID_MODE); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state, FSP_ERR_IN_USE); + + FSP_ERROR_RETURN(0 < p_ctrl->p_cfg->ref_data_size, FSP_ERR_UNSUPPORTED); + #endif + + if (false == p_ctrl->new_refdata_valid) + { + /* Initiate refdata write */ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_WRITE_NEW_REFDATA; + err = p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + (uint32_t) p_ref_data, + p_ctrl->ref_hdr_addr + sizeof(rm_vee_ref_hdr_t), + p_ctrl->p_cfg->ref_data_size); + } + else + { + /* Start refresh */ + err = rm_vee_start_seg_refresh(p_ctrl, + RM_VEE_FLASH_PRV_REFRESH_REFDATA_OVFL, + RM_VEE_FLASH_ID_INVALID, + (uint32_t) p_ref_data, + p_ctrl->p_cfg->ref_data_size); + } + + rm_vee_flash_err_handle(p_ctrl, err); + + return err; +#else + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(p_ref_data); + + return FSP_ERR_UNSUPPORTED; +#endif +} + +/*******************************************************************************************************************//** + * Gets a pointer to the most recent reference data. + * + * Implements @ref rm_vee_api_t::recordPtrGet + * + * This function sets the argument pointer to the most recent version of the reference data in flash. Flash cannot be + * accessed for reading and writing at the same time. Therefore, reading the data at p_ref_data must be completed prior + * to initiating any type of Flash write. + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_IN_USE Last API call still executing. + * @retval FSP_ERR_ASSERTION p_ref_data is NULL. + * @retval FSP_ERR_INVALID_ARGUMENT Reference data not configured. + * @retval FSP_ERR_NOT_FOUND The record associated with the requested ID could not be found. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_RecordPtrGet (rm_vee_ctrl_t * const p_api_ctrl, + uint32_t const rec_id, + uint8_t ** const pp_rec_data, + uint32_t * const p_num_bytes) +{ + rm_vee_rec_hdr_t * p_hdr; + fsp_err_t err; + uint32_t addr; + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; + +#if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ASSERT(pp_rec_data); + FSP_ASSERT(p_num_bytes); + FSP_ERROR_RETURN(p_ctrl->p_cfg->record_max_id >= rec_id, FSP_ERR_INVALID_ARGUMENT); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state, FSP_ERR_IN_USE); +#endif + + if (0 == p_ctrl->p_cfg->rec_offset[rec_id]) + { + err = FSP_ERR_NOT_FOUND; + } + else + { + addr = p_ctrl->active_seg_addr + p_ctrl->p_cfg->rec_offset[rec_id]; + + /* Load start of record data and its length */ + p_hdr = (rm_vee_rec_hdr_t *) addr; + *p_num_bytes = p_hdr->length; + addr += sizeof(rm_vee_rec_hdr_t); + *pp_rec_data = (uint8_t *) addr; + err = FSP_SUCCESS; + } + + return err; +} + +/*******************************************************************************************************************//** + * Gets a pointer to the most recent reference data. + * + * Implements @ref rm_vee_api_t::recordPtrGet + * + * This function sets the argument pointer to the most recent version of the reference data in flash. Flash cannot be + * accessed for reading and writing at the same time. + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_IN_USE Last API call still executing. + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + * @retval FSP_ERR_UNSUPPORTED Reference data is not supported in the current configuration. + * @retval FSP_ERR_NOT_FOUND No reference data was found. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_RefDataPtrGet (rm_vee_ctrl_t * const p_api_ctrl, uint8_t ** const pp_ref_data) +{ +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; + fsp_err_t err = FSP_SUCCESS; + #if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ASSERT(pp_ref_data); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state, FSP_ERR_IN_USE); + + FSP_ERROR_RETURN(0 < p_ctrl->p_cfg->ref_data_size, FSP_ERR_UNSUPPORTED); + #endif + + if (true == p_ctrl->new_refdata_valid) + { + *pp_ref_data = + (uint8_t *) (p_ctrl->active_seg_addr + (p_ctrl->segment_size - (2 * p_ctrl->p_cfg->ref_data_size))); + } + else if (true == p_ctrl->factory_refdata) + { + *pp_ref_data = (uint8_t *) (p_ctrl->active_seg_addr + (p_ctrl->segment_size - p_ctrl->p_cfg->ref_data_size)); + } + else + { + err = FSP_ERR_NOT_FOUND; + } + + return err; +#else + FSP_PARAMETER_NOT_USED(p_api_ctrl); + FSP_PARAMETER_NOT_USED(pp_ref_data); + + return FSP_ERR_UNSUPPORTED; +#endif +} + +/*******************************************************************************************************************//** + * Manually start a refresh operation + * + * Implements @ref rm_vee_api_t::refresh + * + * This function is used to start a segment Refresh at any time. The Refresh process by default occurs automatically + * when no more record or reference data space is available and a Write is requested. However, the app may desire to + * force a refresh when it knows it is running low on space and large amounts of data are about to be recorded. + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + * @retval FSP_ERR_IN_USE Last API call still executing. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * in hardware. + * @retval FSP_ERR_INVALID_MODE The operation cannot be started in the current mode. + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_Refresh (rm_vee_ctrl_t * const p_api_ctrl) +{ + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; +#if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_MODE_OVERFLOW != p_ctrl->mode, FSP_ERR_INVALID_MODE); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_MODE_FLASH_PE_FAIL != p_ctrl->mode, FSP_ERR_INVALID_MODE); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state, FSP_ERR_IN_USE); +#endif + + fsp_err_t err = rm_vee_start_seg_refresh(p_ctrl, RM_VEE_FLASH_PRV_REFRESH_USER_REQ, 0, 0, 0); + rm_vee_flash_err_handle(p_ctrl, err); + + return err; +} + +/*******************************************************************************************************************//** + * Start a manual format operation. + * + * Implements @ref rm_vee_api_t::format + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_IN_USE Last API call still executing. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_Format (rm_vee_ctrl_t * const p_api_ctrl, uint8_t const * const p_ref_data) +{ + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; +#if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ERROR_RETURN(RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state, FSP_ERR_IN_USE); +#endif + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_UNINITIALIZED; + fsp_err_t err = + rm_vee_blocking_erase(p_ctrl, rm_vee_flash_data_start, + (p_ctrl->p_cfg->total_size / RM_VEE_FLASH_DF_BLOCK_SIZE)); + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + if ((0 != p_ctrl->p_cfg->ref_data_size) && (NULL != p_ref_data) && (FSP_SUCCESS == err)) + { + err = + rm_vee_blocking_write(p_ctrl, + (uint32_t) p_ref_data, + (RM_VEE_FLASH_DF_END_ADDRESS - p_ctrl->p_cfg->ref_data_size), + p_ctrl->p_cfg->ref_data_size); + } + +#else + FSP_PARAMETER_NOT_USED(p_ref_data); +#endif + + if (FSP_SUCCESS == err) + { + err = rm_vee_internal_open(p_ctrl); + } + + rm_vee_flash_err_handle(p_ctrl, err); + + return err; +} + +/*******************************************************************************************************************//** + * Get the current status of the driver. + * + * Implements @ref rm_vee_api_t::statusGet + * + * This command is typically used to verify that the last Write or Refresh command has completed before attempting to + * perform another API call. + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_StatusGet (rm_vee_ctrl_t * const p_api_ctrl, rm_vee_status_t * const p_status) +{ + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; +#if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); + FSP_ASSERT(p_status); +#endif + + fsp_err_t err = FSP_SUCCESS; + + err = rm_vee_state_get(p_ctrl, &p_status->state); + + p_status->last_id = p_ctrl->last_id; + + p_status->segment_erase_count = ((rm_vee_seg_hdr_t *) p_ctrl->active_seg_addr)->refresh_cnt; + + p_status->space_available = p_ctrl->ref_hdr_addr - p_ctrl->next_write_addr; + + return err; +} + +/*******************************************************************************************************************//** + * Closes the Flash driver and VEE driver. + * + * Implements @ref rm_vee_api_t::close + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_NOT_OPEN The module has not been opened. + * @retval FSP_ERR_ASSERTION An input parameter is NULL. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_Close (rm_vee_ctrl_t * const p_api_ctrl) +{ + rm_vee_flash_instance_ctrl_t * const p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_api_ctrl; + +#if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_ctrl); + FSP_ERROR_RETURN(RM_VEE_FLASH_OPEN == p_ctrl->open, FSP_ERR_NOT_OPEN); +#endif + + p_ctrl->open = 0; + + p_ctrl->p_flash->p_api->close(p_ctrl->p_flash->p_ctrl); + + p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_NORMAL; + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_UNINITIALIZED; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * Get the driver version based on compile time macros. + * + * Implements @ref rm_vee_api_t::versionGet + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_ASSERTION p_version is NULL. + **********************************************************************************************************************/ +fsp_err_t RM_VEE_FLASH_VersionGet (fsp_version_t * const p_version) +{ +#if (RM_VEE_FLASH_CFG_PARAM_CHECKING_ENABLE) + FSP_ASSERT(p_version); +#endif + + p_version->version_id = g_vee_version.version_id; + + return FSP_SUCCESS; +} + +/*******************************************************************************************************************//** + * @} (end defgroup RM_VEE_FLASH) + **********************************************************************************************************************/ + +/*******************************************************************************************************************//** + * This function is called by the API Open function and the Control() CMD_FORMAT operation. It handles + * all VEE initialization other than opening the flash driver. No locking/unlocking occurs within this + * function. + * + * @param p_ctrl Pointer to the control block + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_internal_open (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + fsp_err_t err; + + /* Clear record offset cache */ + memset((void *) &p_ctrl->p_cfg->rec_offset[0], 0, + ((p_ctrl->p_cfg->record_max_id + 1) * sizeof(p_ctrl->p_cfg->rec_offset[0]))); + + p_ctrl->irq_flag = false; + p_ctrl->last_id = (uint16_t) RM_VEE_FLASH_ID_INVALID; + + /* Determine active segment and erase incomplete segments if any (refresh or erase interrupted). */ + err = rm_vee_inspect_segments(p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + /* Get latest record location for each ID and determine next write location. */ + err = rm_vee_load_record_table(p_ctrl, true); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + p_ctrl->new_refdata_valid = false; + p_ctrl->factory_refdata = false; + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + if (0 != p_ctrl->p_cfg->ref_data_size) + { + /* Determine if reference data update area is used and is valid */ + err = rm_vee_inspect_new_refdata(p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } +#endif + + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; + + return err; +} + +/*******************************************************************************************************************//** + * This function walks through each data flash segment. If it is not the active segment, it is erased + * if not blank. If more than one active segment is detected, the older one is erased. If no active segment + * is found, the final segment is made the active segment. + * + * @param p_ctrl Pointer to the control block + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_inspect_segments (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + bool must_have_factory_refdata = false; + uint32_t addr; + uint32_t num_bytes; + fsp_err_t err = FSP_SUCCESS; + rm_vee_seg_hdr_t * p_current_segment; + rm_vee_seg_hdr_t * p_active_segment; + flash_event_t event; + + /* Set active segment to 0 (active seg not found yet) */ + p_ctrl->active_seg_addr = 0; + + /* Loop through each segment */ + for (uint32_t i = 0; i < p_ctrl->p_cfg->num_segments; i++) + { + addr = rm_vee_flash_data_start + (i * p_ctrl->segment_size); + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + + /* Set flag if on final segment and have not found active segment yet and refdata should be present. */ + if ((p_ctrl->active_seg_addr == 0) && (i == (p_ctrl->p_cfg->num_segments - 1)) && + (0 != p_ctrl->p_cfg->ref_data_size)) + { + must_have_factory_refdata = true; + } +#endif + + /* See if segment header is blank */ + err = rm_vee_blocking_blankcheck(p_ctrl, addr, sizeof(rm_vee_seg_hdr_t), &event); + if (FSP_SUCCESS != err) + { + break; + } + + /* If header is blank, make sure record area is blank (refresh or erase may have been interrupted). */ + if (FLASH_EVENT_BLANK == event) + { + /* Get size of record data area */ + num_bytes = p_ctrl->segment_size; + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + if (must_have_factory_refdata == true) + { + num_bytes -= RM_VEE_FLASH_REF_DATA_AREA_SIZE; + } +#endif + + /* See if any record data present (should not be any) */ + err = rm_vee_blocking_blankcheck(p_ctrl, addr, num_bytes, &event); + if ((FSP_SUCCESS == err) && (FLASH_EVENT_NOT_BLANK == event)) + { + /* Erase segment if reference data not present */ + err = rm_vee_blocking_erase_segment(p_ctrl, addr, must_have_factory_refdata); + } + } + else + { + /* If header is not blank, see if has valid header */ + p_current_segment = + (rm_vee_seg_hdr_t *) addr; + + if (RM_VEE_FLASH_VALID_CODE == p_current_segment + ->valid_code) + { + /* If another active segment was already found, erase the older segment */ + if (p_ctrl->active_seg_addr != 0) + { + p_active_segment = (rm_vee_seg_hdr_t *) p_ctrl->active_seg_addr; + + if (p_current_segment + ->refresh_cnt > p_active_segment->refresh_cnt) + { + /* Current segment is newer, erase older */ + err = + rm_vee_blocking_erase(p_ctrl, p_ctrl->active_seg_addr, + (p_ctrl->segment_size / RM_VEE_FLASH_DF_BLOCK_SIZE)); + p_ctrl->active_seg_addr = addr; + } + else + { + /* Else current segment is older */ + err = + rm_vee_blocking_erase(p_ctrl, addr, (p_ctrl->segment_size / RM_VEE_FLASH_DF_BLOCK_SIZE)); + } + } + else + { + /* Save this segment as active segment */ + p_ctrl->active_seg_addr = addr; + } + } + else + { + /* Erase segment if reference data not present */ + err = rm_vee_blocking_erase_segment(p_ctrl, addr, must_have_factory_refdata); + } + } + + /* If a flash operation has failed break out of the loop */ + if (FSP_SUCCESS != err) + { + break; + } + } + + /* If no active segment found, set highest flash segment as active in driver control structure. */ + if (0 == p_ctrl->active_seg_addr) + { + p_ctrl->active_seg_addr = RM_VEE_FLASH_DF_END_ADDRESS - p_ctrl->segment_size; + + /* Make segment active in flash if no errors were encountered */ + if (FSP_SUCCESS == err) + { + p_ctrl->seg_hdr.refresh_cnt = 0; + p_ctrl->seg_hdr.valid_code = RM_VEE_FLASH_VALID_CODE; + err = + rm_vee_blocking_write(p_ctrl, + (uint32_t) &p_ctrl->seg_hdr, + RM_VEE_FLASH_DF_END_ADDRESS - p_ctrl->segment_size, + sizeof(rm_vee_seg_hdr_t)); + } + } + + return err; +} + +/*******************************************************************************************************************//** + * This function erases the segment specified IF it does not contain reference data. + * + * @param p_ctrl Pointer to the control block + * @param seg_addr Address of segment to erase. + * @param contains_refdata true = segment contains reference data. Segment will not be erased. + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_blocking_erase_segment (rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t seg_addr, + bool contains_refdata) +{ + fsp_err_t err = FSP_SUCCESS; + + /* Erase segment only if reference data not present */ + if (false == contains_refdata) + { + err = + rm_vee_blocking_erase(p_ctrl, seg_addr, (p_ctrl->segment_size / RM_VEE_FLASH_DF_BLOCK_SIZE)); + } + else + { + err = FSP_ERR_NOT_INITIALIZED; + } + + return err; +} + +/*******************************************************************************************************************//** + * This function walks through the active segment and loads the offset for the start of each record found + * into p_ctrl->rec_offset[] using the record ID as the array index. When the last record is found, + * p_ctrl->next_write_addr is loaded with the next available address to write a record to. + * + * @param p_ctrl Pointer to the control block + * @param initial_load true = Use blankcheck to determine end of record area. + * (called by Open() or VEE_CMD_FORMAT. State=RM_VEE_FLASH_PRV_STATES_UNITIALIZED) + * false = Use p_ctrl->refresh_src_rec_end_addr to determine end of record area. + * (called by failed Refresh process. Need to reload p_ctrl->rec_offset[] with original segment) + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_load_record_table (rm_vee_flash_instance_ctrl_t * const p_ctrl, bool initial_load) +{ + rm_vee_rec_hdr_t * p_hdr; + fsp_err_t err = FSP_SUCCESS; + uint32_t addr; + rm_vee_rec_end_t * p_end; + flash_event_t event = FLASH_EVENT_BLANK; + + /* Get start of record area */ + addr = p_ctrl->active_seg_addr + sizeof(rm_vee_seg_hdr_t);; + + /* Get end of record area */ + p_ctrl->ref_hdr_addr = p_ctrl->active_seg_addr + p_ctrl->segment_size; + p_ctrl->ref_hdr_addr -= RM_VEE_FLASH_REF_DATA_AREA_SIZE; + + /* Loop through every record until find empty space */ + while (addr < p_ctrl->ref_hdr_addr) + { + /* Exit loop when no more records found */ + if (initial_load == true) + { + /* When this function is called by Open() or VEE_CMD_FORMAT, stop when find blank flash */ + err = rm_vee_blocking_blankcheck(p_ctrl, addr, RM_VEE_FLASH_DF_WRITE_SIZE, &event); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + if (FLASH_EVENT_BLANK == event) + { + break; + } + } + else + { + /* When this function is called by failed Refresh, stop when at end address from original segment */ + if (addr == p_ctrl->refresh_src_rec_end_addr) + { + break; + } + } + + /* Get trailer for current record */ + p_hdr = (rm_vee_rec_hdr_t *) addr; + + /* Variable length records */ + if (RM_VEE_FLASH_REC_DATA_MAX_SIZE >= p_hdr->length) + { + p_end = (rm_vee_rec_end_t *) (addr + sizeof(rm_vee_rec_hdr_t) + p_hdr->length); + } + else + { + err = FSP_ERR_NOT_INITIALIZED; + break; + } + + /* Save record offset if complete record found (reset may have occurred during a write) */ + if (RM_VEE_FLASH_VALID_CODE == p_end->valid_code) + { + p_ctrl->p_cfg->rec_offset[p_end->id] = (uint16_t) (addr - p_ctrl->active_seg_addr); + + /* Save for statusGet */ + p_ctrl->last_id = p_end->id; + } + else + { + err = FSP_ERR_NOT_INITIALIZED; + break; + } + + /* Set address to start of next record */ + addr = (uint32_t) p_end + sizeof(rm_vee_rec_end_t); + } + + /* NOTE: The Refresh process copies records from locations identified by p_ctrl->p_cfg->rec_offset[]. + * During the Refresh process, the array is updated for the new record locations in the new segment. + * Should the Refresh process fail, the array will contain a mixture of offsets from both segments. + * In that case, p_ctrl->p_cfg->rec_offset[] should be set back to the original segment record locations. + * Because Refresh may have failed due to flash error (vs Overflow condition), it is desirable + * not to perform more flash operations like blankcheck. + * For this reason, where the record parsing should end is saved in p_ctrl->refresh_src_rec_end_addr. + */ + p_ctrl->refresh_src_rec_end_addr = addr; + + /* NOTE: p_ctrl->next_write_addr is set to the next record location available to write. + * This value will not be used if an error condition was encountered. + */ + p_ctrl->next_write_addr = addr; + + return err; +} + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + +/*******************************************************************************************************************//** + * This function inspects the reference data update area to see if it has been written to. The reference + * data header is also inspected to see if a valid code exists (determines if updated data is real or + * just garbage). The flags new_refdata_used and new_refdata_valid are set appropriately in the main + * VEE control structure. + * + * @param p_ctrl Pointer to the control block + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_inspect_new_refdata (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + fsp_err_t err = FSP_SUCCESS; + + uint32_t addr; + rm_vee_ref_hdr_t * p_hdr; + flash_event_t event; + + /* Get refdata header address */ + addr = p_ctrl->active_seg_addr + (p_ctrl->segment_size - RM_VEE_FLASH_REF_DATA_AREA_SIZE); + + err = rm_vee_blocking_blankcheck(p_ctrl, addr, sizeof(rm_vee_ref_hdr_t), &event); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + if (FLASH_EVENT_BLANK == event) + { + /* Header never written. Update area should be blank. See if incomplete write occurred */ + addr += sizeof(rm_vee_ref_hdr_t); + + /* Just blankcheck first few bytes; app may not use entire reserved area */ + err = rm_vee_blocking_blankcheck(p_ctrl, addr, RM_VEE_FLASH_DF_WRITE_SIZE, &event); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + if (FLASH_EVENT_NOT_BLANK == event) + { + err = FSP_ERR_NOT_INITIALIZED; + } + } + else + { + /* Header written. Make sure is valid. */ + p_hdr = (rm_vee_ref_hdr_t *) addr; + if (RM_VEE_FLASH_VALID_CODE == p_hdr->valid_code) + { + p_ctrl->new_refdata_valid = true; + } + else + { + err = FSP_ERR_NOT_INITIALIZED; + } + } + + addr = p_ctrl->active_seg_addr + (p_ctrl->segment_size - p_ctrl->p_cfg->ref_data_size); + + fsp_err_t err2 = rm_vee_blocking_blankcheck(p_ctrl, addr, RM_VEE_FLASH_DF_WRITE_SIZE, &event); + FSP_ERROR_RETURN(FSP_SUCCESS == err2, err2); + + if (FLASH_EVENT_NOT_BLANK == event) + { + p_ctrl->factory_refdata = true; + } + + return err; +} + +#endif + +/*******************************************************************************************************************//** + * This function performs a blankcheck on the number of bytes passed in starting at the address specified. + * This function blocks until the flash operation completes. A failure condition should never occur unless + * bad flash hardware exists. If flash does fail, the error event is stored in flash_err_event in the + * main control structure. + * + * @param p_ctrl Pointer to the control block + * @param addr Address to start blankcheck (already verified on FLASH_CF_MIN_PGM_SIZE boundary) + * @param num_bytes Number of bytes to blankcheck + * (already verified to be multiple of FLASH_CF_MIN_PGM_SIZE bytes) + * @param p_event Destination loaded with FLASH_EVENT_BLANK if address range specified is blank + * Destination loaded with FLASH_EVENT_NOT_BLANK if address range specified is not blank + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + **********************************************************************************************************************/ +static fsp_err_t rm_vee_blocking_blankcheck (rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t addr, + uint32_t num_bytes, + flash_event_t * p_event) +{ + uint32_t i; + fsp_err_t err = FSP_SUCCESS; + flash_result_t result; + + /* Clear interrupt-occurred flag */ + p_ctrl->irq_flag = false; + + /* Start blankcheck. "result" ignored because in BGO mode. */ + err = p_ctrl->p_flash->p_api->blankCheck(p_ctrl->p_flash->p_ctrl, addr, num_bytes, &result); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + /* Poll for interrupt complete. Do timeout check in case app disabled interrupts. + * Blankcheck is for RM_VEE_FLASH_DF_WRITE_SIZE to p_ctrl->segment_size bytes. + */ + for (i = 0; i < RM_VEE_FLASH_TIMEOUT_US; i++) + { + if (p_ctrl->irq_flag == true) + { + break; + } + + R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_MICROSECONDS); + } + + *p_event = p_ctrl->flash_event; + + FSP_ERROR_RETURN(RM_VEE_FLASH_TIMEOUT_US != i, FSP_ERR_TIMEOUT); + + if ((FLASH_EVENT_BLANK != p_ctrl->flash_event) && (FLASH_EVENT_NOT_BLANK != p_ctrl->flash_event)) + { + p_ctrl->flash_err_event = p_ctrl->flash_event; + err = FSP_ERR_PE_FAILURE; + } + + return err; +} + +/*******************************************************************************************************************//** + * This function erases the number of blocks specified starting at the address specified. This function + * blocks until the erase operation completes. A failure condition should never occur unless bad flash + * hardware exists. If flash does fail, the error event is stored in flash_err_event in the main + * control structure. + * + * @param p_ctrl Pointer to the control block + * @param addr Block address to start erase + * @param num_blocks Number of blocks to erase + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + **********************************************************************************************************************/ +static fsp_err_t rm_vee_blocking_erase (rm_vee_flash_instance_ctrl_t * const p_ctrl, uint32_t addr, uint32_t num_blocks) +{ + uint32_t i; + fsp_err_t err = FSP_SUCCESS; + + /* Clear interrupt-occurred flag */ + p_ctrl->irq_flag = false; + + p_ctrl->p_flash->p_api->erase(p_ctrl->p_flash->p_ctrl, addr, num_blocks); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + /* Poll for interrupt complete. Do timeout check in case app disabled interrupts. + * Erase is for (p_ctrl->segment_size/RM_VEE_FLASH_DF_BLOCK_SIZE). + */ + for (i = 0; i < RM_VEE_FLASH_TIMEOUT_US; i++) + { + if (p_ctrl->irq_flag == true) + { + break; + } + + R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_MICROSECONDS); + } + + FSP_ERROR_RETURN(RM_VEE_FLASH_TIMEOUT_US != i, FSP_ERR_TIMEOUT); + + if (FLASH_EVENT_ERASE_COMPLETE != p_ctrl->flash_event) + { + p_ctrl->flash_err_event = p_ctrl->flash_event; + err = FSP_ERR_PE_FAILURE; + } + + return err; +} + +/*******************************************************************************************************************//** + * This function writes the num_bytes from src addr to dst_addr. This function blocks until the write + * operation completes. A failure condition should never occur unless bad flash hardware exists. If flash + * does fail, the error event is stored in flash_err_event in the main control structure. + * + * @param p_ctrl Pointer to the control block + * @param src_addr Address of data to write (already verified to be on FLASH_CF_MIN_PGM_SIZE boundary) + * @param dst_addr Address to write to (already verified to be on FLASH_CF_MIN_PGM_SIZE boundary) + * @param num_bytes Number of bytes to write + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + **********************************************************************************************************************/ +static fsp_err_t rm_vee_blocking_write (rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t src_addr, + uint32_t dst_addr, + uint32_t num_bytes) +{ + uint32_t i; + fsp_err_t err = FSP_SUCCESS; + + /* Clear interrupt-occurred flag */ + p_ctrl->irq_flag = false; + + err = p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, src_addr, dst_addr, num_bytes); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + /* Poll for interrupt complete. Do timeout check in case app disabled interrupts. + * Write is for sizeof(rm_vee_seg_hdr_t) to p_ctrl->p_cfg->ref_data_size bytes. + */ + for (i = 0; i < RM_VEE_FLASH_TIMEOUT_US; i++) + { + if (p_ctrl->irq_flag == true) + { + break; + } + + R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_MICROSECONDS); + } + + FSP_ERROR_RETURN(RM_VEE_FLASH_TIMEOUT_US != i, FSP_ERR_TIMEOUT); + + if (FLASH_EVENT_WRITE_COMPLETE != p_ctrl->flash_event) + { + p_ctrl->flash_err_event = p_ctrl->flash_event; + err = FSP_ERR_PE_FAILURE; + } + + return err; +} + +/*******************************************************************************************************************//** + * This function determines if there is enough space left in the record area to write the new record. + * If insufficient space is available, a refresh process is initiated. If sufficient space does exist, + * a write process is initiated. For variable length records, a record header is written first. For fixed + * length records, the header is omitted and the record data is written immediately. This function does + * not block for write completion. + * + * @param p_ctrl Pointer to the control block + * @param rec_id ID for record + * @param p_rec_data Pointer to record data to write + * @param num_bytes Number of bytes to write + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_internal_write_rec (rm_vee_flash_instance_ctrl_t * const p_ctrl, + uint32_t rec_id, + uint8_t const * const p_rec_data, + uint32_t num_bytes) +{ + fsp_err_t err; + + /* Check if space available */ + if ((p_ctrl->next_write_addr + RM_VEE_FLASH_REC_OVERHEAD + num_bytes) <= p_ctrl->ref_hdr_addr) + { + /* Got space. Save values needed at interrupt level. Though the header is only written when variable length + * records are configured, its contents are still used for fixed length records too. + */ + p_ctrl->rec_end.id = (uint16_t) rec_id; + p_ctrl->rec_hdr.length = (uint16_t) num_bytes; + + /* NOTE: The ".offset" field is technically not needed for the record (originally was ".pad"). + * It serves the purpose of "passing a value" to the callback function for efficiency in avoiding + * a lengthy calculation later. + */ + p_ctrl->rec_hdr.offset = (uint16_t) (p_ctrl->next_write_addr - p_ctrl->active_seg_addr); + + /* Initiate record write */ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_WRITE_REC_HDR; + p_ctrl->p_rec_data = p_rec_data; + err = p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + (uint32_t) &p_ctrl->rec_hdr, + p_ctrl->next_write_addr, + (uint32_t) sizeof(rm_vee_rec_hdr_t)); + } + else + { + /* Start refresh */ + err = rm_vee_start_seg_refresh(p_ctrl, + RM_VEE_FLASH_PRV_REFRESH_RECORD_OVFL, + rec_id, + (uint32_t) p_rec_data, + num_bytes); + } + + return err; +} + +/*******************************************************************************************************************//** + * The VEE driver is locked prior to calling this function. The next segment is set as active in the VEE + * driver control structure and the driver mode is changed to RM_VEE_FLASH_PRV_MODE_REFRESH. If this function is called + * due to RM_VEE_FLASH_PRV_REFRESH_RECORD_OVFL (lack of record space), the refresh begins with writing the record passed + * in. Otherwise, the refresh begins with the first offset found in p_ctrl->rec_offset[]. Because flash cannot be + * read and written to at the same time, the records (and reference data) are copied first into an interim + * RAM buffer then written to flash. Ideally, the buffer is large enough to hold the largest record so only + * one flash write is required (unlike the 2 or 3 required when a record is initially written). If the + * buffer is not large enough, the data is transferred in buffer-size chunks until the entire record/ + * reference data is transferred. + * + * @param p_ctrl Pointer to the control block + * @param refresh_type Indicates contents of other arguments/cause of refresh. + * @param rec_id Record ID if refresh type is RM_VEE_FLASH_PRV_REFRESH_RECORD_OVFL. NULL otherwise. + * @param addr Address of data to write. NULL if refresh type is RM_VEE_FLASH_PRV_REFRESH_USER_REQ. + * @param num_bytes Number of bytes to write. NULL if refresh type is RM_VEE_FLASH_PRV_REFRESH_USER_REQ. + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_start_seg_refresh (rm_vee_flash_instance_ctrl_t * const p_ctrl, + rm_vee_flash_refresh_refresh_t refresh_type, + uint32_t rec_id, + uint32_t addr, + uint32_t num_bytes) +{ + fsp_err_t err = FSP_SUCCESS; + uint32_t new_seg_addr; + + /* Set refresh mode */ + p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_REFRESH; + p_ctrl->refresh_type = refresh_type; + + /* Determine first record ID to refresh if not passed in */ + if (RM_VEE_FLASH_PRV_REFRESH_RECORD_OVFL != refresh_type) + { + for (rec_id = 0; rec_id <= p_ctrl->p_cfg->record_max_id; rec_id++) + { + if (p_ctrl->p_cfg->rec_offset[rec_id] != 0) + { + break; + } + } + } + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + if (0 != p_ctrl->p_cfg->ref_data_size) + { + /* Determine reference data refresh source */ + if (RM_VEE_FLASH_PRV_REFRESH_REFDATA_OVFL == refresh_type) + { + /* NOTE: The user cannot modify the new RAM reference data until refresh is complete! */ + p_ctrl->refresh_src_refdata_addr = addr; + } + else if (true == p_ctrl->new_refdata_valid) + { + p_ctrl->refresh_src_refdata_addr = p_ctrl->active_seg_addr + + (p_ctrl->segment_size - (2 * p_ctrl->p_cfg->ref_data_size)); + } + else + { + p_ctrl->refresh_src_refdata_addr = p_ctrl->active_seg_addr + + (p_ctrl->segment_size - p_ctrl->p_cfg->ref_data_size); + } + } +#endif + + /* Get refresh segment address. Handle wrap-around case. */ + new_seg_addr = p_ctrl->active_seg_addr + p_ctrl->segment_size; + if (RM_VEE_FLASH_DF_END_ADDRESS == new_seg_addr) + { + new_seg_addr = rm_vee_flash_data_start; + } + + /* Setup control structure for new segment */ + p_ctrl->refresh_src_seg_addr = p_ctrl->active_seg_addr; + p_ctrl->active_seg_addr = new_seg_addr; + p_ctrl->ref_hdr_addr = p_ctrl->active_seg_addr + (p_ctrl->segment_size - RM_VEE_FLASH_REF_DATA_AREA_SIZE); + + /* If record(s) exist to refresh, start a record write */ + if (rec_id <= p_ctrl->p_cfg->record_max_id) + { + p_ctrl->next_write_addr = new_seg_addr + sizeof(rm_vee_seg_hdr_t); + + /* NOTE: "start_rec_id" is the ID (index of p_ctrl->p_cfg->rec_offset[]) of the first record copied. + * Refresh walks through p_ctrl->p_cfg->rec_offset[] (including wrap around) using "cur_rec_id" as the index. + * When "cur_rec_id" matches "start_rec_id" again, record copying is complete. + */ + p_ctrl->refresh_start_rec_id = (uint16_t) rec_id; + p_ctrl->refresh_cur_rec_id = (uint16_t) rec_id; + + if (RM_VEE_FLASH_PRV_REFRESH_RECORD_OVFL == refresh_type) + { + /* Write the record passed in */ + err = rm_vee_internal_write_rec(p_ctrl, rec_id, (uint8_t *) addr, num_bytes); + } + else + { + /* Write the record from previous segment */ + err = rm_vee_init_record_xfer(p_ctrl, rec_id); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + err = rm_vee_xfer_next_chunk(p_ctrl, RM_VEE_FLASH_PRV_STATES_WRITE_REC_REFRESH); + } + } + else + { + /* No records exist.*/ +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + + /* If reference data exists, start data copy */ + if (RM_VEE_FLASH_PRV_REFRESH_REFDATA_OVFL == refresh_type) + { + /* Write data passed in */ + p_ctrl->refresh_xfer_bytes_left = 0; + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_WRITE_REFDATA; + err = + p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + addr, + p_ctrl->active_seg_addr + + (p_ctrl->segment_size - p_ctrl->p_cfg->ref_data_size), + p_ctrl->p_cfg->ref_data_size); + } + else if ((true == p_ctrl->factory_refdata) || (true == p_ctrl->new_refdata_valid)) + { + /* Copy data from flash */ + rm_vee_init_refdata_xfer(p_ctrl); + + err = rm_vee_xfer_next_chunk(p_ctrl, RM_VEE_FLASH_PRV_STATES_WRITE_REFDATA); + } + else +#endif + { + /* Highly obscure case where no data exists, but the last segment has an invalid segment header */ + err = rm_vee_write_seg_hdr(p_ctrl); + } + } + + return err; +} + +/*******************************************************************************************************************//** + * This function is called at the interrupt level every time a flash operation completes. If this function + * is called during VEE initialization, a global flag is set and the function exits immediately (driver is + * blocking). In normal operation, this function handles the main state machine for the driver. The state + * machine includes the following sequences: + * + * Normal Mode: + * Write a record: [RM_VEE_FLASH_PRV_STATES_WRITE_REC_HDR], WRITE_REC_DATA, WRITE_REC_END + * (header only written with variable recs) + * Write reference data: RM_VEE_FLASH_PRV_STATES_WRITE_NEW_REFDATA. WRITE_NEW_REFDATA_HDR + * + * Refresh Mode: + * [RM_VEE_FLASH_PRV_STATES_WRITE_REC_HDR, WRITE_REC_DATA, WRITE_REC_END] if started with RECORD_OVFL + * RM_VEE_FLASH_PRV_STATES_WRITE_REC_REFRESH (uses interim RAM buffer; and how start if not RECORD_OVFL) + * RM_VEE_FLASH_PRV_STATES_WRITE_REF_DATA + * RM_VEE_FLASH_PRV_STATES_WRITE_SEG_HDR + * RM_VEE_FLASH_PRV_STATES_ERASE_SEG + * + * @param p_args callback arguments used to process the flash event. + **********************************************************************************************************************/ +void rm_vee_flash_callback (flash_callback_args_t * p_args) +{ + flash_event_t flash_event = p_args->event; + rm_vee_flash_instance_ctrl_t * p_ctrl = (rm_vee_flash_instance_ctrl_t *) p_args->p_context; + fsp_err_t err = FSP_SUCCESS; + + p_ctrl->flash_event = flash_event; + + /* Starting up. Blocking on various events. Just set flag. */ + if (RM_VEE_FLASH_PRV_STATES_UNINITIALIZED == p_ctrl->state) + { + p_ctrl->irq_flag = true; + + return; + } + + /* WRITE COMPLETE state machine */ + if (FLASH_EVENT_WRITE_COMPLETE == p_ctrl->flash_event) + { + switch (p_ctrl->state) + { + case RM_VEE_FLASH_PRV_STATES_WRITE_REC_HDR: + { + /* Record header write complete (variable length records only) */ + p_ctrl->next_write_addr += sizeof(rm_vee_rec_hdr_t); + + /* Write record data */ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_WRITE_REC_DATA; + err = p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + (uint32_t) p_ctrl->p_rec_data, + p_ctrl->next_write_addr, + p_ctrl->rec_hdr.length); + break; + } + + case RM_VEE_FLASH_PRV_STATES_WRITE_REC_DATA: + { + /* Record data write complete */ + p_ctrl->next_write_addr += p_ctrl->rec_hdr.length; + + /* Write record trailer */ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_WRITE_REC_END; + err = p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + (uint32_t) &p_ctrl->rec_end, + p_ctrl->next_write_addr, + sizeof(rm_vee_rec_end_t)); + break; + } + + case RM_VEE_FLASH_PRV_STATES_WRITE_REC_END: + { + /* Record trailer write complete */ + p_ctrl->last_id = p_ctrl->rec_end.id; + p_ctrl->next_write_addr += sizeof(rm_vee_rec_end_t); + + p_ctrl->p_cfg->rec_offset[p_ctrl->rec_end.id] = p_ctrl->rec_hdr.offset; + + if (RM_VEE_FLASH_PRV_MODE_NORMAL == p_ctrl->mode) + { + /* Done writing if in normal mode */ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; + + /* Save address for Refresh to end record copy */ + p_ctrl->refresh_src_rec_end_addr = p_ctrl->next_write_addr; + } + else + { + /* Begin copying next rec, refdata; or write segment hdr */ + err = rm_vee_refresh_next_data_source(p_ctrl); + } + + break; + } + + case RM_VEE_FLASH_PRV_STATES_WRITE_REC_REFRESH: + { + if (0 != p_ctrl->refresh_xfer_bytes_left) + { + /* Continue transferring current record */ + err = rm_vee_xfer_next_chunk(p_ctrl, RM_VEE_FLASH_PRV_STATES_WRITE_REC_REFRESH); + } + else + { + /* Begin copying next rec, refdata; or write segment hdr */ + err = rm_vee_refresh_next_data_source(p_ctrl); + } + + break; + } + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + case RM_VEE_FLASH_PRV_STATES_WRITE_REFDATA: + { + if (0 != p_ctrl->refresh_xfer_bytes_left) + { + /* Continue transferring refdata */ + err = rm_vee_xfer_next_chunk(p_ctrl, RM_VEE_FLASH_PRV_STATES_WRITE_REFDATA); + } + else + { + /* Finished copying reference data. Write segment header (mark segment active). */ + p_ctrl->factory_refdata = true; + err = rm_vee_write_seg_hdr(p_ctrl); + } + + break; + } + + case RM_VEE_FLASH_PRV_STATES_WRITE_NEW_REFDATA: + { + /* New refdata location written; write the header to show that it is used */ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_WRITE_NEW_REFDATA_HDR; + err = p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + (uint32_t) &p_ctrl->ref_hdr, + p_ctrl->ref_hdr_addr, + sizeof(rm_vee_ref_hdr_t)); + + break; + } + + case RM_VEE_FLASH_PRV_STATES_WRITE_NEW_REFDATA_HDR: + { + /* New refdata header written; refdata update complete */ + p_ctrl->new_refdata_valid = true; + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; + break; + } +#endif + + case RM_VEE_FLASH_PRV_STATES_WRITE_SEG_HDR: + { + /* Segment header (from a Refresh) write complete */ + + /* Logically, one would update the reference data info after that write completes in + * RM_VEE_FLASH_PRV_STATES_WRITE_REFDATA. But functionally there is no harm in waiting until now to do it. + * And an advantage of doing it here is that if writing the segment header fails, there is no need + * to re-inspect the reference data area when doing a restore to the previous segment. + */ + p_ctrl->ref_hdr_addr = p_ctrl->active_seg_addr + + (p_ctrl->segment_size - RM_VEE_FLASH_REF_DATA_AREA_SIZE); + p_ctrl->new_refdata_valid = false; + + /* Since copying data is done, set location for next record-write */ + p_ctrl->next_write_addr = p_ctrl->refresh_dst_rec_end_addr; + + /* Erase previous segment */ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_ERASE_SEG; + + err = + p_ctrl->p_flash->p_api->erase(p_ctrl->p_flash->p_ctrl, p_ctrl->refresh_src_seg_addr, + (p_ctrl->segment_size / RM_VEE_FLASH_DF_BLOCK_SIZE)); + break; + } + + default: + { + /* Do nothing. */ + break; + } + } + } + else if (FLASH_EVENT_ERASE_COMPLETE == p_ctrl->flash_event) + { + /* Old segment erased; refresh operation complete; return to normal operations */ + p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_NORMAL; + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; + } + else + { + /* ERROR EVENT */ + + /* If a flash failure occurred during a Refresh, restore driver control structures such that + * the previous segment's data can still be read providing the previous segment was not in + * the process of being erased. + */ + if ((RM_VEE_FLASH_PRV_MODE_REFRESH == p_ctrl->mode) && (RM_VEE_FLASH_PRV_STATES_ERASE_SEG != p_ctrl->state)) + { + err = rm_vee_restore_previous_seg(p_ctrl); + } + + p_ctrl->flash_err_event = p_ctrl->flash_event; + p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_FLASH_PE_FAIL; + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; + } + + rm_vee_flash_err_handle(p_ctrl, err); + + if ((RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state) && (NULL != p_ctrl->p_cfg->p_callback)) + { + rm_vee_callback_args_t args; + + rm_vee_state_get(p_ctrl, &args.state); + args.p_context = p_ctrl->p_cfg->p_context; + p_ctrl->p_cfg->p_callback(&args); + } +} + +static void rm_vee_flash_err_handle (rm_vee_flash_instance_ctrl_t * const p_ctrl, fsp_err_t err) +{ + if ((FSP_SUCCESS != err) && + ((p_ctrl->mode == RM_VEE_FLASH_PRV_MODE_NORMAL) || (p_ctrl->mode == RM_VEE_FLASH_PRV_MODE_REFRESH))) + { + p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_FLASH_PE_FAIL; + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; + } +} + +/*******************************************************************************************************************//** + * This function determines the next ID with a record in flash. If it has yet to be copied to the new + * segment, the write process is started. If all records have been copied, a write is started for the most + * recent reference data. If no reference data is present, a write is started for the segment header. + * + * @param p_ctrl Pointer to the control block + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_refresh_next_data_source (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + uint32_t id; + fsp_err_t err = FSP_SUCCESS; + + /* Get next record ID */ + id = rm_vee_get_next_id(p_ctrl); + + /* Write next record if more remain */ + if (id != p_ctrl->refresh_start_rec_id) + { + err = rm_vee_init_record_xfer(p_ctrl, id); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + + err = rm_vee_xfer_next_chunk(p_ctrl, RM_VEE_FLASH_PRV_STATES_WRITE_REC_REFRESH); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + else + { + /* No more records; save address for next record write location. + * Must save because next_write_addr is overwritten if reference data exists. */ + p_ctrl->refresh_dst_rec_end_addr = p_ctrl->next_write_addr; + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + + /* Determine what to write next */ + if ((0 != p_ctrl->p_cfg->ref_data_size) && + ((true == p_ctrl->factory_refdata) || (true == p_ctrl->new_refdata_valid))) + { + /* Write reference data */ + rm_vee_init_refdata_xfer(p_ctrl); + + err = rm_vee_xfer_next_chunk(p_ctrl, RM_VEE_FLASH_PRV_STATES_WRITE_REFDATA); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + else +#endif + { + /* No reference data; mark segment as active by writing segment header */ + err = rm_vee_write_seg_hdr(p_ctrl); + FSP_ERROR_RETURN(FSP_SUCCESS == err, err); + } + } + + return err; +} + +/*******************************************************************************************************************//** + * This function gets the next ID after p_ctrl->refresh_cur_rec_id in p_ctrl->rec_offset[]. If the end of the + * array is reached, this function wraps around and begins searching again. The index of the array + * corresponds to the ID value. An offset value of 0 (illegal value) indicates that no record is present + * for that ID. + * + * @param p_ctrl Pointer to the control block + * + * @retval Next ID which has a record in flash. + **********************************************************************************************************************/ +static uint32_t rm_vee_get_next_id (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + /* NOTE: This function is only called after a record has been written. + * Because at least one record does exist, this can never be an infinite loop. + * Worst case: The "next" ID is the one just written. + */ + do + { + /* Increment id; check for wrap around */ + if (++p_ctrl->refresh_cur_rec_id > p_ctrl->p_cfg->record_max_id) + { + p_ctrl->refresh_cur_rec_id = 0; + } + + /* Stop when valid offset found */ + } while (p_ctrl->p_cfg->rec_offset[p_ctrl->refresh_cur_rec_id] == 0); + + return p_ctrl->refresh_cur_rec_id; +} + +/*******************************************************************************************************************//** + * This function initializes in global control structures the source address and length of the record to + * be copied over as specified by "id" during the refresh process. The new offset for the soon to be + * copied record is saved in the segment offset array (p_ctrl->rec_offset[]) for later lookup. + * + * @param p_ctrl Pointer to the control block + * @param id ID for record to be copied to the refresh segment + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_init_record_xfer (rm_vee_flash_instance_ctrl_t * const p_ctrl, uint32_t id) +{ + fsp_err_t err = FSP_SUCCESS; + + /* Get record address to transfer */ + p_ctrl->refresh_xfer_src_addr = p_ctrl->refresh_src_seg_addr + p_ctrl->p_cfg->rec_offset[id]; + + /* Get complete record size (number of bytes to transfer) */ + rm_vee_rec_hdr_t * p_hdr = (rm_vee_rec_hdr_t *) p_ctrl->refresh_xfer_src_addr; + + p_ctrl->refresh_xfer_bytes_left = p_hdr->length + RM_VEE_FLASH_REC_OVERHEAD; + + /* Save offset of record's new location */ + p_ctrl->p_cfg->rec_offset[id] = (uint16_t) (p_ctrl->next_write_addr - p_ctrl->active_seg_addr); + + /* If this record will not fit in remaining record area, then bad configuration exists. Go into error mode. */ + if ((p_ctrl->next_write_addr + p_ctrl->refresh_xfer_bytes_left) > + (p_ctrl->active_seg_addr + (p_ctrl->segment_size - RM_VEE_FLASH_REF_DATA_AREA_SIZE))) + { + /* Make previous segment active again and set error mode */ + err = rm_vee_restore_previous_seg(p_ctrl); + + p_ctrl->mode = RM_VEE_FLASH_PRV_MODE_OVERFLOW; + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_READY; + } + + return err; +} + +#if RM_VEE_FLASH_CFG_REF_DATA_SUPPORT + +/*******************************************************************************************************************//** + * This function initializes in global control structures the source address and length of the latest + * reference data to be copied over during the refresh process. The "next_write_addr" is also updated + * for the destination address in the new segment. + * + * @param p_ctrl Pointer to the control block + **********************************************************************************************************************/ +static void rm_vee_init_refdata_xfer (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + /* Get source refdata address to transfer */ + p_ctrl->refresh_xfer_src_addr = p_ctrl->refresh_src_refdata_addr; + + /* Set destination addr */ + p_ctrl->next_write_addr = p_ctrl->active_seg_addr + (p_ctrl->segment_size - p_ctrl->p_cfg->ref_data_size); + + /* Set refdata size (number of bytes to transfer) */ + p_ctrl->refresh_xfer_bytes_left = (uint16_t) p_ctrl->p_cfg->ref_data_size; +} + +#endif + +/*******************************************************************************************************************//** + * This function determines how much data is left to transfer, and copies whichever is less (remaining + * data or buffer size) into a ram buffer. The state passed into this function specifies the type of + * data being transferred, and is stored in the control structure so the callback function knows what step + * to process next is. Finally, the write process for the data is started. + * + * @param p_ctrl Pointer to the control block + * @param state State to store in the vee control structure (specifies transfer type - record or reference data). + * + * @retval FSP_SUCCESS Successfully started transfer of next chunk of data. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_xfer_next_chunk (rm_vee_flash_instance_ctrl_t * const p_ctrl, rm_vee_flash_prv_states_t state) +{ + uint32_t length; + fsp_err_t err = FSP_SUCCESS; + + /* Do not write if mode is overflow. Error condition will be handled in state machine. */ + if (RM_VEE_FLASH_PRV_MODE_OVERFLOW != p_ctrl->mode) + { + /* Determine number of bytes to transfer in this chunk */ + if (RM_VEE_FLASH_REFRESH_BUFFER_SIZE <= p_ctrl->refresh_xfer_bytes_left) + { + length = RM_VEE_FLASH_REFRESH_BUFFER_SIZE; + } + else + { + length = p_ctrl->refresh_xfer_bytes_left; + } + + /* Copy next chunk into buffer */ + memcpy((void *) p_ctrl->xfer_buf, (void *) p_ctrl->refresh_xfer_src_addr, length); + + /* Set state so know how what data is being transferred (record or reference info) */ + p_ctrl->state = state; + + /* Start write */ + err = p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + (uint32_t) p_ctrl->xfer_buf, + p_ctrl->next_write_addr, + length); + + /* Update transfer info */ + p_ctrl->next_write_addr += length; + p_ctrl->refresh_xfer_src_addr += length; + p_ctrl->refresh_xfer_bytes_left = p_ctrl->refresh_xfer_bytes_left - length; + } + + return err; +} + +/*******************************************************************************************************************//** + * A flash error may occur at any time during a Refresh. There may be only 1 record, half the records, + * or only part of reference data transferred when flash fails. To allow reads after failure, the + * driver reverts to the last known good data, which is the previous (src) segment. This function + * sets the active segment back to the previous segment and reloads the record offset table for reads. + * + * @param p_ctrl Pointer to the control block + * + * @retval FSP_SUCCESS Successful. + * @retval FSP_ERR_PE_FAILURE This error indicates that a flash programming, erase, or blankcheck operation has failed + * @retval FSP_ERR_TIMEOUT Flash write timed out (Should not be possible when flash bgo is used). + * @retval FSP_ERR_NOT_INITIALIZED Corruption found. A refresh is required. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_restore_previous_seg (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + p_ctrl->active_seg_addr = p_ctrl->refresh_src_seg_addr; + + /* In the case of a Refresh aborting due to discovering an Overflow condition, all but one entry in + * p_ctrl->p_cfg->rec_offset[] will be overwritten, so erase entire array before reloading offsets. + */ + memset((void *) &p_ctrl->p_cfg->rec_offset[0], 0, + ((p_ctrl->p_cfg->record_max_id + 1) * sizeof(p_ctrl->p_cfg->rec_offset[0]))); + + return rm_vee_load_record_table(p_ctrl, false); + + /* NOTE: The reference data info (p_ctrl->ref_hdr_addr/new_refdata_used/new_refdata_valid) is changed only + * after the new segment header has been written. And this function is only called if that has not happened + * yet, so there is nothing relative to reference data that needs to be restored here. + */ +} + +/*******************************************************************************************************************//** + * This function starts the write process for a segment header. + * + * @param p_ctrl Pointer to the control block + **********************************************************************************************************************/ +static fsp_err_t rm_vee_write_seg_hdr (rm_vee_flash_instance_ctrl_t * const p_ctrl) +{ + p_ctrl->state = RM_VEE_FLASH_PRV_STATES_WRITE_SEG_HDR; + p_ctrl->seg_hdr.refresh_cnt++; + + return p_ctrl->p_flash->p_api->write(p_ctrl->p_flash->p_ctrl, + (uint32_t) &p_ctrl->seg_hdr, + p_ctrl->active_seg_addr, + sizeof(rm_vee_seg_hdr_t)); +} + +/*******************************************************************************************************************//** + * This function starts the write process for a segment header. + * + * @param p_ctrl Pointer to the control block + * @param p_state Pointer to the rm_vee state + * + * @retval FSP_SUCCESS Successful. + **********************************************************************************************************************/ +static fsp_err_t rm_vee_state_get (rm_vee_flash_instance_ctrl_t * const p_ctrl, rm_vee_state_t * p_state) +{ + if (RM_VEE_FLASH_PRV_MODE_NORMAL == p_ctrl->mode) + { + if (RM_VEE_FLASH_PRV_STATES_READY == p_ctrl->state) + { + *p_state = RM_VEE_STATE_READY; + } + else + { + *p_state = RM_VEE_STATE_BUSY; + } + } + else + { + *p_state = (rm_vee_state_t) p_ctrl->mode; + } + + return FSP_SUCCESS; +}