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Incorrect value written to FCACHE->FLWT register during startup on some MCUs. #33

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jritchey-renesas opened this issue Jan 19, 2021 · 0 comments
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applies-to-v2.0.0 applies-to-v2.1.0 applies-to-v2.2.0 bug Something isn't working critical MCU operates out of the hardware manual documented specifications
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@jritchey-renesas
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jritchey-renesas commented Jan 19, 2021

Issue

BSP_FEATURE_BSP_SYS_CLOCK_FREQ_TWO_ROM_WAITS is set to 800Mhz instead of 80Mhz on the following MCUs:

  • RA6M1
  • RA6M2
  • RA6M3
  • RA6T1

As a result, if SystemCoreClock is configured to a value greater than 80Mhz, FCACHE->FLWT will be set to 1 wait state instead of the correct value which is 2 wait states.

On the following MCUs, FCACHE->FLWT is set to 2 wait states when only 1 wait state is supported:

  • RA4M3

Workaround

Apply the patch file to bsp_clocks.c

# from project root directory
patch -u ra/fsp/ra/src/bsp/mcu/all/bsp_clocks.c -i fix-<version>.patch

fix.zip

@jritchey-renesas jritchey-renesas added this to the v2.3.0 milestone Jan 19, 2021
@kjassmann-renesas kjassmann-renesas added the critical MCU operates out of the hardware manual documented specifications label Jan 21, 2021
@kjassmann-renesas kjassmann-renesas unpinned this issue Jun 22, 2021
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Labels
applies-to-v2.0.0 applies-to-v2.1.0 applies-to-v2.2.0 bug Something isn't working critical MCU operates out of the hardware manual documented specifications
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