Incorrect value written to FCACHE->FLWT register during startup on some MCUs. #33
Labels
applies-to-v2.0.0
applies-to-v2.1.0
applies-to-v2.2.0
bug
Something isn't working
critical
MCU operates out of the hardware manual documented specifications
Milestone
Issue
BSP_FEATURE_BSP_SYS_CLOCK_FREQ_TWO_ROM_WAITS
is set to 800Mhz instead of 80Mhz on the following MCUs:As a result, if
SystemCoreClock
is configured to a value greater than 80Mhz, FCACHE->FLWT will be set to 1 wait state instead of the correct value which is 2 wait states.On the following MCUs,
FCACHE->FLWT
is set to 2 wait states when only 1 wait state is supported:Workaround
Apply the patch file to
bsp_clocks.c
fix.zip
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