[FMV] Explicit allows different vendors share the bit definition of __riscv_vendor_feature_bits

[cyyself]

In PR #74, we design vendor extension is guarded by vendorID. However, here we missed some cases like:

1. A SoC vendor buys a CPU IP from another CPU IP vendor with some modification to CPU RTL and then fills marchid with itself mvendorid
2. A SoC vendor uses multiple CPU IPs from different vendors for their SoC and customizes the CPU IP to have the same vendor extension, which multiple CPU IPs have different mvendorid

These cases are discussed from Linux Kernel mailing list on hwprobe support for T-HEAD vendor extensions thread. I think their concerns are right.

So we might need to make the __riscv_vendor_feature_bits not guarded by mvendorid. Since this hasn't been specified in the c-api-doc currently, it's not too late to make this change.

[cyyself]

cc @kito-cheng @BeMg @ConchuOD @charlie-rivos @evangreen