From 73ec736c43d604b20251a0074718399f50e3fcf2 Mon Sep 17 00:00:00 2001 From: Trevor Gross Date: Sat, 20 Jul 2024 13:21:46 -0500 Subject: [PATCH 1/2] Normalize revisions used for filecheck directives Typically, filecheck prefixes will be uppercase (always true) and start with `CHECK-` (almost always true). Currently we allow using revision names as filecheck directives, but they are passed directly. That means that our directives are exactly what the revision name is, in the same case, so they only look like filecheck directives if the revision name is uppercase (usually they are lowercase). Update this so that we always uppercase revision names and prefix them with `CHECK-` when used as directives. This is better for consistency, makes it easier to identify directives in the tests, and has the nice side effect that some editors will make the directive stand out by highlighting it (which currently happens for most directives, just not those from revisions). --- src/tools/compiletest/src/runtest.rs | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/tools/compiletest/src/runtest.rs b/src/tools/compiletest/src/runtest.rs index 0122886961737..3a9dfd979636b 100644 --- a/src/tools/compiletest/src/runtest.rs +++ b/src/tools/compiletest/src/runtest.rs @@ -2608,13 +2608,14 @@ impl<'test> TestCx<'test> { // Because we use custom prefixes, we also have to register the default prefix. filecheck.arg("--check-prefix=CHECK"); - // Some tests use the current revision name as a check prefix. + // The current revision name can also be used as a check prefix if let Some(rev) = self.revision { - filecheck.arg("--check-prefix").arg(rev); + filecheck.arg(format!("--check-prefix=CHECK-{}", rev.to_uppercase())); } // Some tests also expect either the MSVC or NONMSVC prefix to be defined. - let msvc_or_not = if self.config.target.contains("msvc") { "MSVC" } else { "NONMSVC" }; + let msvc_or_not = + if self.config.target.contains("msvc") { "CHECK-MSVC" } else { "CHECK-NONMSVC" }; filecheck.arg("--check-prefix").arg(msvc_or_not); // The filecheck tool normally fails if a prefix is defined but not used. From 144fa44f3da4411f80efcdcdac7907f106712275 Mon Sep 17 00:00:00 2001 From: Trevor Gross Date: Sat, 20 Jul 2024 13:28:28 -0500 Subject: [PATCH 2/2] Make use of normalized filecheck directives Since revisions are now always passed as `CHECK-{rev.to_uppercase()}`, update test cases to use this format. There were also some test files that used uppercase names, presumably so the directives would match filecheck. Normalize these revision names to lowercase. Lastly, remove use of invalid labels (such as `FIXME-CHECK:`) to skip filecheck directives. (`COM: CHECK ...` is the syntax for a comment). The below query can be used to ensure that there are no missing directives: rg --pcre2 '^\s*//\s*(?!(CHECK|COM))\S*:(?!(//|:))' \ tests/codegen tests/assembly/ tests/mir-opt/ (Note that the above may report some non-filecheck FIXMEs and other comments). --- tests/assembly/asm/arm-types.rs | 418 ++++++------- tests/assembly/asm/mips-types.rs | 56 +- tests/assembly/asm/powerpc-types.rs | 32 +- tests/assembly/asm/riscv-types.rs | 46 +- tests/assembly/asm/x86-modifiers.rs | 32 +- tests/assembly/asm/x86-types.rs | 96 +-- .../nvptx-kernel-args-abi-v7.rs | 6 +- tests/assembly/simd-bitmask.rs | 100 ++-- tests/assembly/simd-intrinsic-gather.rs | 8 +- tests/assembly/simd-intrinsic-mask-load.rs | 46 +- tests/assembly/simd-intrinsic-mask-reduce.rs | 36 +- tests/assembly/simd-intrinsic-mask-store.rs | 42 +- tests/assembly/simd-intrinsic-scatter.rs | 6 +- tests/assembly/simd-intrinsic-select.rs | 64 +- tests/assembly/slice-is_ascii.rs | 6 +- tests/assembly/stack-probes.rs | 12 +- ...otector-heuristics-effect-windows-32bit.rs | 160 ++--- ...otector-heuristics-effect-windows-64bit.rs | 160 ++--- .../stack-protector-heuristics-effect.rs | 160 ++--- .../stack-protector-target-support.rs | 172 +++--- tests/assembly/static-relocation-model.rs | 40 +- tests/assembly/target-feature-multiple.rs | 6 +- tests/assembly/x86-return-float.rs | 48 +- tests/assembly/x86_64-cmp.rs | 58 +- tests/assembly/x86_64-function-return.rs | 20 +- tests/assembly/x86_64-no-jump-tables.rs | 4 +- tests/assembly/x86_64-typed-swap.rs | 6 +- tests/codegen/README.md | 61 +- tests/codegen/aarch64-struct-align-128.rs | 24 +- tests/codegen/abi-efiapi.rs | 10 +- tests/codegen/abi-repr-ext.rs | 12 +- .../codegen/align-byval-alignment-mismatch.rs | 36 +- tests/codegen/align-byval-vector.rs | 8 +- tests/codegen/align-byval.rs | 192 +++--- tests/codegen/asm-target-clobbers.rs | 6 +- tests/codegen/async-fn-debug-awaitee-field.rs | 12 +- tests/codegen/branch-protection.rs | 58 +- tests/codegen/cast-target-abi.rs | 564 +++++++++--------- tests/codegen/cf-protection.rs | 24 +- tests/codegen/codemodels.rs | 30 +- tests/codegen/cold-call-declare-and-call.rs | 16 +- tests/codegen/comparison-operators-2-tuple.rs | 33 +- .../codegen/debug-accessibility/crate-enum.rs | 4 +- .../debug-accessibility/private-enum.rs | 4 +- .../debug-accessibility/public-enum.rs | 4 +- .../codegen/debug-accessibility/super-enum.rs | 4 +- tests/codegen/debug-vtable.rs | 44 +- .../debuginfo-generic-closure-env-names.rs | 20 +- tests/codegen/default-hidden-visibility.rs | 12 +- tests/codegen/default-requires-uwtable.rs | 10 +- tests/codegen/direct-access-external-data.rs | 14 +- tests/codegen/fewer-names.rs | 20 +- tests/codegen/fixed-x18.rs | 4 +- tests/codegen/float/f128.rs | 8 +- tests/codegen/float/f16.rs | 8 +- tests/codegen/fn-impl-trait-self.rs | 4 +- tests/codegen/force-frame-pointers.rs | 22 +- tests/codegen/frame-pointer.rs | 10 +- tests/codegen/function-return.rs | 10 +- tests/codegen/inherit_overflow.rs | 10 +- tests/codegen/inline-always-works-always.rs | 14 +- .../instrument-coverage-off.rs | 1 + tests/codegen/instrument-coverage/testprog.rs | 118 ++-- tests/codegen/intrinsics/compare_bytes.rs | 22 +- tests/codegen/intrinsics/three_way_compare.rs | 54 +- tests/codegen/intrinsics/transmute-niched.rs | 138 ++--- tests/codegen/intrinsics/typed_swap.rs | 38 +- tests/codegen/issues/issue-122805.rs | 58 +- tests/codegen/issues/issue-32031.rs | 8 +- tests/codegen/issues/issue-45222.rs | 4 +- tests/codegen/llvm-ident.rs | 6 +- tests/codegen/merge-functions.rs | 6 +- .../codegen/meta-filecheck/filecheck-flags.rs | 4 +- .../codegen/meta-filecheck/msvc-prefix-bad.rs | 4 +- .../meta-filecheck/msvc-prefix-good.rs | 4 +- .../codegen/meta-filecheck/revision-prefix.rs | 8 +- tests/codegen/no-jump-tables.rs | 4 +- tests/codegen/optimize-attr-1.rs | 40 +- tests/codegen/option-niche-eq.rs | 8 +- tests/codegen/riscv-target-abi.rs | 6 +- .../address-sanitizer-globals-tracking.rs | 6 +- .../codegen/sanitizer/memory-track-origins.rs | 34 +- .../codegen/sanitizer/no-sanitize-inlining.rs | 18 +- tests/codegen/sanitizer/sanitizer-recover.rs | 68 +-- tests/codegen/simd/packed-simd.rs | 4 +- .../some-abis-do-extend-params-to-32-bits.rs | 224 +++---- tests/codegen/stack-protector.rs | 36 +- tests/codegen/target-feature-overrides.rs | 18 +- tests/codegen/tied-features-strength.rs | 18 +- tests/codegen/ub-checks.rs | 20 +- tests/codegen/union-abi.rs | 8 +- .../mir-opt/dataflow-const-prop/transmute.rs | 3 +- ...rotection-missing-pac-ret.badflags.stderr} | 0 ...otection-missing-pac-ret.badtarget.stderr} | 0 .../branch-protection-missing-pac-ret.rs | 18 +- ...ace.stderr => main.macro-backtrace.stderr} | 0 tests/ui/macro_backtrace/main.rs | 4 +- .../cfg-ub-checks-default.rs | 6 +- 98 files changed, 2107 insertions(+), 2061 deletions(-) rename tests/ui/invalid-compile-flags/{branch-protection-missing-pac-ret.BADFLAGS.stderr => branch-protection-missing-pac-ret.badflags.stderr} (100%) rename tests/ui/invalid-compile-flags/{branch-protection-missing-pac-ret.BADTARGET.stderr => branch-protection-missing-pac-ret.badtarget.stderr} (100%) rename tests/ui/macro_backtrace/{main.-Zmacro-backtrace.stderr => main.macro-backtrace.stderr} (100%) diff --git a/tests/assembly/asm/arm-types.rs b/tests/assembly/asm/arm-types.rs index eeff1a070b492..ade59a7867a73 100644 --- a/tests/assembly/asm/arm-types.rs +++ b/tests/assembly/asm/arm-types.rs @@ -4,7 +4,7 @@ //@ compile-flags: -C opt-level=0 //@[d32] compile-flags: -C target-feature=+d32 //@[neon] compile-flags: -C target-feature=+neon --cfg d32 -//@[neon] filecheck-flags: --check-prefix d32 +//@[neon] filecheck-flags: --check-prefix CHECK-D32 //@ needs-llvm-components: arm #![feature(no_core, lang_items, rustc_attrs, repr_simd, f16)] @@ -222,59 +222,59 @@ check!(sreg_low16_f16 f16 sreg_low16 "vmov.f32"); // CHECK: @NO_APP check!(sreg_low16_f32 f32 sreg_low16 "vmov.f32"); -// d32-LABEL: dreg_i64: -// d32: @APP -// d32: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// d32: @NO_APP +// CHECK-D32-LABEL: dreg_i64: +// CHECK-D32: @APP +// CHECK-D32: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-D32: @NO_APP #[cfg(d32)] check!(dreg_i64 i64 dreg "vmov.f64"); -// d32-LABEL: dreg_f64: -// d32: @APP -// d32: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// d32: @NO_APP +// CHECK-D32-LABEL: dreg_f64: +// CHECK-D32: @APP +// CHECK-D32: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-D32: @NO_APP #[cfg(d32)] check!(dreg_f64 f64 dreg "vmov.f64"); -// neon-LABEL: dreg_i8x8: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_i8x8: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_i8x8 i8x8 dreg "vmov.f64"); -// neon-LABEL: dreg_i16x4: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_i16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_i16x4 i16x4 dreg "vmov.f64"); -// neon-LABEL: dreg_i32x2: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_i32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_i32x2 i32x2 dreg "vmov.f64"); -// neon-LABEL: dreg_i64x1: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_i64x1: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_i64x1 i64x1 dreg "vmov.f64"); -// neon-LABEL: dreg_f16x4: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_f16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_f16x4 f16x4 dreg "vmov.f64"); -// neon-LABEL: dreg_f32x2: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_f32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_f32x2 f32x2 dreg "vmov.f64"); @@ -290,45 +290,45 @@ check!(dreg_low16_i64 i64 dreg_low16 "vmov.f64"); // CHECK: @NO_APP check!(dreg_low16_f64 f64 dreg_low16 "vmov.f64"); -// neon-LABEL: dreg_low16_i8x8: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low16_i8x8: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low16_i8x8 i8x8 dreg_low16 "vmov.f64"); -// neon-LABEL: dreg_low16_i16x4: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low16_i16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low16_i16x4 i16x4 dreg_low16 "vmov.f64"); -// neon-LABEL: dreg_low16_i32x2: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low16_i32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low16_i32x2 i32x2 dreg_low16 "vmov.f64"); -// neon-LABEL: dreg_low16_i64x1: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low16_i64x1: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low16_i64x1 i64x1 dreg_low16 "vmov.f64"); -// neon-LABEL: dreg_low16_f16x4: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low16_f16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low16_f16x4 f16x4 dreg_low16 "vmov.f64"); -// neon-LABEL: dreg_low16_f32x2: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low16_f32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low16_f32x2 f32x2 dreg_low16 "vmov.f64"); @@ -344,171 +344,171 @@ check!(dreg_low8_i64 i64 dreg_low8 "vmov.f64"); // CHECK: @NO_APP check!(dreg_low8_f64 f64 dreg_low8 "vmov.f64"); -// neon-LABEL: dreg_low8_i8x8: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low8_i8x8: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low8_i8x8 i8x8 dreg_low8 "vmov.f64"); -// neon-LABEL: dreg_low8_i16x4: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low8_i16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low8_i16x4 i16x4 dreg_low8 "vmov.f64"); -// neon-LABEL: dreg_low8_i32x2: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low8_i32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low8_i32x2 i32x2 dreg_low8 "vmov.f64"); -// neon-LABEL: dreg_low8_i64x1: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low8_i64x1: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low8_i64x1 i64x1 dreg_low8 "vmov.f64"); -// neon-LABEL: dreg_low8_f16x4: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low8_f16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low8_f16x4 f16x4 dreg_low8 "vmov.f64"); -// neon-LABEL: dreg_low8_f32x2: -// neon: @APP -// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: dreg_low8_f32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(dreg_low8_f32x2 f32x2 dreg_low8 "vmov.f64"); -// neon-LABEL: qreg_i8x16: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_i8x16: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_i8x16 i8x16 qreg "vmov"); -// neon-LABEL: qreg_i16x8: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_i16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_i16x8 i16x8 qreg "vmov"); -// neon-LABEL: qreg_i32x4: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_i32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_i32x4 i32x4 qreg "vmov"); -// neon-LABEL: qreg_i64x2: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_i64x2: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_i64x2 i64x2 qreg "vmov"); -// neon-LABEL: qreg_f16x8: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_f16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_f16x8 f16x8 qreg "vmov"); -// neon-LABEL: qreg_f32x4: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_f32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_f32x4 f32x4 qreg "vmov"); -// neon-LABEL: qreg_low8_i8x16: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low8_i8x16: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low8_i8x16 i8x16 qreg_low8 "vmov"); -// neon-LABEL: qreg_low8_i16x8: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low8_i16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low8_i16x8 i16x8 qreg_low8 "vmov"); -// neon-LABEL: qreg_low8_i32x4: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low8_i32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low8_i32x4 i32x4 qreg_low8 "vmov"); -// neon-LABEL: qreg_low8_i64x2: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low8_i64x2: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low8_i64x2 i64x2 qreg_low8 "vmov"); -// neon-LABEL: qreg_low8_f16x8: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low8_f16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low8_f16x8 f16x8 qreg_low8 "vmov"); -// neon-LABEL: qreg_low8_f32x4: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low8_f32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low8_f32x4 f32x4 qreg_low8 "vmov"); -// neon-LABEL: qreg_low4_i8x16: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low4_i8x16: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low4_i8x16 i8x16 qreg_low4 "vmov"); -// neon-LABEL: qreg_low4_i16x8: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low4_i16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low4_i16x8 i16x8 qreg_low4 "vmov"); -// neon-LABEL: qreg_low4_i32x4: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low4_i32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low4_i32x4 i32x4 qreg_low4 "vmov"); -// neon-LABEL: qreg_low4_i64x2: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low4_i64x2: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low4_i64x2 i64x2 qreg_low4 "vmov"); -// neon-LABEL: qreg_low4_f16x8: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low4_f16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low4_f16x8 f16x8 qreg_low4 "vmov"); -// neon-LABEL: qreg_low4_f32x4: -// neon: @APP -// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} -// neon: @NO_APP +// CHECK-NEON-LABEL: qreg_low4_f32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} +// CHECK-NEON: @NO_APP #[cfg(neon)] check!(qreg_low4_f32x4 f32x4 qreg_low4 "vmov"); @@ -573,100 +573,100 @@ check_reg!(s0_f32 f32 "s0" "vmov.f32"); check_reg!(s0_ptr ptr "s0" "vmov.f32"); // FIXME(#126797): "d0" should work with `i64` and `f64` even when `d32` is disabled. -// d32-LABEL: d0_i64: -// d32: @APP -// d32: vmov.f64 d0, d0 -// d32: @NO_APP +// CHECK-D32-LABEL: d0_i64: +// CHECK-D32: @APP +// CHECK-D32: vmov.f64 d0, d0 +// CHECK-D32: @NO_APP #[cfg(d32)] check_reg!(d0_i64 i64 "d0" "vmov.f64"); -// d32-LABEL: d0_f64: -// d32: @APP -// d32: vmov.f64 d0, d0 -// d32: @NO_APP +// CHECK-D32-LABEL: d0_f64: +// CHECK-D32: @APP +// CHECK-D32: vmov.f64 d0, d0 +// CHECK-D32: @NO_APP #[cfg(d32)] check_reg!(d0_f64 f64 "d0" "vmov.f64"); -// neon-LABEL: d0_i8x8: -// neon: @APP -// neon: vmov.f64 d0, d0 -// neon: @NO_APP +// CHECK-NEON-LABEL: d0_i8x8: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d0, d0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(d0_i8x8 i8x8 "d0" "vmov.f64"); -// neon-LABEL: d0_i16x4: -// neon: @APP -// neon: vmov.f64 d0, d0 -// neon: @NO_APP +// CHECK-NEON-LABEL: d0_i16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d0, d0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(d0_i16x4 i16x4 "d0" "vmov.f64"); -// neon-LABEL: d0_i32x2: -// neon: @APP -// neon: vmov.f64 d0, d0 -// neon: @NO_APP +// CHECK-NEON-LABEL: d0_i32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d0, d0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(d0_i32x2 i32x2 "d0" "vmov.f64"); -// neon-LABEL: d0_i64x1: -// neon: @APP -// neon: vmov.f64 d0, d0 -// neon: @NO_APP +// CHECK-NEON-LABEL: d0_i64x1: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d0, d0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(d0_i64x1 i64x1 "d0" "vmov.f64"); -// neon-LABEL: d0_f16x4: -// neon: @APP -// neon: vmov.f64 d0, d0 -// neon: @NO_APP +// CHECK-NEON-LABEL: d0_f16x4: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d0, d0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(d0_f16x4 f16x4 "d0" "vmov.f64"); -// neon-LABEL: d0_f32x2: -// neon: @APP -// neon: vmov.f64 d0, d0 -// neon: @NO_APP +// CHECK-NEON-LABEL: d0_f32x2: +// CHECK-NEON: @APP +// CHECK-NEON: vmov.f64 d0, d0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(d0_f32x2 f32x2 "d0" "vmov.f64"); -// neon-LABEL: q0_i8x16: -// neon: @APP -// neon: vorr q0, q0, q0 -// neon: @NO_APP +// CHECK-NEON-LABEL: q0_i8x16: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q0, q0, q0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(q0_i8x16 i8x16 "q0" "vmov"); -// neon-LABEL: q0_i16x8: -// neon: @APP -// neon: vorr q0, q0, q0 -// neon: @NO_APP +// CHECK-NEON-LABEL: q0_i16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q0, q0, q0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(q0_i16x8 i16x8 "q0" "vmov"); -// neon-LABEL: q0_i32x4: -// neon: @APP -// neon: vorr q0, q0, q0 -// neon: @NO_APP +// CHECK-NEON-LABEL: q0_i32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q0, q0, q0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(q0_i32x4 i32x4 "q0" "vmov"); -// neon-LABEL: q0_i64x2: -// neon: @APP -// neon: vorr q0, q0, q0 -// neon: @NO_APP +// CHECK-NEON-LABEL: q0_i64x2: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q0, q0, q0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(q0_i64x2 i64x2 "q0" "vmov"); -// neon-LABEL: q0_f16x8: -// neon: @APP -// neon: vorr q0, q0, q0 -// neon: @NO_APP +// CHECK-NEON-LABEL: q0_f16x8: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q0, q0, q0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(q0_f16x8 f16x8 "q0" "vmov"); -// neon-LABEL: q0_f32x4: -// neon: @APP -// neon: vorr q0, q0, q0 -// neon: @NO_APP +// CHECK-NEON-LABEL: q0_f32x4: +// CHECK-NEON: @APP +// CHECK-NEON: vorr q0, q0, q0 +// CHECK-NEON: @NO_APP #[cfg(neon)] check_reg!(q0_f32x4 f32x4 "q0" "vmov"); diff --git a/tests/assembly/asm/mips-types.rs b/tests/assembly/asm/mips-types.rs index bd62f4a5236c2..3379a94e4c34a 100644 --- a/tests/assembly/asm/mips-types.rs +++ b/tests/assembly/asm/mips-types.rs @@ -70,44 +70,44 @@ macro_rules! check_reg { ($func:ident, $ty:ty, $reg:tt, $mov:literal) => { } };} -// mips32-LABEL: sym_static_32: -// mips32: #APP -// mips32: lw $3, %got(extern_static)($gp) -// mips32: #NO_APP +// CHECK-MIPS32-LABEL: sym_static_32: +// CHECK-MIPS32: #APP +// CHECK-MIPS32: lw $3, %got(extern_static)($gp) +// CHECK-MIPS32: #NO_APP #[cfg(mips32)] #[no_mangle] pub unsafe fn sym_static_32() { asm!("lw $v1, {}", sym extern_static); } -// mips32-LABEL: sym_fn_32: -// mips32: #APP -// mips32: lw $3, %got(extern_func)($gp) -// mips32: #NO_APP +// CHECK-MIPS32-LABEL: sym_fn_32: +// CHECK-MIPS32: #APP +// CHECK-MIPS32: lw $3, %got(extern_func)($gp) +// CHECK-MIPS32: #NO_APP #[cfg(mips32)] #[no_mangle] pub unsafe fn sym_fn_32() { asm!("lw $v1, {}", sym extern_func); } -// mips64-LABEL: sym_static_64: -// mips64: #APP -// mips64: lui $3, %got_hi(extern_static) -// mips64: daddu $3, $3, $gp -// mips64: ld $3, %got_lo(extern_static)($3) -// mips64: #NO_APP +// CHECK-MIPS64-LABEL: sym_static_64: +// CHECK-MIPS64: #APP +// CHECK-MIPS64: lui $3, %got_hi(extern_static) +// CHECK-MIPS64: daddu $3, $3, $gp +// CHECK-MIPS64: ld $3, %got_lo(extern_static)($3) +// CHECK-MIPS64: #NO_APP #[cfg(mips64)] #[no_mangle] pub unsafe fn sym_static_64() { asm!("ld $v1, {}", sym extern_static); } -// mips64-LABEL: sym_fn_64: -// mips64: #APP -// mips64: lui $3, %got_hi(extern_func) -// mips64: daddu $3, $3, $gp -// mips64: ld $3, %got_lo(extern_func)($3) -// mips64: #NO_APP +// CHECK-MIPS64-LABEL: sym_fn_64: +// CHECK-MIPS64: #APP +// CHECK-MIPS64: lui $3, %got_hi(extern_func) +// CHECK-MIPS64: daddu $3, $3, $gp +// CHECK-MIPS64: ld $3, %got_lo(extern_func)($3) +// CHECK-MIPS64: #NO_APP #[cfg(mips64)] #[no_mangle] pub unsafe fn sym_fn_64() { @@ -172,10 +172,10 @@ check!(reg_i32, i32, reg, "move"); // CHECK: #NO_APP check!(reg_f32_soft, f32, reg, "move"); -// mips64-LABEL: reg_f64_soft: -// mips64: #APP -// mips64: move ${{[0-9]+}}, ${{[0-9]+}} -// mips64: #NO_APP +// CHECK-MIPS64-LABEL: reg_f64_soft: +// CHECK-MIPS64: #APP +// CHECK-MIPS64: move ${{[0-9]+}}, ${{[0-9]+}} +// CHECK-MIPS64: #NO_APP #[cfg(mips64)] check!(reg_f64_soft, f64, reg, "move"); @@ -197,10 +197,10 @@ check!(reg_u8, u8, reg, "move"); // CHECK: #NO_APP check!(reg_i16, i16, reg, "move"); -// mips64-LABEL: reg_i64: -// mips64: #APP -// mips64: move ${{[0-9]+}}, ${{[0-9]+}} -// mips64: #NO_APP +// CHECK-MIPS64-LABEL: reg_i64: +// CHECK-MIPS64: #APP +// CHECK-MIPS64: move ${{[0-9]+}}, ${{[0-9]+}} +// CHECK-MIPS64: #NO_APP #[cfg(mips64)] check!(reg_i64, i64, reg, "move"); diff --git a/tests/assembly/asm/powerpc-types.rs b/tests/assembly/asm/powerpc-types.rs index bc8af08ad1133..95600ec2be981 100644 --- a/tests/assembly/asm/powerpc-types.rs +++ b/tests/assembly/asm/powerpc-types.rs @@ -88,10 +88,10 @@ check!(reg_i16, i16, reg, "mr"); // CHECK: #NO_APP check!(reg_i32, i32, reg, "mr"); -// powerpc64-LABEL: reg_i64: -// powerpc64: #APP -// powerpc64: mr {{[0-9]+}}, {{[0-9]+}} -// powerpc64: #NO_APP +// CHECK-POWERPC64-LABEL: reg_i64: +// CHECK-POWERPC64: #APP +// CHECK-POWERPC64: mr {{[0-9]+}}, {{[0-9]+}} +// CHECK-POWERPC64: #NO_APP #[cfg(powerpc64)] check!(reg_i64, i64, reg, "mr"); @@ -113,10 +113,10 @@ check!(reg_i16_nz, i16, reg_nonzero, "mr"); // CHECK: #NO_APP check!(reg_i32_nz, i32, reg_nonzero, "mr"); -// powerpc64-LABEL: reg_i64_nz: -// powerpc64: #APP -// powerpc64: mr {{[0-9]+}}, {{[0-9]+}} -// powerpc64: #NO_APP +// CHECK-POWERPC64-LABEL: reg_i64_nz: +// CHECK-POWERPC64: #APP +// CHECK-POWERPC64: mr {{[0-9]+}}, {{[0-9]+}} +// CHECK-POWERPC64: #NO_APP #[cfg(powerpc64)] check!(reg_i64_nz, i64, reg_nonzero, "mr"); @@ -150,10 +150,10 @@ check_reg!(reg_i16_r0, i16, "0", "0", "mr"); // CHECK: #NO_APP check_reg!(reg_i32_r0, i32, "0", "0", "mr"); -// powerpc64-LABEL: reg_i64_r0: -// powerpc64: #APP -// powerpc64: mr 0, 0 -// powerpc64: #NO_APP +// CHECK-POWERPC64-LABEL: reg_i64_r0: +// CHECK-POWERPC64: #APP +// CHECK-POWERPC64: mr 0, 0 +// CHECK-POWERPC64: #NO_APP #[cfg(powerpc64)] check_reg!(reg_i64_r0, i64, "0", "0", "mr"); @@ -175,10 +175,10 @@ check_reg!(reg_i16_r18, i16, "18", "18", "mr"); // CHECK: #NO_APP check_reg!(reg_i32_r18, i32, "18", "18", "mr"); -// powerpc64-LABEL: reg_i64_r18: -// powerpc64: #APP -// powerpc64: mr 18, 18 -// powerpc64: #NO_APP +// CHECK-POWERPC64-LABEL: reg_i64_r18: +// CHECK-POWERPC64: #APP +// CHECK-POWERPC64: mr 18, 18 +// CHECK-POWERPC64: #NO_APP #[cfg(powerpc64)] check_reg!(reg_i64_r18, i64, "18", "18", "mr"); diff --git a/tests/assembly/asm/riscv-types.rs b/tests/assembly/asm/riscv-types.rs index 51b3aaf99d944..eca355d6a1d1f 100644 --- a/tests/assembly/asm/riscv-types.rs +++ b/tests/assembly/asm/riscv-types.rs @@ -10,7 +10,7 @@ //@[riscv64-zfhmin] compile-flags: --target riscv64imac-unknown-none-elf --cfg riscv64 //@[riscv64-zfhmin] needs-llvm-components: riscv //@[riscv64-zfhmin] compile-flags: -C target-feature=+zfhmin -//@[riscv64-zfhmin] filecheck-flags: --check-prefix riscv64 +//@[riscv64-zfhmin] filecheck-flags: --check-prefix CHECK-RISCV64 //@[riscv32-zfhmin] compile-flags: --target riscv32imac-unknown-none-elf //@[riscv32-zfhmin] needs-llvm-components: riscv @@ -19,12 +19,12 @@ //@[riscv64-zfh] compile-flags: --target riscv64imac-unknown-none-elf --cfg riscv64 //@[riscv64-zfh] needs-llvm-components: riscv //@[riscv64-zfh] compile-flags: -C target-feature=+zfh -//@[riscv64-zfh] filecheck-flags: --check-prefix riscv64 --check-prefix zfhmin +//@[riscv64-zfh] filecheck-flags: --check-prefix CHECK-RISCV64 --check-prefix CHECK-ZFHMIN //@[riscv32-zfh] compile-flags: --target riscv32imac-unknown-none-elf //@[riscv32-zfh] needs-llvm-components: riscv //@[riscv32-zfh] compile-flags: -C target-feature=+zfh -//@[riscv32-zfh] filecheck-flags: --check-prefix zfhmin +//@[riscv32-zfh] filecheck-flags: --check-prefix CHECK-ZFHMIN //@ compile-flags: -C target-feature=+d @@ -150,17 +150,17 @@ check!(reg_i32 i32 reg "mv"); // CHECK: #NO_APP check!(reg_f32 f32 reg "mv"); -// riscv64-LABEL: reg_i64: -// riscv64: #APP -// riscv64: mv {{[a-z0-9]+}}, {{[a-z0-9]+}} -// riscv64: #NO_APP +// CHECK-RISCV64-LABEL: reg_i64: +// CHECK-RISCV64: #APP +// CHECK-RISCV64: mv {{[a-z0-9]+}}, {{[a-z0-9]+}} +// CHECK-RISCV64: #NO_APP #[cfg(riscv64)] check!(reg_i64 i64 reg "mv"); -// riscv64-LABEL: reg_f64: -// riscv64: #APP -// riscv64: mv {{[a-z0-9]+}}, {{[a-z0-9]+}} -// riscv64: #NO_APP +// CHECK-RISCV64-LABEL: reg_f64: +// CHECK-RISCV64: #APP +// CHECK-RISCV64: mv {{[a-z0-9]+}}, {{[a-z0-9]+}} +// CHECK-RISCV64: #NO_APP #[cfg(riscv64)] check!(reg_f64 f64 reg "mv"); @@ -171,11 +171,11 @@ check!(reg_f64 f64 reg "mv"); check!(reg_ptr ptr reg "mv"); // CHECK-LABEL: freg_f16: -// zfhmin-NOT: or +// CHECK-ZFHMIN-NOT: or // CHECK: #APP // CHECK: fmv.s f{{[a-z0-9]+}}, f{{[a-z0-9]+}} // CHECK: #NO_APP -// zfhmin-NOT: or +// CHECK-ZFHMIN-NOT: or check!(freg_f16 f16 freg "fmv.s"); // CHECK-LABEL: freg_f32: @@ -220,17 +220,17 @@ check_reg!(a0_i32 i32 "a0" "mv"); // CHECK: #NO_APP check_reg!(a0_f32 f32 "a0" "mv"); -// riscv64-LABEL: a0_i64: -// riscv64: #APP -// riscv64: mv a0, a0 -// riscv64: #NO_APP +// CHECK-RISCV64-LABEL: a0_i64: +// CHECK-RISCV64: #APP +// CHECK-RISCV64: mv a0, a0 +// CHECK-RISCV64: #NO_APP #[cfg(riscv64)] check_reg!(a0_i64 i64 "a0" "mv"); -// riscv64-LABEL: a0_f64: -// riscv64: #APP -// riscv64: mv a0, a0 -// riscv64: #NO_APP +// CHECK-RISCV64-LABEL: a0_f64: +// CHECK-RISCV64: #APP +// CHECK-RISCV64: mv a0, a0 +// CHECK-RISCV64: #NO_APP #[cfg(riscv64)] check_reg!(a0_f64 f64 "a0" "mv"); @@ -241,11 +241,11 @@ check_reg!(a0_f64 f64 "a0" "mv"); check_reg!(a0_ptr ptr "a0" "mv"); // CHECK-LABEL: fa0_f16: -// zfhmin-NOT: or +// CHECK-ZFHMIN-NOT: or // CHECK: #APP // CHECK: fmv.s fa0, fa0 // CHECK: #NO_APP -// zfhmin-NOT: or +// CHECK-ZFHMIN-NOT: or check_reg!(fa0_f16 f16 "fa0" "fmv.s"); // CHECK-LABEL: fa0_f32: diff --git a/tests/assembly/asm/x86-modifiers.rs b/tests/assembly/asm/x86-modifiers.rs index c5e393b10564e..12736cfb74e18 100644 --- a/tests/assembly/asm/x86-modifiers.rs +++ b/tests/assembly/asm/x86-modifiers.rs @@ -53,15 +53,15 @@ macro_rules! check { // CHECK-LABEL: reg: // CHECK: #APP -// x86_64: mov rax, rax -// i686: mov eax, eax +// CHECK-X86_64: mov rax, rax +// CHECK-I686: mov eax, eax // CHECK: #NO_APP check!(reg "" reg "mov"); -// x86_64-LABEL: reg_l: -// x86_64: #APP -// x86_64: mov al, al -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: reg_l: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov al, al +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check!(reg_l "l" reg "mov"); @@ -77,17 +77,17 @@ check!(reg_x "x" reg "mov"); // CHECK: #NO_APP check!(reg_e "e" reg "mov"); -// x86_64-LABEL: reg_r: -// x86_64: #APP -// x86_64: mov rax, rax -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: reg_r: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov rax, rax +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check!(reg_r "r" reg "mov"); // CHECK-LABEL: reg_abcd: // CHECK: #APP -// x86_64: mov rax, rax -// i686: mov eax, eax +// CHECK-X86_64: mov rax, rax +// CHECK-I686: mov eax, eax // CHECK: #NO_APP check!(reg_abcd "" reg_abcd "mov"); @@ -115,10 +115,10 @@ check!(reg_abcd_x "x" reg_abcd "mov"); // CHECK: #NO_APP check!(reg_abcd_e "e" reg_abcd "mov"); -// x86_64-LABEL: reg_abcd_r: -// x86_64: #APP -// x86_64: mov rax, rax -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: reg_abcd_r: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov rax, rax +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check!(reg_abcd_r "r" reg_abcd "mov"); diff --git a/tests/assembly/asm/x86-types.rs b/tests/assembly/asm/x86-types.rs index 8e229614420b6..266cc87efa814 100644 --- a/tests/assembly/asm/x86-types.rs +++ b/tests/assembly/asm/x86-types.rs @@ -315,99 +315,99 @@ macro_rules! check_reg { // CHECK-LABEL: reg_i16: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_i16 i16 reg "mov"); // CHECK-LABEL: reg_f16: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_f16 f16 reg "mov"); // CHECK-LABEL: reg_i32: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_i32 i32 reg "mov"); // CHECK-LABEL: reg_f32: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_f32 f32 reg "mov"); -// x86_64-LABEL: reg_i64: -// x86_64: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: reg_i64: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check!(reg_i64 i64 reg "mov"); -// x86_64-LABEL: reg_f64: -// x86_64: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: reg_f64: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check!(reg_f64 f64 reg "mov"); // CHECK-LABEL: reg_ptr: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_ptr ptr reg "mov"); // CHECK-LABEL: reg_abcd_i16: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_abcd_i16 i16 reg_abcd "mov"); // CHECK-LABEL: reg_abcd_f16: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_abcd_f16 f16 reg_abcd "mov"); // CHECK-LABEL: reg_abcd_i32: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_abcd_i32 i32 reg_abcd "mov"); // CHECK-LABEL: reg_abcd_f32: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_abcd_f32 f32 reg_abcd "mov"); -// x86_64-LABEL: reg_abcd_i64: -// x86_64: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: reg_abcd_i64: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check!(reg_abcd_i64 i64 reg_abcd "mov"); -// x86_64-LABEL: reg_abcd_f64: -// x86_64: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: reg_abcd_f64: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check!(reg_abcd_f64 f64 reg_abcd "mov"); // CHECK-LABEL: reg_abcd_ptr: // CHECK: #APP -// x86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} -// i686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} +// CHECK-X86_64: mov r{{[a-z0-9]+}}, r{{[a-z0-9]+}} +// CHECK-I686: mov e{{[a-z0-9]+}}, e{{[a-z0-9]+}} // CHECK: #NO_APP check!(reg_abcd_ptr ptr reg_abcd "mov"); @@ -849,17 +849,17 @@ check_reg!(eax_i32 i32 "eax" "mov"); // CHECK: #NO_APP check_reg!(eax_f32 f32 "eax" "mov"); -// x86_64-LABEL: eax_i64: -// x86_64: #APP -// x86_64: mov eax, eax -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: eax_i64: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov eax, eax +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check_reg!(eax_i64 i64 "eax" "mov"); -// x86_64-LABEL: eax_f64: -// x86_64: #APP -// x86_64: mov eax, eax -// x86_64: #NO_APP +// CHECK-X86_64-LABEL: eax_f64: +// CHECK-X86_64: #APP +// CHECK-X86_64: mov eax, eax +// CHECK-X86_64: #NO_APP #[cfg(x86_64)] check_reg!(eax_f64 f64 "eax" "mov"); @@ -869,10 +869,10 @@ check_reg!(eax_f64 f64 "eax" "mov"); // CHECK: #NO_APP check_reg!(eax_ptr ptr "eax" "mov"); -// i686-LABEL: ah_byte: -// i686: #APP -// i686: mov ah, ah -// i686: #NO_APP +// CHECK-I686-LABEL: ah_byte: +// CHECK-I686: #APP +// CHECK-I686: mov ah, ah +// CHECK-I686: #NO_APP #[cfg(i686)] check_reg!(ah_byte i8 "ah" "mov"); diff --git a/tests/assembly/nvptx-kernel-abi/nvptx-kernel-args-abi-v7.rs b/tests/assembly/nvptx-kernel-abi/nvptx-kernel-args-abi-v7.rs index fb3a325a41f81..d72d8ca7be43c 100644 --- a/tests/assembly/nvptx-kernel-abi/nvptx-kernel-args-abi-v7.rs +++ b/tests/assembly/nvptx-kernel-abi/nvptx-kernel-args-abi-v7.rs @@ -235,9 +235,9 @@ pub unsafe extern "ptx-kernel" fn f_byte_array_arg(_a: [u8; 5]) {} #[no_mangle] pub unsafe extern "ptx-kernel" fn f_float_array_arg(_a: [f32; 5]) {} -// FIXME: u128 started to break compilation with disabled CI -// NO_CHECK: .visible .entry f_u128_array_arg( -// NO_CHECK: .param .align 16 .b8 f_u128_array_arg_param_0[80] +// COM: FIXME: u128 started to break compilation with disabled CI +// COM: CHECK: .visible .entry f_u128_array_arg( +// COM: CHECK: .param .align 16 .b8 f_u128_array_arg_param_0[80] //#[no_mangle] //pub unsafe extern "ptx-kernel" fn f_u128_array_arg(_a: [u128; 5]) {} diff --git a/tests/assembly/simd-bitmask.rs b/tests/assembly/simd-bitmask.rs index cd22ca067061f..c2c74e729f45c 100644 --- a/tests/assembly/simd-bitmask.rs +++ b/tests/assembly/simd-bitmask.rs @@ -50,23 +50,23 @@ pub unsafe extern "C" fn bitmask_m8x16(mask: m8x16) -> u16 { // Note that x86 has no byte shift, llvm uses a word shift to move the least significant bit // of each byte into the right position. // - // x86-NOT: psllw - // x86: movmskb eax, xmm0 - // - // x86-avx2-NOT: vpsllw - // x86-avx2: vpmovmskb eax, xmm0 - // - // x86-avx512-NOT: vpsllw xmm0 - // x86-avx512: vpmovmskb eax, xmm0 - // - // aarch64: adrp - // aarch64-NEXT: cmlt - // aarch64-NEXT: ldr - // aarch64-NEXT: and - // aarch64-NEXT: ext - // aarch64-NEXT: zip1 - // aarch64-NEXT: addv - // aarch64-NEXT: fmov + // CHECK-X86-NOT: psllw + // CHECK-X86: movmskb eax, xmm0 + // + // CHECK-X86-AVX2-NOT: vpsllw + // CHECK-X86-AVX2: vpmovmskb eax, xmm0 + // + // CHECK-X86-AVX512-NOT: vpsllw xmm0 + // CHECK-X86-AVX512: vpmovmskb eax, xmm0 + // + // CHECK-AARCH64: adrp + // CHECK-AARCH64-NEXT: cmlt + // CHECK-AARCH64-NEXT: ldr + // CHECK-AARCH64-NEXT: and + // CHECK-AARCH64-NEXT: ext + // CHECK-AARCH64-NEXT: zip1 + // CHECK-AARCH64-NEXT: addv + // CHECK-AARCH64-NEXT: fmov simd_bitmask(mask) } @@ -79,9 +79,9 @@ pub unsafe extern "C" fn bitmask_m8x64(mask: m8x64) -> u64 { // // The parameter is a 512 bit vector which in the C abi is only valid for avx512 targets. // - // x86-avx512-NOT: vpsllw - // x86-avx512: vpmovb2m k0, zmm0 - // x86-avx512: kmovq rax, k0 + // CHECK-X86-AVX512-NOT: vpsllw + // CHECK-X86-AVX512: vpmovb2m k0, zmm0 + // CHECK-X86-AVX512: kmovq rax, k0 simd_bitmask(mask) } @@ -90,22 +90,22 @@ pub unsafe extern "C" fn bitmask_m8x64(mask: m8x64) -> u64 { pub unsafe extern "C" fn bitmask_m32x4(mask: m32x4) -> u8 { // The simd_bitmask intrinsic already uses the most significant bit, so no shift is necessary. // - // x86-NOT: psllq - // x86: movmskps eax, xmm0 + // CHECK-X86-NOT: psllq + // CHECK-X86: movmskps eax, xmm0 // - // x86-avx2-NOT: vpsllq - // x86-avx2: vmovmskps eax, xmm0 + // CHECK-X86-AVX2-NOT: vpsllq + // CHECK-X86-AVX2: vmovmskps eax, xmm0 // - // x86-avx512-NOT: vpsllq - // x86-avx512: vmovmskps eax, xmm0 + // CHECK-X86-AVX512-NOT: vpsllq + // CHECK-X86-AVX512: vmovmskps eax, xmm0 // - // aarch64: adrp - // aarch64-NEXT: cmlt - // aarch64-NEXT: ldr - // aarch64-NEXT: and - // aarch64-NEXT: addv - // aarch64-NEXT: fmov - // aarch64-NEXT: and + // CHECK-AARCH64: adrp + // CHECK-AARCH64-NEXT: cmlt + // CHECK-AARCH64-NEXT: ldr + // CHECK-AARCH64-NEXT: and + // CHECK-AARCH64-NEXT: addv + // CHECK-AARCH64-NEXT: fmov + // CHECK-AARCH64-NEXT: and simd_bitmask(mask) } @@ -114,22 +114,22 @@ pub unsafe extern "C" fn bitmask_m32x4(mask: m32x4) -> u8 { pub unsafe extern "C" fn bitmask_m64x2(mask: m64x2) -> u8 { // The simd_bitmask intrinsic already uses the most significant bit, so no shift is necessary. // - // x86-NOT: psllq - // x86: movmskpd eax, xmm0 + // CHECK-X86-NOT: psllq + // CHECK-X86: movmskpd eax, xmm0 // - // x86-avx2-NOT: vpsllq - // x86-avx2: vmovmskpd eax, xmm0 + // CHECK-X86-AVX2-NOT: vpsllq + // CHECK-X86-AVX2: vmovmskpd eax, xmm0 // - // x86-avx512-NOT: vpsllq - // x86-avx512: vmovmskpd eax, xmm0 + // CHECK-X86-AVX512-NOT: vpsllq + // CHECK-X86-AVX512: vmovmskpd eax, xmm0 // - // aarch64: adrp - // aarch64-NEXT: cmlt - // aarch64-NEXT: ldr - // aarch64-NEXT: and - // aarch64-NEXT: addp - // aarch64-NEXT: fmov - // aarch64-NEXT: and + // CHECK-AARCH64: adrp + // CHECK-AARCH64-NEXT: cmlt + // CHECK-AARCH64-NEXT: ldr + // CHECK-AARCH64-NEXT: and + // CHECK-AARCH64-NEXT: addp + // CHECK-AARCH64-NEXT: fmov + // CHECK-AARCH64-NEXT: and simd_bitmask(mask) } @@ -140,10 +140,10 @@ pub unsafe extern "C" fn bitmask_m64x4(mask: m64x4) -> u8 { // // The parameter is a 256 bit vector which in the C abi is only valid for avx/avx512 targets. // - // x86-avx2-NOT: vpsllq - // x86-avx2: vmovmskpd eax, ymm0 + // CHECK-X86-AVX2-NOT: vpsllq + // CHECK-X86-AVX2: vmovmskpd eax, ymm0 // - // x86-avx512-NOT: vpsllq - // x86-avx512: vmovmskpd eax, ymm0 + // CHECK-X86-AVX512-NOT: vpsllq + // CHECK-X86-AVX512: vmovmskpd eax, ymm0 simd_bitmask(mask) } diff --git a/tests/assembly/simd-intrinsic-gather.rs b/tests/assembly/simd-intrinsic-gather.rs index 83015f05ab3ee..869e4c4c010f5 100644 --- a/tests/assembly/simd-intrinsic-gather.rs +++ b/tests/assembly/simd-intrinsic-gather.rs @@ -36,9 +36,9 @@ pub unsafe extern "C" fn gather_f64x4(mask: m64x4, ptrs: pf64x4) -> f64x4 { // FIXME: This should also get checked to generate a gather instruction for avx2. // Currently llvm scalarizes this code, see https://github.com/llvm/llvm-project/issues/59789 // - // x86-avx512: vpsllq ymm0, ymm0, 63 - // x86-avx512-NEXT: vpmovq2m k1, ymm0 - // x86-avx512-NEXT: vpxor xmm0, xmm0, xmm0 - // x86-avx512-NEXT: vgatherqpd ymm0 {k1}, ymmword ptr [1*ymm1] + // CHECK-X86-AVX512: vpsllq ymm0, ymm0, 63 + // CHECK-X86-AVX512-NEXT: vpmovq2m k1, ymm0 + // CHECK-X86-AVX512-NEXT: vpxor xmm0, xmm0, xmm0 + // CHECK-X86-AVX512-NEXT: vgatherqpd ymm0 {k1}, ymmword ptr [1*ymm1] simd_gather(f64x4([0_f64, 0_f64, 0_f64, 0_f64]), ptrs, mask) } diff --git a/tests/assembly/simd-intrinsic-mask-load.rs b/tests/assembly/simd-intrinsic-mask-load.rs index d537c143d365b..f795f64f0fcee 100644 --- a/tests/assembly/simd-intrinsic-mask-load.rs +++ b/tests/assembly/simd-intrinsic-mask-load.rs @@ -46,43 +46,43 @@ extern "rust-intrinsic" { pub unsafe extern "C" fn load_i8x16(mask: m8x16, pointer: *const i8) -> i8x16 { // Since avx2 supports no masked loads for bytes, the code tests each individual bit // and jumps to code that inserts individual bytes. - // x86-avx2: vpsllw xmm0, xmm0, 7 - // x86-avx2-NEXT: vpmovmskb eax, xmm0 - // x86-avx2-NEXT: vpxor xmm0, xmm0 - // x86-avx2-NEXT: test al, 1 - // x86-avx2-NEXT: jne - // x86-avx2-NEXT: test al, 2 - // x86-avx2-NEXT: jne - // x86-avx2-DAG: movzx [[REG:[a-z]+]], byte ptr [rdi] - // x86-avx2-NEXT: vmovd xmm0, [[REG]] - // x86-avx2-DAG: vpinsrb xmm0, xmm0, byte ptr [rdi + 1], 1 + // CHECK-X86-AVX2: vpsllw xmm0, xmm0, 7 + // CHECK-X86-AVX2-NEXT: vpmovmskb eax, xmm0 + // CHECK-X86-AVX2-NEXT: vpxor xmm0, xmm0 + // CHECK-X86-AVX2-NEXT: test al, 1 + // CHECK-X86-AVX2-NEXT: jne + // CHECK-X86-AVX2-NEXT: test al, 2 + // CHECK-X86-AVX2-NEXT: jne + // CHECK-X86-AVX2-DAG: movzx [[REG:[a-z]+]], byte ptr [rdi] + // CHECK-X86-AVX2-NEXT: vmovd xmm0, [[REG]] + // CHECK-X86-AVX2-DAG: vpinsrb xmm0, xmm0, byte ptr [rdi + 1], 1 // - // x86-avx512: vpsllw xmm0, xmm0, 7 - // x86-avx512-NEXT: vpmovb2m k1, xmm0 - // x86-avx512-NEXT: vmovdqu8 xmm0 {k1} {z}, xmmword ptr [rdi] + // CHECK-X86-AVX512: vpsllw xmm0, xmm0, 7 + // CHECK-X86-AVX512-NEXT: vpmovb2m k1, xmm0 + // CHECK-X86-AVX512-NEXT: vmovdqu8 xmm0 {k1} {z}, xmmword ptr [rdi] simd_masked_load(mask, pointer, i8x16([0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0])) } // CHECK-LABEL: load_f32x8 #[no_mangle] pub unsafe extern "C" fn load_f32x8(mask: m32x8, pointer: *const f32) -> f32x8 { - // x86-avx2: vpslld ymm0, ymm0, 31 - // x86-avx2-NEXT: vmaskmovps ymm0, ymm0, ymmword ptr [rdi] + // CHECK-X86-AVX2: vpslld ymm0, ymm0, 31 + // CHECK-X86-AVX2-NEXT: vmaskmovps ymm0, ymm0, ymmword ptr [rdi] // - // x86-avx512: vpslld ymm0, ymm0, 31 - // x86-avx512-NEXT: vpmovd2m k1, ymm0 - // x86-avx512-NEXT: vmovups ymm0 {k1} {z}, ymmword ptr [rdi] + // CHECK-X86-AVX512: vpslld ymm0, ymm0, 31 + // CHECK-X86-AVX512-NEXT: vpmovd2m k1, ymm0 + // CHECK-X86-AVX512-NEXT: vmovups ymm0 {k1} {z}, ymmword ptr [rdi] simd_masked_load(mask, pointer, f32x8([0_f32, 0_f32, 0_f32, 0_f32, 0_f32, 0_f32, 0_f32, 0_f32])) } // CHECK-LABEL: load_f64x4 #[no_mangle] pub unsafe extern "C" fn load_f64x4(mask: m64x4, pointer: *const f64) -> f64x4 { - // x86-avx2: vpsllq ymm0, ymm0, 63 - // x86-avx2-NEXT: vmaskmovpd ymm0, ymm0, ymmword ptr [rdi] + // CHECK-X86-AVX2: vpsllq ymm0, ymm0, 63 + // CHECK-X86-AVX2-NEXT: vmaskmovpd ymm0, ymm0, ymmword ptr [rdi] // - // x86-avx512: vpsllq ymm0, ymm0, 63 - // x86-avx512-NEXT: vpmovq2m k1, ymm0 - // x86-avx512-NEXT: vmovupd ymm0 {k1} {z}, ymmword ptr [rdi] + // CHECK-X86-AVX512: vpsllq ymm0, ymm0, 63 + // CHECK-X86-AVX512-NEXT: vpmovq2m k1, ymm0 + // CHECK-X86-AVX512-NEXT: vmovupd ymm0 {k1} {z}, ymmword ptr [rdi] simd_masked_load(mask, pointer, f64x4([0_f64, 0_f64, 0_f64, 0_f64])) } diff --git a/tests/assembly/simd-intrinsic-mask-reduce.rs b/tests/assembly/simd-intrinsic-mask-reduce.rs index dd4dbaeda76c0..02e198c9a4598 100644 --- a/tests/assembly/simd-intrinsic-mask-reduce.rs +++ b/tests/assembly/simd-intrinsic-mask-reduce.rs @@ -32,31 +32,31 @@ extern "rust-intrinsic" { // CHECK-LABEL: mask_reduce_all: #[no_mangle] pub unsafe extern "C" fn mask_reduce_all(m: mask8x16) -> bool { - // x86: psllw xmm0, 7 - // x86-NEXT: pmovmskb eax, xmm0 - // x86-NEXT: {{cmp ax, -1|xor eax, 65535}} - // x86-NEXT: sete al + // CHECK-X86: psllw xmm0, 7 + // CHECK-X86-NEXT: pmovmskb eax, xmm0 + // CHECK-X86-NEXT: {{cmp ax, -1|xor eax, 65535}} + // CHECK-X86-NEXT: sete al // - // aarch64: shl v0.16b, v0.16b, #7 - // aarch64-NEXT: cmlt v0.16b, v0.16b, #0 - // aarch64-NEXT: uminv b0, v0.16b - // aarch64-NEXT: fmov [[REG:[a-z0-9]+]], s0 - // aarch64-NEXT: and w0, [[REG]], #0x1 + // CHECK-AARCH64: shl v0.16b, v0.16b, #7 + // CHECK-AARCH64-NEXT: cmlt v0.16b, v0.16b, #0 + // CHECK-AARCH64-NEXT: uminv b0, v0.16b + // CHECK-AARCH64-NEXT: fmov [[REG:[a-z0-9]+]], s0 + // CHECK-AARCH64-NEXT: and w0, [[REG]], #0x1 simd_reduce_all(m) } // CHECK-LABEL: mask_reduce_any: #[no_mangle] pub unsafe extern "C" fn mask_reduce_any(m: mask8x16) -> bool { - // x86: psllw xmm0, 7 - // x86-NEXT: pmovmskb - // x86-NEXT: test eax, eax - // x86-NEXT: setne al + // CHECK-X86: psllw xmm0, 7 + // CHECK-X86-NEXT: pmovmskb + // CHECK-X86-NEXT: test eax, eax + // CHECK-X86-NEXT: setne al // - // aarch64: shl v0.16b, v0.16b, #7 - // aarch64-NEXT: cmlt v0.16b, v0.16b, #0 - // aarch64-NEXT: umaxv b0, v0.16b - // aarch64-NEXT: fmov [[REG:[a-z0-9]+]], s0 - // aarch64-NEXT: and w0, [[REG]], #0x1 + // CHECK-AARCH64: shl v0.16b, v0.16b, #7 + // CHECK-AARCH64-NEXT: cmlt v0.16b, v0.16b, #0 + // CHECK-AARCH64-NEXT: umaxv b0, v0.16b + // CHECK-AARCH64-NEXT: fmov [[REG:[a-z0-9]+]], s0 + // CHECK-AARCH64-NEXT: and w0, [[REG]], #0x1 simd_reduce_any(m) } diff --git a/tests/assembly/simd-intrinsic-mask-store.rs b/tests/assembly/simd-intrinsic-mask-store.rs index 5d4c00c382337..2e5c9b2afd73e 100644 --- a/tests/assembly/simd-intrinsic-mask-store.rs +++ b/tests/assembly/simd-intrinsic-mask-store.rs @@ -46,41 +46,41 @@ extern "rust-intrinsic" { pub unsafe extern "C" fn store_i8x16(mask: m8x16, pointer: *mut i8, value: i8x16) { // Since avx2 supports no masked stores for bytes, the code tests each individual bit // and jumps to code that extracts individual bytes to memory. - // x86-avx2: vpsllw xmm0, xmm0, 7 - // x86-avx2-NEXT: vpmovmskb eax, xmm0 - // x86-avx2-NEXT: test al, 1 - // x86-avx2-NEXT: jne - // x86-avx2-NEXT: test al, 2 - // x86-avx2-NEXT: jne - // x86-avx2-DAG: vpextrb byte ptr [rdi + 1], xmm1, 1 - // x86-avx2-DAG: vpextrb byte ptr [rdi], xmm1, 0 + // CHECK-X86-AVX2: vpsllw xmm0, xmm0, 7 + // CHECK-X86-AVX2-NEXT: vpmovmskb eax, xmm0 + // CHECK-X86-AVX2-NEXT: test al, 1 + // CHECK-X86-AVX2-NEXT: jne + // CHECK-X86-AVX2-NEXT: test al, 2 + // CHECK-X86-AVX2-NEXT: jne + // CHECK-X86-AVX2-DAG: vpextrb byte ptr [rdi + 1], xmm1, 1 + // CHECK-X86-AVX2-DAG: vpextrb byte ptr [rdi], xmm1, 0 // - // x86-avx512: vpsllw xmm0, xmm0, 7 - // x86-avx512-NEXT: vpmovb2m k1, xmm0 - // x86-avx512-NEXT: vmovdqu8 xmmword ptr [rdi] {k1}, xmm1 + // CHECK-X86-AVX512: vpsllw xmm0, xmm0, 7 + // CHECK-X86-AVX512-NEXT: vpmovb2m k1, xmm0 + // CHECK-X86-AVX512-NEXT: vmovdqu8 xmmword ptr [rdi] {k1}, xmm1 simd_masked_store(mask, pointer, value) } // CHECK-LABEL: store_f32x8 #[no_mangle] pub unsafe extern "C" fn store_f32x8(mask: m32x8, pointer: *mut f32, value: f32x8) { - // x86-avx2: vpslld ymm0, ymm0, 31 - // x86-avx2-NEXT: vmaskmovps ymmword ptr [rdi], ymm0, ymm1 + // CHECK-X86-AVX2: vpslld ymm0, ymm0, 31 + // CHECK-X86-AVX2-NEXT: vmaskmovps ymmword ptr [rdi], ymm0, ymm1 // - // x86-avx512: vpslld ymm0, ymm0, 31 - // x86-avx512-NEXT: vpmovd2m k1, ymm0 - // x86-avx512-NEXT: vmovups ymmword ptr [rdi] {k1}, ymm1 + // CHECK-X86-AVX512: vpslld ymm0, ymm0, 31 + // CHECK-X86-AVX512-NEXT: vpmovd2m k1, ymm0 + // CHECK-X86-AVX512-NEXT: vmovups ymmword ptr [rdi] {k1}, ymm1 simd_masked_store(mask, pointer, value) } // CHECK-LABEL: store_f64x4 #[no_mangle] pub unsafe extern "C" fn store_f64x4(mask: m64x4, pointer: *mut f64, value: f64x4) { - // x86-avx2: vpsllq ymm0, ymm0, 63 - // x86-avx2-NEXT: vmaskmovpd ymmword ptr [rdi], ymm0, ymm1 + // CHECK-X86-AVX2: vpsllq ymm0, ymm0, 63 + // CHECK-X86-AVX2-NEXT: vmaskmovpd ymmword ptr [rdi], ymm0, ymm1 // - // x86-avx512: vpsllq ymm0, ymm0, 63 - // x86-avx512-NEXT: vpmovq2m k1, ymm0 - // x86-avx512-NEXT: vmovupd ymmword ptr [rdi] {k1}, ymm1 + // CHECK-X86-AVX512: vpsllq ymm0, ymm0, 63 + // CHECK-X86-AVX512-NEXT: vpmovq2m k1, ymm0 + // CHECK-X86-AVX512-NEXT: vmovupd ymmword ptr [rdi] {k1}, ymm1 simd_masked_store(mask, pointer, value) } diff --git a/tests/assembly/simd-intrinsic-scatter.rs b/tests/assembly/simd-intrinsic-scatter.rs index 55095e4cb681f..f6215b120c74a 100644 --- a/tests/assembly/simd-intrinsic-scatter.rs +++ b/tests/assembly/simd-intrinsic-scatter.rs @@ -33,8 +33,8 @@ extern "rust-intrinsic" { // CHECK-LABEL: scatter_f64x4 #[no_mangle] pub unsafe extern "C" fn scatter_f64x4(values: f64x4, ptrs: pf64x4, mask: m64x4) { - // x86-avx512: vpsllq ymm2, ymm2, 63 - // x86-avx512-NEXT: vpmovq2m k1, ymm2 - // x86-avx512-NEXT: vscatterqpd ymmword ptr [1*ymm1] {k1}, ymm0 + // CHECK-X86-AVX512: vpsllq ymm2, ymm2, 63 + // CHECK-X86-AVX512-NEXT: vpmovq2m k1, ymm2 + // CHECK-X86-AVX512-NEXT: vscatterqpd ymmword ptr [1*ymm1] {k1}, ymm0 simd_scatter(values, ptrs, mask) } diff --git a/tests/assembly/simd-intrinsic-select.rs b/tests/assembly/simd-intrinsic-select.rs index 4dfc2f9ed1fb2..cd4f3f7b659bd 100644 --- a/tests/assembly/simd-intrinsic-select.rs +++ b/tests/assembly/simd-intrinsic-select.rs @@ -59,48 +59,48 @@ extern "rust-intrinsic" { // CHECK-LABEL: select_i8x16 #[no_mangle] pub unsafe extern "C" fn select_i8x16(mask: m8x16, a: i8x16, b: i8x16) -> i8x16 { - // x86-avx2: vpsllw xmm0, xmm0, 7 - // x86-avx2-NEXT: vpblendvb xmm0, xmm2, xmm1, xmm0 + // CHECK-X86-AVX2: vpsllw xmm0, xmm0, 7 + // CHECK-X86-AVX2-NEXT: vpblendvb xmm0, xmm2, xmm1, xmm0 // - // x86-avx512: vpsllw xmm0, xmm0, 7 - // x86-avx512-NEXT: vpmovb2m k1, xmm0 - // x86-avx512-NEXT: vpblendmb xmm0 {k1}, xmm2, xmm1 + // CHECK-X86-AVX512: vpsllw xmm0, xmm0, 7 + // CHECK-X86-AVX512-NEXT: vpmovb2m k1, xmm0 + // CHECK-X86-AVX512-NEXT: vpblendmb xmm0 {k1}, xmm2, xmm1 // - // aarch64: shl v0.16b, v0.16b, #7 - // aarch64-NEXT: cmlt v0.16b, v0.16b, #0 - // aarch64-NEXT: bsl v0.16b, v1.16b, v2.16b + // CHECK-AARCH64: shl v0.16b, v0.16b, #7 + // CHECK-AARCH64-NEXT: cmlt v0.16b, v0.16b, #0 + // CHECK-AARCH64-NEXT: bsl v0.16b, v1.16b, v2.16b simd_select(mask, a, b) } // CHECK-LABEL: select_f32x4 #[no_mangle] pub unsafe extern "C" fn select_f32x4(mask: m32x4, a: f32x4, b: f32x4) -> f32x4 { - // x86-avx2: vpslld xmm0, xmm0, 31 - // x86-avx2-NEXT: vblendvps xmm0, xmm2, xmm1, xmm0 + // CHECK-X86-AVX2: vpslld xmm0, xmm0, 31 + // CHECK-X86-AVX2-NEXT: vblendvps xmm0, xmm2, xmm1, xmm0 // - // x86-avx512: vpslld xmm0, xmm0, 31 - // x86-avx512-NEXT: vpmovd2m k1, xmm0 - // x86-avx512-NEXT: vblendmps xmm0 {k1}, xmm2, xmm1 + // CHECK-X86-AVX512: vpslld xmm0, xmm0, 31 + // CHECK-X86-AVX512-NEXT: vpmovd2m k1, xmm0 + // CHECK-X86-AVX512-NEXT: vblendmps xmm0 {k1}, xmm2, xmm1 // - // aarch64: shl v0.4s, v0.4s, #31 - // aarch64-NEXT: cmlt v0.4s, v0.4s, #0 - // aarch64-NEXT: bsl v0.16b, v1.16b, v2.16b + // CHECK-AARCH64: shl v0.4s, v0.4s, #31 + // CHECK-AARCH64-NEXT: cmlt v0.4s, v0.4s, #0 + // CHECK-AARCH64-NEXT: bsl v0.16b, v1.16b, v2.16b simd_select(mask, a, b) } // CHECK-LABEL: select_f64x2 #[no_mangle] pub unsafe extern "C" fn select_f64x2(mask: m64x2, a: f64x2, b: f64x2) -> f64x2 { - // x86-avx2: vpsllq xmm0, xmm0, 63 - // x86-avx2-NEXT: vblendvpd xmm0, xmm2, xmm1, xmm0 + // CHECK-X86-AVX2: vpsllq xmm0, xmm0, 63 + // CHECK-X86-AVX2-NEXT: vblendvpd xmm0, xmm2, xmm1, xmm0 // - // x86-avx512: vpsllq xmm0, xmm0, 63 - // x86-avx512-NEXT: vpmovq2m k1, xmm0 - // x86-avx512-NEXT: vblendmpd xmm0 {k1}, xmm2, xmm1 + // CHECK-X86-AVX512: vpsllq xmm0, xmm0, 63 + // CHECK-X86-AVX512-NEXT: vpmovq2m k1, xmm0 + // CHECK-X86-AVX512-NEXT: vblendmpd xmm0 {k1}, xmm2, xmm1 // - // aarch64: shl v0.2d, v0.2d, #63 - // aarch64-NEXT: cmlt v0.2d, v0.2d, #0 - // aarch64-NEXT: bsl v0.16b, v1.16b, v2.16b + // CHECK-AARCH64: shl v0.2d, v0.2d, #63 + // CHECK-AARCH64-NEXT: cmlt v0.2d, v0.2d, #0 + // CHECK-AARCH64-NEXT: bsl v0.16b, v1.16b, v2.16b simd_select(mask, a, b) } @@ -109,12 +109,12 @@ pub unsafe extern "C" fn select_f64x2(mask: m64x2, a: f64x2, b: f64x2) -> f64x2 pub unsafe extern "C" fn select_f64x4(mask: m64x4, a: f64x4, b: f64x4) -> f64x4 { // The parameter is a 256 bit vector which in the C abi is only valid for avx targets. // - // x86-avx2: vpsllq ymm0, ymm0, 63 - // x86-avx2-NEXT: vblendvpd ymm0, ymm2, ymm1, ymm0 + // CHECK-X86-AVX2: vpsllq ymm0, ymm0, 63 + // CHECK-X86-AVX2-NEXT: vblendvpd ymm0, ymm2, ymm1, ymm0 // - // x86-avx512: vpsllq ymm0, ymm0, 63 - // x86-avx512-NEXT: vpmovq2m k1, ymm0 - // x86-avx512-NEXT: vblendmpd ymm0 {k1}, ymm2, ymm1 + // CHECK-X86-AVX512: vpsllq ymm0, ymm0, 63 + // CHECK-X86-AVX512-NEXT: vpmovq2m k1, ymm0 + // CHECK-X86-AVX512-NEXT: vblendmpd ymm0 {k1}, ymm2, ymm1 simd_select(mask, a, b) } @@ -123,8 +123,8 @@ pub unsafe extern "C" fn select_f64x4(mask: m64x4, a: f64x4, b: f64x4) -> f64x4 pub unsafe extern "C" fn select_f64x8(mask: m64x8, a: f64x8, b: f64x8) -> f64x8 { // The parameter is a 256 bit vector which in the C abi is only valid for avx512 targets. // - // x86-avx512: vpsllq zmm0, zmm0, 63 - // x86-avx512-NEXT: vpmovq2m k1, zmm0 - // x86-avx512-NEXT: vblendmpd zmm0 {k1}, zmm2, zmm1 + // CHECK-X86-AVX512: vpsllq zmm0, zmm0, 63 + // CHECK-X86-AVX512-NEXT: vpmovq2m k1, zmm0 + // CHECK-X86-AVX512-NEXT: vblendmpd zmm0 {k1}, zmm2, zmm1 simd_select(mask, a, b) } diff --git a/tests/assembly/slice-is_ascii.rs b/tests/assembly/slice-is_ascii.rs index 3a050347d8981..b69a510890192 100644 --- a/tests/assembly/slice-is_ascii.rs +++ b/tests/assembly/slice-is_ascii.rs @@ -1,6 +1,6 @@ -//@ revisions: WIN LIN -//@ [WIN] only-windows -//@ [LIN] only-linux +//@ revisions: win lin +//@ [win] only-windows +//@ [lin] only-linux //@ assembly-output: emit-asm //@ compile-flags: --crate-type=lib -O -C llvm-args=-x86-asm-syntax=intel //@ only-x86_64 diff --git a/tests/assembly/stack-probes.rs b/tests/assembly/stack-probes.rs index ddabd4b1632a5..6a2db8bfa09b9 100644 --- a/tests/assembly/stack-probes.rs +++ b/tests/assembly/stack-probes.rs @@ -28,9 +28,9 @@ impl Copy for u8 {} #[no_mangle] pub fn small_stack_probe(x: u8, f: fn(&mut [u8; 8192])) { // CHECK-NOT: __rust_probestack - // x86_64: sub rsp, 4096 - // i686: sub esp, 4096 - // aarch64: sub sp, sp, #1, lsl #12 + // CHECK-X86_64: sub rsp, 4096 + // CHECK-I686: sub esp, 4096 + // CHECK-AARCH64: sub sp, sp, #1, lsl #12 f(&mut [x; 8192]); } @@ -38,8 +38,8 @@ pub fn small_stack_probe(x: u8, f: fn(&mut [u8; 8192])) { #[no_mangle] pub fn big_stack_probe(x: u8, f: fn(&[u8; 65536])) { // CHECK-NOT: __rust_probestack - // x86_64: sub rsp, 4096 - // i686: sub esp, 4096 - // aarch64: sub sp, sp, #1, lsl #12 + // CHECK-X86_64: sub rsp, 4096 + // CHECK-I686: sub esp, 4096 + // CHECK-AARCH64: sub sp, sp, #1, lsl #12 f(&mut [x; 65536]); } diff --git a/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-32bit.rs b/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-32bit.rs index 2a8251785e77d..03dada43e2c4f 100644 --- a/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-32bit.rs +++ b/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-32bit.rs @@ -16,11 +16,11 @@ // CHECK-LABEL: emptyfn: #[no_mangle] pub fn emptyfn() { - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_char @@ -34,11 +34,11 @@ pub fn array_char(f: fn(*const char)) { f(&b as *const _); f(&c as *const _); - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_u8_1 @@ -50,11 +50,11 @@ pub fn array_u8_1(f: fn(*const u8)) { // The 'strong' heuristic adds stack protection to functions with local // array variables regardless of their size. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_u8_small: @@ -67,11 +67,11 @@ pub fn array_u8_small(f: fn(*const u8)) { // Small arrays do not lead to stack protection by the 'basic' heuristic. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_u8_large: @@ -83,11 +83,11 @@ pub fn array_u8_large(f: fn(*const u8)) { // Since `a` is a byte array with size greater than 8, the basic heuristic // will also protect this function. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } #[derive(Copy, Clone)] @@ -102,11 +102,11 @@ pub fn array_bytesizednewtype_9(f: fn(*const ByteSizedNewtype)) { // Since `a` is a byte array in the LLVM output, the basic heuristic will // also protect this function. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: local_var_addr_used_indirectly @@ -129,11 +129,11 @@ pub fn local_var_addr_used_indirectly(f: fn(bool)) { // EOF // ``` - // all: __security_check_cookie - // strong: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: local_string_addr_taken @@ -160,11 +160,11 @@ pub fn local_string_addr_taken(f: fn(&String)) { // ``` // - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } pub trait SelfByRef { @@ -189,11 +189,11 @@ pub fn local_var_addr_taken_used_locally_only(factory: fn() -> i32, sink: fn(i32 // is easily inlined. There is therefore no stack smash protection even with // the `strong` heuristic. - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } pub struct Gigastruct { @@ -226,11 +226,11 @@ pub fn local_large_var_moved(f: fn(Gigastruct)) { // EOF // ``` - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: local_large_var_cloned @@ -255,11 +255,11 @@ pub fn local_large_var_cloned(f: fn(Gigastruct)) { // EOF // ``` - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } extern "C" { @@ -295,11 +295,11 @@ extern "C" { pub fn alloca_small_compile_time_constant_arg(f: fn(*mut ())) { f(unsafe { alloca(8) }); - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: alloca_large_compile_time_constant_arg @@ -307,11 +307,11 @@ pub fn alloca_small_compile_time_constant_arg(f: fn(*mut ())) { pub fn alloca_large_compile_time_constant_arg(f: fn(*mut ())) { f(unsafe { alloca(9) }); - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: alloca_dynamic_arg @@ -319,11 +319,11 @@ pub fn alloca_large_compile_time_constant_arg(f: fn(*mut ())) { pub fn alloca_dynamic_arg(f: fn(*mut ()), n: usize) { f(unsafe { alloca(n) }); - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // The question then is: in what ways can Rust code generate array-`alloca` @@ -350,12 +350,12 @@ pub fn unsized_fn_param(s: [u8], l: bool, f: fn([u8])) { // LLVM does not support generating stack protectors in functions with funclet // based EH personalities. // https://github.com/llvm/llvm-project/blob/37fd3c96b917096d8a550038f6e61cdf0fc4174f/llvm/lib/CodeGen/StackProtector.cpp#L103C1-L109C4 - // all-NOT: __security_check_cookie - // strong-NOT: __security_check_cookie + // CHECK-ALL-NOT: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: unsized_local @@ -374,10 +374,10 @@ pub fn unsized_local(s: &[u8], l: bool, f: fn(&mut [u8])) { // LLVM does not support generating stack protectors in functions with funclet // based EH personalities. // https://github.com/llvm/llvm-project/blob/37fd3c96b917096d8a550038f6e61cdf0fc4174f/llvm/lib/CodeGen/StackProtector.cpp#L103C1-L109C4 - // all-NOT: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie + // CHECK-ALL-NOT: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } diff --git a/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-64bit.rs b/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-64bit.rs index 9729da4e5d25a..03d80a5abd70b 100644 --- a/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-64bit.rs +++ b/tests/assembly/stack-protector/stack-protector-heuristics-effect-windows-64bit.rs @@ -16,11 +16,11 @@ // CHECK-LABEL: emptyfn: #[no_mangle] pub fn emptyfn() { - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_char @@ -34,11 +34,11 @@ pub fn array_char(f: fn(*const char)) { f(&b as *const _); f(&c as *const _); - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_u8_1 @@ -50,11 +50,11 @@ pub fn array_u8_1(f: fn(*const u8)) { // The 'strong' heuristic adds stack protection to functions with local // array variables regardless of their size. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_u8_small: @@ -67,11 +67,11 @@ pub fn array_u8_small(f: fn(*const u8)) { // Small arrays do not lead to stack protection by the 'basic' heuristic. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: array_u8_large: @@ -83,11 +83,11 @@ pub fn array_u8_large(f: fn(*const u8)) { // Since `a` is a byte array with size greater than 8, the basic heuristic // will also protect this function. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } #[derive(Copy, Clone)] @@ -102,11 +102,11 @@ pub fn array_bytesizednewtype_9(f: fn(*const ByteSizedNewtype)) { // Since `a` is a byte array in the LLVM output, the basic heuristic will // also protect this function. - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: local_var_addr_used_indirectly @@ -129,11 +129,11 @@ pub fn local_var_addr_used_indirectly(f: fn(bool)) { // EOF // ``` - // all: __security_check_cookie - // strong: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: local_string_addr_taken @@ -165,12 +165,12 @@ pub fn local_string_addr_taken(f: fn(&String)) { // LLVM does not support generating stack protectors in functions with funclet // based EH personalities. // https://github.com/llvm/llvm-project/blob/37fd3c96b917096d8a550038f6e61cdf0fc4174f/llvm/lib/CodeGen/StackProtector.cpp#L103C1-L109C4 - // all-NOT: __security_check_cookie - // strong-NOT: __security_check_cookie + // CHECK-ALL-NOT: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie // CHECK-DAG: .seh_endproc } @@ -197,11 +197,11 @@ pub fn local_var_addr_taken_used_locally_only(factory: fn() -> i32, sink: fn(i32 // is easily inlined. There is therefore no stack smash protection even with // the `strong` heuristic. - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } pub struct Gigastruct { @@ -234,11 +234,11 @@ pub fn local_large_var_moved(f: fn(Gigastruct)) { // EOF // ``` - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: local_large_var_cloned @@ -263,11 +263,11 @@ pub fn local_large_var_cloned(f: fn(Gigastruct)) { // EOF // ``` - // all: __security_check_cookie - // strong: __security_check_cookie - // basic: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG: __security_check_cookie + // CHECK-BASIC: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } extern "C" { @@ -303,11 +303,11 @@ extern "C" { pub fn alloca_small_compile_time_constant_arg(f: fn(*mut ())) { f(unsafe { alloca(8) }); - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: alloca_large_compile_time_constant_arg @@ -315,11 +315,11 @@ pub fn alloca_small_compile_time_constant_arg(f: fn(*mut ())) { pub fn alloca_large_compile_time_constant_arg(f: fn(*mut ())) { f(unsafe { alloca(9) }); - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: alloca_dynamic_arg @@ -327,11 +327,11 @@ pub fn alloca_large_compile_time_constant_arg(f: fn(*mut ())) { pub fn alloca_dynamic_arg(f: fn(*mut ()), n: usize) { f(unsafe { alloca(n) }); - // all: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-ALL: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // The question then is: in what ways can Rust code generate array-`alloca` @@ -358,12 +358,12 @@ pub fn unsized_fn_param(s: [u8], l: bool, f: fn([u8])) { // LLVM does not support generating stack protectors in functions with funclet // based EH personalities. // https://github.com/llvm/llvm-project/blob/37fd3c96b917096d8a550038f6e61cdf0fc4174f/llvm/lib/CodeGen/StackProtector.cpp#L103C1-L109C4 - // all-NOT: __security_check_cookie - // strong-NOT: __security_check_cookie + // CHECK-ALL-NOT: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } // CHECK-LABEL: unsized_local @@ -382,10 +382,10 @@ pub fn unsized_local(s: &[u8], l: bool, f: fn(&mut [u8])) { // LLVM does not support generating stack protectors in functions with funclet // based EH personalities. // https://github.com/llvm/llvm-project/blob/37fd3c96b917096d8a550038f6e61cdf0fc4174f/llvm/lib/CodeGen/StackProtector.cpp#L103C1-L109C4 - // all-NOT: __security_check_cookie - // strong-NOT: __security_check_cookie - // basic-NOT: __security_check_cookie + // CHECK-ALL-NOT: __security_check_cookie + // CHECK-STRONG-NOT: __security_check_cookie + // CHECK-BASIC-NOT: __security_check_cookie - // none-NOT: __security_check_cookie - // missing-NOT: __security_check_cookie + // CHECK-NONE-NOT: __security_check_cookie + // CHECK-MISSING-NOT: __security_check_cookie } diff --git a/tests/assembly/stack-protector/stack-protector-heuristics-effect.rs b/tests/assembly/stack-protector/stack-protector-heuristics-effect.rs index 5ed0b6c50a736..63852c046e30b 100644 --- a/tests/assembly/stack-protector/stack-protector-heuristics-effect.rs +++ b/tests/assembly/stack-protector/stack-protector-heuristics-effect.rs @@ -23,11 +23,11 @@ // CHECK-LABEL: emptyfn: #[no_mangle] pub fn emptyfn() { - // all: __stack_chk_fail - // strong-NOT: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG-NOT: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: array_char @@ -41,11 +41,11 @@ pub fn array_char(f: fn(*const char)) { f(&b as *const _); f(&c as *const _); - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: array_u8_1 @@ -57,11 +57,11 @@ pub fn array_u8_1(f: fn(*const u8)) { // The 'strong' heuristic adds stack protection to functions with local // array variables regardless of their size. - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: array_u8_small: @@ -74,11 +74,11 @@ pub fn array_u8_small(f: fn(*const u8)) { // Small arrays do not lead to stack protection by the 'basic' heuristic. - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: array_u8_large: @@ -90,11 +90,11 @@ pub fn array_u8_large(f: fn(*const u8)) { // Since `a` is a byte array with size greater than 8, the basic heuristic // will also protect this function. - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } #[derive(Copy, Clone)] @@ -109,11 +109,11 @@ pub fn array_bytesizednewtype_9(f: fn(*const ByteSizedNewtype)) { // Since `a` is a byte array in the LLVM output, the basic heuristic will // also protect this function. - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: local_var_addr_used_indirectly @@ -136,11 +136,11 @@ pub fn local_var_addr_used_indirectly(f: fn(bool)) { // EOF // ``` - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: local_string_addr_taken @@ -152,11 +152,11 @@ pub fn local_string_addr_taken(f: fn(&String)) { // Taking the address of the local variable `x` leads to stack smash // protection. It does not matter that the reference is not mut. - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } pub trait SelfByRef { @@ -181,11 +181,11 @@ pub fn local_var_addr_taken_used_locally_only(factory: fn() -> i32, sink: fn(i32 // is easily inlined. There is therefore no stack smash protection even with // the `strong` heuristic. - // all: __stack_chk_fail - // strong-NOT: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG-NOT: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } pub struct Gigastruct { @@ -218,11 +218,11 @@ pub fn local_large_var_moved(f: fn(Gigastruct)) { // EOF // ``` - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: local_large_var_cloned @@ -247,11 +247,11 @@ pub fn local_large_var_cloned(f: fn(Gigastruct)) { // EOF // ``` - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } extern "C" { @@ -287,11 +287,11 @@ extern "C" { pub fn alloca_small_compile_time_constant_arg(f: fn(*mut ())) { f(unsafe { alloca(8) }); - // all: __stack_chk_fail - // strong-NOT: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG-NOT: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: alloca_large_compile_time_constant_arg @@ -299,11 +299,11 @@ pub fn alloca_small_compile_time_constant_arg(f: fn(*mut ())) { pub fn alloca_large_compile_time_constant_arg(f: fn(*mut ())) { f(unsafe { alloca(9) }); - // all: __stack_chk_fail - // strong-NOT: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG-NOT: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: alloca_dynamic_arg @@ -311,11 +311,11 @@ pub fn alloca_large_compile_time_constant_arg(f: fn(*mut ())) { pub fn alloca_dynamic_arg(f: fn(*mut ()), n: usize) { f(unsafe { alloca(n) }); - // all: __stack_chk_fail - // strong-NOT: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG-NOT: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // The question then is: in what ways can Rust code generate array-`alloca` @@ -338,11 +338,11 @@ pub fn unsized_fn_param(s: [u8], l: bool, f: fn([u8])) { // alloca, and is therefore not protected by the `strong` or `basic` // heuristics. - // all: __stack_chk_fail - // strong-NOT: __stack_chk_fail - // basic-NOT: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG-NOT: __stack_chk_fail + // CHECK-BASIC-NOT: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } // CHECK-LABEL: unsized_local @@ -357,9 +357,9 @@ pub fn unsized_local(s: &[u8], l: bool, f: fn(&mut [u8])) { // alloca is required, and the function is protected by both the // `strong` and `basic` heuristic. - // all: __stack_chk_fail - // strong: __stack_chk_fail - // basic: __stack_chk_fail - // none-NOT: __stack_chk_fail - // missing-NOT: __stack_chk_fail + // CHECK-ALL: __stack_chk_fail + // CHECK-STRONG: __stack_chk_fail + // CHECK-BASIC: __stack_chk_fail + // CHECK-NONE-NOT: __stack_chk_fail + // CHECK-MISSING-NOT: __stack_chk_fail } diff --git a/tests/assembly/stack-protector/stack-protector-target-support.rs b/tests/assembly/stack-protector/stack-protector-target-support.rs index 74a609dcdcc1c..e33ef7b6e6fb6 100644 --- a/tests/assembly/stack-protector/stack-protector-target-support.rs +++ b/tests/assembly/stack-protector/stack-protector-target-support.rs @@ -193,94 +193,94 @@ pub fn foo() { // CHECK: foo{{:|()}} // MSVC does the stack checking within a stack-check function: - // r3: calll @__security_check_cookie - // r7: callq __security_check_cookie - // r13: bl __security_check_cookie - // r35: calll @__security_check_cookie + // CHECK-R3: calll @__security_check_cookie + // CHECK-R7: callq __security_check_cookie + // CHECK-R13: bl __security_check_cookie + // CHECK-R35: calll @__security_check_cookie // cuda doesn't support stack-smash protection - // r49-NOT: __security_check_cookie - // r49-NOT: __stack_chk_fail + // CHECK-R49-NOT: __security_check_cookie + // CHECK-R49-NOT: __stack_chk_fail // Other targets do stack checking within the function, and call a failure function on error - // r1: __stack_chk_fail - // r2: __stack_chk_fail - // r4: __stack_chk_fail - // r5: __stack_chk_fail - // r6: __stack_chk_fail - // r8: __stack_chk_fail - // r9: __stack_chk_fail - // r10: __stack_chk_fail - // r11: __stack_chk_fail - // r12: __stack_chk_fail - // r14: __stack_chk_fail - // r15: __stack_chk_fail - // r16: __stack_chk_fail - // r17: __stack_chk_fail - // r18: __stack_chk_fail - // r19: __stack_chk_fail - // r20: __stack_chk_fail - // r21: __stack_chk_fail - // r22: __stack_chk_fail - // r23: __stack_chk_fail - // r24: __stack_chk_fail - // r25: __stack_chk_fail - // r26: __stack_chk_fail - // r27: __stack_chk_fail - // r28: __stack_chk_fail - // r29: __stack_chk_fail - // r30: __stack_chk_fail - // r31: __stack_chk_fail - // r32: __stack_chk_fail - // r33: __stack_chk_fail - // r34: __stack_chk_fail - // r36: __stack_chk_fail - // r37: __stack_chk_fail - // r38: __stack_chk_fail - // r39: __stack_chk_fail - // r40: __stack_chk_fail - // r41: __stack_chk_fail - // r42: __stack_chk_fail - // r43: __stack_chk_fail - // r44: __stack_chk_fail - // r45: __stack_chk_fail - // r46: __stack_chk_fail - // r47: __stack_chk_fail - // r48: __stack_chk_fail - // r50: __stack_chk_fail - // r51: __stack_chk_fail - // r52: __stack_chk_fail - // r53: __stack_chk_fail - // r54: __stack_chk_fail - // r55: __stack_chk_fail - // r56: __stack_chk_fail - // r57: __stack_chk_fail - // r58: __stack_chk_fail - // r59: __stack_chk_fail - // r60: __stack_chk_fail - // r61: __stack_chk_fail - // r62: __stack_chk_fail - // r63: __stack_chk_fail - // r64: __stack_chk_fail - // r65: __stack_chk_fail - // r66: __stack_chk_fail - // r67: __stack_chk_fail - // r68: __stack_chk_fail - // r69: __stack_chk_fail - // r70: __stack_chk_fail - // r71: __stack_chk_fail - // r72: __stack_chk_fail - // r73: __stack_chk_fail - // r74: __stack_chk_fail - // r75: __stack_chk_fail - // r76: __stack_chk_fail - // r77: __stack_chk_fail - // r78: __stack_chk_fail - // r79: __stack_chk_fail - // r80: __stack_chk_fail - // r81: __stack_chk_fail - // r82: __stack_chk_fail - // r83: __stack_chk_fail - // r84: __stack_chk_fail - // r85: __stack_chk_fail + // CHECK-R1: __stack_chk_fail + // CHECK-R2: __stack_chk_fail + // CHECK-R4: __stack_chk_fail + // CHECK-R5: __stack_chk_fail + // CHECK-R6: __stack_chk_fail + // CHECK-R8: __stack_chk_fail + // CHECK-R9: __stack_chk_fail + // CHECK-R10: __stack_chk_fail + // CHECK-R11: __stack_chk_fail + // CHECK-R12: __stack_chk_fail + // CHECK-R14: __stack_chk_fail + // CHECK-R15: __stack_chk_fail + // CHECK-R16: __stack_chk_fail + // CHECK-R17: __stack_chk_fail + // CHECK-R18: __stack_chk_fail + // CHECK-R19: __stack_chk_fail + // CHECK-R20: __stack_chk_fail + // CHECK-R21: __stack_chk_fail + // CHECK-R22: __stack_chk_fail + // CHECK-R23: __stack_chk_fail + // CHECK-R24: __stack_chk_fail + // CHECK-R25: __stack_chk_fail + // CHECK-R26: __stack_chk_fail + // CHECK-R27: __stack_chk_fail + // CHECK-R28: __stack_chk_fail + // CHECK-R29: __stack_chk_fail + // CHECK-R30: __stack_chk_fail + // CHECK-R31: __stack_chk_fail + // CHECK-R32: __stack_chk_fail + // CHECK-R33: __stack_chk_fail + // CHECK-R34: __stack_chk_fail + // CHECK-R36: __stack_chk_fail + // CHECK-R37: __stack_chk_fail + // CHECK-R38: __stack_chk_fail + // CHECK-R39: __stack_chk_fail + // CHECK-R40: __stack_chk_fail + // CHECK-R41: __stack_chk_fail + // CHECK-R42: __stack_chk_fail + // CHECK-R43: __stack_chk_fail + // CHECK-R44: __stack_chk_fail + // CHECK-R45: __stack_chk_fail + // CHECK-R46: __stack_chk_fail + // CHECK-R47: __stack_chk_fail + // CHECK-R48: __stack_chk_fail + // CHECK-R50: __stack_chk_fail + // CHECK-R51: __stack_chk_fail + // CHECK-R52: __stack_chk_fail + // CHECK-R53: __stack_chk_fail + // CHECK-R54: __stack_chk_fail + // CHECK-R55: __stack_chk_fail + // CHECK-R56: __stack_chk_fail + // CHECK-R57: __stack_chk_fail + // CHECK-R58: __stack_chk_fail + // CHECK-R59: __stack_chk_fail + // CHECK-R60: __stack_chk_fail + // CHECK-R61: __stack_chk_fail + // CHECK-R62: __stack_chk_fail + // CHECK-R63: __stack_chk_fail + // CHECK-R64: __stack_chk_fail + // CHECK-R65: __stack_chk_fail + // CHECK-R66: __stack_chk_fail + // CHECK-R67: __stack_chk_fail + // CHECK-R68: __stack_chk_fail + // CHECK-R69: __stack_chk_fail + // CHECK-R70: __stack_chk_fail + // CHECK-R71: __stack_chk_fail + // CHECK-R72: __stack_chk_fail + // CHECK-R73: __stack_chk_fail + // CHECK-R74: __stack_chk_fail + // CHECK-R75: __stack_chk_fail + // CHECK-R76: __stack_chk_fail + // CHECK-R77: __stack_chk_fail + // CHECK-R78: __stack_chk_fail + // CHECK-R79: __stack_chk_fail + // CHECK-R80: __stack_chk_fail + // CHECK-R81: __stack_chk_fail + // CHECK-R82: __stack_chk_fail + // CHECK-R83: __stack_chk_fail + // CHECK-R84: __stack_chk_fail + // CHECK-R85: __stack_chk_fail } diff --git a/tests/assembly/static-relocation-model.rs b/tests/assembly/static-relocation-model.rs index eafdfd485baac..f5056aec50965 100644 --- a/tests/assembly/static-relocation-model.rs +++ b/tests/assembly/static-relocation-model.rs @@ -1,9 +1,9 @@ -//@ revisions: x64 A64 ppc64le +//@ revisions: x64 a64 ppc64le //@ assembly-output: emit-asm //@ [x64] compile-flags: --target x86_64-unknown-linux-gnu -Crelocation-model=static //@ [x64] needs-llvm-components: x86 -//@ [A64] compile-flags: --target aarch64-unknown-linux-gnu -Crelocation-model=static -//@ [A64] needs-llvm-components: aarch64 +//@ [a64] compile-flags: --target aarch64-unknown-linux-gnu -Crelocation-model=static +//@ [a64] needs-llvm-components: aarch64 //@ [ppc64le] compile-flags: --target powerpc64le-unknown-linux-gnu -Crelocation-model=static //@ [ppc64le] needs-llvm-components: powerpc @@ -37,44 +37,44 @@ extern "C" { // CHECK-LABEL: banana: // On the next line LLVM 14 produces a `movb`, whereas LLVM 15+ produces a `movzbl`. -// x64: {{movb|movzbl}} chaenomeles{{(\(%[a-z0-9]+\))?}}, %{{[a-z0-9]+}} -// A64: adrp [[REG:[a-z0-9]+]], chaenomeles -// A64-NEXT: ldrb {{[a-z0-9]+}}, {{\[}}[[REG]], :lo12:chaenomeles] +// CHECK-X64: {{movb|movzbl}} chaenomeles{{(\(%[a-z0-9]+\))?}}, %{{[a-z0-9]+}} +// CHECK-A64: adrp [[REG:[a-z0-9]+]], chaenomeles +// CHECK-A64-NEXT: ldrb {{[a-z0-9]+}}, {{\[}}[[REG]], :lo12:chaenomeles] #[no_mangle] pub fn banana() -> u8 { unsafe { *(chaenomeles as *mut u8) } } // CHECK-LABEL: peach: -// x64: {{movb|movzbl}} banana{{(\(%[a-z0-9]+\))?}}, %{{[a-z0-9]+}} -// A64: adrp [[REG2:[a-z0-9]+]], banana -// A64-NEXT: ldrb {{[a-z0-9]+}}, {{\[}}[[REG2]], :lo12:banana] +// CHECK-X64: {{movb|movzbl}} banana{{(\(%[a-z0-9]+\))?}}, %{{[a-z0-9]+}} +// CHECK-A64: adrp [[REG2:[a-z0-9]+]], banana +// CHECK-A64-NEXT: ldrb {{[a-z0-9]+}}, {{\[}}[[REG2]], :lo12:banana] #[no_mangle] pub fn peach() -> u8 { unsafe { *(banana as *mut u8) } } // CHECK-LABEL: mango: -// x64: movq EXOCHORDA{{(\(%[a-z0-9]+\))?}}, %[[REG:[a-z0-9]+]] -// x64-NEXT: {{movb|movzbl}} (%[[REG]]), %{{[a-z0-9]+}} -// A64: adrp [[REG2:[a-z0-9]+]], EXOCHORDA -// A64-NEXT: ldr {{[a-z0-9]+}}, {{\[}}[[REG2]], :lo12:EXOCHORDA] +// CHECK-X64: movq EXOCHORDA{{(\(%[a-z0-9]+\))?}}, %[[REG:[a-z0-9]+]] +// CHECK-X64-NEXT: {{movb|movzbl}} (%[[REG]]), %{{[a-z0-9]+}} +// CHECK-A64: adrp [[REG2:[a-z0-9]+]], EXOCHORDA +// CHECK-A64-NEXT: ldr {{[a-z0-9]+}}, {{\[}}[[REG2]], :lo12:EXOCHORDA] #[no_mangle] pub fn mango() -> u8 { unsafe { *EXOCHORDA } } // CHECK-LABEL: orange: -// x64: mov{{l|absq}} $PIERIS, %{{[a-z0-9]+}} -// A64: adrp [[REG2:[a-z0-9]+]], PIERIS -// A64-NEXT: add {{[a-z0-9]+}}, [[REG2]], :lo12:PIERIS +// CHECK-X64: mov{{l|absq}} $PIERIS, %{{[a-z0-9]+}} +// CHECK-A64: adrp [[REG2:[a-z0-9]+]], PIERIS +// CHECK-A64-NEXT: add {{[a-z0-9]+}}, [[REG2]], :lo12:PIERIS #[no_mangle] pub fn orange() -> &'static u8 { &PIERIS } // For ppc64 we need to make sure to generate TOC entries even with the static relocation model -// ppc64le: .tc chaenomeles[TC],chaenomeles -// ppc64le: .tc banana[TC],banana -// ppc64le: .tc EXOCHORDA[TC],EXOCHORDA -// ppc64le: .tc PIERIS[TC],PIERIS +// CHECK-PPC64LE: .tc chaenomeles[TC],chaenomeles +// CHECK-PPC64LE: .tc banana[TC],banana +// CHECK-PPC64LE: .tc EXOCHORDA[TC],EXOCHORDA +// CHECK-PPC64LE: .tc PIERIS[TC],PIERIS diff --git a/tests/assembly/target-feature-multiple.rs b/tests/assembly/target-feature-multiple.rs index 83c385686476e..17e4eba26d620 100644 --- a/tests/assembly/target-feature-multiple.rs +++ b/tests/assembly/target-feature-multiple.rs @@ -1,9 +1,9 @@ //@ assembly-output: emit-asm //@ needs-llvm-components: x86 -//@ revisions: TWOFLAGS SINGLEFLAG +//@ revisions: twoflags singleflag //@ compile-flags: --target=x86_64-unknown-linux-gnu -//@ [TWOFLAGS] compile-flags: -C target-feature=+rdrnd -C target-feature=+rdseed -//@ [SINGLEFLAG] compile-flags: -C target-feature=+rdrnd,+rdseed +//@ [twoflags] compile-flags: -C target-feature=+rdrnd -C target-feature=+rdseed +//@ [singleflag] compile-flags: -C target-feature=+rdrnd,+rdseed // Target features set via flags aren't necessarily reflected in the IR, so the only way to test // them is to build code that requires the features to be enabled to work. diff --git a/tests/assembly/x86-return-float.rs b/tests/assembly/x86-return-float.rs index c4a2c1ad44eca..f2cdf0e3d367e 100644 --- a/tests/assembly/x86-return-float.rs +++ b/tests/assembly/x86-return-float.rs @@ -190,10 +190,10 @@ pub unsafe fn call_f64_f64(x: &mut (f64, f64)) { } // CHECK: movl {{.*}}(%ebp), %[[PTR:.*]] // CHECK: calll {{()|_}}get_f64_f64 - // unix: movsd [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] - // unix-NEXT: movsd [[#%d,OFFSET+8]](%ebp), %[[VAL2:.*]] - // windows: movsd (%esp), %[[VAL1:.*]] - // windows-NEXT: movsd 8(%esp), %[[VAL2:.*]] + // CHECK-UNIX: movsd [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] + // CHECK-UNIX-NEXT: movsd [[#%d,OFFSET+8]](%ebp), %[[VAL2:.*]] + // CHECK-WINDOWS: movsd (%esp), %[[VAL1:.*]] + // CHECK-WINDOWS-NEXT: movsd 8(%esp), %[[VAL2:.*]] // CHECK-NEXT: movsd %[[VAL1]], (%[[PTR]]) // CHECK-NEXT: movsd %[[VAL2]], 8(%[[PTR]]) *x = get_f64_f64(); @@ -207,13 +207,13 @@ pub unsafe fn call_f32_f64(x: &mut (f32, f64)) { } // CHECK: movl {{.*}}(%ebp), %[[PTR:.*]] // CHECK: calll {{()|_}}get_f32_f64 - // unix: movss [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] - // unix-NEXT: movsd [[#%d,OFFSET+4]](%ebp), %[[VAL2:.*]] - // windows: movss (%esp), %[[VAL1:.*]] - // windows-NEXT: movsd 8(%esp), %[[VAL2:.*]] + // CHECK-UNIX: movss [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] + // CHECK-UNIX-NEXT: movsd [[#%d,OFFSET+4]](%ebp), %[[VAL2:.*]] + // CHECK-WINDOWS: movss (%esp), %[[VAL1:.*]] + // CHECK-WINDOWS-NEXT: movsd 8(%esp), %[[VAL2:.*]] // CHECK-NEXT: movss %[[VAL1]], (%[[PTR]]) - // unix-NEXT: movsd %[[VAL2]], 4(%[[PTR]]) - // windows-NEXT: movsd %[[VAL2]], 8(%[[PTR]]) + // CHECK-UNIX-NEXT: movsd %[[VAL2]], 4(%[[PTR]]) + // CHECK-WINDOWS-NEXT: movsd %[[VAL2]], 8(%[[PTR]]) *x = get_f32_f64(); } @@ -225,10 +225,10 @@ pub unsafe fn call_f64_f32(x: &mut (f64, f32)) { } // CHECK: movl {{.*}}(%ebp), %[[PTR:.*]] // CHECK: calll {{()|_}}get_f64_f32 - // unix: movsd [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] - // unix-NEXT: movss [[#%d,OFFSET+8]](%ebp), %[[VAL2:.*]] - // windows: movsd (%esp), %[[VAL1:.*]] - // windows-NEXT: movss 8(%esp), %[[VAL2:.*]] + // CHECK-UNIX: movsd [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] + // CHECK-UNIX-NEXT: movss [[#%d,OFFSET+8]](%ebp), %[[VAL2:.*]] + // CHECK-WINDOWS: movsd (%esp), %[[VAL1:.*]] + // CHECK-WINDOWS-NEXT: movss 8(%esp), %[[VAL2:.*]] // CHECK-NEXT: movsd %[[VAL1]], (%[[PTR]]) // CHECK-NEXT: movss %[[VAL2]], 8(%[[PTR]]) *x = get_f64_f32(); @@ -257,10 +257,10 @@ pub unsafe fn call_f64_other(x: &mut (f64, usize)) { } // CHECK: movl {{.*}}(%ebp), %[[PTR:.*]] // CHECK: calll {{()|_}}get_f64_other - // unix: movsd [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] - // unix-NEXT: movl [[#%d,OFFSET+8]](%ebp), %[[VAL2:.*]] - // windows: movsd (%esp), %[[VAL1:.*]] - // windows-NEXT: movl 8(%esp), %[[VAL2:.*]] + // CHECK-UNIX: movsd [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] + // CHECK-UNIX-NEXT: movl [[#%d,OFFSET+8]](%ebp), %[[VAL2:.*]] + // CHECK-WINDOWS: movsd (%esp), %[[VAL1:.*]] + // CHECK-WINDOWS-NEXT: movl 8(%esp), %[[VAL2:.*]] // CHECK-NEXT: movsd %[[VAL1]], (%[[PTR]]) // CHECK-NEXT: movl %[[VAL2]], 8(%[[PTR]]) *x = get_f64_other(); @@ -289,13 +289,13 @@ pub unsafe fn call_other_f64(x: &mut (usize, f64)) { } // CHECK: movl {{.*}}(%ebp), %[[PTR:.*]] // CHECK: calll {{()|_}}get_other_f64 - // unix: movl [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] - // unix-NEXT: movsd [[#%d,OFFSET+4]](%ebp), %[[VAL2:.*]] - // windows: movl (%esp), %[[VAL1:.*]] - // windows-NEXT: movsd 8(%esp), %[[VAL2:.*]] + // CHECK-UNIX: movl [[#%d,OFFSET:]](%ebp), %[[VAL1:.*]] + // CHECK-UNIX-NEXT: movsd [[#%d,OFFSET+4]](%ebp), %[[VAL2:.*]] + // CHECK-WINDOWS: movl (%esp), %[[VAL1:.*]] + // CHECK-WINDOWS-NEXT: movsd 8(%esp), %[[VAL2:.*]] // CHECK-NEXT: movl %[[VAL1]], (%[[PTR]]) - // unix-NEXT: movsd %[[VAL2]], 4(%[[PTR]]) - // windows-NEXT: movsd %[[VAL2]], 8(%[[PTR]]) + // CHECK-UNIX-NEXT: movsd %[[VAL2]], 4(%[[PTR]]) + // CHECK-WINDOWS-NEXT: movsd %[[VAL2]], 8(%[[PTR]]) *x = get_other_f64(); } diff --git a/tests/assembly/x86_64-cmp.rs b/tests/assembly/x86_64-cmp.rs index 31efdda1bfafa..cba16b5667654 100644 --- a/tests/assembly/x86_64-cmp.rs +++ b/tests/assembly/x86_64-cmp.rs @@ -1,6 +1,6 @@ -//@ revisions: DEBUG OPTIM -//@ [DEBUG] compile-flags: -C opt-level=0 -//@ [OPTIM] compile-flags: -C opt-level=3 +//@ revisions: debug optim +//@ [debug] compile-flags: -C opt-level=0 +//@ [optim] compile-flags: -C opt-level=3 //@ assembly-output: emit-asm //@ compile-flags: --crate-type=lib -C llvm-args=-x86-asm-syntax=intel //@ only-x86_64 @@ -13,39 +13,39 @@ use std::intrinsics::three_way_compare; #[no_mangle] // CHECK-LABEL: signed_cmp: pub fn signed_cmp(a: i16, b: i16) -> std::cmp::Ordering { - // DEBUG: cmp - // DEBUG: setg - // DEBUG: and - // DEBUG: cmp - // DEBUG: setl - // DEBUG: and - // DEBUG: sub + // CHECK-DEBUG: cmp + // CHECK-DEBUG: setg + // CHECK-DEBUG: and + // CHECK-DEBUG: cmp + // CHECK-DEBUG: setl + // CHECK-DEBUG: and + // CHECK-DEBUG: sub - // OPTIM: xor - // OPTIM: cmp - // OPTIM: setne - // OPTIM: mov - // OPTIM: cmovge - // OPTIM: ret + // CHECK-OPTIM: xor + // CHECK-OPTIM: cmp + // CHECK-OPTIM: setne + // CHECK-OPTIM: mov + // CHECK-OPTIM: cmovge + // CHECK-OPTIM: ret three_way_compare(a, b) } #[no_mangle] // CHECK-LABEL: unsigned_cmp: pub fn unsigned_cmp(a: u16, b: u16) -> std::cmp::Ordering { - // DEBUG: cmp - // DEBUG: seta - // DEBUG: and - // DEBUG: cmp - // DEBUG: setb - // DEBUG: and - // DEBUG: sub + // CHECK-DEBUG: cmp + // CHECK-DEBUG: seta + // CHECK-DEBUG: and + // CHECK-DEBUG: cmp + // CHECK-DEBUG: setb + // CHECK-DEBUG: and + // CHECK-DEBUG: sub - // OPTIM: xor - // OPTIM: cmp - // OPTIM: setne - // OPTIM: mov - // OPTIM: cmovae - // OPTIM: ret + // CHECK-OPTIM: xor + // CHECK-OPTIM: cmp + // CHECK-OPTIM: setne + // CHECK-OPTIM: mov + // CHECK-OPTIM: cmovae + // CHECK-OPTIM: ret three_way_compare(a, b) } diff --git a/tests/assembly/x86_64-function-return.rs b/tests/assembly/x86_64-function-return.rs index 7cfdf5bce0c1e..b7f4d73477ebd 100644 --- a/tests/assembly/x86_64-function-return.rs +++ b/tests/assembly/x86_64-function-return.rs @@ -17,14 +17,14 @@ // CHECK-LABEL: foo: #[no_mangle] pub unsafe fn foo() { - // unset: ret - // unset-NOT: jmp __x86_return_thunk - // keep: ret - // keep-NOT: jmp __x86_return_thunk - // thunk-extern: jmp __x86_return_thunk - // thunk-extern-NOT: ret - // keep-thunk-extern: jmp __x86_return_thunk - // keep-thunk-extern-NOT: ret - // thunk-extern-keep: ret - // thunk-extern-keep-NOT: jmp __x86_return_thunk + // CHECK-UNSET: ret + // CHECK-UNSET-NOT: jmp __x86_return_thunk + // CHECK-KEEP: ret + // CHECK-KEEP-NOT: jmp __x86_return_thunk + // CHECK-THUNK-EXTERN: jmp __x86_return_thunk + // CHECK-THUNK-EXTERN-NOT: ret + // CHECK-KEEP-THUNK-EXTERN: jmp __x86_return_thunk + // CHECK-KEEP-THUNK-EXTERN-NOT: ret + // CHECK-THUNK-EXTERN-KEEP: ret + // CHECK-THUNK-EXTERN-KEEP-NOT: jmp __x86_return_thunk } diff --git a/tests/assembly/x86_64-no-jump-tables.rs b/tests/assembly/x86_64-no-jump-tables.rs index 9b7812262326d..37ab02b192c29 100644 --- a/tests/assembly/x86_64-no-jump-tables.rs +++ b/tests/assembly/x86_64-no-jump-tables.rs @@ -22,8 +22,8 @@ extern "C" { // CHECK-LABEL: foo: #[no_mangle] pub unsafe fn foo(x: i32) { - // unset: LJTI0_0 - // set-NOT: LJTI0_0 + // CHECK-UNSET: LJTI0_0 + // CHECK-SET-NOT: LJTI0_0 match x { 1 => bar1(), 2 => bar2(), diff --git a/tests/assembly/x86_64-typed-swap.rs b/tests/assembly/x86_64-typed-swap.rs index 95e87519e6c4b..487afe14b8525 100644 --- a/tests/assembly/x86_64-typed-swap.rs +++ b/tests/assembly/x86_64-typed-swap.rs @@ -1,6 +1,6 @@ -//@ revisions: WIN LIN -//@ [WIN] only-windows -//@ [LIN] only-linux +//@ revisions: win lin +//@ [win] only-windows +//@ [lin] only-linux //@ only-x86_64 //@ assembly-output: emit-asm //@ compile-flags: --crate-type=lib -O diff --git a/tests/codegen/README.md b/tests/codegen/README.md index 8f2daaafcc77a..67faf7ee3f1d4 100644 --- a/tests/codegen/README.md +++ b/tests/codegen/README.md @@ -1,24 +1,65 @@ The files here use the LLVM FileCheck framework, documented at . +In short, directives are added to the code file that will be used to validate +the code output. Common directives include: + +- `CHECK-LABEL s`: used to identify logical blocks, e.g. function names. +- `CHECK s`: verify that a line matching `s` exists. +- `CHECK-SAME s`: verify that the line matched by the previous directive + matches`s`. +- `CHECK-NEXT s`: verify that the next line immediately after the previous match + matches `s`. +- `CHECK-NOT s`: verify that `s` is _not_ found. + One extension worth noting is the use of revisions as custom prefixes for FileCheck. If your codegen test has different behavior based on the chosen target or different compiler flags that you want to exercise, you can use a revisions annotation, like so: ```rust -// revisions: aaa bbb -// [bbb] compile-flags: --flags-for-bbb +//@ revisions: aaa bbb +//@ [aaa] compile-flags: --target some-target-kebab --other-flags +//@ [bbb] compile-flags: --target other-target-kebab --flags-for-bbb +``` + +These directives will be usable by replacing `CHECK` with +`CHECK-{revision.to_uppercase()}`: + +- `CHECK-AAA s`: verify that `s` is found, only when running revision `aaa` +- `CHECK-AAA-NEXT s`: verify that `s` is found after the preceding match, only + when running revision `aaa` +- ... + +For example, if you wanted to validate the following with `aaa`'s flags:' + +```text +my func: + # + # lines you don't care about + # + + [found on both] [aaa only] + aaa finished +``` + +And this with `bbb`'s:' + +```text +my_func: + [found on both] [bbb only] + bbb finished ``` -After specifying those variations, you can write different expected, or -explicitly *unexpected* output by using `-SAME:` and `-NOT:`, -like so: +The following should work: ```rust -// CHECK: expected code -// aaa-SAME: emitted-only-for-aaa -// aaa-NOT: emitted-only-for-bbb -// bbb-NOT: emitted-only-for-aaa -// bbb-SAME: emitted-only-for-bbb +// CHECK-LABEL: my_func: +// CHECK: [found on both] +// CHECK-AAA-SAME: [aaa only] +// CHECK-AAA-NOT: [bbb only] +// CHECK-BBB-SAME: [bbb only] +// CHECK-BBB-NOT: [aaa only] +// CHECK-AAA-NEXT: aaa finished +// CHECK-BBB-NEXT: bbbfinished ``` diff --git a/tests/codegen/aarch64-struct-align-128.rs b/tests/codegen/aarch64-struct-align-128.rs index d1b4132d501f7..c3ee62ac90519 100644 --- a/tests/codegen/aarch64-struct-align-128.rs +++ b/tests/codegen/aarch64-struct-align-128.rs @@ -39,9 +39,9 @@ pub struct Wrapped8 { } extern "C" { - // linux: declare void @test_8([2 x i64], [2 x i64], [2 x i64]) - // darwin: declare void @test_8([2 x i64], [2 x i64], [2 x i64]) - // windows: declare void @test_8([2 x i64], [2 x i64], [2 x i64]) + // CHECK-LINUX: declare void @test_8([2 x i64], [2 x i64], [2 x i64]) + // CHECK-DARWIN: declare void @test_8([2 x i64], [2 x i64], [2 x i64]) + // CHECK-WINDOWS: declare void @test_8([2 x i64], [2 x i64], [2 x i64]) fn test_8(a: Align8, b: Transparent8, c: Wrapped8); } @@ -69,9 +69,9 @@ pub struct Wrapped16 { } extern "C" { - // linux: declare void @test_16([2 x i64], [2 x i64], i128) - // darwin: declare void @test_16(i128, i128, i128) - // windows: declare void @test_16(i128, i128, i128) + // CHECK-LINUX: declare void @test_16([2 x i64], [2 x i64], i128) + // CHECK-DARWIN: declare void @test_16(i128, i128, i128) + // CHECK-WINDOWS: declare void @test_16(i128, i128, i128) fn test_16(a: Align16, b: Transparent16, c: Wrapped16); } @@ -94,9 +94,9 @@ pub struct WrappedI128 { } extern "C" { - // linux: declare void @test_i128(i128, i128, i128) - // darwin: declare void @test_i128(i128, i128, i128) - // windows: declare void @test_i128(i128, i128, i128) + // CHECK-LINUX: declare void @test_i128(i128, i128, i128) + // CHECK-DARWIN: declare void @test_i128(i128, i128, i128) + // CHECK-WINDOWS: declare void @test_i128(i128, i128, i128) fn test_i128(a: I128, b: TransparentI128, c: WrappedI128); } @@ -121,9 +121,9 @@ pub struct WrappedPacked { } extern "C" { - // linux: declare void @test_packed([2 x i64], [2 x i64], [2 x i64]) - // darwin: declare void @test_packed([2 x i64], [2 x i64], [2 x i64]) - // windows: declare void @test_packed([2 x i64], [2 x i64], [2 x i64]) + // CHECK-LINUX: declare void @test_packed([2 x i64], [2 x i64], [2 x i64]) + // CHECK-DARWIN: declare void @test_packed([2 x i64], [2 x i64], [2 x i64]) + // CHECK-WINDOWS: declare void @test_packed([2 x i64], [2 x i64], [2 x i64]) fn test_packed(a: Packed, b: TransparentPacked, c: WrappedPacked); } diff --git a/tests/codegen/abi-efiapi.rs b/tests/codegen/abi-efiapi.rs index 986d042268aa9..51d15973e4759 100644 --- a/tests/codegen/abi-efiapi.rs +++ b/tests/codegen/abi-efiapi.rs @@ -24,10 +24,10 @@ trait Freeze {} #[lang = "copy"] trait Copy {} -//x86_64: define win64cc void @has_efiapi -//i686: define void @has_efiapi -//aarch64: define dso_local void @has_efiapi -//arm: define dso_local arm_aapcscc void @has_efiapi -//riscv: define dso_local void @has_efiapi +// CHECK-X86_64: define win64cc void @has_efiapi +// CHECK-I686: define void @has_efiapi +// CHECK-AARCH64: define dso_local void @has_efiapi +// CHECK-ARM: define dso_local arm_aapcscc void @has_efiapi +// CHECK-RISCV: define dso_local void @has_efiapi #[no_mangle] pub extern "efiapi" fn has_efiapi() {} diff --git a/tests/codegen/abi-repr-ext.rs b/tests/codegen/abi-repr-ext.rs index a42f73566961e..de469c0a7e3df 100644 --- a/tests/codegen/abi-repr-ext.rs +++ b/tests/codegen/abi-repr-ext.rs @@ -45,12 +45,12 @@ pub enum Type { // presence of the `signext` for those targets where we expect it. // CHECK: define{{( dso_local)?}} noundef -// x86_64-SAME: signext -// aarch64-apple-SAME: signext -// aarch64-windows-NOT: signext -// aarch64-linux-NOT: signext -// arm-SAME: signext -// riscv-SAME: signext +// CHECK-X86_64-SAME: signext +// CHECK-AARCH64-APPLE-SAME: signext +// CHECK-AARCH64-WINDOWS-NOT: signext +// CHECK-AARCH64-LINUX-NOT: signext +// CHECK-ARM-SAME: signext +// CHECK-RISCV-SAME: signext // CHECK-SAME: i8 @test() #[no_mangle] diff --git a/tests/codegen/align-byval-alignment-mismatch.rs b/tests/codegen/align-byval-alignment-mismatch.rs index 835cc7393e51e..6ee458e1d225f 100644 --- a/tests/codegen/align-byval-alignment-mismatch.rs +++ b/tests/codegen/align-byval-alignment-mismatch.rs @@ -55,13 +55,13 @@ extern "C" { // CHECK-LABEL: @rust_to_c_increases_alignment #[no_mangle] pub unsafe fn rust_to_c_increases_alignment(x: Align1) { - // i686-linux: start: - // i686-linux-NEXT: [[ALLOCA:%[0-9a-z]+]] = alloca [48 x i8], align 4 - // i686-linux-NEXT: call void @llvm.memcpy.{{.+}}(ptr {{.*}}align 4 {{.*}}[[ALLOCA]], ptr {{.*}}align 1 {{.*}}%x - // i686-linux-NEXT: call void @extern_c_align1({{.+}} [[ALLOCA]]) + // CHECK-I686-LINUX: start: + // CHECK-I686-LINUX-NEXT: [[ALLOCA:%[0-9a-z]+]] = alloca [48 x i8], align 4 + // CHECK-I686-LINUX-NEXT: call void @llvm.memcpy.{{.+}}(ptr {{.*}}align 4 {{.*}}[[ALLOCA]], ptr {{.*}}align 1 {{.*}}%x + // CHECK-I686-LINUX-NEXT: call void @extern_c_align1({{.+}} [[ALLOCA]]) - // x86_64-linux: start: - // x86_64-linux-NEXT: call void @extern_c_align1 + // CHECK-X86_64-LINUX: start: + // CHECK-X86_64-LINUX-NEXT: call void @extern_c_align1 extern_c_align1(x); } @@ -89,13 +89,13 @@ pub unsafe extern "C" fn c_to_rust_decreases_alignment(x: Align1) { // CHECK-LABEL: @c_to_rust_increases_alignment #[no_mangle] pub unsafe extern "C" fn c_to_rust_increases_alignment(x: Align16) { - // i686-linux: start: - // i686-linux-NEXT: [[ALLOCA:%[0-9a-z]+]] = alloca [48 x i8], align 16 - // i686-linux-NEXT: call void @llvm.memcpy.{{.+}}(ptr {{.*}}align 16 {{.*}}[[ALLOCA]], ptr {{.*}}align 4 {{.*}}%0 - // i686-linux-NEXT: call void @extern_rust_align16({{.+}} [[ALLOCA]]) + // CHECK-I686-LINUX: start: + // CHECK-I686-LINUX-NEXT: [[ALLOCA:%[0-9a-z]+]] = alloca [48 x i8], align 16 + // CHECK-I686-LINUX-NEXT: call void @llvm.memcpy.{{.+}}(ptr {{.*}}align 16 {{.*}}[[ALLOCA]], ptr {{.*}}align 4 {{.*}}%0 + // CHECK-I686-LINUX-NEXT: call void @extern_rust_align16({{.+}} [[ALLOCA]]) - // x86_64-linux: start: - // x86_64-linux-NEXT: call void @extern_rust_align16 + // CHECK-X86_64-LINUX: start: + // CHECK-X86_64-LINUX-NEXT: call void @extern_rust_align16 extern_rust_align16(x); } @@ -115,12 +115,12 @@ pub unsafe extern "C" fn c_to_rust_ref_decreases_alignment(x: Align1) { // CHECK-LABEL: @c_to_rust_ref_increases_alignment #[no_mangle] pub unsafe extern "C" fn c_to_rust_ref_increases_alignment(x: Align16) { - // i686-linux: start: - // i686-linux-NEXT: [[ALLOCA:%[0-9a-z]+]] = alloca [48 x i8], align 16 - // i686-linux-NEXT: call void @llvm.memcpy.{{.+}}(ptr {{.*}}align 16 {{.*}}[[ALLOCA]], ptr {{.*}}align 4 {{.*}}%0 - // i686-linux-NEXT: call void @extern_rust_ref_align16({{.+}} [[ALLOCA]]) + // CHECK-I686-LINUX: start: + // CHECK-I686-LINUX-NEXT: [[ALLOCA:%[0-9a-z]+]] = alloca [48 x i8], align 16 + // CHECK-I686-LINUX-NEXT: call void @llvm.memcpy.{{.+}}(ptr {{.*}}align 16 {{.*}}[[ALLOCA]], ptr {{.*}}align 4 {{.*}}%0 + // CHECK-I686-LINUX-NEXT: call void @extern_rust_ref_align16({{.+}} [[ALLOCA]]) - // x86_64-linux: start: - // x86_64-linux-NEXT: call void @extern_rust_ref_align16 + // CHECK-X86_64-LINUX: start: + // CHECK-X86_64-LINUX-NEXT: call void @extern_rust_ref_align16 extern_rust_ref_align16(&x); } diff --git a/tests/codegen/align-byval-vector.rs b/tests/codegen/align-byval-vector.rs index 02b7d6b0c5e28..737e508aae4c0 100644 --- a/tests/codegen/align-byval-vector.rs +++ b/tests/codegen/align-byval-vector.rs @@ -37,12 +37,12 @@ pub struct DoubleFoo { } extern "C" { - // x86-linux: declare void @f({{.*}}byval([32 x i8]) align 4{{.*}}) - // x86-darwin: declare void @f({{.*}}byval([32 x i8]) align 16{{.*}}) + // CHECK-X86-LINUX: declare void @f({{.*}}byval([32 x i8]) align 4{{.*}}) + // CHECK-X86-DARWIN: declare void @f({{.*}}byval([32 x i8]) align 16{{.*}}) fn f(foo: Foo); - // x86-linux: declare void @g({{.*}}byval([64 x i8]) align 4{{.*}}) - // x86-darwin: declare void @g({{.*}}byval([64 x i8]) align 16{{.*}}) + // CHECK-X86-LINUX: declare void @g({{.*}}byval([64 x i8]) align 4{{.*}}) + // CHECK-X86-DARWIN: declare void @g({{.*}}byval([64 x i8]) align 16{{.*}}) fn g(foo: DoubleFoo); } diff --git a/tests/codegen/align-byval.rs b/tests/codegen/align-byval.rs index 223696229cb1b..5c3266db98869 100644 --- a/tests/codegen/align-byval.rs +++ b/tests/codegen/align-byval.rs @@ -109,21 +109,21 @@ pub struct ForceAlign16 { pub unsafe fn call_na1(x: NaturalAlign1) { // CHECK: start: - // m68k: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 1 - // m68k: call void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}} [[ALLOCA]]) + // CHECK-M68K: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 1 + // CHECK-M68K: call void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}} [[ALLOCA]]) - // wasm: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 1 - // wasm: call void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}} [[ALLOCA]]) + // CHECK-WASM: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 1 + // CHECK-WASM: call void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}} [[ALLOCA]]) - // x86_64-linux: call void @natural_align_1(i16 + // CHECK-X86_64-LINUX: call void @natural_align_1(i16 - // x86_64-windows: call void @natural_align_1(i16 + // CHECK-X86_64-WINDOWS: call void @natural_align_1(i16 - // i686-linux: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 4 - // i686-linux: call void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}} [[ALLOCA]]) + // CHECK-I686-LINUX: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 4 + // CHECK-I686-LINUX: call void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}} [[ALLOCA]]) - // i686-windows: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 4 - // i686-windows: call void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}} [[ALLOCA]]) + // CHECK-I686-WINDOWS: [[ALLOCA:%[a-z0-9+]]] = alloca [2 x i8], align 4 + // CHECK-I686-WINDOWS: call void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}} [[ALLOCA]]) natural_align_1(x); } @@ -132,16 +132,16 @@ pub unsafe fn call_na1(x: NaturalAlign1) { pub unsafe fn call_na2(x: NaturalAlign2) { // CHECK: start: - // m68k-NEXT: call void @natural_align_2 - // wasm-NEXT: call void @natural_align_2 - // x86_64-linux-NEXT: call void @natural_align_2 - // x86_64-windows-NEXT: call void @natural_align_2 + // CHECK-M68K-NEXT: call void @natural_align_2 + // CHECK-WASM-NEXT: call void @natural_align_2 + // CHECK-X86_64-LINUX-NEXT: call void @natural_align_2 + // CHECK-X86_64-WINDOWS-NEXT: call void @natural_align_2 - // i686-linux: [[ALLOCA:%[0-9]+]] = alloca [34 x i8], align 4 - // i686-linux: call void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}} [[ALLOCA]]) + // CHECK-I686-LINUX: [[ALLOCA:%[0-9]+]] = alloca [34 x i8], align 4 + // CHECK-I686-LINUX: call void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}} [[ALLOCA]]) - // i686-windows: [[ALLOCA:%[0-9]+]] = alloca [34 x i8], align 4 - // i686-windows: call void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}} [[ALLOCA]]) + // CHECK-I686-WINDOWS: [[ALLOCA:%[0-9]+]] = alloca [34 x i8], align 4 + // CHECK-I686-WINDOWS: call void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}} [[ALLOCA]]) natural_align_2(x); } @@ -202,144 +202,144 @@ pub unsafe fn call_fa16(x: ForceAlign16) { } extern "C" { - // m68k: declare void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}}) + // CHECK-M68K: declare void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}}) - // wasm: declare void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}}) + // CHECK-WASM: declare void @natural_align_1({{.*}}byval([2 x i8]) align 1{{.*}}) - // x86_64-linux: declare void @natural_align_1(i16) + // CHECK-X86_64-LINUX: declare void @natural_align_1(i16) - // x86_64-windows: declare void @natural_align_1(i16) + // CHECK-X86_64-WINDOWS: declare void @natural_align_1(i16) - // i686-linux: declare void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}}) - // i686-windows: declare void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}}) + // CHECK-I686-WINDOWS: declare void @natural_align_1({{.*}}byval([2 x i8]) align 4{{.*}}) fn natural_align_1(x: NaturalAlign1); - // m68k: declare void @natural_align_2({{.*}}byval([34 x i8]) align 2{{.*}}) + // CHECK-M68K: declare void @natural_align_2({{.*}}byval([34 x i8]) align 2{{.*}}) - // wasm: declare void @natural_align_2({{.*}}byval([34 x i8]) align 2{{.*}}) + // CHECK-WASM: declare void @natural_align_2({{.*}}byval([34 x i8]) align 2{{.*}}) - // x86_64-linux: declare void @natural_align_2({{.*}}byval([34 x i8]) align 2{{.*}}) + // CHECK-X86_64-LINUX: declare void @natural_align_2({{.*}}byval([34 x i8]) align 2{{.*}}) - // x86_64-windows: declare void @natural_align_2( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 2{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @natural_align_2( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 2{{.*}}) - // i686-linux: declare void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}}) - // i686-windows: declare void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}}) + // CHECK-I686-WINDOWS: declare void @natural_align_2({{.*}}byval([34 x i8]) align 4{{.*}}) fn natural_align_2(x: NaturalAlign2); - // m68k: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) + // CHECK-M68K: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) - // wasm: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) + // CHECK-WASM: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) - // x86_64-linux: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) + // CHECK-X86_64-LINUX: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) - // x86_64-windows: declare void @force_align_4( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 4{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @force_align_4( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 4{{.*}}) - // i686-linux: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) - // i686-windows: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) + // CHECK-I686-WINDOWS: declare void @force_align_4({{.*}}byval([20 x i8]) align 4{{.*}}) fn force_align_4(x: ForceAlign4); - // m68k: declare void @natural_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-M68K: declare void @natural_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) - // wasm: declare void @natural_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-WASM: declare void @natural_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-linux: declare void @natural_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-X86_64-LINUX: declare void @natural_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-windows: declare void @natural_align_8( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 8{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @natural_align_8( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 8{{.*}}) - // i686-linux: declare void @natural_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @natural_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) - // i686-windows: declare void @natural_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-I686-WINDOWS: declare void @natural_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) fn natural_align_8(x: NaturalAlign8); - // m68k: declare void @force_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-M68K: declare void @force_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) - // wasm: declare void @force_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-WASM: declare void @force_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-linux: declare void @force_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-X86_64-LINUX: declare void @force_align_8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-windows: declare void @force_align_8( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 8{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @force_align_8( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 8{{.*}}) - // i686-linux: declare void @force_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @force_align_8({{.*}}byval([24 x i8]) align 4{{.*}}) - // i686-windows: declare void @force_align_8( - // i686-windows-NOT: byval - // i686-windows-SAME: align 8{{.*}}) + // CHECK-I686-WINDOWS: declare void @force_align_8( + // CHECK-I686-WINDOWS-NOT: byval + // CHECK-I686-WINDOWS-SAME: align 8{{.*}}) fn force_align_8(x: ForceAlign8); - // m68k: declare void @lower_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-M68K: declare void @lower_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) - // wasm: declare void @lower_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-WASM: declare void @lower_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-linux: declare void @lower_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-X86_64-LINUX: declare void @lower_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-windows: declare void @lower_fa8( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 8{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @lower_fa8( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 8{{.*}}) - // i686-linux: declare void @lower_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @lower_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) - // i686-windows: declare void @lower_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-I686-WINDOWS: declare void @lower_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) fn lower_fa8(x: LowerFA8); - // m68k: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-M68K: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // wasm: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-WASM: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-linux: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-X86_64-LINUX: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-windows: declare void @wrapped_fa8( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 8{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @wrapped_fa8( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 8{{.*}}) - // i686-linux: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @wrapped_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) - // i686-windows: declare void @wrapped_fa8( - // i686-windows-NOT: byval - // i686-windows-SAME: align 8{{.*}}) + // CHECK-I686-WINDOWS: declare void @wrapped_fa8( + // CHECK-I686-WINDOWS-NOT: byval + // CHECK-I686-WINDOWS-SAME: align 8{{.*}}) fn wrapped_fa8(x: WrappedFA8); - // m68k: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-M68K: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // wasm: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-WASM: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-linux: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) + // CHECK-X86_64-LINUX: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 8{{.*}}) - // x86_64-windows: declare void @transparent_fa8( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 8{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @transparent_fa8( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 8{{.*}}) - // i686-linux: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @transparent_fa8({{.*}}byval([24 x i8]) align 4{{.*}}) - // i686-windows: declare void @transparent_fa8( - // i686-windows-NOT: byval - // i686-windows-SAME: align 8{{.*}}) + // CHECK-I686-WINDOWS: declare void @transparent_fa8( + // CHECK-I686-WINDOWS-NOT: byval + // CHECK-I686-WINDOWS-SAME: align 8{{.*}}) fn transparent_fa8(x: TransparentFA8); - // m68k: declare void @force_align_16({{.*}}byval([80 x i8]) align 16{{.*}}) + // CHECK-M68K: declare void @force_align_16({{.*}}byval([80 x i8]) align 16{{.*}}) - // wasm: declare void @force_align_16({{.*}}byval([80 x i8]) align 16{{.*}}) + // CHECK-WASM: declare void @force_align_16({{.*}}byval([80 x i8]) align 16{{.*}}) - // x86_64-linux: declare void @force_align_16({{.*}}byval([80 x i8]) align 16{{.*}}) + // CHECK-X86_64-LINUX: declare void @force_align_16({{.*}}byval([80 x i8]) align 16{{.*}}) - // x86_64-windows: declare void @force_align_16( - // x86_64-windows-NOT: byval - // x86_64-windows-SAME: align 16{{.*}}) + // CHECK-X86_64-WINDOWS: declare void @force_align_16( + // CHECK-X86_64-WINDOWS-NOT: byval + // CHECK-X86_64-WINDOWS-SAME: align 16{{.*}}) - // i686-linux: declare void @force_align_16({{.*}}byval([80 x i8]) align 4{{.*}}) + // CHECK-I686-LINUX: declare void @force_align_16({{.*}}byval([80 x i8]) align 4{{.*}}) - // i686-windows: declare void @force_align_16( - // i686-windows-NOT: byval - // i686-windows-SAME: align 16{{.*}}) + // CHECK-I686-WINDOWS: declare void @force_align_16( + // CHECK-I686-WINDOWS-NOT: byval + // CHECK-I686-WINDOWS-SAME: align 16{{.*}}) fn force_align_16(x: ForceAlign16); } diff --git a/tests/codegen/asm-target-clobbers.rs b/tests/codegen/asm-target-clobbers.rs index 119372491ffe8..530b987afe590 100644 --- a/tests/codegen/asm-target-clobbers.rs +++ b/tests/codegen/asm-target-clobbers.rs @@ -7,15 +7,15 @@ use std::arch::asm; // CHECK-LABEL: @amx_clobber -// base: call void asm sideeffect inteldialect "", "~{tmm0}"() +// CHECK-BASE: call void asm sideeffect inteldialect "", "~{tmm0}"() #[no_mangle] pub unsafe fn amx_clobber() { asm!("", out("tmm0") _, options(nostack, nomem, preserves_flags)); } // CHECK-LABEL: @avx512_clobber -// base: call void asm sideeffect inteldialect "", "~{xmm31}"() -// avx512: call float asm sideeffect inteldialect "", "=&{xmm31}"() +// CHECK-BASE: call void asm sideeffect inteldialect "", "~{xmm31}"() +// CHECK-AVX512: call float asm sideeffect inteldialect "", "=&{xmm31}"() #[no_mangle] pub unsafe fn avx512_clobber() { asm!("", out("zmm31") _, options(nostack, nomem, preserves_flags)); diff --git a/tests/codegen/async-fn-debug-awaitee-field.rs b/tests/codegen/async-fn-debug-awaitee-field.rs index d1a7d738e9e11..277c14ed6acac 100644 --- a/tests/codegen/async-fn-debug-awaitee-field.rs +++ b/tests/codegen/async-fn-debug-awaitee-field.rs @@ -13,11 +13,11 @@ pub async fn async_fn_test() { pub async fn foo() {} -// NONMSVC: [[GEN:!.*]] = !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: [[GEN_SCOPE:![0-9]*]], -// MSVC: [[GEN:!.*]] = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$", -// NONMSVC: [[GEN_SCOPE:!.*]] = !DINamespace(name: "async_fn_test", +// CHECK-NONMSVC: [[GEN:!.*]] = !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: [[GEN_SCOPE:![0-9]*]], +// CHECK-MSVC: [[GEN:!.*]] = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$", +// CHECK-NONMSVC: [[GEN_SCOPE:!.*]] = !DINamespace(name: "async_fn_test", // CHECK: [[SUSPEND_STRUCT:!.*]] = !DICompositeType(tag: DW_TAG_structure_type, name: "Suspend0", scope: [[GEN]], // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "__awaitee", scope: [[SUSPEND_STRUCT]], {{.*}}, baseType: [[AWAITEE_TYPE:![0-9]*]], -// NONMSVC: [[AWAITEE_TYPE]] = !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: [[AWAITEE_SCOPE:![0-9]*]], -// MSVC: [[AWAITEE_TYPE]] = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$", -// NONMSVC: [[AWAITEE_SCOPE]] = !DINamespace(name: "foo", +// CHECK-NONMSVC: [[AWAITEE_TYPE]] = !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: [[AWAITEE_SCOPE:![0-9]*]], +// CHECK-MSVC: [[AWAITEE_TYPE]] = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$", +// CHECK-NONMSVC: [[AWAITEE_SCOPE]] = !DINamespace(name: "foo", diff --git a/tests/codegen/branch-protection.rs b/tests/codegen/branch-protection.rs index a29ec67d578b8..3f459c3fb318c 100644 --- a/tests/codegen/branch-protection.rs +++ b/tests/codegen/branch-protection.rs @@ -1,11 +1,11 @@ // Test that the correct module flags are emitted with different branch protection flags. -//@ revisions: BTI PACRET LEAF BKEY NONE +//@ revisions: bti pacret leaf bkey none //@ needs-llvm-components: aarch64 -//@ [BTI] compile-flags: -Z branch-protection=bti -//@ [PACRET] compile-flags: -Z branch-protection=pac-ret -//@ [LEAF] compile-flags: -Z branch-protection=pac-ret,leaf -//@ [BKEY] compile-flags: -Z branch-protection=pac-ret,b-key +//@ [bti] compile-flags: -Z branch-protection=bti +//@ [pacret] compile-flags: -Z branch-protection=pac-ret +//@ [leaf] compile-flags: -Z branch-protection=pac-ret,leaf +//@ [bkey] compile-flags: -Z branch-protection=pac-ret,b-key //@ compile-flags: --target aarch64-unknown-linux-gnu #![crate_type = "lib"] @@ -18,27 +18,27 @@ trait Sized {} // A basic test function. pub fn test() {} -// BTI: !"branch-target-enforcement", i32 1 -// BTI: !"sign-return-address", i32 0 -// BTI: !"sign-return-address-all", i32 0 -// BTI: !"sign-return-address-with-bkey", i32 0 - -// PACRET: !"branch-target-enforcement", i32 0 -// PACRET: !"sign-return-address", i32 1 -// PACRET: !"sign-return-address-all", i32 0 -// PACRET: !"sign-return-address-with-bkey", i32 0 - -// LEAF: !"branch-target-enforcement", i32 0 -// LEAF: !"sign-return-address", i32 1 -// LEAF: !"sign-return-address-all", i32 1 -// LEAF: !"sign-return-address-with-bkey", i32 0 - -// BKEY: !"branch-target-enforcement", i32 0 -// BKEY: !"sign-return-address", i32 1 -// BKEY: !"sign-return-address-all", i32 0 -// BKEY: !"sign-return-address-with-bkey", i32 1 - -// NONE-NOT: branch-target-enforcement -// NONE-NOT: sign-return-address -// NONE-NOT: sign-return-address-all -// NONE-NOT: sign-return-address-with-bkey +// CHECK-BTI: !"branch-target-enforcement", i32 1 +// CHECK-BTI: !"sign-return-address", i32 0 +// CHECK-BTI: !"sign-return-address-all", i32 0 +// CHECK-BTI: !"sign-return-address-with-bkey", i32 0 + +// CHECK-PACRET: !"branch-target-enforcement", i32 0 +// CHECK-PACRET: !"sign-return-address", i32 1 +// CHECK-PACRET: !"sign-return-address-all", i32 0 +// CHECK-PACRET: !"sign-return-address-with-bkey", i32 0 + +// CHECK-LEAF: !"branch-target-enforcement", i32 0 +// CHECK-LEAF: !"sign-return-address", i32 1 +// CHECK-LEAF: !"sign-return-address-all", i32 1 +// CHECK-LEAF: !"sign-return-address-with-bkey", i32 0 + +// CHECK-BKEY: !"branch-target-enforcement", i32 0 +// CHECK-BKEY: !"sign-return-address", i32 1 +// CHECK-BKEY: !"sign-return-address-all", i32 0 +// CHECK-BKEY: !"sign-return-address-with-bkey", i32 1 + +// CHECK-NONE-NOT: branch-target-enforcement +// CHECK-NONE-NOT: sign-return-address +// CHECK-NONE-NOT: sign-return-address-all +// CHECK-NONE-NOT: sign-return-address-with-bkey diff --git a/tests/codegen/cast-target-abi.rs b/tests/codegen/cast-target-abi.rs index 34e52d38bbea9..8b938f52c36cb 100644 --- a/tests/codegen/cast-target-abi.rs +++ b/tests/codegen/cast-target-abi.rs @@ -73,19 +73,19 @@ pub struct Three32s { } // CHECK-LABEL: @receives_twou16s -// aarch64-SAME: ([[ABI_TYPE:i64]] {{.*}}[[ABI_VALUE:%.+]]) -// loongarch64-SAME: ([[ABI_TYPE:i64]] {{.*}}[[ABI_VALUE:%.+]]) -// powerpc64-SAME: ([[ABI_TYPE:i32]] {{.*}}[[ABI_VALUE:%.+]]) -// sparc64-SAME: ([[ABI_TYPE:i64]] {{.*}}[[ABI_VALUE:%.+]]) -// x86_64-SAME: ([[ABI_TYPE:i32]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-AARCH64-SAME: ([[ABI_TYPE:i64]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-LOONGARCH64-SAME: ([[ABI_TYPE:i64]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-POWERPC64-SAME: ([[ABI_TYPE:i32]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-SPARC64-SAME: ([[ABI_TYPE:i64]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-X86_64-SAME: ([[ABI_TYPE:i32]] {{.*}}[[ABI_VALUE:%.+]]) #[no_mangle] #[inline(never)] pub extern "C" fn receives_twou16s(x: TwoU16s) { - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // powerpc64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-POWERPC64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] // CHECK: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] @@ -95,36 +95,36 @@ pub extern "C" fn receives_twou16s(x: TwoU16s) { } // CHECK-LABEL: @returns_twou16s -// powerpc64-SAME: sret([4 x i8]) align [[RUST_ALIGN:2]] {{.*}}[[RET_PTR:%.*]]) +// CHECK-POWERPC64-SAME: sret([4 x i8]) align [[RUST_ALIGN:2]] {{.*}}[[RET_PTR:%.*]]) #[no_mangle] #[inline(never)] pub extern "C" fn returns_twou16s() -> TwoU16s { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:2]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:2]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:2]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:2]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:2]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:2]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:2]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:2]] - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i32]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i32]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // aarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // loongarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // sparc64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // x86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-AARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-LOONGARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-SPARC64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-X86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] TwoU16s { a: 0, b: 1 } } // CHECK-LABEL: @receives_fiveu16s -// aarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// loongarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// powerpc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// sparc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// x86_64-SAME: ([[ABI_TYPE:{ i64, i16 }]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-AARCH64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-LOONGARCH64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-POWERPC64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-SPARC64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-X86_64-SAME: ([[ABI_TYPE:{ i64, i16 }]] {{.*}}[[ABI_VALUE:%.+]]) #[no_mangle] #[inline(never)] pub extern "C" fn receives_fiveu16s(x: FiveU16s) { @@ -138,36 +138,36 @@ pub extern "C" fn receives_fiveu16s(x: FiveU16s) { } // CHECK-LABEL: @returns_fiveu16s -// powerpc64-SAME: sret([10 x i8]) align [[RUST_ALIGN:2]] {{.*}}[[RET_PTR:%.*]]) +// CHECK-POWERPC64-SAME: sret([10 x i8]) align [[RUST_ALIGN:2]] {{.*}}[[RET_PTR:%.*]]) #[no_mangle] #[inline(never)] pub extern "C" fn returns_fiveu16s() -> FiveU16s { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:2]] - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i16 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i16 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // aarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // loongarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // sparc64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // x86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-AARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-LOONGARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-SPARC64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-X86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] FiveU16s { a: 0, b: 1, c: 2, d: 3, e: 4 } } // CHECK-LABEL: @receives_doubledouble -// aarch64-SAME: ([[ABI_TYPE:\[2 x double\]]] {{.*}}[[ABI_VALUE:%.+]]) -// loongarch64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) -// powerpc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// sparc64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) -// x86_64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-AARCH64-SAME: ([[ABI_TYPE:\[2 x double\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-LOONGARCH64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-POWERPC64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-SPARC64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-X86_64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) #[no_mangle] #[inline(never)] pub extern "C" fn receives_doubledouble(x: DoubleDouble) { @@ -181,36 +181,36 @@ pub extern "C" fn receives_doubledouble(x: DoubleDouble) { } // CHECK-LABEL: @returns_doubledouble -// powerpc64-SAME: sret([16 x i8]) align [[RUST_ALIGN:8]] {{.*}}[[RET_PTR:%.*]]) +// CHECK-POWERPC64-SAME: sret([16 x i8]) align [[RUST_ALIGN:8]] {{.*}}[[RET_PTR:%.*]]) #[no_mangle] #[inline(never)] pub extern "C" fn returns_doubledouble() -> DoubleDouble { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x double\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x double\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // aarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // loongarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // sparc64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // x86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-AARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-LOONGARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-SPARC64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-X86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] DoubleDouble { f: 0., g: 1. } } // CHECK-LABEL: @receives_three32s -// aarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// loongarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// powerpc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// sparc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// x86_64-SAME: ([[ABI_TYPE:{ i64, i32 }]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-AARCH64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-LOONGARCH64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-POWERPC64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-SPARC64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-X86_64-SAME: ([[ABI_TYPE:{ i64, i32 }]] {{.*}}[[ABI_VALUE:%.+]]) #[no_mangle] #[inline(never)] pub extern "C" fn receives_three32s(x: Three32s) { @@ -224,110 +224,110 @@ pub extern "C" fn receives_three32s(x: Three32s) { } // CHECK-LABEL: @returns_three32s -// powerpc64-SAME: sret([12 x i8]) align [[RUST_ALIGN:4]] {{.*}}[[RET_PTR:%.*]]) +// CHECK-POWERPC64-SAME: sret([12 x i8]) align [[RUST_ALIGN:4]] {{.*}}[[RET_PTR:%.*]]) #[no_mangle] #[inline(never)] pub extern "C" fn returns_three32s() -> Three32s { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:4]] - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i32 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i32 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // aarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // loongarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // sparc64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // x86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-AARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-LOONGARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-SPARC64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-X86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] Three32s { a: 0, b: 0, c: 0 } } // These functions cause an ICE in sparc64 ABI code (https://github.com/rust-lang/rust/issues/122620) #[cfg(not(target_arch = "sparc64"))] -// aarch64-LABEL: @receives_doublefloat -// loongarch64-LABEL: @receives_doublefloat -// powerpc64-LABEL: @receives_doublefloat -// x86_64-LABEL: @receives_doublefloat - -// aarch64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// loongarch64-SAME: ([[ABI_TYPE:{ double, float }]] {{.*}}[[ABI_VALUE:%.+]]) -// powerpc64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) -// x86_64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-AARCH64-LABEL: @receives_doublefloat +// CHECK-LOONGARCH64-LABEL: @receives_doublefloat +// CHECK-POWERPC64-LABEL: @receives_doublefloat +// CHECK-X86_64-LABEL: @receives_doublefloat + +// CHECK-AARCH64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-LOONGARCH64-SAME: ([[ABI_TYPE:{ double, float }]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-POWERPC64-SAME: ([[ABI_TYPE:\[2 x i64\]]] {{.*}}[[ABI_VALUE:%.+]]) +// CHECK-X86_64-SAME: ([[ABI_TYPE:{ double, double }]] {{.*}}[[ABI_VALUE:%.+]]) #[no_mangle] #[inline(never)] pub extern "C" fn receives_doublefloat(x: DoubleFloat) { - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // powerpc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - - // aarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // loongarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // powerpc64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // x86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - - // aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // powerpc64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - - // aarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) - // loongarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) - // powerpc64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) - // x86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-POWERPC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + + // CHECK-AARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-LOONGARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-POWERPC64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-X86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + + // CHECK-AARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-POWERPC64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + + // CHECK-AARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-LOONGARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) + // CHECK-POWERPC64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-X86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) } #[cfg(not(target_arch = "sparc64"))] -// aarch64-LABEL: @returns_doublefloat -// loongarch64-LABEL: @returns_doublefloat -// powerpc64-LABEL: @returns_doublefloat -// x86_64-LABEL: @returns_doublefloat +// CHECK-AARCH64-LABEL: @returns_doublefloat +// CHECK-LOONGARCH64-LABEL: @returns_doublefloat +// CHECK-POWERPC64-LABEL: @returns_doublefloat +// CHECK-X86_64-LABEL: @returns_doublefloat -// powerpc64-SAME: sret([16 x i8]) align [[RUST_ALIGN:8]] {{.*}}[[RET_PTR:%.*]]) +// CHECK-POWERPC64-SAME: sret([16 x i8]) align [[RUST_ALIGN:8]] {{.*}}[[RET_PTR:%.*]]) #[no_mangle] #[inline(never)] pub extern "C" fn returns_doublefloat() -> DoubleFloat { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, float }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, float }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // aarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // loongarch64: ret [[ABI_TYPE]] [[ABI_VALUE]] - // x86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-AARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-LOONGARCH64: ret [[ABI_TYPE]] [[ABI_VALUE]] + // CHECK-X86_64: ret [[ABI_TYPE]] [[ABI_VALUE]] DoubleFloat { f: 0., g: 0. } } // CHECK-LABEL: @call_twou16s #[no_mangle] pub fn call_twou16s() { - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // powerpc64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-POWERPC64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] // CHECK: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] // CHECK: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 4, i1 false) - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // powerpc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i32]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i32]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-POWERPC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i32]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i64]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:i32]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] // CHECK: call void @receives_twou16s([[ABI_TYPE]] [[ABI_VALUE]]) let x = TwoU16s { a: 1, b: 2 }; @@ -339,35 +339,35 @@ pub fn call_twou16s() { pub fn return_twou16s() -> TwoU16s { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. - // powerpc64: [[RETVAL:%.+]] = alloca [4 x i8], align 2 - // powerpc64: call void @returns_twou16s(ptr {{.+}} [[RETVAL]]) + // CHECK-POWERPC64: [[RETVAL:%.+]] = alloca [4 x i8], align 2 + // CHECK-POWERPC64: call void @returns_twou16s(ptr {{.+}} [[RETVAL]]) // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] - - // aarch64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] - // loongarch64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] - // sparc64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] - // x86_64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] - - // aarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i64]] @returns_twou16s() - // loongarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i64]] @returns_twou16s() - // sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i64]] @returns_twou16s() - // x86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i32]] @returns_twou16s() - - // aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - - // aarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) - // loongarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) - // sparc64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) - // x86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [8 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [4 x i8], align [[ABI_ALIGN:4]] + + // CHECK-AARCH64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] + // CHECK-LOONGARCH64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] + // CHECK-SPARC64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] + // CHECK-X86_64: [[RUST_ALLOCA:%.+]] = alloca [4 x i8], align [[RUST_ALIGN:2]] + + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i64]] @returns_twou16s() + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i64]] @returns_twou16s() + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i64]] @returns_twou16s() + // CHECK-X86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:i32]] @returns_twou16s() + + // CHECK-AARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + + // CHECK-AARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) + // CHECK-LOONGARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) + // CHECK-SPARC64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) + // CHECK-X86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 4, i1 false) returns_twou16s() } @@ -380,11 +380,11 @@ pub fn call_fiveu16s() { // CHECK: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 10, i1 false) - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // powerpc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i16 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-POWERPC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i16 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] // CHECK: call void @receives_fiveu16s([[ABI_TYPE]] [[ABI_VALUE]]) let x = FiveU16s { a: 1, b: 2, c: 3, d: 4, e: 5 }; @@ -397,29 +397,29 @@ pub fn call_fiveu16s() { pub fn return_fiveu16s() -> FiveU16s { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. - // powerpc64: call void @returns_fiveu16s(ptr {{.+}} [[RET_PTR]]) + // CHECK-POWERPC64: call void @returns_fiveu16s(ptr {{.+}} [[RET_PTR]]) // The other targets copy the cast ABI type to the sret pointer. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - - // aarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s() - // loongarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s() - // sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s() - // x86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i16 }]] @returns_fiveu16s() - - // aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - - // aarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) - // loongarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) - // sparc64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) - // x86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s() + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s() + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_fiveu16s() + // CHECK-X86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i16 }]] @returns_fiveu16s() + + // CHECK-AARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + + // CHECK-AARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) + // CHECK-LOONGARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) + // CHECK-SPARC64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) + // CHECK-X86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RET_PTR]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 10, i1 false) returns_fiveu16s() } @@ -432,11 +432,11 @@ pub fn call_doubledouble() { // CHECK: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 16, i1 false) - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x double\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // powerpc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x double\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-POWERPC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] // CHECK: call void @receives_doubledouble([[ABI_TYPE]] [[ABI_VALUE]]) let x = DoubleDouble { f: 1., g: 2. }; @@ -448,108 +448,108 @@ pub fn call_doubledouble() { pub fn return_doubledouble() -> DoubleDouble { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. - // powerpc64: [[RETVAL:%.+]] = alloca [16 x i8], align 8 - // powerpc64: call void @returns_doubledouble(ptr {{.+}} [[RETVAL]]) + // CHECK-POWERPC64: [[RETVAL:%.+]] = alloca [16 x i8], align 8 + // CHECK-POWERPC64: call void @returns_doubledouble(ptr {{.+}} [[RETVAL]]) // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - - // aarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // loongarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // sparc64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // x86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - - // aarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x double\]]] @returns_doubledouble() - // loongarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doubledouble() - // sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doubledouble() - // x86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doubledouble() - - // aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - - // aarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) - // loongarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) - // sparc64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) - // x86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + + // CHECK-AARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-LOONGARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-SPARC64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-X86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x double\]]] @returns_doubledouble() + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doubledouble() + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doubledouble() + // CHECK-X86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doubledouble() + + // CHECK-AARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + + // CHECK-AARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-LOONGARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-SPARC64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-X86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) returns_doubledouble() } // This test causes an ICE in sparc64 ABI code (https://github.com/rust-lang/rust/issues/122620) #[cfg(not(target_arch = "sparc64"))] -// aarch64-LABEL: @call_doublefloat -// loongarch64-LABEL: @call_doublefloat -// powerpc64-LABEL: @call_doublefloat -// x86_64-LABEL: @call_doublefloat +// CHECK-AARCH64-LABEL: @call_doublefloat +// CHECK-LOONGARCH64-LABEL: @call_doublefloat +// CHECK-POWERPC64-LABEL: @call_doublefloat +// CHECK-X86_64-LABEL: @call_doublefloat #[no_mangle] pub fn call_doublefloat() { - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // powerpc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - - // aarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // loongarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // powerpc64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // x86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - - // aarch64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 16, i1 false) - // loongarch64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 12, i1 false) - // powerpc64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 16, i1 false) - // x86_64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 16, i1 false) - - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, float }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // powerpc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - - // aarch64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) - // loongarch64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) - // powerpc64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) - // x86_64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-POWERPC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + + // CHECK-AARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-LOONGARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-POWERPC64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-X86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + + // CHECK-AARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 16, i1 false) + // CHECK-LOONGARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 12, i1 false) + // CHECK-POWERPC64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 16, i1 false) + // CHECK-X86_64: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 16, i1 false) + + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, float }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-POWERPC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ double, double }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + + // CHECK-AARCH64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) + // CHECK-LOONGARCH64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) + // CHECK-POWERPC64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) + // CHECK-X86_64: call void @receives_doublefloat([[ABI_TYPE]] {{(inreg )?}}[[ABI_VALUE]]) let x = DoubleFloat { f: 1., g: 2. }; receives_doublefloat(x); } // This test causes an ICE in sparc64 ABI code (https://github.com/rust-lang/rust/issues/122620) #[cfg(not(target_arch = "sparc64"))] -// aarch64-LABEL: @return_doublefloat -// loongarch64-LABEL: @return_doublefloat -// powerpc64-LABEL: @return_doublefloat -// x86_64-LABEL: @return_doublefloat +// CHECK-AARCH64-LABEL: @return_doublefloat +// CHECK-LOONGARCH64-LABEL: @return_doublefloat +// CHECK-POWERPC64-LABEL: @return_doublefloat +// CHECK-X86_64-LABEL: @return_doublefloat #[no_mangle] pub fn return_doublefloat() -> DoubleFloat { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. - // powerpc64: [[RETVAL:%.+]] = alloca [16 x i8], align 8 - // powerpc64: call void @returns_doublefloat(ptr {{.+}} [[RETVAL]]) + // CHECK-POWERPC64: [[RETVAL:%.+]] = alloca [16 x i8], align 8 + // CHECK-POWERPC64: call void @returns_doublefloat(ptr {{.+}} [[RETVAL]]) // The other targets copy the cast ABI type to an alloca. - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // aarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // loongarch64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // x86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-AARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-LOONGARCH64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] + // CHECK-X86_64: [[RUST_ALLOCA:%.+]] = alloca [16 x i8], align [[RUST_ALIGN:8]] - // aarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_doublefloat() - // loongarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, float }]] @returns_doublefloat() - // x86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doublefloat() + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_doublefloat() + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, float }]] @returns_doublefloat() + // CHECK-X86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ double, double }]] @returns_doublefloat() - // aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // aarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) - // loongarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) - // x86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-AARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) + // CHECK-LOONGARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) + // CHECK-X86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 16, i1 false) returns_doublefloat() } @@ -560,11 +560,11 @@ pub fn call_three32s() { // CHECK: [[RUST_ALLOCA:%.+]] = alloca [12 x i8], align [[RUST_ALIGN:4]] // CHECK: call void @llvm.memcpy.{{.+}}(ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], ptr align [[RUST_ALIGN]] [[RUST_ALLOCA]], i64 12, i1 false) - // aarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // powerpc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i32 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-POWERPC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:\[2 x i64\]]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: [[ABI_VALUE:%.+]] = load [[ABI_TYPE:{ i64, i32 }]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] // CHECK: call void @receives_three32s([[ABI_TYPE]] [[ABI_VALUE]]) let x = Three32s { a: 1, b: 2, c: 3 }; @@ -578,26 +578,26 @@ pub fn call_three32s() { pub fn return_three32s() -> Three32s { // powerpc returns this struct via sret pointer, it doesn't use the cast ABI. - // powerpc64: call void @returns_three32s(ptr {{.+}} [[RUST_RETVAL]]) + // CHECK-POWERPC64: call void @returns_three32s(ptr {{.+}} [[RUST_RETVAL]]) - // aarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // loongarch64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // sparc64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // x86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-AARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-LOONGARCH64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-SPARC64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] + // CHECK-X86_64: [[ABI_ALLOCA:%.+]] = alloca [16 x i8], align [[ABI_ALIGN:8]] - // aarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s() - // loongarch64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s() - // sparc64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s() - // x86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i32 }]] @returns_three32s() + // CHECK-AARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s() + // CHECK-LOONGARCH64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s() + // CHECK-SPARC64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:\[2 x i64\]]] @returns_three32s() + // CHECK-X86_64: [[ABI_VALUE:%.+]] = call [[ABI_TYPE:{ i64, i32 }]] @returns_three32s() - // aarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // loongarch64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // sparc64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // x86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-AARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-LOONGARCH64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-SPARC64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] + // CHECK-X86_64: store [[ABI_TYPE]] [[ABI_VALUE]], ptr [[ABI_ALLOCA]], align [[ABI_ALIGN]] - // aarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) - // loongarch64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) - // sparc64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) - // x86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) + // CHECK-AARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) + // CHECK-LOONGARCH64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) + // CHECK-SPARC64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) + // CHECK-X86_64: call void @llvm.memcpy.{{.+}}(ptr align [[RUST_ALIGN]] [[RUST_RETVAL]], ptr align [[ABI_ALIGN]] [[ABI_ALLOCA]], i64 12, i1 false) returns_three32s() } diff --git a/tests/codegen/cf-protection.rs b/tests/codegen/cf-protection.rs index 244d1eb254422..d744a387b7fac 100644 --- a/tests/codegen/cf-protection.rs +++ b/tests/codegen/cf-protection.rs @@ -19,19 +19,19 @@ trait Sized {} // A basic test function. pub fn test() {} -// undefined-NOT: !"cf-protection-branch" -// undefined-NOT: !"cf-protection-return" +// CHECK-UNDEFINED-NOT: !"cf-protection-branch" +// CHECK-UNDEFINED-NOT: !"cf-protection-return" -// none-NOT: !"cf-protection-branch" -// none-NOT: !"cf-protection-return" +// CHECK-NONE-NOT: !"cf-protection-branch" +// CHECK-NONE-NOT: !"cf-protection-return" -// branch-NOT: !"cf-protection-return" -// branch: !"cf-protection-branch", i32 1 -// branch-NOT: !"cf-protection-return" +// CHECK-BRANCH-NOT: !"cf-protection-return" +// CHECK-BRANCH: !"cf-protection-branch", i32 1 +// CHECK-BRANCH-NOT: !"cf-protection-return" -// return-NOT: !"cf-protection-branch" -// return: !"cf-protection-return", i32 1 -// return-NOT: !"cf-protection-branch" +// CHECK-RETURN-NOT: !"cf-protection-branch" +// CHECK-RETURN: !"cf-protection-return", i32 1 +// CHECK-RETURN-NOT: !"cf-protection-branch" -// full: !"cf-protection-branch", i32 1 -// full: !"cf-protection-return", i32 1 +// CHECK-FULL: !"cf-protection-branch", i32 1 +// CHECK-FULL: !"cf-protection-return", i32 1 diff --git a/tests/codegen/codemodels.rs b/tests/codegen/codemodels.rs index 06d2eade78ae8..c342f7d843da0 100644 --- a/tests/codegen/codemodels.rs +++ b/tests/codegen/codemodels.rs @@ -1,20 +1,20 @@ //@ only-x86_64 -//@ revisions: NOMODEL MODEL-SMALL MODEL-KERNEL MODEL-MEDIUM MODEL-LARGE -//@[NOMODEL] compile-flags: -//@[MODEL-SMALL] compile-flags: -C code-model=small -//@[MODEL-KERNEL] compile-flags: -C code-model=kernel -//@[MODEL-MEDIUM] compile-flags: -C code-model=medium -//@[MODEL-LARGE] compile-flags: -C code-model=large +//@ revisions: nomodel model-small model-kernel model-medium model-large +//@[nomodel] compile-flags: +//@[model-small] compile-flags: -C code-model=small +//@[model-kernel] compile-flags: -C code-model=kernel +//@[model-medium] compile-flags: -C code-model=medium +//@[model-large] compile-flags: -C code-model=large #![crate_type = "lib"] -// MODEL-SMALL: !llvm.module.flags = !{{{.*}}} -// MODEL-SMALL: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 1} -// MODEL-KERNEL: !llvm.module.flags = !{{{.*}}} -// MODEL-KERNEL: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 2} -// MODEL-MEDIUM: !llvm.module.flags = !{{{.*}}} -// MODEL-MEDIUM: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 3} -// MODEL-LARGE: !llvm.module.flags = !{{{.*}}} -// MODEL-LARGE: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 4} -// NOMODEL-NOT: Code Model +// CHECK-MODEL-SMALL: !llvm.module.flags = !{{{.*}}} +// CHECK-MODEL-SMALL: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 1} +// CHECK-MODEL-KERNEL: !llvm.module.flags = !{{{.*}}} +// CHECK-MODEL-KERNEL: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 2} +// CHECK-MODEL-MEDIUM: !llvm.module.flags = !{{{.*}}} +// CHECK-MODEL-MEDIUM: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 3} +// CHECK-MODEL-LARGE: !llvm.module.flags = !{{{.*}}} +// CHECK-MODEL-LARGE: !{{[0-9]+}} = !{i32 1, !"Code Model", i32 4} +// CHECK-NOMODEL-NOT: Code Model diff --git a/tests/codegen/cold-call-declare-and-call.rs b/tests/codegen/cold-call-declare-and-call.rs index cd41c0a6dfb66..a047d4129b568 100644 --- a/tests/codegen/cold-call-declare-and-call.rs +++ b/tests/codegen/cold-call-declare-and-call.rs @@ -1,21 +1,21 @@ -//@ revisions: NORMAL WINDOWS +//@ revisions: normal windows //@ compile-flags: -C no-prepopulate-passes -//@[NORMAL] ignore-windows -//@[WINDOWS] only-windows -//@[WINDOWS] only-x86_64 +//@[normal] ignore-windows +//@[windows] only-windows +//@[windows] only-x86_64 #![crate_type = "lib"] #![feature(rust_cold_cc)] // wasm marks the definition as `dso_local`, so allow that as optional. -// NORMAL: define{{( dso_local)?}} preserve_mostcc void @this_should_never_happen(i16 -// NORMAL: call preserve_mostcc void @this_should_never_happen(i16 +// CHECK-NORMAL: define{{( dso_local)?}} preserve_mostcc void @this_should_never_happen(i16 +// CHECK-NORMAL: call preserve_mostcc void @this_should_never_happen(i16 // See the comment in `Target::adjust_abi` for why this differs -// WINDOWS: define void @this_should_never_happen(i16 -// WINDOWS: call void @this_should_never_happen(i16 +// CHECK-WINDOWS: define void @this_should_never_happen(i16 +// CHECK-WINDOWS: call void @this_should_never_happen(i16 #[no_mangle] pub extern "rust-cold" fn this_should_never_happen(x: u16) {} diff --git a/tests/codegen/comparison-operators-2-tuple.rs b/tests/codegen/comparison-operators-2-tuple.rs index 8e2915e84eb77..2f7e8b406d61e 100644 --- a/tests/codegen/comparison-operators-2-tuple.rs +++ b/tests/codegen/comparison-operators-2-tuple.rs @@ -89,11 +89,12 @@ pub fn check_lt_via_cmp(a: TwoTuple, b: TwoTuple) -> bool { // CHECK-SAME: (i16 noundef %[[A0:.+]], i16 noundef %[[A1:.+]], i16 noundef %[[B0:.+]], i16 noundef %[[B1:.+]]) #[no_mangle] pub fn check_le_via_cmp(a: TwoTuple, b: TwoTuple) -> bool { - // FIXME-CHECK-DAG: %[[EQ:.+]] = icmp eq i16 %[[A0]], %[[B0]] - // FIXME-CHECK-DAG: %[[CMP0:.+]] = icmp sle i16 %[[A0]], %[[B0]] - // FIXME-CHECK-DAG: %[[CMP1:.+]] = icmp ule i16 %[[A1]], %[[B1]] - // FIXME-CHECK: %[[R:.+]] = select i1 %[[EQ]], i1 %[[CMP1]], i1 %[[CMP0]] - // FIXME-CHECK: ret i1 %[[R]] + // COM: FIXME: `Ord::cmp` does not yet optimize + // COM: CHECK-DAG: %[[EQ:.+]] = icmp eq i16 %[[A0]], %[[B0]] + // COM: CHECK-DAG: %[[CMP0:.+]] = icmp sle i16 %[[A0]], %[[B0]] + // COM: CHECK-DAG: %[[CMP1:.+]] = icmp ule i16 %[[A1]], %[[B1]] + // COM: CHECK: %[[R:.+]] = select i1 %[[EQ]], i1 %[[CMP1]], i1 %[[CMP0]] + // COM: CHECK: ret i1 %[[R]] Ord::cmp(&a, &b).is_le() } @@ -101,11 +102,12 @@ pub fn check_le_via_cmp(a: TwoTuple, b: TwoTuple) -> bool { // CHECK-SAME: (i16 noundef %[[A0:.+]], i16 noundef %[[A1:.+]], i16 noundef %[[B0:.+]], i16 noundef %[[B1:.+]]) #[no_mangle] pub fn check_gt_via_cmp(a: TwoTuple, b: TwoTuple) -> bool { - // FIXME-CHECK-DAG: %[[EQ:.+]] = icmp eq i16 %[[A0]], %[[B0]] - // FIXME-CHECK-DAG: %[[CMP0:.+]] = icmp sgt i16 %[[A0]], %[[B0]] - // FIXME-CHECK-DAG: %[[CMP1:.+]] = icmp ugt i16 %[[A1]], %[[B1]] - // FIXME-CHECK: %[[R:.+]] = select i1 %[[EQ]], i1 %[[CMP1]], i1 %[[CMP0]] - // FIXME-CHECK: ret i1 %[[R]] + // COM: FIXME: `Ord::cmp` does not yet optimize + // COM: CHECK-DAG: %[[EQ:.+]] = icmp eq i16 %[[A0]], %[[B0]] + // COM: CHECK-DAG: %[[CMP0:.+]] = icmp sgt i16 %[[A0]], %[[B0]] + // COM: CHECK-DAG: %[[CMP1:.+]] = icmp ugt i16 %[[A1]], %[[B1]] + // COM: CHECK: %[[R:.+]] = select i1 %[[EQ]], i1 %[[CMP1]], i1 %[[CMP0]] + // COM: CHECK: ret i1 %[[R]] Ord::cmp(&a, &b).is_gt() } @@ -113,10 +115,11 @@ pub fn check_gt_via_cmp(a: TwoTuple, b: TwoTuple) -> bool { // CHECK-SAME: (i16 noundef %[[A0:.+]], i16 noundef %[[A1:.+]], i16 noundef %[[B0:.+]], i16 noundef %[[B1:.+]]) #[no_mangle] pub fn check_ge_via_cmp(a: TwoTuple, b: TwoTuple) -> bool { - // FIXME-CHECK-DAG: %[[EQ:.+]] = icmp eq i16 %[[A0]], %[[B0]] - // FIXME-CHECK-DAG: %[[CMP0:.+]] = icmp sge i16 %[[A0]], %[[B0]] - // FIXME-CHECK-DAG: %[[CMP1:.+]] = icmp uge i16 %[[A1]], %[[B1]] - // FIXME-CHECK: %[[R:.+]] = select i1 %[[EQ]], i1 %[[CMP1]], i1 %[[CMP0]] - // FIXME-CHECK: ret i1 %[[R]] + // COM: FIXME: `Ord::cmp` does not yet optimize + // COM: CHECK-DAG: %[[EQ:.+]] = icmp eq i16 %[[A0]], %[[B0]] + // COM: CHECK-DAG: %[[CMP0:.+]] = icmp sge i16 %[[A0]], %[[B0]] + // COM: CHECK-DAG: %[[CMP1:.+]] = icmp uge i16 %[[A1]], %[[B1]] + // COM: CHECK: %[[R:.+]] = select i1 %[[EQ]], i1 %[[CMP1]], i1 %[[CMP0]] + // COM: CHECK: ret i1 %[[R]] Ord::cmp(&a, &b).is_ge() } diff --git a/tests/codegen/debug-accessibility/crate-enum.rs b/tests/codegen/debug-accessibility/crate-enum.rs index c80700d7b2828..8999618a4b044 100644 --- a/tests/codegen/debug-accessibility/crate-enum.rs +++ b/tests/codegen/debug-accessibility/crate-enum.rs @@ -14,8 +14,8 @@ mod module { C { x: u32 }, } - // NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "CrateFooEnum"{{.*}}flags: DIFlagProtected{{.*}}) - // MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagProtected{{.*}}) + // CHECK-NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "CrateFooEnum"{{.*}}flags: DIFlagProtected{{.*}}) + // CHECK-MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagProtected{{.*}}) pub fn use_everything() { black_box(CrateFooEnum::A); } diff --git a/tests/codegen/debug-accessibility/private-enum.rs b/tests/codegen/debug-accessibility/private-enum.rs index 22d49a40eff0b..d30258b0601d7 100644 --- a/tests/codegen/debug-accessibility/private-enum.rs +++ b/tests/codegen/debug-accessibility/private-enum.rs @@ -13,8 +13,8 @@ enum PrivateFooEnum { C { x: u32 }, } -// NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "PrivateFooEnum"{{.*}}flags: DIFlagPrivate{{.*}}) -// MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagPrivate{{.*}}) +// CHECK-NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "PrivateFooEnum"{{.*}}flags: DIFlagPrivate{{.*}}) +// CHECK-MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagPrivate{{.*}}) fn main() { black_box(PrivateFooEnum::A); diff --git a/tests/codegen/debug-accessibility/public-enum.rs b/tests/codegen/debug-accessibility/public-enum.rs index f16ccf1a3c963..21fe1fb00f487 100644 --- a/tests/codegen/debug-accessibility/public-enum.rs +++ b/tests/codegen/debug-accessibility/public-enum.rs @@ -13,8 +13,8 @@ pub enum PublicFooEnum { C { x: u32 }, } -// NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "PublicFooEnum"{{.*}}flags: DIFlagPublic{{.*}}) -// MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagPublic{{.*}}) +// CHECK-NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "PublicFooEnum"{{.*}}flags: DIFlagPublic{{.*}}) +// CHECK-MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagPublic{{.*}}) fn main() { black_box(PublicFooEnum::A); diff --git a/tests/codegen/debug-accessibility/super-enum.rs b/tests/codegen/debug-accessibility/super-enum.rs index 1b6d7d793ed5b..d58c9270ef2b0 100644 --- a/tests/codegen/debug-accessibility/super-enum.rs +++ b/tests/codegen/debug-accessibility/super-enum.rs @@ -14,8 +14,8 @@ mod module { C { x: u32 }, } - // NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "SuperFooEnum"{{.*}}flags: DIFlagProtected{{.*}}) - // MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagProtected{{.*}}) + // CHECK-NONMSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_structure_type, name: "SuperFooEnum"{{.*}}flags: DIFlagProtected{{.*}}) + // CHECK-MSVC: {{!.*}} = !DICompositeType(tag: DW_TAG_union_type, name: "enum2$"{{.*}}flags: DIFlagProtected{{.*}}) pub fn use_everything() { black_box(SuperFooEnum::A); diff --git a/tests/codegen/debug-vtable.rs b/tests/codegen/debug-vtable.rs index 036fff6cd237e..8a3d0c9e3df7a 100644 --- a/tests/codegen/debug-vtable.rs +++ b/tests/codegen/debug-vtable.rs @@ -15,16 +15,16 @@ // CHECK: @vtable.3 = private constant <{ // CHECK: @vtable.4 = private constant <{ -// NONMSVC: ![[USIZE:[0-9]+]] = !DIBasicType(name: "usize" -// MSVC: ![[USIZE:[0-9]+]] = !DIDerivedType(tag: DW_TAG_typedef, name: "usize" -// NONMSVC: ![[PTR:[0-9]+]] = !DIDerivedType(tag: DW_TAG_pointer_type, name: "*const ()" -// MSVC: ![[PTR:[0-9]+]] = !DIDerivedType(tag: DW_TAG_pointer_type, name: "ptr_const$ >" +// CHECK-NONMSVC: ![[USIZE:[0-9]+]] = !DIBasicType(name: "usize" +// CHECK-MSVC: ![[USIZE:[0-9]+]] = !DIDerivedType(tag: DW_TAG_typedef, name: "usize" +// CHECK-NONMSVC: ![[PTR:[0-9]+]] = !DIDerivedType(tag: DW_TAG_pointer_type, name: "*const ()" +// CHECK-MSVC: ![[PTR:[0-9]+]] = !DIDerivedType(tag: DW_TAG_pointer_type, name: "ptr_const$ >" -// NONMSVC: !DIGlobalVariable(name: "::{vtable}" -// MSVC: !DIGlobalVariable(name: "impl$::vtable$" +// CHECK-NONMSVC: !DIGlobalVariable(name: "::{vtable}" +// CHECK-MSVC: !DIGlobalVariable(name: "impl$::vtable$" -// NONMSVC: ![[VTABLE_TY0:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "::{vtable_type}", {{.*}} size: {{320|160}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}} vtableHolder: ![[FOO_TYPE:[0-9]+]], -// MSVC: ![[VTABLE_TY0:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "impl$::vtable_type$", {{.*}} size: {{320|160}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}} vtableHolder: ![[FOO_TYPE:[0-9]+]], +// CHECK-NONMSVC: ![[VTABLE_TY0:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "::{vtable_type}", {{.*}} size: {{320|160}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}} vtableHolder: ![[FOO_TYPE:[0-9]+]], +// CHECK-MSVC: ![[VTABLE_TY0:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "impl$::vtable_type$", {{.*}} size: {{320|160}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}} vtableHolder: ![[FOO_TYPE:[0-9]+]], // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "drop_in_place", scope: ![[VTABLE_TY0]], {{.*}} baseType: ![[PTR]], size: {{64|32}}, align: {{64|32}}) // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "size", scope: ![[VTABLE_TY0]], {{.*}} baseType: ![[USIZE]], size: {{64|32}}, align: {{64|32}}, offset: {{64|32}}) // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "align", scope: ![[VTABLE_TY0]], {{.*}} baseType: ![[USIZE]], size: {{64|32}}, align: {{64|32}}, offset: {{128|64}}) @@ -32,33 +32,33 @@ // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "__method4", scope: ![[VTABLE_TY0]], {{.*}} baseType: ![[PTR]], size: {{64|32}}, align: {{64|32}}, offset: {{256|128}}) // CHECK: ![[FOO_TYPE]] = !DICompositeType(tag: DW_TAG_structure_type, name: "Foo", -// NONMSVC: !DIGlobalVariable(name: ">::{vtable}" -// MSVC: !DIGlobalVariable(name: "impl$ >::vtable$" +// CHECK-NONMSVC: !DIGlobalVariable(name: ">::{vtable}" +// CHECK-MSVC: !DIGlobalVariable(name: "impl$ >::vtable$" -// NONMSVC: ![[VTABLE_TY1:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: ">::{vtable_type}", {{.*}}, size: {{256|128}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], -// MSVC: ![[VTABLE_TY1:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "impl$ >::vtable_type$", {{.*}}, size: {{256|128}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], +// CHECK-NONMSVC: ![[VTABLE_TY1:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: ">::{vtable_type}", {{.*}}, size: {{256|128}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], +// CHECK-MSVC: ![[VTABLE_TY1:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "impl$ >::vtable_type$", {{.*}}, size: {{256|128}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "drop_in_place", scope: ![[VTABLE_TY1]], {{.*}} baseType: ![[PTR]], size: {{64|32}}, align: {{64|32}}) // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "size", scope: ![[VTABLE_TY1]], {{.*}} baseType: ![[USIZE]], size: {{64|32}}, align: {{64|32}}, offset: {{64|32}}) // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "align", scope: ![[VTABLE_TY1]], {{.*}} baseType: ![[USIZE]], size: {{64|32}}, align: {{64|32}}, offset: {{128|64}}) // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "__method3", scope: ![[VTABLE_TY1]], {{.*}} baseType: ![[PTR]], size: {{64|32}}, align: {{64|32}}, offset: {{192|96}}) -// NONMSVC: !DIGlobalVariable(name: "::{vtable}" -// MSVC: !DIGlobalVariable(name: "impl$::vtable$" +// CHECK-NONMSVC: !DIGlobalVariable(name: "::{vtable}" +// CHECK-MSVC: !DIGlobalVariable(name: "impl$::vtable$" -// NONMSVC: ![[VTABLE_TY2:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "::{vtable_type}", {{.*}}, size: {{192|96}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], -// MSVC: ![[VTABLE_TY2:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "impl$::vtable_type$", {{.*}}, size: {{192|96}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], +// CHECK-NONMSVC: ![[VTABLE_TY2:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "::{vtable_type}", {{.*}}, size: {{192|96}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], +// CHECK-MSVC: ![[VTABLE_TY2:[0-9]+]] = !DICompositeType(tag: DW_TAG_structure_type, name: "impl$::vtable_type$", {{.*}}, size: {{192|96}}, align: {{64|32}}, flags: DIFlagArtificial, {{.*}}, vtableHolder: ![[FOO_TYPE]], // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "drop_in_place", scope: ![[VTABLE_TY2]], {{.*}}, baseType: ![[PTR]], size: {{64|32}}, align: {{64|32}}) // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "size", scope: ![[VTABLE_TY2]], {{.*}}, baseType: ![[USIZE]], size: {{64|32}}, align: {{64|32}}, offset: {{64|32}}) // CHECK: !DIDerivedType(tag: DW_TAG_member, name: "align", scope: ![[VTABLE_TY2]], {{.*}}, baseType: ![[USIZE]], size: {{64|32}}, align: {{64|32}}, offset: {{128|64}}) -// NONMSVC: !DIGlobalVariable(name: ">)>>::{vtable}" -// MSVC: !DIGlobalVariable(name: "impl$,assoc$ > > > > > > > > >::vtable$" +// CHECK-NONMSVC: !DIGlobalVariable(name: ">)>>::{vtable}" +// CHECK-MSVC: !DIGlobalVariable(name: "impl$,assoc$ > > > > > > > > >::vtable$" -// NONMSVC: !DIGlobalVariable(name: " as core::ops::function::FnOnce<()>>::{vtable}" -// MSVC: !DIGlobalVariable(name: "impl$, core::ops::function::FnOnce > >::vtable$ +// CHECK-NONMSVC: !DIGlobalVariable(name: " as core::ops::function::FnOnce<()>>::{vtable}" +// CHECK-MSVC: !DIGlobalVariable(name: "impl$, core::ops::function::FnOnce > >::vtable$ -// NONMSVC: !DIGlobalVariable(name: " as core::ops::function::FnOnce<()>>::{vtable}" -// MSVC: !DIGlobalVariable(name: "impl$, core::ops::function::FnOnce > >::vtable$ +// CHECK-NONMSVC: !DIGlobalVariable(name: " as core::ops::function::FnOnce<()>>::{vtable}" +// CHECK-MSVC: !DIGlobalVariable(name: "impl$, core::ops::function::FnOnce > >::vtable$ #![crate_type = "lib"] diff --git a/tests/codegen/debuginfo-generic-closure-env-names.rs b/tests/codegen/debuginfo-generic-closure-env-names.rs index 6d56fbc40abe4..f1af8c31797f9 100644 --- a/tests/codegen/debuginfo-generic-closure-env-names.rs +++ b/tests/codegen/debuginfo-generic-closure-env-names.rs @@ -18,8 +18,8 @@ //@ compile-flags: -Cdebuginfo=2 --edition 2021 -Copt-level=0 -Csymbol-mangling-version=v0 // non_generic_closure() -// NONMSVC: !DICompositeType(tag: DW_TAG_structure_type, name: "{closure_env#0}", scope: ![[non_generic_closure_NAMESPACE:[0-9]+]], -// MSVC: !DICompositeType(tag: DW_TAG_structure_type, name: "closure_env$0", scope: ![[non_generic_closure_NAMESPACE:[0-9]+]], +// CHECK-NONMSVC: !DICompositeType(tag: DW_TAG_structure_type, name: "{closure_env#0}", scope: ![[non_generic_closure_NAMESPACE:[0-9]+]], +// CHECK-MSVC: !DICompositeType(tag: DW_TAG_structure_type, name: "closure_env$0", scope: ![[non_generic_closure_NAMESPACE:[0-9]+]], // CHECK: ![[non_generic_closure_NAMESPACE]] = !DINamespace(name: "non_generic_closure" // CHECK: ![[function_containing_closure_NAMESPACE:[0-9]+]] = !DINamespace(name: "function_containing_closure" @@ -27,24 +27,24 @@ // CHECK: ![[generic_async_block_NAMESPACE:[0-9]+]] = !DINamespace(name: "generic_async_block" // function_containing_closure() -// NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{closure_env#0}", scope: ![[function_containing_closure_NAMESPACE]] -// MSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "closure_env$0", scope: ![[function_containing_closure_NAMESPACE]] +// CHECK-NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{closure_env#0}", scope: ![[function_containing_closure_NAMESPACE]] +// CHECK-MSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "closure_env$0", scope: ![[function_containing_closure_NAMESPACE]] // generic_async_function() -// NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: ![[generic_async_function_NAMESPACE]] +// CHECK-NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: ![[generic_async_function_NAMESPACE]] // generic_async_function() -// NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: ![[generic_async_function_NAMESPACE]] +// CHECK-NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_fn_env#0}", scope: ![[generic_async_function_NAMESPACE]] // generic_async_block() -// NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_block_env#0}", scope: ![[generic_async_block_NAMESPACE]] +// CHECK-NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_block_env#0}", scope: ![[generic_async_block_NAMESPACE]] // generic_async_block() -// NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_block_env#0}", scope: ![[generic_async_block_NAMESPACE]] +// CHECK-NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{async_block_env#0}", scope: ![[generic_async_block_NAMESPACE]] // function_containing_closure() -// NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{closure_env#0}", scope: ![[function_containing_closure_NAMESPACE]] -// MSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "closure_env$0", scope: ![[function_containing_closure_NAMESPACE]] +// CHECK-NONMSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "{closure_env#0}", scope: ![[function_containing_closure_NAMESPACE]] +// CHECK-MSVC-DAG: !DICompositeType(tag: DW_TAG_structure_type, name: "closure_env$0", scope: ![[function_containing_closure_NAMESPACE]] #![crate_type = "lib"] use std::future::Future; diff --git a/tests/codegen/default-hidden-visibility.rs b/tests/codegen/default-hidden-visibility.rs index 2bea8f62a40db..c207d8dfbc73b 100644 --- a/tests/codegen/default-hidden-visibility.rs +++ b/tests/codegen/default-hidden-visibility.rs @@ -3,9 +3,9 @@ // also https://github.com/rust-lang/rust/issues/73295 and // https://github.com/rust-lang/rust/issues/37530. -//@ revisions:DEFAULT YES NO -//@[YES] compile-flags: -Zdefault-hidden-visibility=yes -//@[NO] compile-flags: -Zdefault-hidden-visibility=no +//@ revisions: default yes no +//@[yes] compile-flags: -Zdefault-hidden-visibility=yes +//@[no] compile-flags: -Zdefault-hidden-visibility=no // The test scenario is specifically about visibility of symbols exported out of dynamically linked // libraries. @@ -26,6 +26,6 @@ pub static tested_symbol: [u8; 6] = *b"foobar"; // //@ only-x86_64-unknown-linux-gnu -// DEFAULT: @{{.*}}default_hidden_visibility{{.*}}tested_symbol{{.*}} = constant -// YES: @{{.*}}default_hidden_visibility{{.*}}tested_symbol{{.*}} = hidden constant -// NO: @{{.*}}default_hidden_visibility{{.*}}tested_symbol{{.*}} = constant +// CHECK-DEFAULT: @{{.*}}default_hidden_visibility{{.*}}tested_symbol{{.*}} = constant +// CHECK-YES: @{{.*}}default_hidden_visibility{{.*}}tested_symbol{{.*}} = hidden constant +// CHECK-NO: @{{.*}}default_hidden_visibility{{.*}}tested_symbol{{.*}} = constant diff --git a/tests/codegen/default-requires-uwtable.rs b/tests/codegen/default-requires-uwtable.rs index 567bd55ecc3f2..9c51b5780b5d0 100644 --- a/tests/codegen/default-requires-uwtable.rs +++ b/tests/codegen/default-requires-uwtable.rs @@ -1,9 +1,9 @@ -//@ revisions: WINDOWS ANDROID +//@ revisions: windows android //@ compile-flags: -C panic=abort -Copt-level=0 -//@ [WINDOWS] compile-flags: --target=x86_64-pc-windows-msvc -//@ [WINDOWS] needs-llvm-components: x86 -//@ [ANDROID] compile-flags: --target=armv7-linux-androideabi -//@ [ANDROID] needs-llvm-components: arm +//@ [windows] compile-flags: --target=x86_64-pc-windows-msvc +//@ [windows] needs-llvm-components: x86 +//@ [android] compile-flags: --target=armv7-linux-androideabi +//@ [android] needs-llvm-components: arm #![feature(no_core, lang_items)] #![crate_type = "lib"] diff --git a/tests/codegen/direct-access-external-data.rs b/tests/codegen/direct-access-external-data.rs index 5b2ff41ef0529..420483ed03caf 100644 --- a/tests/codegen/direct-access-external-data.rs +++ b/tests/codegen/direct-access-external-data.rs @@ -1,15 +1,15 @@ //@ only-loongarch64-unknown-linux-gnu -//@ revisions: DEFAULT DIRECT INDIRECT -//@ [DEFAULT] compile-flags: -C relocation-model=static -//@ [DIRECT] compile-flags: -C relocation-model=static -Z direct-access-external-data=yes -//@ [INDIRECT] compile-flags: -C relocation-model=static -Z direct-access-external-data=no +//@ revisions: default direct indirect +//@ [default] compile-flags: -C relocation-model=static +//@ [direct] compile-flags: -C relocation-model=static -Z direct-access-external-data=yes +//@ [indirect] compile-flags: -C relocation-model=static -Z direct-access-external-data=no #![crate_type = "rlib"] -// DEFAULT: @VAR = external {{.*}} global i32 -// DIRECT: @VAR = external dso_local {{.*}} global i32 -// INDIRECT: @VAR = external {{.*}} global i32 +// CHECK-DEFAULT: @VAR = external {{.*}} global i32 +// CHECK-DIRECT: @VAR = external dso_local {{.*}} global i32 +// CHECK-INDIRECT: @VAR = external {{.*}} global i32 extern "C" { static VAR: i32; diff --git a/tests/codegen/fewer-names.rs b/tests/codegen/fewer-names.rs index b14dd30482c59..1a8763db1499b 100644 --- a/tests/codegen/fewer-names.rs +++ b/tests/codegen/fewer-names.rs @@ -1,19 +1,19 @@ //@ compile-flags: -Coverflow-checks=no -O -//@ revisions: YES NO -//@ [YES]compile-flags: -Zfewer-names=yes -//@ [NO] compile-flags: -Zfewer-names=no +//@ revisions: yes no +//@ [yes]compile-flags: -Zfewer-names=yes +//@ [no] compile-flags: -Zfewer-names=no #![crate_type = "lib"] #[no_mangle] pub fn sum(x: u32, y: u32) -> u32 { - // YES-LABEL: define{{.*}}i32 @sum(i32 noundef %0, i32 noundef %1) - // YES-NEXT: %3 = add i32 %1, %0 - // YES-NEXT: ret i32 %3 + // CHECK-YES-LABEL: define{{.*}}i32 @sum(i32 noundef %0, i32 noundef %1) + // CHECK-YES-NEXT: %3 = add i32 %1, %0 + // CHECK-YES-NEXT: ret i32 %3 - // NO-LABEL: define{{.*}}i32 @sum(i32 noundef %x, i32 noundef %y) - // NO-NEXT: start: - // NO-NEXT: %z = add i32 %y, %x - // NO-NEXT: ret i32 %z + // CHECK-NO-LABEL: define{{.*}}i32 @sum(i32 noundef %x, i32 noundef %y) + // CHECK-NO-NEXT: start: + // CHECK-NO-NEXT: %z = add i32 %y, %x + // CHECK-NO-NEXT: ret i32 %z let z = x + y; z } diff --git a/tests/codegen/fixed-x18.rs b/tests/codegen/fixed-x18.rs index 4997a39a7263d..a4b31ce5e049d 100644 --- a/tests/codegen/fixed-x18.rs +++ b/tests/codegen/fixed-x18.rs @@ -17,6 +17,6 @@ trait Sized {} pub fn foo() { // CHECK: @foo() unnamed_addr #0 - // unset-NOT: attributes #0 = { {{.*}}"target-features"="{{[^"]*}}+reserve-x18{{.*}} } - // set: attributes #0 = { {{.*}}"target-features"="{{[^"]*}}+reserve-x18{{.*}} } + // CHECK-UNSET-NOT: attributes #0 = { {{.*}}"target-features"="{{[^"]*}}+reserve-x18{{.*}} } + // CHECK-SET: attributes #0 = { {{.*}}"target-features"="{{[^"]*}}+reserve-x18{{.*}} } } diff --git a/tests/codegen/float/f128.rs b/tests/codegen/float/f128.rs index 80b572fbbc9f7..f5594cd2e01ce 100644 --- a/tests/codegen/float/f128.rs +++ b/tests/codegen/float/f128.rs @@ -143,16 +143,16 @@ pub fn f128_as_f16(a: f128) -> f16 { a as f16 } -// other-LABEL: float @f128_as_f32( -// x86-LABEL: i32 @f128_as_f32( +// CHECK-OTHER-LABEL: float @f128_as_f32( +// CHECK-X86-LABEL: i32 @f128_as_f32( #[no_mangle] pub fn f128_as_f32(a: f128) -> f32 { // CHECK: fptrunc fp128 %{{.+}} to float a as f32 } -// other-LABEL: double @f128_as_f64( -// x86-LABEL: void @f128_as_f64( +// CHECK-OTHER-LABEL: double @f128_as_f64( +// CHECK-X86-LABEL: void @f128_as_f64( #[no_mangle] pub fn f128_as_f64(a: f128) -> f64 { // CHECK: fptrunc fp128 %{{.+}} to double diff --git a/tests/codegen/float/f16.rs b/tests/codegen/float/f16.rs index 2910d7d3e928d..10e5f066008d3 100644 --- a/tests/codegen/float/f16.rs +++ b/tests/codegen/float/f16.rs @@ -145,16 +145,16 @@ pub fn f16_as_self(a: f16) -> f16 { a as f16 } -// other-LABEL: float @f16_as_f32( -// x86-LABEL: i32 @f16_as_f32( +// CHECK-OTHER-LABEL: float @f16_as_f32( +// CHECK-X86-LABEL: i32 @f16_as_f32( #[no_mangle] pub fn f16_as_f32(a: f16) -> f32 { // CHECK: fpext half %{{.+}} to float a as f32 } -// other-LABEL: double @f16_as_f64( -// x86-LABEL: void @f16_as_f64( +// CHECK-OTHER-LABEL: double @f16_as_f64( +// CHECK-X86-LABEL: void @f16_as_f64( #[no_mangle] pub fn f16_as_f64(a: f16) -> f64 { // CHECK: fpext half %{{.+}} to double diff --git a/tests/codegen/fn-impl-trait-self.rs b/tests/codegen/fn-impl-trait-self.rs index 5799d23b5a03a..268421acbf134 100644 --- a/tests/codegen/fn-impl-trait-self.rs +++ b/tests/codegen/fn-impl-trait-self.rs @@ -2,8 +2,8 @@ //@ ignore-wasi wasi codegens the main symbol differently // // CHECK-LABEL: @main -// MSVC: {{.*}}DIDerivedType(tag: DW_TAG_pointer_type, name: "recursive_type$ (*)()",{{.*}} -// NONMSVC: {{.*}}DIDerivedType(tag: DW_TAG_pointer_type, name: "fn() -> ",{{.*}} +// CHECK-MSVC: {{.*}}DIDerivedType(tag: DW_TAG_pointer_type, name: "recursive_type$ (*)()",{{.*}} +// CHECK-NONMSVC: {{.*}}DIDerivedType(tag: DW_TAG_pointer_type, name: "fn() -> ",{{.*}} // // CHECK: {{.*}}DISubroutineType{{.*}} // CHECK: {{.*}}DIBasicType(name: "", size: {{32|64}}, encoding: DW_ATE_unsigned) diff --git a/tests/codegen/force-frame-pointers.rs b/tests/codegen/force-frame-pointers.rs index 88c918945d6ea..c8811dd5e451d 100644 --- a/tests/codegen/force-frame-pointers.rs +++ b/tests/codegen/force-frame-pointers.rs @@ -1,18 +1,18 @@ -//@ revisions: Always NonLeaf -//@ [Always] compile-flags: -Cforce-frame-pointers=yes -//@ [NonLeaf] compile-flags: -Cforce-frame-pointers=non-leaf +//@ revisions: always nonleaf +//@ [always] compile-flags: -Cforce-frame-pointers=yes +//@ [nonleaf] compile-flags: -Cforce-frame-pointers=non-leaf //@ compile-flags: -Zunstable-options //@ compile-flags: -C no-prepopulate-passes -Copt-level=0 -//@ [NonLeaf] ignore-illumos -//@ [NonLeaf] ignore-openbsd -//@ [NonLeaf] ignore-x86 -//@ [NonLeaf] ignore-x86_64-apple-darwin -//@ [NonLeaf] ignore-windows-gnu -//@ [NonLeaf] ignore-thumb +//@ [nonleaf] ignore-illumos +//@ [nonleaf] ignore-openbsd +//@ [nonleaf] ignore-x86 +//@ [nonleaf] ignore-x86_64-apple-darwin +//@ [nonleaf] ignore-windows-gnu +//@ [nonleaf] ignore-thumb // result is platform-dependent based on platform's frame pointer settings #![crate_type = "lib"] -// Always: attributes #{{.*}} "frame-pointer"="all" -// NonLeaf: attributes #{{.*}} "frame-pointer"="non-leaf" +// CHECK-ALWAYS: attributes #{{.*}} "frame-pointer"="all" +// CHECK-NONLEAF: attributes #{{.*}} "frame-pointer"="non-leaf" pub fn foo() {} diff --git a/tests/codegen/frame-pointer.rs b/tests/codegen/frame-pointer.rs index da81c2e9cd9aa..f104aae31b548 100644 --- a/tests/codegen/frame-pointer.rs +++ b/tests/codegen/frame-pointer.rs @@ -26,9 +26,9 @@ pub fn peach(x: u32) -> u32 { } // CHECK: attributes [[PEACH_ATTRS]] = { -// x64-linux-NOT: {{.*}}"frame-pointer"{{.*}} -// aarch64-linux-NOT: {{.*}}"frame-pointer"{{.*}} -// x64-apple-SAME: {{.*}}"frame-pointer"="all" -// force-SAME: {{.*}}"frame-pointer"="all" -// aarch64-apple-SAME: {{.*}}"frame-pointer"="non-leaf" +// CHECK-X64-LINUX-NOT: {{.*}}"frame-pointer"{{.*}} +// CHECK-AARCH64-LINUX-NOT: {{.*}}"frame-pointer"{{.*}} +// CHECK-X64-APPLE-SAME: {{.*}}"frame-pointer"="all" +// CHECK-FORCE-SAME: {{.*}}"frame-pointer"="all" +// CHECK-AARCH64-APPLE-SAME: {{.*}}"frame-pointer"="non-leaf" // CHECK-SAME: } diff --git a/tests/codegen/function-return.rs b/tests/codegen/function-return.rs index 0ca1a41ee8679..92fa789d0ad6a 100644 --- a/tests/codegen/function-return.rs +++ b/tests/codegen/function-return.rs @@ -20,9 +20,9 @@ trait Sized {} pub fn foo() { // CHECK: @foo() unnamed_addr #0 - // unset-NOT: fn_ret_thunk_extern - // keep-NOT: fn_ret_thunk_extern - // thunk-extern: attributes #0 = { {{.*}}fn_ret_thunk_extern{{.*}} } - // keep-thunk-extern: attributes #0 = { {{.*}}fn_ret_thunk_extern{{.*}} } - // thunk-extern-keep-NOT: fn_ret_thunk_extern + // CHECK-UNSET-NOT: fn_ret_thunk_extern + // CHECK-KEEP-NOT: fn_ret_thunk_extern + // CHECK-THUNK-EXTERN: attributes #0 = { {{.*}}fn_ret_thunk_extern{{.*}} } + // CHECK-KEEP-THUNK-EXTERN: attributes #0 = { {{.*}}fn_ret_thunk_extern{{.*}} } + // CHECK-THUNK-EXTERN-KEEP-NOT: fn_ret_thunk_extern } diff --git a/tests/codegen/inherit_overflow.rs b/tests/codegen/inherit_overflow.rs index e4a5ef39fc548..7b7d941f312a1 100644 --- a/tests/codegen/inherit_overflow.rs +++ b/tests/codegen/inherit_overflow.rs @@ -1,11 +1,11 @@ //@ compile-flags: -Zmir-enable-passes=+Inline,+GVN --crate-type lib -//@ revisions: ASSERT NOASSERT -//@[ASSERT] compile-flags: -Coverflow-checks=on -//@[NOASSERT] compile-flags: -Coverflow-checks=off +//@ revisions: assert noassert +//@[assert] compile-flags: -Coverflow-checks=on +//@[noassert] compile-flags: -Coverflow-checks=off // CHECK-LABEL: define{{.*}} @assertion -// ASSERT: call void @{{.*4core9panicking11panic_const24panic_const_add_overflow}} -// NOASSERT: ret i8 0 +// CHECK-ASSERT: call void @{{.*4core9panicking11panic_const24panic_const_add_overflow}} +// CHECK-NOASSERT: ret i8 0 #[no_mangle] pub fn assertion() -> u8 { // Optimized MIR will replace this `CheckedBinaryOp` by `const (0, true)`. diff --git a/tests/codegen/inline-always-works-always.rs b/tests/codegen/inline-always-works-always.rs index 07200fd9e373a..8178c2c78c97e 100644 --- a/tests/codegen/inline-always-works-always.rs +++ b/tests/codegen/inline-always-works-always.rs @@ -1,7 +1,7 @@ -//@ revisions: NO-OPT SIZE-OPT SPEED-OPT -//@[NO-OPT] compile-flags: -Copt-level=0 -//@[SIZE-OPT] compile-flags: -Copt-level=s -//@[SPEED-OPT] compile-flags: -Copt-level=3 +//@ revisions: no-opt size-opt speed-opt +//@[no-opt] compile-flags: -Copt-level=0 +//@[size-opt] compile-flags: -Copt-level=s +//@[speed-opt] compile-flags: -Copt-level=3 #![crate_type = "rlib"] @@ -12,9 +12,9 @@ pub extern "C" fn callee() -> u32 { } // CHECK-LABEL: caller -// SIZE-OPT: ret i32 8 -// SPEED-OPT: ret i32 8 -// NO-OPT: ret i32 8 +// CHECK-SIZE-OPT: ret i32 8 +// CHECK-SPEED-OPT: ret i32 8 +// CHECK-NO-OPT: ret i32 8 #[no_mangle] pub extern "C" fn caller() -> u32 { callee() diff --git a/tests/codegen/instrument-coverage/instrument-coverage-off.rs b/tests/codegen/instrument-coverage/instrument-coverage-off.rs index e44d6c6587480..885ca19123f69 100644 --- a/tests/codegen/instrument-coverage/instrument-coverage-off.rs +++ b/tests/codegen/instrument-coverage/instrument-coverage-off.rs @@ -16,6 +16,7 @@ #[inline(never)] fn some_function() {} +// CHECK: some_other_function pub fn some_other_function() { some_function(); } diff --git a/tests/codegen/instrument-coverage/testprog.rs b/tests/codegen/instrument-coverage/testprog.rs index eea4d9cb3cf05..8b30fabac72ba 100644 --- a/tests/codegen/instrument-coverage/testprog.rs +++ b/tests/codegen/instrument-coverage/testprog.rs @@ -1,31 +1,31 @@ //@ edition: 2021 //@ compile-flags: -Zno-profiler-runtime //@ compile-flags: -Cinstrument-coverage -Copt-level=0 -//@ revisions: LINUX DARWIN WINDOWS - -//@ [LINUX] only-linux -//@ [LINUX] filecheck-flags: -DINSTR_PROF_DATA=__llvm_prf_data -//@ [LINUX] filecheck-flags: -DINSTR_PROF_NAME=__llvm_prf_names -//@ [LINUX] filecheck-flags: -DINSTR_PROF_CNTS=__llvm_prf_cnts -//@ [LINUX] filecheck-flags: -DINSTR_PROF_COVMAP=__llvm_covmap -//@ [LINUX] filecheck-flags: -DINSTR_PROF_COVFUN=__llvm_covfun -//@ [LINUX] filecheck-flags: '-DCOMDAT_IF_SUPPORTED=, comdat' - -//@ [DARWIN] only-apple -//@ [DARWIN] filecheck-flags: -DINSTR_PROF_DATA=__DATA,__llvm_prf_data,regular,live_support -//@ [DARWIN] filecheck-flags: -DINSTR_PROF_NAME=__DATA,__llvm_prf_names -//@ [DARWIN] filecheck-flags: -DINSTR_PROF_CNTS=__DATA,__llvm_prf_cnts -//@ [DARWIN] filecheck-flags: -DINSTR_PROF_COVMAP=__LLVM_COV,__llvm_covmap -//@ [DARWIN] filecheck-flags: -DINSTR_PROF_COVFUN=__LLVM_COV,__llvm_covfun -//@ [DARWIN] filecheck-flags: -DCOMDAT_IF_SUPPORTED= - -//@ [WINDOWS] only-windows -//@ [WINDOWS] filecheck-flags: -DINSTR_PROF_DATA=.lprfd$M -//@ [WINDOWS] filecheck-flags: -DINSTR_PROF_NAME=.lprfn$M -//@ [WINDOWS] filecheck-flags: -DINSTR_PROF_CNTS=.lprfc$M -//@ [WINDOWS] filecheck-flags: -DINSTR_PROF_COVMAP=.lcovmap$M -//@ [WINDOWS] filecheck-flags: -DINSTR_PROF_COVFUN=.lcovfun$M -//@ [WINDOWS] filecheck-flags: '-DCOMDAT_IF_SUPPORTED=, comdat' +//@ revisions: linux darwin windows + +//@ [linux] only-linux +//@ [linux] filecheck-flags: -DINSTR_PROF_DATA=__llvm_prf_data +//@ [linux] filecheck-flags: -DINSTR_PROF_NAME=__llvm_prf_names +//@ [linux] filecheck-flags: -DINSTR_PROF_CNTS=__llvm_prf_cnts +//@ [linux] filecheck-flags: -DINSTR_PROF_COVMAP=__llvm_covmap +//@ [linux] filecheck-flags: -DINSTR_PROF_COVFUN=__llvm_covfun +//@ [linux] filecheck-flags: '-DCOMDAT_IF_SUPPORTED=, comdat' + +//@ [darwin] only-apple +//@ [darwin] filecheck-flags: -DINSTR_PROF_DATA=__DATA,__llvm_prf_data,regular,live_support +//@ [darwin] filecheck-flags: -DINSTR_PROF_NAME=__DATA,__llvm_prf_names +//@ [darwin] filecheck-flags: -DINSTR_PROF_CNTS=__DATA,__llvm_prf_cnts +//@ [darwin] filecheck-flags: -DINSTR_PROF_COVMAP=__LLVM_COV,__llvm_covmap +//@ [darwin] filecheck-flags: -DINSTR_PROF_COVFUN=__LLVM_COV,__llvm_covfun +//@ [darwin] filecheck-flags: -DCOMDAT_IF_SUPPORTED= + +//@ [windows] only-windows +//@ [windows] filecheck-flags: -DINSTR_PROF_DATA=.lprfd$M +//@ [windows] filecheck-flags: -DINSTR_PROF_NAME=.lprfn$M +//@ [windows] filecheck-flags: -DINSTR_PROF_CNTS=.lprfc$M +//@ [windows] filecheck-flags: -DINSTR_PROF_COVMAP=.lcovmap$M +//@ [windows] filecheck-flags: -DINSTR_PROF_COVFUN=.lcovfun$M +//@ [windows] filecheck-flags: '-DCOMDAT_IF_SUPPORTED=, comdat' // ignore-tidy-linelength @@ -71,50 +71,50 @@ fn main() { // Check for metadata, variables, declarations, and function definitions injected // into LLVM IR when compiling with -Cinstrument-coverage. -// WINDOWS: $__llvm_profile_runtime_user = comdat any +// CHECK-WINDOWS: $__llvm_profile_runtime_user = comdat any -// CHECK: @__llvm_coverage_mapping = private constant -// CHECK-SAME: section "[[INSTR_PROF_COVMAP]]", align 8 +// CHECK: @__llvm_coverage_mapping = private constant +// CHECK-SAME: section "[[INSTR_PROF_COVMAP]]", align 8 -// CHECK: @__covrec_{{[A-F0-9]+}}u = linkonce_odr hidden constant -// CHECK-SAME: section "[[INSTR_PROF_COVFUN]]"[[COMDAT_IF_SUPPORTED]], align 8 +// CHECK: @__covrec_{{[A-F0-9]+}}u = linkonce_odr hidden constant +// CHECK-SAME: section "[[INSTR_PROF_COVFUN]]"[[COMDAT_IF_SUPPORTED]], align 8 -// WINDOWS: @__llvm_profile_runtime = external{{.*}}global i32 +// CHECK-WINDOWS: @__llvm_profile_runtime = external{{.*}}global i32 -// CHECK: @__profc__R{{[a-zA-Z0-9_]+}}testprog14will_be_called = {{private|internal}} global -// CHECK-SAME: section "[[INSTR_PROF_CNTS]]"{{.*}}, align 8 +// CHECK: @__profc__R{{[a-zA-Z0-9_]+}}testprog14will_be_called = {{private|internal}} global +// CHECK-SAME: section "[[INSTR_PROF_CNTS]]"{{.*}}, align 8 -// CHECK: @__profd__R{{[a-zA-Z0-9_]+}}testprog14will_be_called = {{private|internal}} global -// CHECK-SAME: @__profc__R{{[a-zA-Z0-9_]+}}testprog14will_be_called -// CHECK-SAME: section "[[INSTR_PROF_DATA]]"{{.*}}, align 8 +// CHECK: @__profd__R{{[a-zA-Z0-9_]+}}testprog14will_be_called = {{private|internal}} global +// CHECK-SAME: @__profc__R{{[a-zA-Z0-9_]+}}testprog14will_be_called +// CHECK-SAME: section "[[INSTR_PROF_DATA]]"{{.*}}, align 8 -// CHECK: @__profc__R{{[a-zA-Z0-9_]+}}testprog4main = {{private|internal}} global -// CHECK-SAME: section "[[INSTR_PROF_CNTS]]"{{.*}}, align 8 +// CHECK: @__profc__R{{[a-zA-Z0-9_]+}}testprog4main = {{private|internal}} global +// CHECK-SAME: section "[[INSTR_PROF_CNTS]]"{{.*}}, align 8 -// CHECK: @__profd__R{{[a-zA-Z0-9_]+}}testprog4main = {{private|internal}} global -// CHECK-SAME: @__profc__R{{[a-zA-Z0-9_]+}}testprog4main -// CHECK-SAME: section "[[INSTR_PROF_DATA]]"{{.*}}, align 8 +// CHECK: @__profd__R{{[a-zA-Z0-9_]+}}testprog4main = {{private|internal}} global +// CHECK-SAME: @__profc__R{{[a-zA-Z0-9_]+}}testprog4main +// CHECK-SAME: section "[[INSTR_PROF_DATA]]"{{.*}}, align 8 -// CHECK: @__llvm_prf_nm = private constant -// CHECK-SAME: section "[[INSTR_PROF_NAME]]", align 1 +// CHECK: @__llvm_prf_nm = private constant +// CHECK-SAME: section "[[INSTR_PROF_NAME]]", align 1 -// CHECK: @llvm.used = appending global -// CHECK-SAME: @__llvm_coverage_mapping -// CHECK-SAME: @__llvm_prf_nm -// CHECK-SAME: section "llvm.metadata" +// CHECK: @llvm.used = appending global +// CHECK-SAME: @__llvm_coverage_mapping +// CHECK-SAME: @__llvm_prf_nm +// CHECK-SAME: section "llvm.metadata" -// CHECK: define internal { {{.*}} } @_R{{[a-zA-Z0-9_]+}}testprog14will_be_called() unnamed_addr #{{[0-9]+}} { -// CHECK-NEXT: start: -// CHECK-NOT: define internal -// CHECK: atomicrmw add ptr -// CHECK-SAME: @__profc__R{{[a-zA-Z0-9_]+}}testprog14will_be_called, +// CHECK: define internal { {{.*}} } @_R{{[a-zA-Z0-9_]+}}testprog14will_be_called() unnamed_addr #{{[0-9]+}} { +// CHECK-NEXT: start: +// CHECK-NOT: define internal +// CHECK: atomicrmw add ptr +// CHECK-SAME: @__profc__R{{[a-zA-Z0-9_]+}}testprog14will_be_called, -// CHECK: declare void @llvm.instrprof.increment(ptr, i64, i32, i32) #[[LLVM_INSTRPROF_INCREMENT_ATTR:[0-9]+]] +// CHECK: declare void @llvm.instrprof.increment(ptr, i64, i32, i32) #[[LLVM_INSTRPROF_INCREMENT_ATTR:[0-9]+]] -// WINDOWS: define linkonce_odr hidden i32 @__llvm_profile_runtime_user() #[[LLVM_PROFILE_RUNTIME_USER_ATTR:[0-9]+]] comdat { -// WINDOWS-NEXT: %1 = load i32, ptr @__llvm_profile_runtime -// WINDOWS-NEXT: ret i32 %1 -// WINDOWS-NEXT: } +// CHECK-WINDOWS: define linkonce_odr hidden i32 @__llvm_profile_runtime_user() #[[LLVM_PROFILE_RUNTIME_USER_ATTR:[0-9]+]] comdat { +// CHECK-WINDOWS-NEXT: %1 = load i32, ptr @__llvm_profile_runtime +// CHECK-WINDOWS-NEXT: ret i32 %1 +// CHECK-WINDOWS-NEXT: } -// CHECK: attributes #[[LLVM_INSTRPROF_INCREMENT_ATTR]] = { nounwind } -// WINDOWS: attributes #[[LLVM_PROFILE_RUNTIME_USER_ATTR]] = { noinline } +// CHECK: attributes #[[LLVM_INSTRPROF_INCREMENT_ATTR]] = { nounwind } +// CHECK-WINDOWS: attributes #[[LLVM_PROFILE_RUNTIME_USER_ATTR]] = { noinline } diff --git a/tests/codegen/intrinsics/compare_bytes.rs b/tests/codegen/intrinsics/compare_bytes.rs index cd592918fb0c2..df73dd16cb15c 100644 --- a/tests/codegen/intrinsics/compare_bytes.rs +++ b/tests/codegen/intrinsics/compare_bytes.rs @@ -1,7 +1,7 @@ -//@ revisions: INT32 INT16 +//@ revisions: int32 int16 //@ compile-flags: -O -//@ [INT32] ignore-16bit -//@ [INT16] only-16bit +//@ [int32] ignore-16bit +//@ [int16] only-16bit #![crate_type = "lib"] #![feature(core_intrinsics)] @@ -11,13 +11,13 @@ use std::intrinsics::compare_bytes; #[no_mangle] // CHECK-LABEL: @bytes_cmp( pub unsafe fn bytes_cmp(a: *const u8, b: *const u8, n: usize) -> i32 { - // INT32: %[[TEMP:.+]] = tail call i32 @memcmp(ptr %a, ptr %b, {{i32|i64}} %n) - // INT32-NOT: sext - // INT32: ret i32 %[[TEMP]] + // CHECK-INT32: %[[TEMP:.+]] = tail call i32 @memcmp(ptr %a, ptr %b, {{i32|i64}} %n) + // CHECK-INT32-NOT: sext + // CHECK-INT32: ret i32 %[[TEMP]] - // INT16: %[[TEMP1:.+]] = tail call i16 @memcmp(ptr %a, ptr %b, i16 %n) - // INT16: %[[TEMP2:.+]] = sext i16 %[[TEMP1]] to i32 - // INT16: ret i32 %[[TEMP2]] + // CHECK-INT16: %[[TEMP1:.+]] = tail call i16 @memcmp(ptr %a, ptr %b, i16 %n) + // CHECK-INT16: %[[TEMP2:.+]] = sext i16 %[[TEMP1]] to i32 + // CHECK-INT16: ret i32 %[[TEMP2]] compare_bytes(a, b, n) } @@ -28,7 +28,7 @@ pub unsafe fn bytes_cmp(a: *const u8, b: *const u8, n: usize) -> i32 { pub unsafe fn bytes_eq(a: *const u8, b: *const u8, n: usize) -> bool { // CHECK: call {{.+}} @{{bcmp|memcmp}}(ptr %a, ptr %b, {{i16|i32|i64}} %n) // CHECK-NOT: sext - // INT32: icmp eq i32 - // INT16: icmp eq i16 + // CHECK-INT32: icmp eq i32 + // CHECK-INT16: icmp eq i16 compare_bytes(a, b, n) == 0_i32 } diff --git a/tests/codegen/intrinsics/three_way_compare.rs b/tests/codegen/intrinsics/three_way_compare.rs index f3b631abc227e..8aed2b7e9eefb 100644 --- a/tests/codegen/intrinsics/three_way_compare.rs +++ b/tests/codegen/intrinsics/three_way_compare.rs @@ -1,6 +1,6 @@ -//@ revisions: DEBUG OPTIM -//@ [DEBUG] compile-flags: -C opt-level=0 -//@ [OPTIM] compile-flags: -C opt-level=3 +//@ revisions: debug optim +//@ [debug] compile-flags: -C opt-level=0 +//@ [optim] compile-flags: -C opt-level=3 //@ compile-flags: -C no-prepopulate-passes #![crate_type = "lib"] @@ -10,38 +10,38 @@ use std::intrinsics::three_way_compare; #[no_mangle] // CHECK-LABEL: @signed_cmp -// DEBUG-SAME: (i16 %a, i16 %b) -// OPTIM-SAME: (i16 noundef %a, i16 noundef %b) +// CHECK-DEBUG-SAME: (i16 %a, i16 %b) +// CHECK-OPTIM-SAME: (i16 noundef %a, i16 noundef %b) pub fn signed_cmp(a: i16, b: i16) -> std::cmp::Ordering { - // DEBUG: %[[GT:.+]] = icmp sgt i16 %a, %b - // DEBUG: %[[ZGT:.+]] = zext i1 %[[GT]] to i8 - // DEBUG: %[[LT:.+]] = icmp slt i16 %a, %b - // DEBUG: %[[ZLT:.+]] = zext i1 %[[LT]] to i8 - // DEBUG: %[[R:.+]] = sub nsw i8 %[[ZGT]], %[[ZLT]] + // CHECK-DEBUG: %[[GT:.+]] = icmp sgt i16 %a, %b + // CHECK-DEBUG: %[[ZGT:.+]] = zext i1 %[[GT]] to i8 + // CHECK-DEBUG: %[[LT:.+]] = icmp slt i16 %a, %b + // CHECK-DEBUG: %[[ZLT:.+]] = zext i1 %[[LT]] to i8 + // CHECK-DEBUG: %[[R:.+]] = sub nsw i8 %[[ZGT]], %[[ZLT]] - // OPTIM: %[[LT:.+]] = icmp slt i16 %a, %b - // OPTIM: %[[NE:.+]] = icmp ne i16 %a, %b - // OPTIM: %[[CGE:.+]] = select i1 %[[NE]], i8 1, i8 0 - // OPTIM: %[[CGEL:.+]] = select i1 %[[LT]], i8 -1, i8 %[[CGE]] - // OPTIM: ret i8 %[[CGEL]] + // CHECK-OPTIM: %[[LT:.+]] = icmp slt i16 %a, %b + // CHECK-OPTIM: %[[NE:.+]] = icmp ne i16 %a, %b + // CHECK-OPTIM: %[[CGE:.+]] = select i1 %[[NE]], i8 1, i8 0 + // CHECK-OPTIM: %[[CGEL:.+]] = select i1 %[[LT]], i8 -1, i8 %[[CGE]] + // CHECK-OPTIM: ret i8 %[[CGEL]] three_way_compare(a, b) } #[no_mangle] // CHECK-LABEL: @unsigned_cmp -// DEBUG-SAME: (i16 %a, i16 %b) -// OPTIM-SAME: (i16 noundef %a, i16 noundef %b) +// CHECK-DEBUG-SAME: (i16 %a, i16 %b) +// CHECK-OPTIM-SAME: (i16 noundef %a, i16 noundef %b) pub fn unsigned_cmp(a: u16, b: u16) -> std::cmp::Ordering { - // DEBUG: %[[GT:.+]] = icmp ugt i16 %a, %b - // DEBUG: %[[ZGT:.+]] = zext i1 %[[GT]] to i8 - // DEBUG: %[[LT:.+]] = icmp ult i16 %a, %b - // DEBUG: %[[ZLT:.+]] = zext i1 %[[LT]] to i8 - // DEBUG: %[[R:.+]] = sub nsw i8 %[[ZGT]], %[[ZLT]] + // CHECK-DEBUG: %[[GT:.+]] = icmp ugt i16 %a, %b + // CHECK-DEBUG: %[[ZGT:.+]] = zext i1 %[[GT]] to i8 + // CHECK-DEBUG: %[[LT:.+]] = icmp ult i16 %a, %b + // CHECK-DEBUG: %[[ZLT:.+]] = zext i1 %[[LT]] to i8 + // CHECK-DEBUG: %[[R:.+]] = sub nsw i8 %[[ZGT]], %[[ZLT]] - // OPTIM: %[[LT:.+]] = icmp ult i16 %a, %b - // OPTIM: %[[NE:.+]] = icmp ne i16 %a, %b - // OPTIM: %[[CGE:.+]] = select i1 %[[NE]], i8 1, i8 0 - // OPTIM: %[[CGEL:.+]] = select i1 %[[LT]], i8 -1, i8 %[[CGE]] - // OPTIM: ret i8 %[[CGEL]] + // CHECK-OPTIM: %[[LT:.+]] = icmp ult i16 %a, %b + // CHECK-OPTIM: %[[NE:.+]] = icmp ne i16 %a, %b + // CHECK-OPTIM: %[[CGE:.+]] = select i1 %[[NE]], i8 1, i8 0 + // CHECK-OPTIM: %[[CGEL:.+]] = select i1 %[[LT]], i8 -1, i8 %[[CGE]] + // CHECK-OPTIM: ret i8 %[[CGEL]] three_way_compare(a, b) } diff --git a/tests/codegen/intrinsics/transmute-niched.rs b/tests/codegen/intrinsics/transmute-niched.rs index f5b7bd2efea8e..8b0914ce7dbe7 100644 --- a/tests/codegen/intrinsics/transmute-niched.rs +++ b/tests/codegen/intrinsics/transmute-niched.rs @@ -1,6 +1,6 @@ -//@ revisions: OPT DBG -//@ [OPT] compile-flags: -C opt-level=3 -C no-prepopulate-passes -//@ [DBG] compile-flags: -C opt-level=0 -C no-prepopulate-passes +//@ revisions: opt dbg +//@ [opt] compile-flags: -C opt-level=3 -C no-prepopulate-passes +//@ [dbg] compile-flags: -C opt-level=0 -C no-prepopulate-passes //@ only-64bit (so I don't need to worry about usize) #![crate_type = "lib"] @@ -17,12 +17,12 @@ pub enum SmallEnum { // CHECK-LABEL: @check_to_enum( #[no_mangle] pub unsafe fn check_to_enum(x: i8) -> SmallEnum { - // OPT: %0 = icmp uge i8 %x, 10 - // OPT: call void @llvm.assume(i1 %0) - // OPT: %1 = icmp ule i8 %x, 12 - // OPT: call void @llvm.assume(i1 %1) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp uge i8 %x, 10 + // CHECK-OPT: call void @llvm.assume(i1 %0) + // CHECK-OPT: %1 = icmp ule i8 %x, 12 + // CHECK-OPT: call void @llvm.assume(i1 %1) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: ret i8 %x transmute(x) @@ -31,12 +31,12 @@ pub unsafe fn check_to_enum(x: i8) -> SmallEnum { // CHECK-LABEL: @check_from_enum( #[no_mangle] pub unsafe fn check_from_enum(x: SmallEnum) -> i8 { - // OPT: %0 = icmp uge i8 %x, 10 - // OPT: call void @llvm.assume(i1 %0) - // OPT: %1 = icmp ule i8 %x, 12 - // OPT: call void @llvm.assume(i1 %1) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp uge i8 %x, 10 + // CHECK-OPT: call void @llvm.assume(i1 %0) + // CHECK-OPT: %1 = icmp ule i8 %x, 12 + // CHECK-OPT: call void @llvm.assume(i1 %1) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: ret i8 %x transmute(x) @@ -45,12 +45,12 @@ pub unsafe fn check_from_enum(x: SmallEnum) -> i8 { // CHECK-LABEL: @check_to_ordering( #[no_mangle] pub unsafe fn check_to_ordering(x: u8) -> std::cmp::Ordering { - // OPT: %0 = icmp uge i8 %x, -1 - // OPT: %1 = icmp ule i8 %x, 1 - // OPT: %2 = or i1 %0, %1 - // OPT: call void @llvm.assume(i1 %2) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp uge i8 %x, -1 + // CHECK-OPT: %1 = icmp ule i8 %x, 1 + // CHECK-OPT: %2 = or i1 %0, %1 + // CHECK-OPT: call void @llvm.assume(i1 %2) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: ret i8 %x transmute(x) @@ -59,12 +59,12 @@ pub unsafe fn check_to_ordering(x: u8) -> std::cmp::Ordering { // CHECK-LABEL: @check_from_ordering( #[no_mangle] pub unsafe fn check_from_ordering(x: std::cmp::Ordering) -> u8 { - // OPT: %0 = icmp uge i8 %x, -1 - // OPT: %1 = icmp ule i8 %x, 1 - // OPT: %2 = or i1 %0, %1 - // OPT: call void @llvm.assume(i1 %2) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp uge i8 %x, -1 + // CHECK-OPT: %1 = icmp ule i8 %x, 1 + // CHECK-OPT: %2 = or i1 %0, %1 + // CHECK-OPT: call void @llvm.assume(i1 %2) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: ret i8 %x transmute(x) @@ -98,14 +98,14 @@ pub enum Minus100ToPlus100 { // CHECK-LABEL: @check_enum_from_char( #[no_mangle] pub unsafe fn check_enum_from_char(x: char) -> Minus100ToPlus100 { - // OPT: %0 = icmp ule i32 %x, 1114111 - // OPT: call void @llvm.assume(i1 %0) - // OPT: %1 = icmp uge i32 %x, -100 - // OPT: %2 = icmp ule i32 %x, 100 - // OPT: %3 = or i1 %1, %2 - // OPT: call void @llvm.assume(i1 %3) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp ule i32 %x, 1114111 + // CHECK-OPT: call void @llvm.assume(i1 %0) + // CHECK-OPT: %1 = icmp uge i32 %x, -100 + // CHECK-OPT: %2 = icmp ule i32 %x, 100 + // CHECK-OPT: %3 = or i1 %1, %2 + // CHECK-OPT: call void @llvm.assume(i1 %3) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: ret i32 %x transmute(x) @@ -114,14 +114,14 @@ pub unsafe fn check_enum_from_char(x: char) -> Minus100ToPlus100 { // CHECK-LABEL: @check_enum_to_char( #[no_mangle] pub unsafe fn check_enum_to_char(x: Minus100ToPlus100) -> char { - // OPT: %0 = icmp uge i32 %x, -100 - // OPT: %1 = icmp ule i32 %x, 100 - // OPT: %2 = or i1 %0, %1 - // OPT: call void @llvm.assume(i1 %2) - // OPT: %3 = icmp ule i32 %x, 1114111 - // OPT: call void @llvm.assume(i1 %3) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp uge i32 %x, -100 + // CHECK-OPT: %1 = icmp ule i32 %x, 100 + // CHECK-OPT: %2 = or i1 %0, %1 + // CHECK-OPT: call void @llvm.assume(i1 %2) + // CHECK-OPT: %3 = icmp ule i32 %x, 1114111 + // CHECK-OPT: call void @llvm.assume(i1 %3) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: ret i32 %x transmute(x) @@ -130,16 +130,16 @@ pub unsafe fn check_enum_to_char(x: Minus100ToPlus100) -> char { // CHECK-LABEL: @check_swap_pair( #[no_mangle] pub unsafe fn check_swap_pair(x: (char, NonZero)) -> (NonZero, char) { - // OPT: %0 = icmp ule i32 %x.0, 1114111 - // OPT: call void @llvm.assume(i1 %0) - // OPT: %1 = icmp uge i32 %x.0, 1 - // OPT: call void @llvm.assume(i1 %1) - // OPT: %2 = icmp uge i32 %x.1, 1 - // OPT: call void @llvm.assume(i1 %2) - // OPT: %3 = icmp ule i32 %x.1, 1114111 - // OPT: call void @llvm.assume(i1 %3) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp ule i32 %x.0, 1114111 + // CHECK-OPT: call void @llvm.assume(i1 %0) + // CHECK-OPT: %1 = icmp uge i32 %x.0, 1 + // CHECK-OPT: call void @llvm.assume(i1 %1) + // CHECK-OPT: %2 = icmp uge i32 %x.1, 1 + // CHECK-OPT: call void @llvm.assume(i1 %2) + // CHECK-OPT: %3 = icmp ule i32 %x.1, 1114111 + // CHECK-OPT: call void @llvm.assume(i1 %3) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: %[[P1:.+]] = insertvalue { i32, i32 } poison, i32 %x.0, 0 // CHECK: %[[P2:.+]] = insertvalue { i32, i32 } %[[P1]], i32 %x.1, 1 // CHECK: ret { i32, i32 } %[[P2]] @@ -150,14 +150,14 @@ pub unsafe fn check_swap_pair(x: (char, NonZero)) -> (NonZero, char) { // CHECK-LABEL: @check_bool_from_ordering( #[no_mangle] pub unsafe fn check_bool_from_ordering(x: std::cmp::Ordering) -> bool { - // OPT: %0 = icmp uge i8 %x, -1 - // OPT: %1 = icmp ule i8 %x, 1 - // OPT: %2 = or i1 %0, %1 - // OPT: call void @llvm.assume(i1 %2) - // OPT: %3 = icmp ule i8 %x, 1 - // OPT: call void @llvm.assume(i1 %3) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp uge i8 %x, -1 + // CHECK-OPT: %1 = icmp ule i8 %x, 1 + // CHECK-OPT: %2 = or i1 %0, %1 + // CHECK-OPT: call void @llvm.assume(i1 %2) + // CHECK-OPT: %3 = icmp ule i8 %x, 1 + // CHECK-OPT: call void @llvm.assume(i1 %3) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: %[[R:.+]] = trunc i8 %x to i1 // CHECK: ret i1 %[[R]] @@ -168,14 +168,14 @@ pub unsafe fn check_bool_from_ordering(x: std::cmp::Ordering) -> bool { #[no_mangle] pub unsafe fn check_bool_to_ordering(x: bool) -> std::cmp::Ordering { // CHECK: %_0 = zext i1 %x to i8 - // OPT: %0 = icmp ule i8 %_0, 1 - // OPT: call void @llvm.assume(i1 %0) - // OPT: %1 = icmp uge i8 %_0, -1 - // OPT: %2 = icmp ule i8 %_0, 1 - // OPT: %3 = or i1 %1, %2 - // OPT: call void @llvm.assume(i1 %3) - // DBG-NOT: icmp - // DBG-NOT: assume + // CHECK-OPT: %0 = icmp ule i8 %_0, 1 + // CHECK-OPT: call void @llvm.assume(i1 %0) + // CHECK-OPT: %1 = icmp uge i8 %_0, -1 + // CHECK-OPT: %2 = icmp ule i8 %_0, 1 + // CHECK-OPT: %3 = or i1 %1, %2 + // CHECK-OPT: call void @llvm.assume(i1 %3) + // CHECK-DBG-NOT: icmp + // CHECK-DBG-NOT: assume // CHECK: ret i8 %_0 transmute(x) diff --git a/tests/codegen/intrinsics/typed_swap.rs b/tests/codegen/intrinsics/typed_swap.rs index e73931d1d547e..fc6b92c724937 100644 --- a/tests/codegen/intrinsics/typed_swap.rs +++ b/tests/codegen/intrinsics/typed_swap.rs @@ -1,6 +1,6 @@ -//@ revisions: OPT0 OPT3 -//@ [OPT0] compile-flags: -Copt-level=0 -//@ [OPT3] compile-flags: -Copt-level=3 +//@ revisions: opt0 opt3 +//@ [opt0] compile-flags: -Copt-level=0 +//@ [opt3] compile-flags: -Copt-level=3 //@ compile-flags: -C no-prepopulate-passes //@ only-64bit (so I don't need to worry about usize) // ignore-tidy-linelength (the memcpy calls get long) @@ -24,12 +24,12 @@ pub unsafe fn swap_i32(x: &mut i32, y: &mut i32) { // CHECK-NOT: alloca // CHECK: %[[TEMP:.+]] = load i32, ptr %x, align 4 - // OPT3-SAME: !noundef - // OPT0: %[[TEMP2:.+]] = load i32, ptr %y, align 4 - // OPT0: store i32 %[[TEMP2]], ptr %x, align 4 - // OPT0-NOT: memcpy - // OPT3-NOT: load - // OPT3: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %x, ptr align 4 %y, i64 4, i1 false) + // CHECK-OPT3-SAME: !noundef + // CHECK-OPT0: %[[TEMP2:.+]] = load i32, ptr %y, align 4 + // CHECK-OPT0: store i32 %[[TEMP2]], ptr %x, align 4 + // CHECK-OPT0-NOT: memcpy + // CHECK-OPT3-NOT: load + // CHECK-OPT3: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %x, ptr align 4 %y, i64 4, i1 false) // CHECK: store i32 %[[TEMP]], ptr %y, align 4 // CHECK: ret void typed_swap(x, y) @@ -41,9 +41,9 @@ pub unsafe fn swap_pair(x: &mut (i32, u32), y: &mut (i32, u32)) { // CHECK-NOT: alloca // CHECK: load i32 - // OPT3-SAME: !noundef + // CHECK-OPT3-SAME: !noundef // CHECK: load i32 - // OPT3-SAME: !noundef + // CHECK-OPT3-SAME: !noundef // CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 4 %x, ptr align 4 %y, i64 8, i1 false) // CHECK: store i32 // CHECK: store i32 @@ -56,22 +56,22 @@ pub unsafe fn swap_str<'a>(x: &mut &'a str, y: &mut &'a str) { // CHECK-NOT: alloca // CHECK: load ptr - // OPT3-SAME: !nonnull - // OPT3-SAME: !noundef + // CHECK-OPT3-SAME: !nonnull + // CHECK-OPT3-SAME: !noundef // CHECK: load i64 - // OPT3-SAME: !noundef + // CHECK-OPT3-SAME: !noundef // CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %x, ptr align 8 %y, i64 16, i1 false) // CHECK: store ptr // CHECK: store i64 typed_swap(x, y) } -// OPT0-LABEL: @swap_string( +// CHECK-OPT0-LABEL: @swap_string( #[no_mangle] pub unsafe fn swap_string(x: &mut String, y: &mut String) { - // OPT0: %[[TEMP:.+]] = alloca {{.+}}, align 8 - // OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %[[TEMP]], ptr align 8 %x, i64 24, i1 false) - // OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %x, ptr align 8 %y, i64 24, i1 false) - // OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %y, ptr align 8 %[[TEMP]], i64 24, i1 false) + // CHECK-OPT0: %[[TEMP:.+]] = alloca {{.+}}, align 8 + // CHECK-OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %[[TEMP]], ptr align 8 %x, i64 24, i1 false) + // CHECK-OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %x, ptr align 8 %y, i64 24, i1 false) + // CHECK-OPT0: call void @llvm.memcpy.p0.p0.i64(ptr align 8 %y, ptr align 8 %[[TEMP]], i64 24, i1 false) typed_swap(x, y) } diff --git a/tests/codegen/issues/issue-122805.rs b/tests/codegen/issues/issue-122805.rs index 8e03c6c8884a5..74dbb746eafc0 100644 --- a/tests/codegen/issues/issue-122805.rs +++ b/tests/codegen/issues/issue-122805.rs @@ -1,11 +1,11 @@ -//@ revisions: OPT2 OPT3WINX64 OPT3LINX64 -//@ [OPT2] compile-flags: -O -//@ [OPT3LINX64] compile-flags: -C opt-level=3 -//@ [OPT3WINX64] compile-flags: -C opt-level=3 -//@ [OPT3LINX64] only-linux -//@ [OPT3WINX64] only-windows -//@ [OPT3LINX64] only-x86_64 -//@ [OPT3WINX64] only-x86_64 +//@ revisions: opt2 opt3winx64 opt3linx64 +//@ [opt2] compile-flags: -O +//@ [opt3linx64] compile-flags: -C opt-level=3 +//@ [opt3winx64] compile-flags: -C opt-level=3 +//@ [opt3linx64] only-linux +//@ [opt3winx64] only-windows +//@ [opt3linx64] only-x86_64 +//@ [opt3winx64] only-x86_64 //@ min-llvm-version: 18.1.3 #![crate_type = "lib"] @@ -16,27 +16,27 @@ // to avoid complicating the code. // CHECK-LABEL: define{{.*}}void @convert( // CHECK-NOT: shufflevector -// OPT2: store i16 -// OPT2-NEXT: getelementptr inbounds i8, {{.+}} 2 -// OPT2-NEXT: store i16 -// OPT2-NEXT: getelementptr inbounds i8, {{.+}} 4 -// OPT2-NEXT: store i16 -// OPT2-NEXT: getelementptr inbounds i8, {{.+}} 6 -// OPT2-NEXT: store i16 -// OPT2-NEXT: getelementptr inbounds i8, {{.+}} 8 -// OPT2-NEXT: store i16 -// OPT2-NEXT: getelementptr inbounds i8, {{.+}} 10 -// OPT2-NEXT: store i16 -// OPT2-NEXT: getelementptr inbounds i8, {{.+}} 12 -// OPT2-NEXT: store i16 -// OPT2-NEXT: getelementptr inbounds i8, {{.+}} 14 -// OPT2-NEXT: store i16 -// OPT3LINX64: load <8 x i16> -// OPT3LINX64-NEXT: call <8 x i16> @llvm.bswap -// OPT3LINX64-NEXT: store <8 x i16> -// OPT3WINX64: load <8 x i16> -// OPT3WINX64-NEXT: call <8 x i16> @llvm.bswap -// OPT3WINX64-NEXT: store <8 x i16> +// CHECK-OPT2: store i16 +// CHECK-OPT2-NEXT: getelementptr inbounds i8, {{.+}} 2 +// CHECK-OPT2-NEXT: store i16 +// CHECK-OPT2-NEXT: getelementptr inbounds i8, {{.+}} 4 +// CHECK-OPT2-NEXT: store i16 +// CHECK-OPT2-NEXT: getelementptr inbounds i8, {{.+}} 6 +// CHECK-OPT2-NEXT: store i16 +// CHECK-OPT2-NEXT: getelementptr inbounds i8, {{.+}} 8 +// CHECK-OPT2-NEXT: store i16 +// CHECK-OPT2-NEXT: getelementptr inbounds i8, {{.+}} 10 +// CHECK-OPT2-NEXT: store i16 +// CHECK-OPT2-NEXT: getelementptr inbounds i8, {{.+}} 12 +// CHECK-OPT2-NEXT: store i16 +// CHECK-OPT2-NEXT: getelementptr inbounds i8, {{.+}} 14 +// CHECK-OPT2-NEXT: store i16 +// CHECK-OPT3LINX64: load <8 x i16> +// CHECK-OPT3LINX64-NEXT: call <8 x i16> @llvm.bswap +// CHECK-OPT3LINX64-NEXT: store <8 x i16> +// CHECK-OPT3WINX64: load <8 x i16> +// CHECK-OPT3WINX64-NEXT: call <8 x i16> @llvm.bswap +// CHECK-OPT3WINX64-NEXT: store <8 x i16> // CHECK-NEXT: ret void #[no_mangle] pub fn convert(value: [u16; 8]) -> [u8; 16] { diff --git a/tests/codegen/issues/issue-32031.rs b/tests/codegen/issues/issue-32031.rs index 4d6895166f1cb..c149e80b273d7 100644 --- a/tests/codegen/issues/issue-32031.rs +++ b/tests/codegen/issues/issue-32031.rs @@ -9,8 +9,8 @@ #[no_mangle] pub struct F32(f32); -// other: define{{.*}}float @add_newtype_f32(float %a, float %b) -// x86: define{{.*}}i32 @add_newtype_f32(float %a, float %b) +// CHECK-OTHER: define{{.*}}float @add_newtype_f32(float %a, float %b) +// CHECK-X86: define{{.*}}i32 @add_newtype_f32(float %a, float %b) #[inline(never)] #[no_mangle] pub fn add_newtype_f32(a: F32, b: F32) -> F32 { @@ -20,8 +20,8 @@ pub fn add_newtype_f32(a: F32, b: F32) -> F32 { #[no_mangle] pub struct F64(f64); -// other: define{{.*}}double @add_newtype_f64(double %a, double %b) -// x86: define{{.*}}void @add_newtype_f64(ptr{{.*}}sret([8 x i8]){{.*}}%_0, double %a, double %b) +// CHECK-OTHER: define{{.*}}double @add_newtype_f64(double %a, double %b) +// CHECK-X86: define{{.*}}void @add_newtype_f64(ptr{{.*}}sret([8 x i8]){{.*}}%_0, double %a, double %b) #[inline(never)] #[no_mangle] pub fn add_newtype_f64(a: F64, b: F64) -> F64 { diff --git a/tests/codegen/issues/issue-45222.rs b/tests/codegen/issues/issue-45222.rs index d2c1ba421c45e..d05c5a79f2ec4 100644 --- a/tests/codegen/issues/issue-45222.rs +++ b/tests/codegen/issues/issue-45222.rs @@ -35,10 +35,10 @@ pub fn check_foo2() -> u64 { // count // } // -// // COMMENTEDCHECK-LABEL: @check_triangle_inc +// // COM: CHECK-LABEL: @check_triangle_inc // #[no_mangle] // pub fn check_triangle_inc() -> u64 { -// // COMMENTEDCHECK: ret i64 5000050000 +// // COM: CHECK: ret i64 5000050000 // triangle_inc(100000) // } diff --git a/tests/codegen/llvm-ident.rs b/tests/codegen/llvm-ident.rs index 923e99bb282c1..5f83560afd6b3 100644 --- a/tests/codegen/llvm-ident.rs +++ b/tests/codegen/llvm-ident.rs @@ -1,9 +1,9 @@ // Verifies that the `!llvm.ident` named metadata is emitted. // -//@ revisions: NONE OPT DEBUG +//@ revisions: none opt debug // -//@ [OPT] compile-flags: -Copt-level=2 -//@ [DEBUG] compile-flags: -Cdebuginfo=2 +//@ [opt] compile-flags: -Copt-level=2 +//@ [debug] compile-flags: -Cdebuginfo=2 // The named metadata should contain a single metadata node (see // `LLVMRustPrepareThinLTOImport` for details). diff --git a/tests/codegen/merge-functions.rs b/tests/codegen/merge-functions.rs index 8e4b65c9ee65c..ebbdb8de2caef 100644 --- a/tests/codegen/merge-functions.rs +++ b/tests/codegen/merge-functions.rs @@ -1,6 +1,6 @@ -//@ revisions: O Os -//@[Os] compile-flags: -Copt-level=s -//@[O] compile-flags: -O +//@ revisions: opt-level-2 opt-level-s +//@[opt-level-s] compile-flags: -Copt-level=s +//@[opt-level-2] compile-flags: -O #![crate_type = "lib"] // CHECK: @func{{2|1}} = {{.*}}alias{{.*}}@func{{1|2}} diff --git a/tests/codegen/meta-filecheck/filecheck-flags.rs b/tests/codegen/meta-filecheck/filecheck-flags.rs index 8e451cf4fdc94..18f49e647203a 100644 --- a/tests/codegen/meta-filecheck/filecheck-flags.rs +++ b/tests/codegen/meta-filecheck/filecheck-flags.rs @@ -1,8 +1,8 @@ // Arguments provided via `filecheck-flags` should be passed to `filecheck`. //@ revisions: good bad -//@ [good] filecheck-flags: --check-prefix=CUSTOM +//@ [good] filecheck-flags: --check-prefix=CHECK-CUSTOM //@ [bad] should-fail -// CUSTOM: main +// CHECK-CUSTOM: main fn main() {} diff --git a/tests/codegen/meta-filecheck/msvc-prefix-bad.rs b/tests/codegen/meta-filecheck/msvc-prefix-bad.rs index f9984c74e2a3b..da1a84b5b643b 100644 --- a/tests/codegen/meta-filecheck/msvc-prefix-bad.rs +++ b/tests/codegen/meta-filecheck/msvc-prefix-bad.rs @@ -2,6 +2,6 @@ //@ should-fail -// MSVC: text that should not match -// NONMSVC: text that should not match +// CHECK-MSVC: text that should not match +// CHECK-NONMSVC: text that should not match fn main() {} diff --git a/tests/codegen/meta-filecheck/msvc-prefix-good.rs b/tests/codegen/meta-filecheck/msvc-prefix-good.rs index 580d20d54382a..c4a45ca702669 100644 --- a/tests/codegen/meta-filecheck/msvc-prefix-good.rs +++ b/tests/codegen/meta-filecheck/msvc-prefix-good.rs @@ -2,6 +2,6 @@ // (one of these should always be present) -// MSVC: main -// NONMSVC: main +// CHECK-MSVC: main +// CHECK-NONMSVC: main fn main() {} diff --git a/tests/codegen/meta-filecheck/revision-prefix.rs b/tests/codegen/meta-filecheck/revision-prefix.rs index 431066e3acc07..c127b9d9337d8 100644 --- a/tests/codegen/meta-filecheck/revision-prefix.rs +++ b/tests/codegen/meta-filecheck/revision-prefix.rs @@ -1,8 +1,8 @@ // The current revision name is registered as a filecheck prefix. -//@ revisions: GOOD BAD -//@ [BAD] should-fail +//@ revisions: good bad +//@ [bad] should-fail -// GOOD: main -// BAD: text that should not match +// CHECK-GOOD: main +// CHECK-BAD: text that should not match fn main() {} diff --git a/tests/codegen/no-jump-tables.rs b/tests/codegen/no-jump-tables.rs index 654da2cec11cf..7aff040ffd426 100644 --- a/tests/codegen/no-jump-tables.rs +++ b/tests/codegen/no-jump-tables.rs @@ -17,6 +17,6 @@ trait Sized {} pub fn foo() { // CHECK: @foo() unnamed_addr #0 - // unset-NOT: attributes #0 = { {{.*}}"no-jump-tables"="true"{{.*}} } - // set: attributes #0 = { {{.*}}"no-jump-tables"="true"{{.*}} } + // CHECK-UNSET-NOT: attributes #0 = { {{.*}}"no-jump-tables"="true"{{.*}} } + // CHECK-SET: attributes #0 = { {{.*}}"no-jump-tables"="true"{{.*}} } } diff --git a/tests/codegen/optimize-attr-1.rs b/tests/codegen/optimize-attr-1.rs index 3aee44791e0e6..ff49bb9738001 100644 --- a/tests/codegen/optimize-attr-1.rs +++ b/tests/codegen/optimize-attr-1.rs @@ -1,15 +1,15 @@ -//@ revisions: NO-OPT SIZE-OPT SPEED-OPT -//@[NO-OPT] compile-flags: -Copt-level=0 -Ccodegen-units=1 -//@[SIZE-OPT] compile-flags: -Copt-level=s -Ccodegen-units=1 -//@[SPEED-OPT] compile-flags: -Copt-level=3 -Ccodegen-units=1 +//@ revisions: no-opt size-opt speed-opt +//@[no-opt] compile-flags: -Copt-level=0 -Ccodegen-units=1 +//@[size-opt] compile-flags: -Copt-level=s -Ccodegen-units=1 +//@[speed-opt] compile-flags: -Copt-level=3 -Ccodegen-units=1 #![feature(optimize_attribute)] #![crate_type = "rlib"] // CHECK-LABEL: define{{.*}}i32 @nothing // CHECK-SAME: [[NOTHING_ATTRS:#[0-9]+]] -// SIZE-OPT: ret i32 4 -// SPEED-OPT: ret i32 4 +// CHECK-SIZE-OPT: ret i32 4 +// CHECK-SPEED-OPT: ret i32 4 #[no_mangle] pub fn nothing() -> i32 { 2 + 2 @@ -17,8 +17,8 @@ pub fn nothing() -> i32 { // CHECK-LABEL: define{{.*}}i32 @size // CHECK-SAME: [[SIZE_ATTRS:#[0-9]+]] -// SIZE-OPT: ret i32 6 -// SPEED-OPT: ret i32 6 +// CHECK-SIZE-OPT: ret i32 6 +// CHECK-SPEED-OPT: ret i32 6 #[optimize(size)] #[no_mangle] pub fn size() -> i32 { @@ -26,22 +26,22 @@ pub fn size() -> i32 { } // CHECK-LABEL: define{{.*}}i32 @speed -// NO-OPT-SAME: [[NOTHING_ATTRS]] -// SPEED-OPT-SAME: [[NOTHING_ATTRS]] -// SIZE-OPT-SAME: [[SPEED_ATTRS:#[0-9]+]] -// SIZE-OPT: ret i32 8 -// SPEED-OPT: ret i32 8 +// CHECK-NO-OPT-SAME: [[NOTHING_ATTRS]] +// CHECK-SPEED-OPT-SAME: [[NOTHING_ATTRS]] +// CHECK-SIZE-OPT-SAME: [[SPEED_ATTRS:#[0-9]+]] +// CHECK-SIZE-OPT: ret i32 8 +// CHECK-SPEED-OPT: ret i32 8 #[optimize(speed)] #[no_mangle] pub fn speed() -> i32 { 4 + 4 } -// NO-OPT-DAG: attributes [[SIZE_ATTRS]] = {{.*}}minsize{{.*}}optsize{{.*}} -// SPEED-OPT-DAG: attributes [[SIZE_ATTRS]] = {{.*}}minsize{{.*}}optsize{{.*}} -// SIZE-OPT-DAG: attributes [[NOTHING_ATTRS]] = {{.*}}optsize{{.*}} -// SIZE-OPT-DAG: attributes [[SIZE_ATTRS]] = {{.*}}minsize{{.*}}optsize{{.*}} +// CHECK-NO-OPT-DAG: attributes [[SIZE_ATTRS]] = {{.*}}minsize{{.*}}optsize{{.*}} +// CHECK-SPEED-OPT-DAG: attributes [[SIZE_ATTRS]] = {{.*}}minsize{{.*}}optsize{{.*}} +// CHECK-SIZE-OPT-DAG: attributes [[NOTHING_ATTRS]] = {{.*}}optsize{{.*}} +// CHECK-SIZE-OPT-DAG: attributes [[SIZE_ATTRS]] = {{.*}}minsize{{.*}}optsize{{.*}} -// SIZE-OPT: attributes [[SPEED_ATTRS]] -// SIZE-OPT-NOT: minsize -// SIZE-OPT-NOT: optsize +// CHECK-SIZE-OPT: attributes [[SPEED_ATTRS]] +// CHECK-SIZE-OPT-NOT: minsize +// CHECK-SIZE-OPT-NOT: optsize diff --git a/tests/codegen/option-niche-eq.rs b/tests/codegen/option-niche-eq.rs index 4d3a7ce3764be..fb90c8aa9d737 100644 --- a/tests/codegen/option-niche-eq.rs +++ b/tests/codegen/option-niche-eq.rs @@ -64,11 +64,11 @@ pub fn niche_eq(l: Option, r: Option) -> bool { } // FIXME: This should work too -// // FIXME-CHECK-LABEL: @bool_eq +// // COM: CHECK-LABEL: @bool_eq // #[no_mangle] // pub fn bool_eq(l: Option, r: Option) -> bool { -// // FIXME-CHECK: start: -// // FIXME-CHECK-NEXT: icmp eq i8 -// // FIXME-CHECK-NEXT: ret i1 +// // COM: CHECK: start: +// // COM: CHECK-NEXT: icmp eq i8 +// // COM: CHECK-NEXT: ret i1 // l == r // } diff --git a/tests/codegen/riscv-target-abi.rs b/tests/codegen/riscv-target-abi.rs index 5d545af9c7690..48976b151d632 100644 --- a/tests/codegen/riscv-target-abi.rs +++ b/tests/codegen/riscv-target-abi.rs @@ -2,15 +2,15 @@ //@[riscv64gc] compile-flags: --target=riscv64gc-unknown-linux-gnu //@[riscv64gc] needs-llvm-components: riscv -// riscv64gc: !{i32 1, !"target-abi", !"lp64d"} +// CHECK-RISCV64GC: !{i32 1, !"target-abi", !"lp64d"} //@[riscv32gc] compile-flags: --target=riscv32gc-unknown-linux-musl //@[riscv32gc] needs-llvm-components: riscv -// riscv32gc: !{i32 1, !"target-abi", !"ilp32d"} +// CHECK-RISCV32GC: !{i32 1, !"target-abi", !"ilp32d"} //@[riscv32imac] compile-flags: --target=riscv32imac-unknown-none-elf //@[riscv32imac] needs-llvm-components: riscv -// riscv32imac-NOT: !"target-abi" +// CHECK-RISCV32IMAC-NOT: !"target-abi" #![feature(no_core, lang_items)] #![crate_type = "lib"] diff --git a/tests/codegen/sanitizer/address-sanitizer-globals-tracking.rs b/tests/codegen/sanitizer/address-sanitizer-globals-tracking.rs index f319306f93fd8..9d91969a28659 100644 --- a/tests/codegen/sanitizer/address-sanitizer-globals-tracking.rs +++ b/tests/codegen/sanitizer/address-sanitizer-globals-tracking.rs @@ -18,10 +18,10 @@ //@ needs-sanitizer-address //@ only-linux // -//@ revisions:ASAN ASAN-FAT-LTO +//@ revisions: asan asan-fat-lto //@ compile-flags: -Zsanitizer=address -Ctarget-feature=-crt-static -//@[ASAN] compile-flags: -//@[ASAN-FAT-LTO] compile-flags: -Cprefer-dynamic=false -Clto=fat +//@[asan] compile-flags: +//@[asan-fat-lto] compile-flags: -Cprefer-dynamic=false -Clto=fat #![crate_type = "staticlib"] diff --git a/tests/codegen/sanitizer/memory-track-origins.rs b/tests/codegen/sanitizer/memory-track-origins.rs index 318c277e10cba..d312605114014 100644 --- a/tests/codegen/sanitizer/memory-track-origins.rs +++ b/tests/codegen/sanitizer/memory-track-origins.rs @@ -2,30 +2,30 @@ // with -Zsanitizer-memory-track-origins option. // //@ needs-sanitizer-memory -//@ revisions:MSAN-0 MSAN-1 MSAN-2 MSAN-1-LTO MSAN-2-LTO +//@ revisions: msan-0 msan-1 msan-2 msan-1-lto msan-2-lto // //@ compile-flags: -Zsanitizer=memory -Ctarget-feature=-crt-static -//@[MSAN-0] compile-flags: -//@[MSAN-1] compile-flags: -Zsanitizer-memory-track-origins=1 -//@[MSAN-2] compile-flags: -Zsanitizer-memory-track-origins -//@[MSAN-1-LTO] compile-flags: -Zsanitizer-memory-track-origins=1 -C lto=fat -//@[MSAN-2-LTO] compile-flags: -Zsanitizer-memory-track-origins -C lto=fat +//@[msan-0] compile-flags: +//@[msan-1] compile-flags: -Zsanitizer-memory-track-origins=1 +//@[msan-2] compile-flags: -Zsanitizer-memory-track-origins +//@[msan-1-lto] compile-flags: -Zsanitizer-memory-track-origins=1 -C lto=fat +//@[msan-2-lto] compile-flags: -Zsanitizer-memory-track-origins -C lto=fat #![crate_type = "lib"] -// MSAN-0-NOT: @__msan_track_origins -// MSAN-1: @__msan_track_origins = weak_odr {{.*}}constant i32 1 -// MSAN-2: @__msan_track_origins = weak_odr {{.*}}constant i32 2 -// MSAN-1-LTO: @__msan_track_origins = weak_odr {{.*}}constant i32 1 -// MSAN-2-LTO: @__msan_track_origins = weak_odr {{.*}}constant i32 2 +// CHECK-MSAN-0-NOT: @__msan_track_origins +// CHECK-MSAN-1: @__msan_track_origins = weak_odr {{.*}}constant i32 1 +// CHECK-MSAN-2: @__msan_track_origins = weak_odr {{.*}}constant i32 2 +// CHECK-MSAN-1-LTO: @__msan_track_origins = weak_odr {{.*}}constant i32 1 +// CHECK-MSAN-2-LTO: @__msan_track_origins = weak_odr {{.*}}constant i32 2 // -// MSAN-0-LABEL: define void @copy( -// MSAN-1-LABEL: define void @copy( -// MSAN-2-LABEL: define void @copy( +// CHECK-MSAN-0-LABEL: define void @copy( +// CHECK-MSAN-1-LABEL: define void @copy( +// CHECK-MSAN-2-LABEL: define void @copy( #[no_mangle] pub fn copy(dst: &mut i32, src: &i32) { - // MSAN-0-NOT: call i32 @__msan_chain_origin( - // MSAN-1-NOT: call i32 @__msan_chain_origin( - // MSAN-2: call i32 @__msan_chain_origin( + // CHECK-MSAN-0-NOT: call i32 @__msan_chain_origin( + // CHECK-MSAN-1-NOT: call i32 @__msan_chain_origin( + // CHECK-MSAN-2: call i32 @__msan_chain_origin( *dst = *src; } diff --git a/tests/codegen/sanitizer/no-sanitize-inlining.rs b/tests/codegen/sanitizer/no-sanitize-inlining.rs index 4bd832d2ab195..b028da01be53f 100644 --- a/tests/codegen/sanitizer/no-sanitize-inlining.rs +++ b/tests/codegen/sanitizer/no-sanitize-inlining.rs @@ -3,21 +3,21 @@ // //@ needs-sanitizer-address //@ needs-sanitizer-leak -//@ revisions: ASAN LSAN +//@ revisions: asan lsan //@ compile-flags: -Copt-level=3 -Zmir-opt-level=4 -Ctarget-feature=-crt-static -//@[ASAN] compile-flags: -Zsanitizer=address -//@[LSAN] compile-flags: -Zsanitizer=leak +//@[asan] compile-flags: -Zsanitizer=address +//@[lsan] compile-flags: -Zsanitizer=leak #![crate_type = "lib"] #![feature(no_sanitize)] -// ASAN-LABEL: define void @test -// ASAN: call {{.*}} @random_inline -// ASAN: } +// CHECK-ASAN-LABEL: define void @test +// CHECK-ASAN: call {{.*}} @random_inline +// CHECK-ASAN: } // -// LSAN-LABEL: define void @test -// LSAN-NOT: call -// LSAN: } +// CHECK-LSAN-LABEL: define void @test +// CHECK-LSAN-NOT: call +// CHECK-LSAN: } #[no_mangle] pub fn test(n: &mut u32) { random_inline(n); diff --git a/tests/codegen/sanitizer/sanitizer-recover.rs b/tests/codegen/sanitizer/sanitizer-recover.rs index 6b65932048184..0b269736bd37e 100644 --- a/tests/codegen/sanitizer/sanitizer-recover.rs +++ b/tests/codegen/sanitizer/sanitizer-recover.rs @@ -3,44 +3,44 @@ // //@ needs-sanitizer-address //@ needs-sanitizer-memory -//@ revisions:ASAN ASAN-RECOVER MSAN MSAN-RECOVER MSAN-RECOVER-LTO +//@ revisions: asan asan-recover msan msan-recover msan-recover-lto //@ no-prefer-dynamic // //@ compile-flags: -Ctarget-feature=-crt-static -//@[ASAN] compile-flags: -Zsanitizer=address -Copt-level=0 -//@[ASAN-RECOVER] compile-flags: -Zsanitizer=address -Zsanitizer-recover=address -Copt-level=0 -//@[MSAN] compile-flags: -Zsanitizer=memory -//@[MSAN-RECOVER] compile-flags: -Zsanitizer=memory -Zsanitizer-recover=memory -//@[MSAN-RECOVER-LTO] compile-flags: -Zsanitizer=memory -Zsanitizer-recover=memory -C lto=fat -// -// MSAN-NOT: @__msan_keep_going -// MSAN-RECOVER: @__msan_keep_going = weak_odr {{.*}}constant i32 1 -// MSAN-RECOVER-LTO: @__msan_keep_going = weak_odr {{.*}}constant i32 1 +//@[asan] compile-flags: -Zsanitizer=address -Copt-level=0 +//@[asan-recover] compile-flags: -Zsanitizer=address -Zsanitizer-recover=address -Copt-level=0 +//@[msan] compile-flags: -Zsanitizer=memory +//@[msan-recover] compile-flags: -Zsanitizer=memory -Zsanitizer-recover=memory +//@[msan-recover-lto] compile-flags: -Zsanitizer=memory -Zsanitizer-recover=memory -C lto=fat +// +// CHECK-MSAN-NOT: @__msan_keep_going +// CHECK-MSAN-RECOVER: @__msan_keep_going = weak_odr {{.*}}constant i32 1 +// CHECK-MSAN-RECOVER-LTO: @__msan_keep_going = weak_odr {{.*}}constant i32 1 -// ASAN-LABEL: define dso_local i32 @penguin( -// ASAN: call void @__asan_report_load4(i64 %0) -// ASAN: unreachable -// ASAN: } -// -// ASAN-RECOVER-LABEL: define dso_local i32 @penguin( -// ASAN-RECOVER: call void @__asan_report_load4_noabort( -// ASAN-RECOVER-NOT: unreachable -// ASAN: } -// -// MSAN-LABEL: define dso_local noundef i32 @penguin( -// MSAN: call void @__msan_warning{{(_with_origin_noreturn\(i32 0\)|_noreturn\(\))}} -// MSAN: unreachable -// MSAN: } -// -// MSAN-RECOVER-LABEL: define dso_local noundef i32 @penguin( -// MSAN-RECOVER: call void @__msan_warning{{(_with_origin\(i32 0\)|\(\))}} -// MSAN-RECOVER-NOT: unreachable -// MSAN-RECOVER: } -// -// MSAN-RECOVER-LTO-LABEL: define dso_local noundef i32 @penguin( -// MSAN-RECOVER-LTO: call void @__msan_warning{{(_with_origin\(i32 0\)|\(\))}} -// MSAN-RECOVER-LTO-NOT: unreachable -// MSAN-RECOVER-LTO: } +// CHECK-ASAN-LABEL: define dso_local i32 @penguin( +// CHECK-ASAN: call void @__asan_report_load4(i64 %0) +// CHECK-ASAN: unreachable +// CHECK-ASAN: } +// +// CHECK-ASAN-RECOVER-LABEL: define dso_local i32 @penguin( +// CHECK-ASAN-RECOVER: call void @__asan_report_load4_noabort( +// CHECK-ASAN-RECOVER-NOT: unreachable +// CHECK-ASAN: } +// +// CHECK-MSAN-LABEL: define dso_local noundef i32 @penguin( +// CHECK-MSAN: call void @__msan_warning{{(_with_origin_noreturn\(i32 0\)|_noreturn\(\))}} +// CHECK-MSAN: unreachable +// CHECK-MSAN: } +// +// CHECK-MSAN-RECOVER-LABEL: define dso_local noundef i32 @penguin( +// CHECK-MSAN-RECOVER: call void @__msan_warning{{(_with_origin\(i32 0\)|\(\))}} +// CHECK-MSAN-RECOVER-NOT: unreachable +// CHECK-MSAN-RECOVER: } +// +// CHECK-MSAN-RECOVER-LTO-LABEL: define dso_local noundef i32 @penguin( +// CHECK-MSAN-RECOVER-LTO: call void @__msan_warning{{(_with_origin\(i32 0\)|\(\))}} +// CHECK-MSAN-RECOVER-LTO-NOT: unreachable +// CHECK-MSAN-RECOVER-LTO: } // #[no_mangle] pub fn penguin(p: &mut i32) -> i32 { diff --git a/tests/codegen/simd/packed-simd.rs b/tests/codegen/simd/packed-simd.rs index 1df09c96e6cc0..ae768d4a7af31 100644 --- a/tests/codegen/simd/packed-simd.rs +++ b/tests/codegen/simd/packed-simd.rs @@ -35,7 +35,7 @@ fn load(v: Simd) -> FullSimd { #[no_mangle] pub fn square_packed_full(x: Simd) -> FullSimd { // CHECK-NEXT: start - // noopt: alloca [[RET_TYPE]], [[RET_ALIGN]] + // CHECK-NOOPT: alloca [[RET_TYPE]], [[RET_ALIGN]] // CHECK: load <3 x float> let x = load(x); // CHECK: [[VREG:%[a-z0-9_]+]] = fmul <3 x float> @@ -51,7 +51,7 @@ pub fn square_packed_full(x: Simd) -> FullSimd { pub fn square_packed(x: Simd) -> Simd { // CHECK-NEXT: start // CHECK-NEXT: load <3 x float> - // noopt-NEXT: load <3 x float> + // CHECK-NOOPT-NEXT: load <3 x float> // CHECK-NEXT: [[VREG:%[a-z0-9_]+]] = fmul <3 x float> // CHECK-NEXT: store <3 x float> [[VREG]], ptr [[RET_VREG]], [[RET_ALIGN]] // CHECK-NEXT: ret void diff --git a/tests/codegen/some-abis-do-extend-params-to-32-bits.rs b/tests/codegen/some-abis-do-extend-params-to-32-bits.rs index 10970cacdcf06..0251f38e8455b 100644 --- a/tests/codegen/some-abis-do-extend-params-to-32-bits.rs +++ b/tests/codegen/some-abis-do-extend-params-to-32-bits.rs @@ -36,177 +36,177 @@ trait Copy {} // // ZERO/SIGN-EXTENDING TO 32 BITS NON-EXTENDING // ============================== ======================= -// x86_64: void @c_arg_u8(i8 zeroext %_a) -// i686: void @c_arg_u8(i8 zeroext %_a) -// aarch64-apple: void @c_arg_u8(i8 zeroext %_a) -// aarch64-windows: void @c_arg_u8(i8 %_a) -// aarch64-linux: void @c_arg_u8(i8 %_a) -// arm: void @c_arg_u8(i8 zeroext %_a) -// riscv: void @c_arg_u8(i8 zeroext %_a) +// CHECK-X86_64: void @c_arg_u8(i8 zeroext %_a) +// CHECK-I686: void @c_arg_u8(i8 zeroext %_a) +// CHECK-AARCH64-APPLE: void @c_arg_u8(i8 zeroext %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_u8(i8 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_u8(i8 %_a) +// CHECK-ARM: void @c_arg_u8(i8 zeroext %_a) +// CHECK-RISCV: void @c_arg_u8(i8 zeroext %_a) #[no_mangle] pub extern "C" fn c_arg_u8(_a: u8) {} -// x86_64: void @c_arg_u16(i16 zeroext %_a) -// i686: void @c_arg_u16(i16 zeroext %_a) -// aarch64-apple: void @c_arg_u16(i16 zeroext %_a) -// aarch64-windows: void @c_arg_u16(i16 %_a) -// aarch64-linux: void @c_arg_u16(i16 %_a) -// arm: void @c_arg_u16(i16 zeroext %_a) -// riscv: void @c_arg_u16(i16 zeroext %_a) +// CHECK-X86_64: void @c_arg_u16(i16 zeroext %_a) +// CHECK-I686: void @c_arg_u16(i16 zeroext %_a) +// CHECK-AARCH64-APPLE: void @c_arg_u16(i16 zeroext %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_u16(i16 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_u16(i16 %_a) +// CHECK-ARM: void @c_arg_u16(i16 zeroext %_a) +// CHECK-RISCV: void @c_arg_u16(i16 zeroext %_a) #[no_mangle] pub extern "C" fn c_arg_u16(_a: u16) {} -// x86_64: void @c_arg_u32(i32 %_a) -// i686: void @c_arg_u32(i32 %_a) -// aarch64-apple: void @c_arg_u32(i32 %_a) -// aarch64-windows: void @c_arg_u32(i32 %_a) -// aarch64-linux: void @c_arg_u32(i32 %_a) -// arm: void @c_arg_u32(i32 %_a) -// riscv: void @c_arg_u32(i32 signext %_a) +// CHECK-X86_64: void @c_arg_u32(i32 %_a) +// CHECK-I686: void @c_arg_u32(i32 %_a) +// CHECK-AARCH64-APPLE: void @c_arg_u32(i32 %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_u32(i32 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_u32(i32 %_a) +// CHECK-ARM: void @c_arg_u32(i32 %_a) +// CHECK-RISCV: void @c_arg_u32(i32 signext %_a) #[no_mangle] pub extern "C" fn c_arg_u32(_a: u32) {} -// x86_64: void @c_arg_u64(i64 %_a) -// i686: void @c_arg_u64(i64 %_a) -// aarch64-apple: void @c_arg_u64(i64 %_a) -// aarch64-windows: void @c_arg_u64(i64 %_a) -// aarch64-linux: void @c_arg_u64(i64 %_a) -// arm: void @c_arg_u64(i64 %_a) -// riscv: void @c_arg_u64(i64 %_a) +// CHECK-X86_64: void @c_arg_u64(i64 %_a) +// CHECK-I686: void @c_arg_u64(i64 %_a) +// CHECK-AARCH64-APPLE: void @c_arg_u64(i64 %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_u64(i64 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_u64(i64 %_a) +// CHECK-ARM: void @c_arg_u64(i64 %_a) +// CHECK-RISCV: void @c_arg_u64(i64 %_a) #[no_mangle] pub extern "C" fn c_arg_u64(_a: u64) {} -// x86_64: void @c_arg_i8(i8 signext %_a) -// i686: void @c_arg_i8(i8 signext %_a) -// aarch64-apple: void @c_arg_i8(i8 signext %_a) -// aarch64-windows: void @c_arg_i8(i8 %_a) -// aarch64-linux: void @c_arg_i8(i8 %_a) -// arm: void @c_arg_i8(i8 signext %_a) -// riscv: void @c_arg_i8(i8 signext %_a) +// CHECK-X86_64: void @c_arg_i8(i8 signext %_a) +// CHECK-I686: void @c_arg_i8(i8 signext %_a) +// CHECK-AARCH64-APPLE: void @c_arg_i8(i8 signext %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_i8(i8 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_i8(i8 %_a) +// CHECK-ARM: void @c_arg_i8(i8 signext %_a) +// CHECK-RISCV: void @c_arg_i8(i8 signext %_a) #[no_mangle] pub extern "C" fn c_arg_i8(_a: i8) {} -// x86_64: void @c_arg_i16(i16 signext %_a) -// i686: void @c_arg_i16(i16 signext %_a) -// aarch64-apple: void @c_arg_i16(i16 signext %_a) -// aarch64-windows: void @c_arg_i16(i16 %_a) -// aarch64-linux: void @c_arg_i16(i16 %_a) -// arm: void @c_arg_i16(i16 signext %_a) -// riscv: void @c_arg_i16(i16 signext %_a) +// CHECK-X86_64: void @c_arg_i16(i16 signext %_a) +// CHECK-I686: void @c_arg_i16(i16 signext %_a) +// CHECK-AARCH64-APPLE: void @c_arg_i16(i16 signext %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_i16(i16 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_i16(i16 %_a) +// CHECK-ARM: void @c_arg_i16(i16 signext %_a) +// CHECK-RISCV: void @c_arg_i16(i16 signext %_a) #[no_mangle] pub extern "C" fn c_arg_i16(_a: i16) {} -// x86_64: void @c_arg_i32(i32 %_a) -// i686: void @c_arg_i32(i32 %_a) -// aarch64-apple: void @c_arg_i32(i32 %_a) -// aarch64-windows: void @c_arg_i32(i32 %_a) -// aarch64-linux: void @c_arg_i32(i32 %_a) -// arm: void @c_arg_i32(i32 %_a) -// riscv: void @c_arg_i32(i32 signext %_a) +// CHECK-X86_64: void @c_arg_i32(i32 %_a) +// CHECK-I686: void @c_arg_i32(i32 %_a) +// CHECK-AARCH64-APPLE: void @c_arg_i32(i32 %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_i32(i32 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_i32(i32 %_a) +// CHECK-ARM: void @c_arg_i32(i32 %_a) +// CHECK-RISCV: void @c_arg_i32(i32 signext %_a) #[no_mangle] pub extern "C" fn c_arg_i32(_a: i32) {} -// x86_64: void @c_arg_i64(i64 %_a) -// i686: void @c_arg_i64(i64 %_a) -// aarch64-apple: void @c_arg_i64(i64 %_a) -// aarch64-windows: void @c_arg_i64(i64 %_a) -// aarch64-linux: void @c_arg_i64(i64 %_a) -// arm: void @c_arg_i64(i64 %_a) -// riscv: void @c_arg_i64(i64 %_a) +// CHECK-X86_64: void @c_arg_i64(i64 %_a) +// CHECK-I686: void @c_arg_i64(i64 %_a) +// CHECK-AARCH64-APPLE: void @c_arg_i64(i64 %_a) +// CHECK-AARCH64-WINDOWS: void @c_arg_i64(i64 %_a) +// CHECK-AARCH64-LINUX: void @c_arg_i64(i64 %_a) +// CHECK-ARM: void @c_arg_i64(i64 %_a) +// CHECK-RISCV: void @c_arg_i64(i64 %_a) #[no_mangle] pub extern "C" fn c_arg_i64(_a: i64) {} -// x86_64: zeroext i8 @c_ret_u8() -// i686: zeroext i8 @c_ret_u8() -// aarch64-apple: zeroext i8 @c_ret_u8() -// aarch64-windows: i8 @c_ret_u8() -// aarch64-linux: i8 @c_ret_u8() -// arm: zeroext i8 @c_ret_u8() -// riscv: zeroext i8 @c_ret_u8() +// CHECK-X86_64: zeroext i8 @c_ret_u8() +// CHECK-I686: zeroext i8 @c_ret_u8() +// CHECK-AARCH64-APPLE: zeroext i8 @c_ret_u8() +// CHECK-AARCH64-WINDOWS: i8 @c_ret_u8() +// CHECK-AARCH64-LINUX: i8 @c_ret_u8() +// CHECK-ARM: zeroext i8 @c_ret_u8() +// CHECK-RISCV: zeroext i8 @c_ret_u8() #[no_mangle] pub extern "C" fn c_ret_u8() -> u8 { 0 } -// x86_64: zeroext i16 @c_ret_u16() -// i686: zeroext i16 @c_ret_u16() -// aarch64-apple: zeroext i16 @c_ret_u16() -// aarch64-windows: i16 @c_ret_u16() -// aarch64-linux: i16 @c_ret_u16() -// arm: zeroext i16 @c_ret_u16() -// riscv: zeroext i16 @c_ret_u16() +// CHECK-X86_64: zeroext i16 @c_ret_u16() +// CHECK-I686: zeroext i16 @c_ret_u16() +// CHECK-AARCH64-APPLE: zeroext i16 @c_ret_u16() +// CHECK-AARCH64-WINDOWS: i16 @c_ret_u16() +// CHECK-AARCH64-LINUX: i16 @c_ret_u16() +// CHECK-ARM: zeroext i16 @c_ret_u16() +// CHECK-RISCV: zeroext i16 @c_ret_u16() #[no_mangle] pub extern "C" fn c_ret_u16() -> u16 { 0 } -// x86_64: i32 @c_ret_u32() -// i686: i32 @c_ret_u32() -// aarch64-apple: i32 @c_ret_u32() -// aarch64-windows: i32 @c_ret_u32() -// aarch64-linux: i32 @c_ret_u32() -// arm: i32 @c_ret_u32() -// riscv: signext i32 @c_ret_u32() +// CHECK-X86_64: i32 @c_ret_u32() +// CHECK-I686: i32 @c_ret_u32() +// CHECK-AARCH64-APPLE: i32 @c_ret_u32() +// CHECK-AARCH64-WINDOWS: i32 @c_ret_u32() +// CHECK-AARCH64-LINUX: i32 @c_ret_u32() +// CHECK-ARM: i32 @c_ret_u32() +// CHECK-RISCV: signext i32 @c_ret_u32() #[no_mangle] pub extern "C" fn c_ret_u32() -> u32 { 0 } -// x86_64: i64 @c_ret_u64() -// i686: i64 @c_ret_u64() -// aarch64-apple: i64 @c_ret_u64() -// aarch64-windows: i64 @c_ret_u64() -// aarch64-linux: i64 @c_ret_u64() -// arm: i64 @c_ret_u64() -// riscv: i64 @c_ret_u64() +// CHECK-X86_64: i64 @c_ret_u64() +// CHECK-I686: i64 @c_ret_u64() +// CHECK-AARCH64-APPLE: i64 @c_ret_u64() +// CHECK-AARCH64-WINDOWS: i64 @c_ret_u64() +// CHECK-AARCH64-LINUX: i64 @c_ret_u64() +// CHECK-ARM: i64 @c_ret_u64() +// CHECK-RISCV: i64 @c_ret_u64() #[no_mangle] pub extern "C" fn c_ret_u64() -> u64 { 0 } -// x86_64: signext i8 @c_ret_i8() -// i686: signext i8 @c_ret_i8() -// aarch64-apple: signext i8 @c_ret_i8() -// aarch64-windows: i8 @c_ret_i8() -// aarch64-linux: i8 @c_ret_i8() -// arm: signext i8 @c_ret_i8() -// riscv: signext i8 @c_ret_i8() +// CHECK-X86_64: signext i8 @c_ret_i8() +// CHECK-I686: signext i8 @c_ret_i8() +// CHECK-AARCH64-APPLE: signext i8 @c_ret_i8() +// CHECK-AARCH64-WINDOWS: i8 @c_ret_i8() +// CHECK-AARCH64-LINUX: i8 @c_ret_i8() +// CHECK-ARM: signext i8 @c_ret_i8() +// CHECK-RISCV: signext i8 @c_ret_i8() #[no_mangle] pub extern "C" fn c_ret_i8() -> i8 { 0 } -// x86_64: signext i16 @c_ret_i16() -// i686: signext i16 @c_ret_i16() -// aarch64-apple: signext i16 @c_ret_i16() -// aarch64-windows: i16 @c_ret_i16() -// aarch64-linux: i16 @c_ret_i16() -// arm: signext i16 @c_ret_i16() -// riscv: signext i16 @c_ret_i16() +// CHECK-X86_64: signext i16 @c_ret_i16() +// CHECK-I686: signext i16 @c_ret_i16() +// CHECK-AARCH64-APPLE: signext i16 @c_ret_i16() +// CHECK-AARCH64-WINDOWS: i16 @c_ret_i16() +// CHECK-AARCH64-LINUX: i16 @c_ret_i16() +// CHECK-ARM: signext i16 @c_ret_i16() +// CHECK-RISCV: signext i16 @c_ret_i16() #[no_mangle] pub extern "C" fn c_ret_i16() -> i16 { 0 } -// x86_64: i32 @c_ret_i32() -// i686: i32 @c_ret_i32() -// aarch64-apple: i32 @c_ret_i32() -// aarch64-windows: i32 @c_ret_i32() -// aarch64-linux: i32 @c_ret_i32() -// arm: i32 @c_ret_i32() -// riscv: signext i32 @c_ret_i32() +// CHECK-X86_64: i32 @c_ret_i32() +// CHECK-I686: i32 @c_ret_i32() +// CHECK-AARCH64-APPLE: i32 @c_ret_i32() +// CHECK-AARCH64-WINDOWS: i32 @c_ret_i32() +// CHECK-AARCH64-LINUX: i32 @c_ret_i32() +// CHECK-ARM: i32 @c_ret_i32() +// CHECK-RISCV: signext i32 @c_ret_i32() #[no_mangle] pub extern "C" fn c_ret_i32() -> i32 { 0 } -// x86_64: i64 @c_ret_i64() -// i686: i64 @c_ret_i64() -// aarch64-apple: i64 @c_ret_i64() -// aarch64-windows: i64 @c_ret_i64() -// aarch64-linux: i64 @c_ret_i64() -// arm: i64 @c_ret_i64() -// riscv: i64 @c_ret_i64() +// CHECK-X86_64: i64 @c_ret_i64() +// CHECK-I686: i64 @c_ret_i64() +// CHECK-AARCH64-APPLE: i64 @c_ret_i64() +// CHECK-AARCH64-WINDOWS: i64 @c_ret_i64() +// CHECK-AARCH64-LINUX: i64 @c_ret_i64() +// CHECK-ARM: i64 @c_ret_i64() +// CHECK-RISCV: i64 @c_ret_i64() #[no_mangle] pub extern "C" fn c_ret_i64() -> i64 { 0 diff --git a/tests/codegen/stack-protector.rs b/tests/codegen/stack-protector.rs index 8ab25b470cda1..155f32258ae83 100644 --- a/tests/codegen/stack-protector.rs +++ b/tests/codegen/stack-protector.rs @@ -10,25 +10,25 @@ pub fn foo() { // CHECK: @foo() unnamed_addr #0 - // all-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } - // all-NOT: attributes #0 = { {{.*}}ssp {{.*}} } - // all: attributes #0 = { {{.*}}sspreq {{.*}} } - // all-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } - // all-NOT: attributes #0 = { {{.*}}ssp {{.*}} } + // CHECK-ALL-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } + // CHECK-ALL-NOT: attributes #0 = { {{.*}}ssp {{.*}} } + // CHECK-ALL: attributes #0 = { {{.*}}sspreq {{.*}} } + // CHECK-ALL-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } + // CHECK-ALL-NOT: attributes #0 = { {{.*}}ssp {{.*}} } - // strong-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } - // strong-NOT: attributes #0 = { {{.*}}ssp {{.*}} } - // strong: attributes #0 = { {{.*}}sspstrong {{.*}} } - // strong-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } - // strong-NOT: attributes #0 = { {{.*}}ssp {{.*}} } + // CHECK-STRONG-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } + // CHECK-STRONG-NOT: attributes #0 = { {{.*}}ssp {{.*}} } + // CHECK-STRONG: attributes #0 = { {{.*}}sspstrong {{.*}} } + // CHECK-STRONG-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } + // CHECK-STRONG-NOT: attributes #0 = { {{.*}}ssp {{.*}} } - // basic-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } - // basic-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } - // basic: attributes #0 = { {{.*}}ssp {{.*}} } - // basic-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } - // basic-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } + // CHECK-BASIC-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } + // CHECK-BASIC-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } + // CHECK-BASIC: attributes #0 = { {{.*}}ssp {{.*}} } + // CHECK-BASIC-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } + // CHECK-BASIC-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } - // none-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } - // none-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } - // none-NOT: attributes #0 = { {{.*}}ssp {{.*}} } + // CHECK-NONE-NOT: attributes #0 = { {{.*}}sspreq {{.*}} } + // CHECK-NONE-NOT: attributes #0 = { {{.*}}sspstrong {{.*}} } + // CHECK-NONE-NOT: attributes #0 = { {{.*}}ssp {{.*}} } } diff --git a/tests/codegen/target-feature-overrides.rs b/tests/codegen/target-feature-overrides.rs index 1e2c364dbbc9a..27fa74b9a6ff4 100644 --- a/tests/codegen/target-feature-overrides.rs +++ b/tests/codegen/target-feature-overrides.rs @@ -1,8 +1,8 @@ -//@ revisions: COMPAT INCOMPAT +//@ revisions: compat incompat //@ needs-llvm-components: x86 //@ compile-flags: --target=x86_64-unknown-linux-gnu -Copt-level=3 -//@ [COMPAT] compile-flags: -Ctarget-feature=+avx2,+avx -//@ [INCOMPAT] compile-flags: -Ctarget-feature=-avx2,-avx +//@ [compat] compile-flags: -Ctarget-feature=+avx2,+avx +//@ [incompat] compile-flags: -Ctarget-feature=-avx2,-avx // See also tests/assembly/target-feature-multiple.rs #![feature(no_core, lang_items)] @@ -33,14 +33,14 @@ pub unsafe fn apple() -> u32 { pub unsafe fn banana() -> u32 { // CHECK-LABEL: @banana() // CHECK-SAME: [[BANANAATTRS:#[0-9]+]] { - // COMPAT: {{.*}}call{{.*}}@peach - // INCOMPAT: {{.*}}call{{.*}}@apple + // CHECK-COMPAT: {{.*}}call{{.*}}@peach + // CHECK-INCOMPAT: {{.*}}call{{.*}}@apple apple() // Compatible for inline in COMPAT revision and can't be inlined in INCOMPAT } // CHECK: attributes [[APPLEATTRS]] -// COMPAT-SAME: "target-features"="+avx2,+avx,+avx" -// INCOMPAT-SAME: "target-features"="-avx2,-avx,+avx" +// CHECK-COMPAT-SAME: "target-features"="+avx2,+avx,+avx" +// CHECK-INCOMPAT-SAME: "target-features"="-avx2,-avx,+avx" // CHECK: attributes [[BANANAATTRS]] -// COMPAT-SAME: "target-features"="+avx2,+avx" -// INCOMPAT-SAME: "target-features"="-avx2,-avx" +// CHECK-COMPAT-SAME: "target-features"="+avx2,+avx" +// CHECK-INCOMPAT-SAME: "target-features"="-avx2,-avx" diff --git a/tests/codegen/tied-features-strength.rs b/tests/codegen/tied-features-strength.rs index 7f0805bc1b435..2b9d318cc9f7f 100644 --- a/tests/codegen/tied-features-strength.rs +++ b/tests/codegen/tied-features-strength.rs @@ -1,5 +1,5 @@ // ignore-tidy-linelength -//@ revisions: ENABLE_SVE DISABLE_SVE DISABLE_NEON ENABLE_NEON +//@ revisions: enable_sve disable_sve disable_neon enable_neon //@ compile-flags: --crate-type=rlib --target=aarch64-unknown-linux-gnu //@ needs-llvm-components: aarch64 @@ -7,17 +7,17 @@ // are targeting older LLVM versions. Once the min supported version // is LLVM-14 we can remove the optional regex matching for this feature. -//@ [ENABLE_SVE] compile-flags: -C target-feature=+sve -Copt-level=0 -// ENABLE_SVE: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(\+sve,?)|(\+neon,?))*}}" } +//@ [enable_sve] compile-flags: -C target-feature=+sve -Copt-level=0 +// CHECK-ENABLE_SVE: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(\+sve,?)|(\+neon,?))*}}" } -//@ [DISABLE_SVE] compile-flags: -C target-feature=-sve -Copt-level=0 -// DISABLE_SVE: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(-sve,?)|(\+neon,?))*}}" } +//@ [disable_sve] compile-flags: -C target-feature=-sve -Copt-level=0 +// CHECK-DISABLE_SVE: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(-sve,?)|(\+neon,?))*}}" } -//@ [DISABLE_NEON] compile-flags: -C target-feature=-neon -Copt-level=0 -// DISABLE_NEON: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(-fp-armv8,?)|(-neon,?))*}}" } +//@ [disable_neon] compile-flags: -C target-feature=-neon -Copt-level=0 +// CHECK-DISABLE_NEON: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(-fp-armv8,?)|(-neon,?))*}}" } -//@ [ENABLE_NEON] compile-flags: -C target-feature=+neon -Copt-level=0 -// ENABLE_NEON: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(\+fp-armv8,?)|(\+neon,?))*}}" } +//@ [enable_neon] compile-flags: -C target-feature=+neon -Copt-level=0 +// CHECK-ENABLE_NEON: attributes #0 = { {{.*}} "target-features"="{{((\+outline-atomics,?)|(\+v8a,?)?|(\+fp-armv8,?)|(\+neon,?))*}}" } #![feature(no_core, lang_items)] #![no_core] diff --git a/tests/codegen/ub-checks.rs b/tests/codegen/ub-checks.rs index de48d74e652f1..b6f8a3a9bab92 100644 --- a/tests/codegen/ub-checks.rs +++ b/tests/codegen/ub-checks.rs @@ -5,9 +5,9 @@ // This test ensures that such a runtime check is *not* emitted when debug-assertions are enabled, // but ub-checks are explicitly disabled. -//@ revisions: DEBUG NOCHECKS -//@ [DEBUG] compile-flags: -//@ [NOCHECKS] compile-flags: -Zub-checks=no +//@ revisions: debug nochecks +//@ [debug] compile-flags: +//@ [nochecks] compile-flags: -Zub-checks=no //@ compile-flags: -O -Cdebug-assertions=yes #![crate_type = "lib"] @@ -17,12 +17,12 @@ use std::ops::Range; // CHECK-LABEL: @slice_get_unchecked( #[no_mangle] pub unsafe fn slice_get_unchecked(x: &[i32], i: usize) -> &i32 { - // CHECK: icmp ult - // NOCHECKS: tail call void @llvm.assume - // DEBUG: br i1 - // DEBUG: call core::panicking::panic_nounwind - // DEBUG: unreachable - // CHECK: getelementptr inbounds - // CHECK: ret ptr + // CHECK: icmp ult + // CHECK-NOCHECKS: tail call void @llvm.assume + // CHECK-DEBUG: br i1 + // CHECK-DEBUG: call core::panicking::panic_nounwind + // CHECK-DEBUG: unreachable + // CHECK: getelementptr inbounds + // CHECK: ret ptr x.get_unchecked(i) } diff --git a/tests/codegen/union-abi.rs b/tests/codegen/union-abi.rs index 08015014456ce..ea0281a788de0 100644 --- a/tests/codegen/union-abi.rs +++ b/tests/codegen/union-abi.rs @@ -71,8 +71,8 @@ pub union UnionF32 { a: f32, } -// other: define {{(dso_local )?}}float @test_UnionF32(float %_1) -// x86: define {{(dso_local )?}}i32 @test_UnionF32(float %_1) +// CHECK-OTHER: define {{(dso_local )?}}float @test_UnionF32(float %_1) +// CHECK-X86: define {{(dso_local )?}}i32 @test_UnionF32(float %_1) #[no_mangle] pub fn test_UnionF32(_: UnionF32) -> UnionF32 { loop {} @@ -83,8 +83,8 @@ pub union UnionF32F32 { b: f32, } -// other: define {{(dso_local )?}}float @test_UnionF32F32(float %_1) -// x86: define {{(dso_local )?}}i32 @test_UnionF32F32(float %_1) +// CHECK-OTHER: define {{(dso_local )?}}float @test_UnionF32F32(float %_1) +// CHECK-X86: define {{(dso_local )?}}i32 @test_UnionF32F32(float %_1) #[no_mangle] pub fn test_UnionF32F32(_: UnionF32F32) -> UnionF32F32 { loop {} diff --git a/tests/mir-opt/dataflow-const-prop/transmute.rs b/tests/mir-opt/dataflow-const-prop/transmute.rs index d0391f6974b4e..008a76ec98008 100644 --- a/tests/mir-opt/dataflow-const-prop/transmute.rs +++ b/tests/mir-opt/dataflow-const-prop/transmute.rs @@ -8,7 +8,8 @@ use std::mem::transmute; // EMIT_MIR transmute.less_as_i8.DataflowConstProp.diff pub fn less_as_i8() -> i8 { // CHECK-LABEL: fn less_as_i8( - // FIXME-CHECK: _0 = const -1_i8; + // COM: FIXME: not yet optimized + // COM: CHECK: _0 = const -1_i8; unsafe { transmute(std::cmp::Ordering::Less) } } diff --git a/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.BADFLAGS.stderr b/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.badflags.stderr similarity index 100% rename from tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.BADFLAGS.stderr rename to tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.badflags.stderr diff --git a/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.BADTARGET.stderr b/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.badtarget.stderr similarity index 100% rename from tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.BADTARGET.stderr rename to tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.badtarget.stderr diff --git a/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.rs b/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.rs index c0a4bcac11bda..9badd8c516b36 100644 --- a/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.rs +++ b/tests/ui/invalid-compile-flags/branch-protection-missing-pac-ret.rs @@ -1,14 +1,14 @@ -//@ revisions: BADFLAGS BADTARGET -//@ [BADFLAGS] compile-flags: --target=aarch64-unknown-linux-gnu -Zbranch-protection=leaf -//@ [BADFLAGS] check-fail -//@ [BADFLAGS] needs-llvm-components: aarch64 -//@ [BADTARGET] compile-flags: --target=x86_64-unknown-linux-gnu -Zbranch-protection=bti -//@ [BADTARGET] check-fail -//@ [BADTARGET] needs-llvm-components: x86 +//@ revisions: badflags badtarget +//@ [badflags] compile-flags: --target=aarch64-unknown-linux-gnu -Zbranch-protection=leaf +//@ [badflags] check-fail +//@ [badflags] needs-llvm-components: aarch64 +//@ [badtarget] compile-flags: --target=x86_64-unknown-linux-gnu -Zbranch-protection=bti +//@ [badtarget] check-fail +//@ [badtarget] needs-llvm-components: x86 #![crate_type = "lib"] #![feature(no_core, lang_items)] #![no_core] -#[lang="sized"] -trait Sized { } +#[lang = "sized"] +trait Sized {} diff --git a/tests/ui/macro_backtrace/main.-Zmacro-backtrace.stderr b/tests/ui/macro_backtrace/main.macro-backtrace.stderr similarity index 100% rename from tests/ui/macro_backtrace/main.-Zmacro-backtrace.stderr rename to tests/ui/macro_backtrace/main.macro-backtrace.stderr diff --git a/tests/ui/macro_backtrace/main.rs b/tests/ui/macro_backtrace/main.rs index e39cecb5938b4..7dbf4cedfc07e 100644 --- a/tests/ui/macro_backtrace/main.rs +++ b/tests/ui/macro_backtrace/main.rs @@ -1,7 +1,7 @@ // Test that the macro backtrace facility works //@ aux-build:ping.rs -//@ revisions: default -Zmacro-backtrace -//@[-Zmacro-backtrace] compile-flags: -Z macro-backtrace +//@ revisions: default macro-backtrace +//@[macro-backtrace] compile-flags: -Z macro-backtrace #[macro_use] extern crate ping; diff --git a/tests/ui/precondition-checks/cfg-ub-checks-default.rs b/tests/ui/precondition-checks/cfg-ub-checks-default.rs index b672589d02a23..6d407d8453434 100644 --- a/tests/ui/precondition-checks/cfg-ub-checks-default.rs +++ b/tests/ui/precondition-checks/cfg-ub-checks-default.rs @@ -1,7 +1,7 @@ //@ run-pass -//@ revisions: YES NO -//@ [YES] compile-flags: -Cdebug-assertions=yes -//@ [NO] compile-flags: -Cdebug-assertions=no +//@ revisions: yes no +//@ [yes] compile-flags: -Cdebug-assertions=yes +//@ [no] compile-flags: -Cdebug-assertions=no #![feature(cfg_ub_checks)]