From 94b427d2388fa14a5475ba6808397232f86e6765 Mon Sep 17 00:00:00 2001 From: Philipp Schuster Date: Fri, 7 Jul 2023 18:03:55 +0200 Subject: [PATCH 1/2] serial also on x86 --- src/lib.rs | 8 ++++---- src/port.rs | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 241ffbe..bd59c0e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -18,7 +18,7 @@ //! //! //! ```no_run -//! # #[cfg(target_arch = "x86_64")] +//! # #[cfg(any(target_arch = "x86", target_arch = "x86_64"))] //! # fn main() { //! use uart_16550::SerialPort; //! @@ -33,7 +33,7 @@ //! // To receive a byte: //! let data = serial_port.receive(); //! # } -//! # #[cfg(not(target_arch = "x86_64"))] +//! # #[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))] //! # fn main() {} //! ``` //! @@ -74,12 +74,12 @@ macro_rules! wait_for { /// Memory mapped implementation mod mmio; -#[cfg(target_arch = "x86_64")] +#[cfg(any(target_arch = "x86", target_arch = "x86_64"))] /// Port asm commands implementation mod port; pub use crate::mmio::MmioSerialPort; -#[cfg(target_arch = "x86_64")] +#[cfg(any(target_arch = "x86", target_arch = "x86_64"))] pub use crate::port::SerialPort; bitflags! { diff --git a/src/port.rs b/src/port.rs index 2228a19..338e4b8 100644 --- a/src/port.rs +++ b/src/port.rs @@ -5,7 +5,7 @@ use x86_64::instructions::port::{Port, PortReadOnly, PortWriteOnly}; use crate::LineStsFlags; /// A port-mapped UART. -#[cfg_attr(docsrs, doc(cfg(target_arch = "x86_64")))] +#[cfg_attr(docsrs, doc(cfg(any(target_arch = "x86", target_arch = "x86_64"))))] pub struct SerialPort { data: Port, int_en: PortWriteOnly, From 0c2d14137fb5b8beaa4ba3351fea2b9bb92a6f13 Mon Sep 17 00:00:00 2001 From: Philipp Oppermann Date: Fri, 7 Jul 2023 20:16:06 +0200 Subject: [PATCH 2/2] Trigger CI