From 3efa4109f724357e88321d7eb0644c35d4ba50a7 Mon Sep 17 00:00:00 2001
From: Hiroki Tokunaga <tokusan441@gmail.com>
Date: Fri, 17 Dec 2021 11:35:56 +0900
Subject: [PATCH] refactor: import inside the `x86_64` module

---
 src/registers/control.rs        | 4 ++--
 src/registers/model_specific.rs | 4 ++--
 src/registers/rflags.rs         | 5 ++---
 src/registers/xcontrol.rs       | 6 +++---
 4 files changed, 9 insertions(+), 10 deletions(-)

diff --git a/src/registers/control.rs b/src/registers/control.rs
index e32ab9d46..bfa1e50bd 100644
--- a/src/registers/control.rs
+++ b/src/registers/control.rs
@@ -2,8 +2,6 @@
 
 pub use super::model_specific::{Efer, EferFlags};
 use bitflags::bitflags;
-#[cfg(feature = "inline_asm")]
-use core::arch::asm;
 
 /// Various control flags modifying the basic operation of the CPU.
 #[derive(Debug)]
@@ -163,6 +161,8 @@ bitflags! {
 mod x86_64 {
     use super::*;
     use crate::{instructions::tlb::Pcid, structures::paging::PhysFrame, PhysAddr, VirtAddr};
+    #[cfg(feature = "inline_asm")]
+    use core::arch::asm;
 
     impl Cr0 {
         /// Read the current set of CR0 flags.
diff --git a/src/registers/model_specific.rs b/src/registers/model_specific.rs
index a4c74cf8f..9c48e6b94 100644
--- a/src/registers/model_specific.rs
+++ b/src/registers/model_specific.rs
@@ -4,8 +4,6 @@ use bitflags::bitflags;
 // imports for intra doc links
 #[cfg(doc)]
 use crate::registers::segmentation::{FS, GS};
-#[cfg(feature = "inline_asm")]
-use core::arch::asm;
 
 /// A model specific register.
 #[derive(Debug)]
@@ -129,6 +127,8 @@ mod x86_64 {
         control::Cr4Flags,
         segmentation::{Segment, Segment64, CS, SS},
     };
+    #[cfg(feature = "inline_asm")]
+    use core::arch::asm;
 
     impl Msr {
         /// Read 64 bits msr register.
diff --git a/src/registers/rflags.rs b/src/registers/rflags.rs
index 8487b6b2d..3d5179441 100644
--- a/src/registers/rflags.rs
+++ b/src/registers/rflags.rs
@@ -3,9 +3,6 @@
 #[cfg(feature = "instructions")]
 pub use self::x86_64::*;
 
-#[cfg(feature = "inline_asm")]
-use core::arch::asm;
-
 use bitflags::bitflags;
 
 bitflags! {
@@ -68,6 +65,8 @@ bitflags! {
 #[cfg(feature = "instructions")]
 mod x86_64 {
     use super::*;
+    #[cfg(feature = "inline_asm")]
+    use core::arch::asm;
 
     /// Returns the current value of the RFLAGS register.
     ///
diff --git a/src/registers/xcontrol.rs b/src/registers/xcontrol.rs
index 4a15c0373..36ceea120 100644
--- a/src/registers/xcontrol.rs
+++ b/src/registers/xcontrol.rs
@@ -1,9 +1,6 @@
 //! Access to various extended system registers
 use bitflags::bitflags;
 
-#[cfg(feature = "inline_asm")]
-use core::arch::asm;
-
 /// Extended feature enable mask register
 #[derive(Debug)]
 pub struct XCr0;
@@ -57,6 +54,9 @@ bitflags! {
 #[cfg(feature = "instructions")]
 mod x86_64 {
     use super::*;
+    #[cfg(feature = "inline_asm")]
+    use core::arch::asm;
+
     impl XCr0 {
         /// Read the current set of XCR0 flags.
         #[inline]