The Mimas V2 by Numato Lab is a Spartan 6 FPGA development board with VGA, SD Card, PMOD and audio interfaces. The Spartan 6 variant used by the Mimas V2 is the XC6SLX9 which has 9152 logic cells and 576 Kb BRAM.
This SoC is based on the PicoSoC example by Clifford Wolf which uses the PicoRV32 RISC-V RV32I CPU core.
This SoC is built using the Xilinx ISE 14.7 virtual machine provided by Xilinx, otherwise known as "ISE Design Suite for Windows 10 - 14.7". A script for installing the RISC-V build toolchain, GTKWave and Icarus Verilog in the ISE VM can be found here.
To build the SoC bitstream, run make. The bitstream can be updated with new firmware without re-building the core by running make -B firmware && make image.
| Folder | Contents |
|---|---|
rtl |
Verilog HDL code |
src |
CPU firmware C source code |
test |
Verilog testbench for HDL modules |
xilinx |
Config files for Xilinx ISE tools |