diff --git a/patch/0001-i2c-mlxcpld-Update-module-license.patch b/patch/0001-i2c-mlxcpld-Update-module-license.patch deleted file mode 100644 index e956bd44bca0..000000000000 --- a/patch/0001-i2c-mlxcpld-Update-module-license.patch +++ /dev/null @@ -1,58 +0,0 @@ -From ff35f857e936ddd68635b390c789b203c7cbbbc2 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 10 Dec 2020 18:51:11 +0200 -Subject: [PATCH backport 5.10 001/182] i2c: mlxcpld: Update module license - -Update license to SPDX-License. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Wolfram Sang ---- - drivers/i2c/busses/i2c-mlxcpld.c | 32 +++----------------------------- - 1 file changed, 3 insertions(+), 29 deletions(-) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index 71d7bae2cbca..dbd185368c38 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -1,34 +1,8 @@ -+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 - /* -- * Copyright (c) 2016 Mellanox Technologies. All rights reserved. -- * Copyright (c) 2016 Michael Shych -+ * Mellanox i2c driver - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * -- * 1. Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * 2. Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * 3. Neither the names of the copyright holders nor the names of its -- * contributors may be used to endorse or promote products derived from -- * this software without specific prior written permission. -- * -- * Alternatively, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") version 2 as published by the Free -- * Software Foundation. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. -+ * Copyright (C) 2016-2020 Mellanox Technologies - */ - - #include --- -2.20.1 - diff --git a/patch/0163-platform-mellanox-Introduce-support-for-rack-manager.patch b/patch/0001-platform-mellanox-Introduce-support-for-rack-manager.patch similarity index 89% rename from patch/0163-platform-mellanox-Introduce-support-for-rack-manager.patch rename to patch/0001-platform-mellanox-Introduce-support-for-rack-manager.patch index 5865c7ddd303..67c4a5f6efb6 100644 --- a/patch/0163-platform-mellanox-Introduce-support-for-rack-manager.patch +++ b/patch/0001-platform-mellanox-Introduce-support-for-rack-manager.patch @@ -1,7 +1,7 @@ -From 3ddb1633cbd4c914ac58b64247d5724ab7f2d6c3 Mon Sep 17 00:00:00 2001 +From e81bfa677c49da39ae72d58d96c997dbf2e085b3 Mon Sep 17 00:00:00 2001 From: Vadim Pasternak -Date: Mon, 14 Feb 2022 13:24:44 +0200 -Subject: [PATCH backport 5.10 163/182] platform: mellanox: Introduce support +Date: Wed, 8 Feb 2023 08:33:18 +0200 +Subject: [PATCH backport 6.1.42 01/85] platform: mellanox: Introduce support for rack manager switch The rack switch is designed to provide high bandwidth, low latency @@ -16,12 +16,15 @@ System equipped with: ASICs firmware. Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-2-vadimp@nvidia.com +Signed-off-by: Hans de Goede --- - drivers/platform/x86/mlx-platform.c | 259 ++++++++++++++++++++++++++++ - 1 file changed, 259 insertions(+) + drivers/platform/x86/mlx-platform.c | 261 ++++++++++++++++++++++++++++ + 1 file changed, 261 insertions(+) diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 1d0c13c653b3..3ad85934d6e3 100644 +index 2fac05a17a5c..3e4adeb20a7e 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c @@ -90,6 +90,12 @@ @@ -46,7 +49,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET 0xc7 #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET 0xc8 #define MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET 0xc9 -@@ -215,6 +223,7 @@ +@@ -214,6 +222,7 @@ #define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0) #define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4) #define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0) @@ -54,7 +57,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 #define MLXPLAT_CPLD_I2C_CAP_BIT 0x04 #define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT) -@@ -244,6 +253,7 @@ +@@ -243,6 +252,7 @@ #define MLXPLAT_CPLD_CH2_ETH_MODULAR 3 #define MLXPLAT_CPLD_CH3_ETH_MODULAR 43 #define MLXPLAT_CPLD_CH4_ETH_MODULAR 51 @@ -62,7 +65,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 /* Number of LPC attached MUX platform devices */ #define MLXPLAT_CPLD_LPC_MUX_DEVS 4 -@@ -281,6 +291,9 @@ +@@ -280,6 +290,9 @@ /* Minimum power required for turning on Ethernet modular system (WATT) */ #define MLXPLAT_CPLD_ETH_MODULAR_PWR_MIN 50 @@ -72,7 +75,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 /* mlxplat_priv - platform private data * @pdev_i2c - i2c controller platform device * @pdev_mux - array of mux platform devices -@@ -461,6 +474,36 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = { +@@ -460,6 +473,36 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = { }, }; @@ -109,7 +112,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 /* Platform hotplug devices */ static struct i2c_board_info mlxplat_mlxcpld_pwr[] = { { -@@ -2165,6 +2208,97 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = { +@@ -2064,6 +2107,97 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_nvlink_blade_data = { .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, }; @@ -207,9 +210,9 @@ index 1d0c13c653b3..3ad85934d6e3 100644 /* Platform led default data */ static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = { { -@@ -3166,6 +3300,42 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { +@@ -2947,6 +3081,44 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(2), - .mode = 0444, + .mode = 0200, }, + { + .label = "erot1_reset", @@ -240,17 +243,19 @@ index 1d0c13c653b3..3ad85934d6e3 100644 + .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(4), + .mode = 0644, ++ .secured = 1, + }, + { + .label = "erot2_wp", + .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(5), + .mode = 0644, ++ .secured = 1, + }, { .label = "reset_long_pb", .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -@@ -3361,6 +3531,25 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { +@@ -3142,6 +3314,25 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(4), .mode = 0644, }, @@ -276,7 +281,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 { .label = "config1", .reg = MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET, -@@ -4577,6 +4766,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) +@@ -4257,6 +4448,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) case MLXPLAT_CPLD_LPC_REG_PWR_MASK_OFFSET: case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET: case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET: @@ -287,7 +292,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET: -@@ -4594,6 +4787,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) +@@ -4274,6 +4469,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON: @@ -295,7 +300,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET: case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET: case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET: -@@ -4678,6 +4872,12 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) +@@ -4358,6 +4554,12 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET: case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET: case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET: @@ -308,7 +313,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET: case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET: -@@ -4702,6 +4902,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) +@@ -4382,6 +4584,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON: @@ -317,7 +322,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET: case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET: case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET: -@@ -4812,6 +5014,12 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) +@@ -4492,6 +4696,12 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET: case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET: case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET: @@ -330,7 +335,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET: case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET: -@@ -4836,6 +5044,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) +@@ -4516,6 +4726,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET: case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON: @@ -339,7 +344,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 case MLXPLAT_CPLD_LPC_REG_WD2_TMR_OFFSET: case MLXPLAT_CPLD_LPC_REG_WD2_TLEFT_OFFSET: case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET: -@@ -4903,6 +5113,13 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = { +@@ -4583,6 +4795,13 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = { { MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 }, }; @@ -353,7 +358,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 static const struct reg_default mlxplat_mlxcpld_regmap_eth_modular[] = { { MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, 0x61 }, { MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, 0x00 }, -@@ -4996,6 +5213,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = { +@@ -4676,6 +4895,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = { .reg_write = mlxplat_mlxcpld_reg_write, }; @@ -374,7 +379,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 static const struct regmap_config mlxplat_mlxcpld_regmap_config_eth_modular = { .reg_bits = 8, .val_bits = 8, -@@ -5303,6 +5534,27 @@ static int __init mlxplat_dmi_qmb8700_matched(const struct dmi_system_id *dmi) +@@ -4957,6 +5190,27 @@ static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *d return 1; } @@ -402,7 +407,7 @@ index 1d0c13c653b3..3ad85934d6e3 100644 static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { { .callback = mlxplat_dmi_default_wc_matched, -@@ -5367,6 +5619,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { +@@ -5014,6 +5268,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { DMI_MATCH(DMI_BOARD_NAME, "VMOD0009"), }, }, diff --git a/patch/0003-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch b/patch/0001-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch similarity index 96% rename from patch/0003-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch rename to patch/0001-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch index 7af5a834e9a8..64d591cb4ee2 100644 --- a/patch/0003-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch +++ b/patch/0001-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch @@ -12,7 +12,7 @@ Signed-off-by: Vadym Hlushko 1 file changed, 2 insertions(+) diff --git a/include/net/psample.h b/include/net/psample.h -index e328c51..1c4d70c 100644 +index 0509d2d..c66e325 100644 --- a/include/net/psample.h +++ b/include/net/psample.h @@ -14,6 +14,8 @@ struct psample_group { diff --git a/patch/0004-drop_monitor-Extend-WJH-buffer-linux-channel.patch b/patch/0002-drop_monitor-Extend-WJH-buffer-linux-channel.patch similarity index 72% rename from patch/0004-drop_monitor-Extend-WJH-buffer-linux-channel.patch rename to patch/0002-drop_monitor-Extend-WJH-buffer-linux-channel.patch index 7a7a1a9860e5..66ab39752b4b 100644 --- a/patch/0004-drop_monitor-Extend-WJH-buffer-linux-channel.patch +++ b/patch/0002-drop_monitor-Extend-WJH-buffer-linux-channel.patch @@ -20,22 +20,22 @@ This patch is to add the extended information also for linux channel. 3 files changed, 134 insertions(+) diff --git a/include/net/devlink.h b/include/net/devlink.h -index b01bb9bca..e81314255 100644 +index ba6b8b0..214edcc 100644 --- a/include/net/devlink.h +++ b/include/net/devlink.h -@@ -20,6 +20,10 @@ - #include +@@ -21,6 +21,10 @@ #include + #include +#ifndef SX_EXTEND_WJH_BUFFER_LINUX_CHANNEL +#define SX_EXTEND_WJH_BUFFER_LINUX_CHANNEL +#endif + - #define DEVLINK_RELOAD_STATS_ARRAY_SIZE \ - (__DEVLINK_RELOAD_LIMIT_MAX * __DEVLINK_RELOAD_ACTION_MAX) + struct devlink; + struct devlink_linecard; -@@ -665,6 +669,11 @@ struct devlink_health_reporter_ops { - * @input_dev: Input netdevice. +@@ -711,6 +715,11 @@ struct devlink_health_reporter_ops { + * @dev_tracker: refcount tracker for @input_dev. * @fa_cookie: Flow action user cookie. * @trap_type: Trap type. + * @output_port_dev: Output port netdevice. @@ -46,8 +46,8 @@ index b01bb9bca..e81314255 100644 */ struct devlink_trap_metadata { const char *trap_name; -@@ -672,6 +681,15 @@ struct devlink_trap_metadata { - struct net_device *input_dev; +@@ -721,6 +730,15 @@ struct devlink_trap_metadata { + const struct flow_action_cookie *fa_cookie; enum devlink_trap_type trap_type; + struct net_device *output_port_dev; @@ -63,13 +63,13 @@ index b01bb9bca..e81314255 100644 /** diff --git a/include/uapi/linux/net_dropmon.h b/include/uapi/linux/net_dropmon.h -index 66048cc5d..6afabc7a7 100644 +index 84f622a..d6f6399 100644 --- a/include/uapi/linux/net_dropmon.h +++ b/include/uapi/linux/net_dropmon.h -@@ -93,6 +93,11 @@ enum net_dm_attr { - NET_DM_ATTR_SW_DROPS, /* flag */ +@@ -94,6 +94,11 @@ enum net_dm_attr { NET_DM_ATTR_HW_DROPS, /* flag */ NET_DM_ATTR_FLOW_ACTION_COOKIE, /* binary */ + NET_DM_ATTR_REASON, /* string */ + NET_DM_ATTR_OUT_PORT, /* nested */ + NET_DM_ATTR_OUT_LAG, /* nested */ + NET_DM_ATTR_OUT_TC, /* u16 */ @@ -79,10 +79,10 @@ index 66048cc5d..6afabc7a7 100644 __NET_DM_ATTR_MAX, NET_DM_ATTR_MAX = __NET_DM_ATTR_MAX - 1 diff --git a/net/core/drop_monitor.c b/net/core/drop_monitor.c -index db65ce62b..940d88b8b 100644 +index f084a4a..0405e10 100644 --- a/net/core/drop_monitor.c +++ b/net/core/drop_monitor.c -@@ -599,6 +599,36 @@ static int net_dm_packet_report_in_port_put(struct sk_buff *msg, int ifindex, +@@ -606,6 +606,36 @@ nla_put_failure: return -EMSGSIZE; } @@ -119,7 +119,7 @@ index db65ce62b..940d88b8b 100644 static int net_dm_packet_report_fill(struct sk_buff *msg, struct sk_buff *skb, size_t payload_len) { -@@ -717,6 +747,16 @@ net_dm_flow_action_cookie_size(const struct devlink_trap_metadata *hw_metadata) +@@ -731,6 +761,16 @@ net_dm_flow_action_cookie_size(const struct devlink_trap_metadata *hw_metadata) nla_total_size(hw_metadata->fa_cookie->cookie_len) : 0; } @@ -136,7 +136,7 @@ index db65ce62b..940d88b8b 100644 static size_t net_dm_hw_packet_report_size(size_t payload_len, const struct devlink_trap_metadata *hw_metadata) -@@ -742,6 +782,16 @@ net_dm_hw_packet_report_size(size_t payload_len, +@@ -756,6 +796,16 @@ net_dm_hw_packet_report_size(size_t payload_len, nla_total_size(sizeof(u32)) + /* NET_DM_ATTR_PROTO */ nla_total_size(sizeof(u16)) + @@ -153,7 +153,7 @@ index db65ce62b..940d88b8b 100644 /* NET_DM_ATTR_PAYLOAD */ nla_total_size(payload_len); } -@@ -787,6 +837,43 @@ static int net_dm_hw_packet_report_fill(struct sk_buff *msg, +@@ -801,6 +851,43 @@ static int net_dm_hw_packet_report_fill(struct sk_buff *msg, hw_metadata->fa_cookie->cookie)) goto nla_put_failure; @@ -197,44 +197,42 @@ index db65ce62b..940d88b8b 100644 if (nla_put_u64_64bit(msg, NET_DM_ATTR_TIMESTAMP, ktime_to_ns(skb->tstamp), NET_DM_ATTR_PAD)) goto nla_put_failure; -@@ -853,6 +940,26 @@ net_dm_hw_metadata_copy(const struct devlink_trap_metadata *metadata) - if (hw_metadata->input_dev) - dev_hold(hw_metadata->input_dev); +@@ -867,6 +954,27 @@ net_dm_hw_metadata_copy(const struct devlink_trap_metadata *metadata) + netdev_hold(hw_metadata->input_dev, &hw_metadata->dev_tracker, + GFP_ATOMIC); -+ hw_metadata->output_port_dev = metadata->output_port_dev; -+ if (hw_metadata->output_port_dev) -+ dev_hold(hw_metadata->output_port_dev); ++ hw_metadata->output_port_dev = metadata->output_port_dev; ++ if (hw_metadata->output_port_dev) ++ netdev_hold(hw_metadata->output_port_dev, &hw_metadata->dev_tracker, GFP_ATOMIC); ++ ++ hw_metadata->output_lag_dev = metadata->output_lag_dev; ++ if (hw_metadata->output_lag_dev) ++ netdev_hold(hw_metadata->output_lag_dev, &hw_metadata->dev_tracker, GFP_ATOMIC); + -+ hw_metadata->output_lag_dev = metadata->output_lag_dev; -+ if (hw_metadata->output_lag_dev) -+ dev_hold(hw_metadata->output_lag_dev); ++ hw_metadata->out_tc_valid = metadata->out_tc_valid; ++ if (hw_metadata->out_tc_valid) ++ hw_metadata->out_tc = metadata->out_tc; + -+ hw_metadata->out_tc_valid = metadata->out_tc_valid; -+ if (hw_metadata->out_tc_valid) -+ hw_metadata->out_tc = metadata->out_tc; ++ hw_metadata->out_tc_occ_valid = metadata->out_tc_occ_valid; + -+ hw_metadata->out_tc_occ_valid = metadata->out_tc_occ_valid; -+ if (hw_metadata->out_tc_occ_valid) -+ hw_metadata->out_tc_occ = metadata->out_tc_occ; ++ if (hw_metadata->out_tc_occ_valid) ++ hw_metadata->out_tc_occ = metadata->out_tc_occ; + -+ hw_metadata->latency_valid = metadata->latency_valid; -+ if (hw_metadata->latency_valid) -+ hw_metadata->latency = metadata->latency; ++ hw_metadata->latency_valid = metadata->latency_valid; ++ if (hw_metadata->latency_valid) ++ hw_metadata->latency = metadata->latency; + return hw_metadata; free_trap_name: -@@ -869,6 +976,10 @@ net_dm_hw_metadata_free(const struct devlink_trap_metadata *hw_metadata) +@@ -882,6 +990,10 @@ static void + net_dm_hw_metadata_free(struct devlink_trap_metadata *hw_metadata) { - if (hw_metadata->input_dev) - dev_put(hw_metadata->input_dev); -+ if (hw_metadata->output_port_dev) -+ dev_put(hw_metadata->output_port_dev); -+ if (hw_metadata->output_lag_dev) -+ dev_put(hw_metadata->output_lag_dev); + netdev_put(hw_metadata->input_dev, &hw_metadata->dev_tracker); ++ if (hw_metadata->output_port_dev) ++ netdev_put(hw_metadata->output_port_dev, &hw_metadata->dev_tracker); ++ if (hw_metadata->output_lag_dev) ++ netdev_put(hw_metadata->output_lag_dev, &hw_metadata->dev_tracker); kfree(hw_metadata->fa_cookie); kfree(hw_metadata->trap_name); kfree(hw_metadata->trap_group_name); --- -2.30.2 - diff --git a/patch/0002-i2c-mlxcpld-Decrease-polling-time-for-performance-im.patch b/patch/0002-i2c-mlxcpld-Decrease-polling-time-for-performance-im.patch deleted file mode 100644 index 8335086471e6..000000000000 --- a/patch/0002-i2c-mlxcpld-Decrease-polling-time-for-performance-im.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 12fe50acf879f7552616a539e7b4a580da809a7b Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 10 Dec 2020 18:51:12 +0200 -Subject: [PATCH backport 5.10 002/182] i2c: mlxcpld: Decrease polling time for - performance improvement - -Decrease polling time 'MLXCPLD_I2C_POLL_TIME' from 2000 usec to 400 -usec. It greatly improves performance of I2C transactions. - -Reliability of setting polling time to 400 usec has been thoroughly -validated across all the supported systems. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Wolfram Sang ---- - drivers/i2c/busses/i2c-mlxcpld.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index dbd185368c38..9e45214d1eb6 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -25,7 +25,7 @@ - #define MLXCPLD_I2C_MAX_ADDR_LEN 4 - #define MLXCPLD_I2C_RETR_NUM 2 - #define MLXCPLD_I2C_XFER_TO 500000 /* usec */ --#define MLXCPLD_I2C_POLL_TIME 2000 /* usec */ -+#define MLXCPLD_I2C_POLL_TIME 400 /* usec */ - - /* LPC I2C registers */ - #define MLXCPLD_LPCI2C_CPBLTY_REG 0x0 --- -2.20.1 - diff --git a/patch/0002-platform-mellanox-Change-reset_pwr_converter_fail-at.patch b/patch/0002-platform-mellanox-Change-reset_pwr_converter_fail-at.patch new file mode 100644 index 000000000000..a372a0aa9646 --- /dev/null +++ b/patch/0002-platform-mellanox-Change-reset_pwr_converter_fail-at.patch @@ -0,0 +1,38 @@ +From c93a5081438b02b5ec4d3fd1fde8e6bf383a2996 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:19 +0200 +Subject: [PATCH backport 6.1.42 02/85] platform: mellanox: Change + "reset_pwr_converter_fail" attribute + +Change "reset_voltmon_upgrade_fail" attribute name to +"reset_pwr_converter_fail". + +For systems using "mlxplat_mlxcpld_default_ng_regs_io_data", relevant +CPLD 'register.bit' indicates the failure of power converter, while on +older systems same 'register.bit' indicates failure of voltage monitor +devices upgrade failure. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-3-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 3e4adeb20a7e..c53eca49c47f 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -3186,7 +3186,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mode = 0444, + }, + { +- .label = "reset_voltmon_upgrade_fail", ++ .label = "reset_pwr_converter_fail", + .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(0), + .mode = 0444, +-- +2.20.1 + diff --git a/patch/0003-i2c-mlxcpld-Add-support-for-I2C-bus-frequency-settin.patch b/patch/0003-i2c-mlxcpld-Add-support-for-I2C-bus-frequency-settin.patch deleted file mode 100644 index e33c562439a6..000000000000 --- a/patch/0003-i2c-mlxcpld-Add-support-for-I2C-bus-frequency-settin.patch +++ /dev/null @@ -1,128 +0,0 @@ -From 70a2f64a3d7b680a509c519015e4a46b6bc15ca4 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Wed, 6 Jan 2021 01:33:47 +0200 -Subject: [PATCH backport 5.10 003/182] i2c: mlxcpld: Add support for I2C bus - frequency setting - -Add support for I2C bus frequency setting according to the specific -system capability. This capability is obtained from CPLD frequency -setting register, which could be provided through the platform data. -If such register is provided, it specifies minimal I2C bus frequency -to be used for the devices attached to the I2C bus. Supported -freqeuncies are 100KHz, 400KHz, 1MHz, while 100KHz is the default. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Wolfram Sang ---- - drivers/i2c/busses/i2c-mlxcpld.c | 63 +++++++++++++++++++++++++++++++- - 1 file changed, 62 insertions(+), 1 deletion(-) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index 9e45214d1eb6..4e0b7c2882ce 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -11,7 +11,9 @@ - #include - #include - #include -+#include - #include -+#include - - /* General defines */ - #define MLXPLAT_CPLD_LPC_I2C_BASE_ADDR 0x2000 -@@ -46,6 +48,16 @@ - #define MLXCPLD_LPCI2C_ACK_IND 1 - #define MLXCPLD_LPCI2C_NACK_IND 2 - -+#define MLXCPLD_I2C_FREQ_1000KHZ_SET 0x04 -+#define MLXCPLD_I2C_FREQ_400KHZ_SET 0x0f -+#define MLXCPLD_I2C_FREQ_100KHZ_SET 0x42 -+ -+enum mlxcpld_i2c_frequency { -+ MLXCPLD_I2C_FREQ_1000KHZ = 1, -+ MLXCPLD_I2C_FREQ_400KHZ = 2, -+ MLXCPLD_I2C_FREQ_100KHZ = 3, -+}; -+ - struct mlxcpld_i2c_curr_xfer { - u8 cmd; - u8 addr_width; -@@ -463,8 +475,45 @@ static struct i2c_adapter mlxcpld_i2c_adapter = { - .nr = MLXCPLD_I2C_BUS_NUM, - }; - -+static int -+mlxcpld_i2c_set_frequency(struct mlxcpld_i2c_priv *priv, -+ struct mlxreg_core_hotplug_platform_data *pdata) -+{ -+ struct mlxreg_core_item *item = pdata->items; -+ struct mlxreg_core_data *data; -+ u32 regval; -+ u8 freq; -+ int err; -+ -+ if (!item) -+ return 0; -+ -+ /* Read frequency setting. */ -+ data = item->data; -+ err = regmap_read(pdata->regmap, data->reg, ®val); -+ if (err) -+ return err; -+ -+ /* Set frequency only if it is not 100KHz, which is default. */ -+ switch ((data->reg & data->mask) >> data->bit) { -+ case MLXCPLD_I2C_FREQ_1000KHZ: -+ freq = MLXCPLD_I2C_FREQ_1000KHZ_SET; -+ break; -+ case MLXCPLD_I2C_FREQ_400KHZ: -+ freq = MLXCPLD_I2C_FREQ_400KHZ_SET; -+ break; -+ default: -+ return 0; -+ } -+ -+ mlxcpld_i2c_write_comm(priv, MLXCPLD_LPCI2C_HALF_CYC_REG, &freq, 1); -+ -+ return 0; -+} -+ - static int mlxcpld_i2c_probe(struct platform_device *pdev) - { -+ struct mlxreg_core_hotplug_platform_data *pdata; - struct mlxcpld_i2c_priv *priv; - int err; - u8 val; -@@ -479,6 +528,14 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev) - priv->dev = &pdev->dev; - priv->base_addr = MLXPLAT_CPLD_LPC_I2C_BASE_ADDR; - -+ /* Set I2C bus frequency if platform data provides this info. */ -+ pdata = dev_get_platdata(&pdev->dev); -+ if (pdata) { -+ err = mlxcpld_i2c_set_frequency(priv, pdata); -+ if (err) -+ goto mlxcpld_i2_probe_failed; -+ } -+ - /* Register with i2c layer */ - mlxcpld_i2c_adapter.timeout = usecs_to_jiffies(MLXCPLD_I2C_XFER_TO); - /* Read capability register */ -@@ -497,8 +554,12 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev) - - err = i2c_add_numbered_adapter(&priv->adap); - if (err) -- mutex_destroy(&priv->lock); -+ goto mlxcpld_i2_probe_failed; - -+ return 0; -+ -+mlxcpld_i2_probe_failed: -+ mutex_destroy(&priv->lock); - return err; - } - --- -2.20.1 - diff --git a/patch/0003-platform-mellanox-Cosmetic-changes-rename-to-more-co.patch b/patch/0003-platform-mellanox-Cosmetic-changes-rename-to-more-co.patch new file mode 100644 index 000000000000..a965cb8508d7 --- /dev/null +++ b/patch/0003-platform-mellanox-Cosmetic-changes-rename-to-more-co.patch @@ -0,0 +1,117 @@ +From db6f384dac123c41fce3169bc9961f304086e4cd Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:20 +0200 +Subject: [PATCH backport 6.1.42 03/85] platform: mellanox: Cosmetic changes - + rename to more common name + +Rename 'nvlink_blade' in several declaration to more common name +"chassis_blade", since these names are going to be used for different +kinds of blades. + +Fix 'swicth' to 'switch' in comment. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-4-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 28 ++++++++++++++-------------- + 1 file changed, 14 insertions(+), 14 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index c53eca49c47f..e629ec8a2a2f 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -473,7 +473,7 @@ static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = { + }, + }; + +-/* Platform channels for rack swicth system family */ ++/* Platform channels for rack switch system family */ + static const int mlxplat_rack_switch_channels[] = { + 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, + }; +@@ -2085,7 +2085,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_global_wp_items_data[] = { + }, + }; + +-static struct mlxreg_core_item mlxplat_mlxcpld_nvlink_blade_items[] = { ++static struct mlxreg_core_item mlxplat_mlxcpld_chassis_blade_items[] = { + { + .data = mlxplat_mlxcpld_global_wp_items_data, + .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, +@@ -2098,9 +2098,9 @@ static struct mlxreg_core_item mlxplat_mlxcpld_nvlink_blade_items[] = { + }; + + static +-struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_nvlink_blade_data = { +- .items = mlxplat_mlxcpld_nvlink_blade_items, +- .counter = ARRAY_SIZE(mlxplat_mlxcpld_nvlink_blade_items), ++struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = { ++ .items = mlxplat_mlxcpld_chassis_blade_items, ++ .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items), + .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, + .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX, + .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, +@@ -3848,8 +3848,8 @@ static struct mlxreg_core_platform_data mlxplat_modular_regs_io_data = { + .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_regs_io_data), + }; + +-/* Platform register access for NVLink blade systems family data */ +-static struct mlxreg_core_data mlxplat_mlxcpld_nvlink_blade_regs_io_data[] = { ++/* Platform register access for chassis blade systems family data */ ++static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = { + { + .label = "cpld1_version", + .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET, +@@ -4046,9 +4046,9 @@ static struct mlxreg_core_data mlxplat_mlxcpld_nvlink_blade_regs_io_data[] = { + }, + }; + +-static struct mlxreg_core_platform_data mlxplat_nvlink_blade_regs_io_data = { +- .data = mlxplat_mlxcpld_nvlink_blade_regs_io_data, +- .counter = ARRAY_SIZE(mlxplat_mlxcpld_nvlink_blade_regs_io_data), ++static struct mlxreg_core_platform_data mlxplat_chassis_blade_regs_io_data = { ++ .data = mlxplat_mlxcpld_chassis_blade_regs_io_data, ++ .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_regs_io_data), + }; + + /* Platform FAN default */ +@@ -5168,14 +5168,14 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi) + return 1; + } + +-static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *dmi) ++static int __init mlxplat_dmi_chassis_blade_matched(const struct dmi_system_id *dmi) + { + int i; + + mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; + mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data); + mlxplat_mux_data = mlxplat_default_mux_data; +- mlxplat_hotplug = &mlxplat_mlxcpld_nvlink_blade_data; ++ mlxplat_hotplug = &mlxplat_mlxcpld_chassis_blade_data; + mlxplat_hotplug->deferred_nr = + mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; + for (i = 0; i < mlxplat_mux_num; i++) { +@@ -5183,7 +5183,7 @@ static int __init mlxplat_dmi_nvlink_blade_matched(const struct dmi_system_id *d + mlxplat_mux_data[i].n_values = + ARRAY_SIZE(mlxplat_msn21xx_channels); + } +- mlxplat_regs_io = &mlxplat_nvlink_blade_regs_io_data; ++ mlxplat_regs_io = &mlxplat_chassis_blade_regs_io_data; + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400; + +@@ -5288,7 +5288,7 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { + }, + }, + { +- .callback = mlxplat_dmi_nvlink_blade_matched, ++ .callback = mlxplat_dmi_chassis_blade_matched, + .matches = { + DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"), + }, +-- +2.20.1 + diff --git a/patch/0004-i2c-mux-mlxcpld-Update-module-license.patch b/patch/0004-i2c-mux-mlxcpld-Update-module-license.patch deleted file mode 100644 index 726f12379035..000000000000 --- a/patch/0004-i2c-mux-mlxcpld-Update-module-license.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 9f63205197ecd85ef2f7e0c54c4aac5f7aecc9b8 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Fri, 22 Jan 2021 21:24:56 +0200 -Subject: [PATCH backport 5.10 004/182] i2c: mux: mlxcpld: Update module - license - -Update license to SPDX-License. - -Signed-off-by: Vadim Pasternak -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 33 +++-------------------------- - 1 file changed, 3 insertions(+), 30 deletions(-) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index 5ed55ca4fe93..53bce81cf5c9 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -1,35 +1,8 @@ -+// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 - /* -- * drivers/i2c/muxes/i2c-mux-mlxcpld.c -- * Copyright (c) 2016 Mellanox Technologies. All rights reserved. -- * Copyright (c) 2016 Michael Shych -+ * Mellanox i2c mux driver - * -- * Redistribution and use in source and binary forms, with or without -- * modification, are permitted provided that the following conditions are met: -- * -- * 1. Redistributions of source code must retain the above copyright -- * notice, this list of conditions and the following disclaimer. -- * 2. Redistributions in binary form must reproduce the above copyright -- * notice, this list of conditions and the following disclaimer in the -- * documentation and/or other materials provided with the distribution. -- * 3. Neither the names of the copyright holders nor the names of its -- * contributors may be used to endorse or promote products derived from -- * this software without specific prior written permission. -- * -- * Alternatively, this software may be distributed under the terms of the -- * GNU General Public License ("GPL") version 2 as published by the Free -- * Software Foundation. -- * -- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" -- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE -- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF -- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS -- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN -- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) -- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE -- * POSSIBILITY OF SUCH DAMAGE. -+ * Copyright (C) 2016-2020 Mellanox Technologies - */ - - #include --- -2.20.1 - diff --git a/patch/0178-platform-mellanox-Introduce-support-for-next-generat.patch b/patch/0004-platform-mellanox-Introduce-support-for-next-generat.patch similarity index 84% rename from patch/0178-platform-mellanox-Introduce-support-for-next-generat.patch rename to patch/0004-platform-mellanox-Introduce-support-for-next-generat.patch index ecf135f71858..7e94603d237f 100644 --- a/patch/0178-platform-mellanox-Introduce-support-for-next-generat.patch +++ b/patch/0004-platform-mellanox-Introduce-support-for-next-generat.patch @@ -1,13 +1,16 @@ -From 30a9045deb3da304b03f8451fad1a8d79a849da9 Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Sun, 4 Sep 2022 14:03:58 +0300 -Subject: [PATCH backport 5.10 178/182] platform: mellanox: Introduce support - for next-generation 800GB/s ethernet switch. +From 20c7544580b2ec58139fb9ad84fee44052c75573 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:21 +0200 +Subject: [PATCH backport 6.1.42 04/85] platform: mellanox: Introduce support + for next-generation 800GB/s switch + +Introduce support for Nvidia next-generation 800GB/s ethernet switch +SN5600. -Introduce support for Nvidia next-generation 800GB/s ethernet switch - SN5600. SN5600 is 51.2 Tbps Ethernet switch based on Nvidia Spectrum-4 ASIC. -It can provide up to 64x800Gb/s (ETH) full bidirectional bandwidth per port -using PAM-4 modulations. The system supports 64 Belly to Belly 2x4 OSFP cages. +It can provide up to 64x800Gb/s (ETH) full bidirectional bandwidth per +port using PAM-4 modulations. The system supports 64 Belly to Belly 2x4 +OSFP cages. The switch was designed to fit standard 2U racks. Features: @@ -18,17 +21,19 @@ Features: - System management board is based on Intel Coffee-lake CPU E-2276 with secure-boot support. -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-5-vadimp@nvidia.com +Signed-off-by: Hans de Goede --- - drivers/platform/x86/mlx-platform.c | 178 ++++++++++++++++++++++++++++ - 1 file changed, 178 insertions(+) + drivers/platform/x86/mlx-platform.c | 180 ++++++++++++++++++++++++++++ + 1 file changed, 180 insertions(+) diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 3f29ab98480d..4bbe1d8f016d 100644 +index e629ec8a2a2f..cd7f6ff11b1e 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c -@@ -255,6 +255,7 @@ +@@ -253,6 +253,7 @@ #define MLXPLAT_CPLD_CH3_ETH_MODULAR 43 #define MLXPLAT_CPLD_CH4_ETH_MODULAR 51 #define MLXPLAT_CPLD_CH2_RACK_SWITCH 18 @@ -36,7 +41,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 /* Number of LPC attached MUX platform devices */ #define MLXPLAT_CPLD_LPC_MUX_DEVS 4 -@@ -505,6 +506,37 @@ static struct i2c_mux_reg_platform_data mlxplat_rack_switch_mux_data[] = { +@@ -503,6 +504,37 @@ static struct i2c_mux_reg_platform_data mlxplat_rack_switch_mux_data[] = { }; @@ -74,7 +79,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 /* Platform hotplug devices */ static struct i2c_board_info mlxplat_mlxcpld_pwr[] = { { -@@ -524,6 +556,15 @@ static struct i2c_board_info mlxplat_mlxcpld_ext_pwr[] = { +@@ -522,6 +554,15 @@ static struct i2c_board_info mlxplat_mlxcpld_ext_pwr[] = { }, }; @@ -90,7 +95,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 static struct i2c_board_info mlxplat_mlxcpld_fan[] = { { I2C_BOARD_INFO("24c32", 0x50), -@@ -603,6 +644,23 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_wc_items_data[] = { +@@ -601,6 +642,23 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_wc_items_data[] = { }, }; @@ -114,7 +119,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_items_data[] = { { .label = "fan1", -@@ -1326,6 +1384,47 @@ static struct mlxreg_core_item mlxplat_mlxcpld_ext_items[] = { +@@ -1224,6 +1282,47 @@ static struct mlxreg_core_item mlxplat_mlxcpld_ext_items[] = { } }; @@ -162,7 +167,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { .items = mlxplat_mlxcpld_ext_items, -@@ -1336,6 +1435,16 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { +@@ -1234,6 +1333,16 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2, }; @@ -179,7 +184,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 static struct mlxreg_core_data mlxplat_mlxcpld_modular_pwr_items_data[] = { { .label = "pwr1", -@@ -3323,6 +3432,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { +@@ -3093,6 +3202,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(7), .mode = 0644, }, @@ -188,11 +193,12 @@ index 3f29ab98480d..4bbe1d8f016d 100644 + .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(1), + .mode = 0644, ++ .secured = 1, + }, { .label = "erot1_recovery", .reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, -@@ -3449,6 +3564,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { +@@ -3221,6 +3337,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(6), .mode = 0444, }, @@ -205,7 +211,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 { .label = "psu1_on", .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -@@ -3530,6 +3651,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { +@@ -3302,6 +3424,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .bit = 5, .mode = 0444, }, @@ -214,11 +220,12 @@ index 3f29ab98480d..4bbe1d8f016d 100644 + .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(0), + .mode = 0644, ++ .secured = 1, + }, { .label = "vpd_wp", .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -@@ -3554,6 +3681,30 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { +@@ -3326,6 +3455,30 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { .mask = GENMASK(7, 0) & ~BIT(1), .mode = 0444, }, @@ -249,7 +256,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 { .label = "spi_chnl_select", .reg = MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT, -@@ -5568,6 +5719,27 @@ static int __init mlxplat_dmi_rack_switch_matched(const struct dmi_system_id *dm +@@ -5211,6 +5364,27 @@ static int __init mlxplat_dmi_rack_switch_matched(const struct dmi_system_id *dm return 1; } @@ -277,7 +284,7 @@ index 3f29ab98480d..4bbe1d8f016d 100644 static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { { .callback = mlxplat_dmi_default_wc_matched, -@@ -5651,6 +5823,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { +@@ -5287,6 +5461,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { DMI_MATCH(DMI_BOARD_NAME, "VMOD0011"), }, }, diff --git a/patch/0005-i2c-mux-mlxcpld-Move-header-file-out-of-x86-realm.patch b/patch/0005-i2c-mux-mlxcpld-Move-header-file-out-of-x86-realm.patch deleted file mode 100644 index 15ce3b5312c9..000000000000 --- a/patch/0005-i2c-mux-mlxcpld-Move-header-file-out-of-x86-realm.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 0f351fad0a71a2b6ec4709af908e621a90649634 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Fri, 22 Jan 2021 21:24:58 +0200 -Subject: [PATCH backport 5.10 005/182] i2c: mux: mlxcpld: Move header file out - of x86 realm - -Move out header file from include/linux/platform_data/x86/ to -include/linux/platform_data/, since it does not depend on x86 -architecture. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 2 +- - include/linux/platform_data/{x86 => }/mlxcpld.h | 0 - 2 files changed, 1 insertion(+), 1 deletion(-) - rename include/linux/platform_data/{x86 => }/mlxcpld.h (100%) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index 53bce81cf5c9..3d894cfb19df 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -11,7 +11,7 @@ - #include - #include - #include --#include -+#include - #include - #include - -diff --git a/include/linux/platform_data/x86/mlxcpld.h b/include/linux/platform_data/mlxcpld.h -similarity index 100% -rename from include/linux/platform_data/x86/mlxcpld.h -rename to include/linux/platform_data/mlxcpld.h --- -2.20.1 - diff --git a/patch/0005-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch b/patch/0005-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch new file mode 100644 index 000000000000..207e78011df0 --- /dev/null +++ b/patch/0005-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch @@ -0,0 +1,640 @@ +From 8f1fd1a859300ddf496de8876e8f3e7dcb54a3dc Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:22 +0200 +Subject: [PATCH backport 6.1.42 05/85] platform: mellanox: Introduce support + of new Nvidia L1 switch + +Add support for new L1 switch nodes providing L1 connectivity for +multi-node networking chassis. + +The purpose is to provide compute server with full management and IO +subsystems with connections to L1 switches. + +System contains the following components: +- COMe module based on Intel Coffee Lake CPU +- Switch baseboard with two ASICs, while + 24 ports of each ASICs are connected to one backplane connector + 32 ports of each ASIC are connected to 8 OSFPs +- Integrated 60mm dual-rotor FANs inside L1 node (N+2 redundancy) +- Support 48V or 54V DC input from the external power server. + +Add the structures related to the new systems to allow proper activation +of the all required platform driver. + +Add poweroff callback to support deep power cycle flow, which should +include special actions against CPLD device for performing graceful +operation. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-6-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 392 +++++++++++++++++++++++++++- + 1 file changed, 391 insertions(+), 1 deletion(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index cd7f6ff11b1e..1a07a9994f05 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + + #define MLX_PLAT_DEVICE_NAME "mlxplat" +@@ -61,12 +62,19 @@ + #define MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET 0x37 + #define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a + #define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b ++#define MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET 0x3c ++#define MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET 0x3d ++#define MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET 0x3e ++#define MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET 0x3f + #define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40 + #define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET 0x41 + #define MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET 0x42 + #define MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET 0x43 + #define MLXPLAT_CPLD_LPC_REG_AGGRCX_OFFSET 0x44 + #define MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET 0x45 ++#define MLXPLAT_CPLD_LPC_REG_BRD_OFFSET 0x47 ++#define MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET 0x48 ++#define MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET 0x49 + #define MLXPLAT_CPLD_LPC_REG_GWP_OFFSET 0x4a + #define MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET 0x4b + #define MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET 0x4c +@@ -96,6 +104,9 @@ + #define MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET 0x94 + #define MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET 0x95 + #define MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET 0x96 ++#define MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET 0x97 ++#define MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET 0x98 ++#define MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET 0x99 + #define MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET 0x9a + #define MLXPLAT_CPLD_LPC_REG_LC_VR_EVENT_OFFSET 0x9b + #define MLXPLAT_CPLD_LPC_REG_LC_VR_MASK_OFFSET 0x9c +@@ -127,6 +138,7 @@ + #define MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET 0xd1 + #define MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET 0xd2 + #define MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET 0xd3 ++#define MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET 0xd9 + #define MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET 0xde + #define MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET 0xdf + #define MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET 0xe0 +@@ -210,6 +222,7 @@ + MLXPLAT_CPLD_AGGR_MASK_LC_SDWN) + #define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1 + #define MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2 BIT(2) ++#define MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT BIT(4) + #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6) + #define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0) + #define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0) +@@ -223,6 +236,16 @@ + #define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4) + #define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0) + #define MLXPLAT_CPLD_EROT_MASK GENMASK(1, 0) ++#define MLXPLAT_CPLD_PWR_BUTTON_MASK BIT(0) ++#define MLXPLAT_CPLD_LATCH_RST_MASK BIT(5) ++#define MLXPLAT_CPLD_THERMAL1_PDB_MASK BIT(3) ++#define MLXPLAT_CPLD_THERMAL2_PDB_MASK BIT(4) ++#define MLXPLAT_CPLD_INTRUSION_MASK BIT(6) ++#define MLXPLAT_CPLD_PWM_PG_MASK BIT(7) ++#define MLXPLAT_CPLD_L1_CHA_HEALTH_MASK (MLXPLAT_CPLD_THERMAL1_PDB_MASK | \ ++ MLXPLAT_CPLD_THERMAL2_PDB_MASK | \ ++ MLXPLAT_CPLD_INTRUSION_MASK |\ ++ MLXPLAT_CPLD_PWM_PG_MASK) + #define MLXPLAT_CPLD_I2C_CAP_BIT 0x04 + #define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT) + +@@ -235,6 +258,8 @@ + /* Masks for aggregation for modular systems */ + #define MLXPLAT_CPLD_LPC_LC_MASK GENMASK(7, 0) + ++#define MLXPLAT_CPLD_HALT_MASK BIT(3) ++ + /* Default I2C parent bus number */ + #define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1 + +@@ -315,6 +340,8 @@ struct mlxplat_priv { + void *regmap; + }; + ++static struct platform_device *mlxplat_dev; ++ + /* Regions for LPC I2C controller and LPC base register space */ + static const struct resource mlxplat_lpc_resources[] = { + [0] = DEFINE_RES_NAMED(MLXPLAT_CPLD_LPC_I2C_BASE_ADRR, +@@ -2307,6 +2334,156 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_rack_switch_data = { + .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, + }; + ++/* Callback performs graceful shutdown after notification about power button event */ ++static int ++mlxplat_mlxcpld_l1_switch_pwr_events_handler(void *handle, enum mlxreg_hotplug_kind kind, ++ u8 action) ++{ ++ dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button"); ++ kernel_halt(); ++ return 0; ++} ++ ++static struct mlxreg_core_hotplug_notifier mlxplat_mlxcpld_l1_switch_pwr_events_notifier = { ++ .user_handler = mlxplat_mlxcpld_l1_switch_pwr_events_handler, ++}; ++ ++/* Platform hotplug for l1 switch systems family data */ ++static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_pwr_events_items_data[] = { ++ { ++ .label = "power_button", ++ .reg = MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET, ++ .mask = MLXPLAT_CPLD_PWR_BUTTON_MASK, ++ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, ++ .hpdev.notifier = &mlxplat_mlxcpld_l1_switch_pwr_events_notifier, ++ }, ++}; ++ ++/* Callback activates latch reset flow after notification about intrusion event */ ++static int ++mlxplat_mlxcpld_l1_switch_intrusion_events_handler(void *handle, enum mlxreg_hotplug_kind kind, ++ u8 action) ++{ ++ struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); ++ u32 regval; ++ int err; ++ ++ err = regmap_read(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, ®val); ++ if (err) ++ goto fail_regmap_read; ++ ++ if (action) { ++ dev_info(&mlxplat_dev->dev, "Detected intrusion - system latch is opened"); ++ err = regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, ++ regval | MLXPLAT_CPLD_LATCH_RST_MASK); ++ } else { ++ dev_info(&mlxplat_dev->dev, "System latch is properly closed"); ++ err = regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, ++ regval & ~MLXPLAT_CPLD_LATCH_RST_MASK); ++ } ++ ++ if (err) ++ goto fail_regmap_write; ++ ++ return 0; ++ ++fail_regmap_read: ++fail_regmap_write: ++ dev_err(&mlxplat_dev->dev, "Register access failed"); ++ return err; ++} ++ ++static struct mlxreg_core_hotplug_notifier mlxplat_mlxcpld_l1_switch_intrusion_events_notifier = { ++ .user_handler = mlxplat_mlxcpld_l1_switch_intrusion_events_handler, ++}; ++ ++static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_health_events_items_data[] = { ++ { ++ .label = "thermal1_pdb", ++ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET, ++ .mask = MLXPLAT_CPLD_THERMAL1_PDB_MASK, ++ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, ++ }, ++ { ++ .label = "thermal2_pdb", ++ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET, ++ .mask = MLXPLAT_CPLD_THERMAL2_PDB_MASK, ++ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, ++ }, ++ { ++ .label = "intrusion", ++ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET, ++ .mask = MLXPLAT_CPLD_INTRUSION_MASK, ++ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, ++ .hpdev.notifier = &mlxplat_mlxcpld_l1_switch_intrusion_events_notifier, ++ }, ++ { ++ .label = "pwm_pg", ++ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET, ++ .mask = MLXPLAT_CPLD_PWM_PG_MASK, ++ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, ++ }, ++}; ++ ++static struct mlxreg_core_item mlxplat_mlxcpld_l1_switch_events_items[] = { ++ { ++ .data = mlxplat_mlxcpld_default_ng_fan_items_data, ++ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, ++ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, ++ .mask = MLXPLAT_CPLD_FAN_NG_MASK, ++ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_fan_items_data), ++ .inversed = 1, ++ .health = false, ++ }, ++ { ++ .data = mlxplat_mlxcpld_erot_ap_items_data, ++ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, ++ .reg = MLXPLAT_CPLD_LPC_REG_EROT_OFFSET, ++ .mask = MLXPLAT_CPLD_EROT_MASK, ++ .count = ARRAY_SIZE(mlxplat_mlxcpld_erot_ap_items_data), ++ .inversed = 1, ++ .health = false, ++ }, ++ { ++ .data = mlxplat_mlxcpld_erot_error_items_data, ++ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, ++ .reg = MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET, ++ .mask = MLXPLAT_CPLD_EROT_MASK, ++ .count = ARRAY_SIZE(mlxplat_mlxcpld_erot_error_items_data), ++ .inversed = 1, ++ .health = false, ++ }, ++ { ++ .data = mlxplat_mlxcpld_l1_switch_pwr_events_items_data, ++ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, ++ .reg = MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET, ++ .mask = MLXPLAT_CPLD_PWR_BUTTON_MASK, ++ .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_pwr_events_items_data), ++ .inversed = 0, ++ .health = false, ++ }, ++ { ++ .data = mlxplat_mlxcpld_l1_switch_health_events_items_data, ++ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, ++ .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET, ++ .mask = MLXPLAT_CPLD_L1_CHA_HEALTH_MASK, ++ .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_health_events_items_data), ++ .inversed = 0, ++ .health = false, ++ .ind = 8, ++ }, ++}; ++ ++static ++struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_l1_switch_data = { ++ .items = mlxplat_mlxcpld_l1_switch_events_items, ++ .counter = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_events_items), ++ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, ++ .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, ++ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, ++ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT, ++}; ++ + /* Platform led default data */ + static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = { + { +@@ -2836,6 +3013,114 @@ static struct mlxreg_core_platform_data mlxplat_modular_led_data = { + .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_led_data), + }; + ++/* Platform led data for chassis system */ ++static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_led_data[] = { ++ { ++ .label = "status:green", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ }, ++ { ++ .label = "status:orange", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK ++ }, ++ { ++ .label = "fan1:green", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(0), ++ }, ++ { ++ .label = "fan1:orange", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(0), ++ }, ++ { ++ .label = "fan2:green", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(1), ++ }, ++ { ++ .label = "fan2:orange", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(1), ++ }, ++ { ++ .label = "fan3:green", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(2), ++ }, ++ { ++ .label = "fan3:orange", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(2), ++ }, ++ { ++ .label = "fan4:green", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(3), ++ }, ++ { ++ .label = "fan4:orange", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(3), ++ }, ++ { ++ .label = "fan5:green", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(4), ++ }, ++ { ++ .label = "fan5:orange", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(4), ++ }, ++ { ++ .label = "fan6:green", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(5), ++ }, ++ { ++ .label = "fan6:orange", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, ++ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, ++ .bit = BIT(5), ++ }, ++ { ++ .label = "uid:blue", ++ .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, ++ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, ++ }, ++}; ++ ++static struct mlxreg_core_platform_data mlxplat_l1_switch_led_data = { ++ .data = mlxplat_mlxcpld_l1_switch_led_data, ++ .counter = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_led_data), ++}; ++ + /* Platform register access default */ + static struct mlxreg_core_data mlxplat_mlxcpld_default_regs_io_data[] = { + { +@@ -3367,12 +3652,48 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mask = GENMASK(7, 0) & ~BIT(3), + .mode = 0200, + }, ++ { ++ .label = "deep_pwr_cycle", ++ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, ++ .mask = GENMASK(7, 0) & ~BIT(5), ++ .mode = 0200, ++ }, ++ { ++ .label = "latch_reset", ++ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, ++ .mask = GENMASK(7, 0) & ~BIT(5), ++ .mode = 0200, ++ }, + { + .label = "jtag_enable", + .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, + .mask = GENMASK(7, 0) & ~BIT(4), + .mode = 0644, + }, ++ { ++ .label = "dbg1", ++ .reg = MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET, ++ .bit = GENMASK(7, 0), ++ .mode = 0644, ++ }, ++ { ++ .label = "dbg2", ++ .reg = MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET, ++ .bit = GENMASK(7, 0), ++ .mode = 0644, ++ }, ++ { ++ .label = "dbg3", ++ .reg = MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET, ++ .bit = GENMASK(7, 0), ++ .mode = 0644, ++ }, ++ { ++ .label = "dbg4", ++ .reg = MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET, ++ .bit = GENMASK(7, 0), ++ .mode = 0644, ++ }, + { + .label = "asic_health", + .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, +@@ -4586,11 +4907,18 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET: + case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC2_EVENT_OFFSET: +@@ -4605,6 +4933,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_EROT_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET: +@@ -4633,6 +4963,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: +@@ -4683,6 +5014,10 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET: +@@ -4692,6 +5027,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_GWP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: +@@ -4713,6 +5051,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET: +@@ -4749,6 +5090,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: +@@ -4825,6 +5167,10 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET: +@@ -4834,6 +5180,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_GWP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_EVENT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_BRD_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: +@@ -4855,6 +5204,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_EROTE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_EROTE_EVENT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_EROTE_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_EVENT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_PWRB_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: + case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET: +@@ -4885,6 +5237,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_WD2_TLEFT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: +@@ -5080,7 +5433,6 @@ static struct resource mlxplat_mlxcpld_resources[] = { + [0] = DEFINE_RES_IRQ_NAMED(MLXPLAT_CPLD_LPC_SYSIRQ, "mlxreg-hotplug"), + }; + +-static struct platform_device *mlxplat_dev; + static struct mlxreg_core_hotplug_platform_data *mlxplat_i2c; + static struct mlxreg_core_hotplug_platform_data *mlxplat_hotplug; + static struct mlxreg_core_platform_data *mlxplat_led; +@@ -5090,6 +5442,14 @@ static struct mlxreg_core_platform_data + *mlxplat_wd_data[MLXPLAT_CPLD_WD_MAX_DEVS]; + static const struct regmap_config *mlxplat_regmap_config; + ++/* Platform default poweroff function */ ++static void mlxplat_poweroff(void) ++{ ++ struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); ++ ++ regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, MLXPLAT_CPLD_HALT_MASK); ++} ++ + static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) + { + int i; +@@ -5385,6 +5745,28 @@ static int __init mlxplat_dmi_ng800_matched(const struct dmi_system_id *dmi) + return 1; + } + ++static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi) ++{ ++ int i; ++ ++ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; ++ mlxplat_mux_num = ARRAY_SIZE(mlxplat_rack_switch_mux_data); ++ mlxplat_mux_data = mlxplat_rack_switch_mux_data; ++ mlxplat_hotplug = &mlxplat_mlxcpld_l1_switch_data; ++ mlxplat_hotplug->deferred_nr = ++ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; ++ mlxplat_led = &mlxplat_l1_switch_led_data; ++ mlxplat_regs_io = &mlxplat_default_ng_regs_io_data; ++ mlxplat_fan = &mlxplat_default_fan_data; ++ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) ++ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; ++ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; ++ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_rack_switch; ++ pm_power_off = mlxplat_poweroff; ++ ++ return 1; ++} ++ + static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { + { + .callback = mlxplat_dmi_default_wc_matched, +@@ -5473,6 +5855,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { + DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"), + }, + }, ++ { ++ .callback = mlxplat_dmi_l1_switch_matched, ++ .matches = { ++ DMI_MATCH(DMI_BOARD_NAME, "VMOD0017"), ++ }, ++ }, + { + .callback = mlxplat_dmi_msn274x_matched, + .matches = { +@@ -5802,6 +6190,8 @@ static void __exit mlxplat_exit(void) + struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); + int i; + ++ if (pm_power_off) ++ pm_power_off = NULL; + for (i = MLXPLAT_CPLD_WD_MAX_DEVS - 1; i >= 0 ; i--) + platform_device_unregister(priv->pdev_wd[i]); + if (priv->pdev_fan) +-- +2.20.1 + diff --git a/patch/0006-i2c-mux-mlxcpld-Convert-driver-to-platform-driver.patch b/patch/0006-i2c-mux-mlxcpld-Convert-driver-to-platform-driver.patch deleted file mode 100644 index 0eecfd1f6c32..000000000000 --- a/patch/0006-i2c-mux-mlxcpld-Convert-driver-to-platform-driver.patch +++ /dev/null @@ -1,185 +0,0 @@ -From de8fd8e73df9249c260d174c5e55b7af6b3d11f5 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 8 Feb 2021 22:16:01 +0200 -Subject: [PATCH backport 5.10 006/182] i2c: mux: mlxcpld: Convert driver to - platform driver -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Convert driver from 'i2c' to 'platform'. -The motivation is to avoid I2C addressing conflict between -‘i2c-mux-cpld’ driver, providing mux selection and deselection through -CPLD ‘mux control’ register, and CPLD host driver. The CPLD is I2C -device and is multi-functional device performing logic for different -components, like LED, ‘hwmon’, interrupt control, watchdog etcetera. -For such configuration CPLD should be host I2C device, connected to the -relevant I2C bus with the relevant I2C address and all others component -drivers are supposed to be its children. -The hierarchy in such case will be like in the below example: -ls /sys/bus/i2c/devices/44-0032 -i2c-mux-mlxcpld.44 leds-mlxreg.44 mlxreg-io.44 -ls /sys/bus/i2c/devices/44-0032/i2c-mux-mlxcpld.44 -channel-0, …, channel-X - -Currently this driver is not activated by any kernel driver, -so this conversion doesn’t affect any user. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 62 +++++++++++++---------------- - 1 file changed, 28 insertions(+), 34 deletions(-) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index 3d894cfb19df..b53f1479272d 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -20,10 +20,12 @@ - /* mlxcpld_mux - mux control structure: - * @last_chan - last register value - * @client - I2C device client -+ * @pdata: platform data - */ - struct mlxcpld_mux { - u8 last_chan; - struct i2c_client *client; -+ struct mlxcpld_mux_plat_data pdata; - }; - - /* MUX logic description. -@@ -54,37 +56,30 @@ struct mlxcpld_mux { - * - */ - --static const struct i2c_device_id mlxcpld_mux_id[] = { -- { "mlxcpld_mux_module", 0 }, -- { } --}; --MODULE_DEVICE_TABLE(i2c, mlxcpld_mux_id); -- - /* Write to mux register. Don't use i2c_transfer() and i2c_smbus_xfer() - * for this as they will try to lock adapter a second time. - */ - static int mlxcpld_mux_reg_write(struct i2c_adapter *adap, -- struct i2c_client *client, u8 val) -+ struct mlxcpld_mux *mux, u8 val) - { -- struct mlxcpld_mux_plat_data *pdata = dev_get_platdata(&client->dev); -+ struct i2c_client *client = mux->client; - union i2c_smbus_data data = { .byte = val }; - - return __i2c_smbus_xfer(adap, client->addr, client->flags, -- I2C_SMBUS_WRITE, pdata->sel_reg_addr, -+ I2C_SMBUS_WRITE, mux->pdata.sel_reg_addr, - I2C_SMBUS_BYTE_DATA, &data); - } - - static int mlxcpld_mux_select_chan(struct i2c_mux_core *muxc, u32 chan) - { -- struct mlxcpld_mux *data = i2c_mux_priv(muxc); -- struct i2c_client *client = data->client; -+ struct mlxcpld_mux *mux = i2c_mux_priv(muxc); - u8 regval = chan + 1; - int err = 0; - - /* Only select the channel if its different from the last channel */ -- if (data->last_chan != regval) { -- err = mlxcpld_mux_reg_write(muxc->parent, client, regval); -- data->last_chan = err < 0 ? 0 : regval; -+ if (mux->last_chan != regval) { -+ err = mlxcpld_mux_reg_write(muxc->parent, mux, regval); -+ mux->last_chan = err < 0 ? 0 : regval; - } - - return err; -@@ -92,21 +87,19 @@ static int mlxcpld_mux_select_chan(struct i2c_mux_core *muxc, u32 chan) - - static int mlxcpld_mux_deselect(struct i2c_mux_core *muxc, u32 chan) - { -- struct mlxcpld_mux *data = i2c_mux_priv(muxc); -- struct i2c_client *client = data->client; -+ struct mlxcpld_mux *mux = i2c_mux_priv(muxc); - - /* Deselect active channel */ -- data->last_chan = 0; -+ mux->last_chan = 0; - -- return mlxcpld_mux_reg_write(muxc->parent, client, data->last_chan); -+ return mlxcpld_mux_reg_write(muxc->parent, mux, mux->last_chan); - } - - /* Probe/reomove functions */ --static int mlxcpld_mux_probe(struct i2c_client *client, -- const struct i2c_device_id *id) -+static int mlxcpld_mux_probe(struct platform_device *pdev) - { -- struct i2c_adapter *adap = client->adapter; -- struct mlxcpld_mux_plat_data *pdata = dev_get_platdata(&client->dev); -+ struct mlxcpld_mux_plat_data *pdata = dev_get_platdata(&pdev->dev); -+ struct i2c_client *client = to_i2c_client(pdev->dev.parent); - struct i2c_mux_core *muxc; - int num, force; - struct mlxcpld_mux *data; -@@ -115,18 +108,20 @@ static int mlxcpld_mux_probe(struct i2c_client *client, - if (!pdata) - return -EINVAL; - -- if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) -+ if (!i2c_check_functionality(client->adapter, -+ I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) - return -ENODEV; - -- muxc = i2c_mux_alloc(adap, &client->dev, CPLD_MUX_MAX_NCHANS, -+ muxc = i2c_mux_alloc(client->adapter, &pdev->dev, CPLD_MUX_MAX_NCHANS, - sizeof(*data), 0, mlxcpld_mux_select_chan, - mlxcpld_mux_deselect); - if (!muxc) - return -ENOMEM; - -+ platform_set_drvdata(pdev, muxc); - data = i2c_mux_priv(muxc); -- i2c_set_clientdata(client, muxc); - data->client = client; -+ memcpy(&data->pdata, pdata, sizeof(*pdata)); - data->last_chan = 0; /* force the first selection */ - - /* Create an adapter for each channel. */ -@@ -149,24 +144,23 @@ static int mlxcpld_mux_probe(struct i2c_client *client, - return err; - } - --static int mlxcpld_mux_remove(struct i2c_client *client) -+static int mlxcpld_mux_remove(struct platform_device *pdev) - { -- struct i2c_mux_core *muxc = i2c_get_clientdata(client); -+ struct i2c_mux_core *muxc = platform_get_drvdata(pdev); - - i2c_mux_del_adapters(muxc); - return 0; - } - --static struct i2c_driver mlxcpld_mux_driver = { -- .driver = { -- .name = "mlxcpld-mux", -+static struct platform_driver mlxcpld_mux_driver = { -+ .driver = { -+ .name = "i2c-mux-mlxcpld", - }, -- .probe = mlxcpld_mux_probe, -- .remove = mlxcpld_mux_remove, -- .id_table = mlxcpld_mux_id, -+ .probe = mlxcpld_mux_probe, -+ .remove = mlxcpld_mux_remove, - }; - --module_i2c_driver(mlxcpld_mux_driver); -+module_platform_driver(mlxcpld_mux_driver); - - MODULE_AUTHOR("Michael Shych (michaels@mellanox.com)"); - MODULE_DESCRIPTION("Mellanox I2C-CPLD-MUX driver"); --- -2.20.1 - diff --git a/patch/0006-platform-mellanox-Split-initialization-procedure.patch b/patch/0006-platform-mellanox-Split-initialization-procedure.patch new file mode 100644 index 000000000000..d4c1855d135a --- /dev/null +++ b/patch/0006-platform-mellanox-Split-initialization-procedure.patch @@ -0,0 +1,171 @@ +From 1ed767e22aef60dc8b2d1ec472438ce734e61a56 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:23 +0200 +Subject: [PATCH backport 6.1.42 06/85] platform: mellanox: Split + initialization procedure + +Split mlxplat_init() into two by adding mlxplat_pre_init(). + +Motivation is to prepare 'mlx-platform' driver to support systems +equipped PCIe based programming logic device. + +Such systems are supposed to use different system resources, thus this +commit separates resources allocation related code. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-7-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 78 ++++++++++++++++++++++------- + 1 file changed, 60 insertions(+), 18 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 1a07a9994f05..2d33d1e5d427 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -328,6 +328,8 @@ + * @pdev_fan - FAN platform devices + * @pdev_wd - array of watchdog platform devices + * @regmap: device register map ++ * @hotplug_resources: system hotplug resources ++ * @hotplug_resources_size: size of system hotplug resources + */ + struct mlxplat_priv { + struct platform_device *pdev_i2c; +@@ -338,6 +340,8 @@ struct mlxplat_priv { + struct platform_device *pdev_fan; + struct platform_device *pdev_wd[MLXPLAT_CPLD_WD_MAX_DEVS]; + void *regmap; ++ struct resource *hotplug_resources; ++ unsigned int hotplug_resources_size; + }; + + static struct platform_device *mlxplat_dev; +@@ -6002,20 +6006,63 @@ static int mlxplat_mlxcpld_check_wd_capability(void *regmap) + return 0; + } + ++static int mlxplat_lpc_cpld_device_init(struct resource **hotplug_resources, ++ unsigned int *hotplug_resources_size) ++{ ++ int err; ++ ++ mlxplat_dev = platform_device_register_simple(MLX_PLAT_DEVICE_NAME, PLATFORM_DEVID_NONE, ++ mlxplat_lpc_resources, ++ ARRAY_SIZE(mlxplat_lpc_resources)); ++ if (IS_ERR(mlxplat_dev)) ++ return PTR_ERR(mlxplat_dev); ++ ++ mlxplat_mlxcpld_regmap_ctx.base = devm_ioport_map(&mlxplat_dev->dev, ++ mlxplat_lpc_resources[1].start, 1); ++ if (!mlxplat_mlxcpld_regmap_ctx.base) { ++ err = -ENOMEM; ++ goto fail_devm_ioport_map; ++ } ++ ++ *hotplug_resources = mlxplat_mlxcpld_resources; ++ *hotplug_resources_size = ARRAY_SIZE(mlxplat_mlxcpld_resources); ++ ++ return 0; ++ ++fail_devm_ioport_map: ++ platform_device_unregister(mlxplat_dev); ++ return err; ++} ++ ++static void mlxplat_lpc_cpld_device_exit(void) ++{ ++ platform_device_unregister(mlxplat_dev); ++} ++ ++static int ++mlxplat_pre_init(struct resource **hotplug_resources, unsigned int *hotplug_resources_size) ++{ ++ return mlxplat_lpc_cpld_device_init(hotplug_resources, hotplug_resources_size); ++} ++ ++static void mlxplat_post_exit(void) ++{ ++ mlxplat_lpc_cpld_device_exit(); ++} ++ + static int __init mlxplat_init(void) + { ++ unsigned int hotplug_resources_size; ++ struct resource *hotplug_resources; + struct mlxplat_priv *priv; + int i, j, nr, err; + + if (!dmi_check_system(mlxplat_dmi_table)) + return -ENODEV; + +- mlxplat_dev = platform_device_register_simple(MLX_PLAT_DEVICE_NAME, PLATFORM_DEVID_NONE, +- mlxplat_lpc_resources, +- ARRAY_SIZE(mlxplat_lpc_resources)); +- +- if (IS_ERR(mlxplat_dev)) +- return PTR_ERR(mlxplat_dev); ++ err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size); ++ if (err) ++ return err; + + priv = devm_kzalloc(&mlxplat_dev->dev, sizeof(struct mlxplat_priv), + GFP_KERNEL); +@@ -6025,12 +6072,8 @@ static int __init mlxplat_init(void) + } + platform_set_drvdata(mlxplat_dev, priv); + +- mlxplat_mlxcpld_regmap_ctx.base = devm_ioport_map(&mlxplat_dev->dev, +- mlxplat_lpc_resources[1].start, 1); +- if (!mlxplat_mlxcpld_regmap_ctx.base) { +- err = -ENOMEM; +- goto fail_alloc; +- } ++ priv->hotplug_resources = hotplug_resources; ++ priv->hotplug_resources_size = hotplug_resources_size; + + if (!mlxplat_regmap_config) + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config; +@@ -6051,8 +6094,8 @@ static int __init mlxplat_init(void) + if (mlxplat_i2c) + mlxplat_i2c->regmap = priv->regmap; + priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld", +- nr, mlxplat_mlxcpld_resources, +- ARRAY_SIZE(mlxplat_mlxcpld_resources), ++ nr, priv->hotplug_resources, ++ priv->hotplug_resources_size, + mlxplat_i2c, sizeof(*mlxplat_i2c)); + if (IS_ERR(priv->pdev_i2c)) { + err = PTR_ERR(priv->pdev_i2c); +@@ -6076,8 +6119,8 @@ static int __init mlxplat_init(void) + priv->pdev_hotplug = + platform_device_register_resndata(&mlxplat_dev->dev, + "mlxreg-hotplug", PLATFORM_DEVID_NONE, +- mlxplat_mlxcpld_resources, +- ARRAY_SIZE(mlxplat_mlxcpld_resources), ++ priv->hotplug_resources, ++ priv->hotplug_resources_size, + mlxplat_hotplug, sizeof(*mlxplat_hotplug)); + if (IS_ERR(priv->pdev_hotplug)) { + err = PTR_ERR(priv->pdev_hotplug); +@@ -6179,7 +6222,6 @@ static int __init mlxplat_init(void) + platform_device_unregister(priv->pdev_mux[i]); + platform_device_unregister(priv->pdev_i2c); + fail_alloc: +- platform_device_unregister(mlxplat_dev); + + return err; + } +@@ -6207,7 +6249,7 @@ static void __exit mlxplat_exit(void) + platform_device_unregister(priv->pdev_mux[i]); + + platform_device_unregister(priv->pdev_i2c); +- platform_device_unregister(mlxplat_dev); ++ mlxplat_post_exit(); + } + module_exit(mlxplat_exit); + +-- +2.20.1 + diff --git a/patch/0007-i2c-mux-mlxcpld-Prepare-mux-selection-infrastructure.patch b/patch/0007-i2c-mux-mlxcpld-Prepare-mux-selection-infrastructure.patch deleted file mode 100644 index dc2b25934043..000000000000 --- a/patch/0007-i2c-mux-mlxcpld-Prepare-mux-selection-infrastructure.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 36e27ec3550453192cdf3788a20f82d074122c58 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 8 Feb 2021 22:16:02 +0200 -Subject: [PATCH backport 5.10 007/182] i2c: mux: mlxcpld: Prepare mux - selection infrastructure for two-byte support - -Allow to program register value zero to the mux register, which is -required for word address mux register space support. -Change key selector type from 'unsigned short' to 'integer' in order to -allow to set it to -1 on deselection. -Rename key selector field from 'last_chan' to 'last_val', since this -fields keeps actually selector value and not channel number. - -Signed-off-by: Vadim Pasternak -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 18 +++++++++--------- - 1 file changed, 9 insertions(+), 9 deletions(-) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index b53f1479272d..113ad84cdd94 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -18,12 +18,12 @@ - #define CPLD_MUX_MAX_NCHANS 8 - - /* mlxcpld_mux - mux control structure: -- * @last_chan - last register value -+ * @last_val - last selected register value or -1 if mux deselected - * @client - I2C device client - * @pdata: platform data - */ - struct mlxcpld_mux { -- u8 last_chan; -+ int last_val; - struct i2c_client *client; - struct mlxcpld_mux_plat_data pdata; - }; -@@ -60,7 +60,7 @@ struct mlxcpld_mux { - * for this as they will try to lock adapter a second time. - */ - static int mlxcpld_mux_reg_write(struct i2c_adapter *adap, -- struct mlxcpld_mux *mux, u8 val) -+ struct mlxcpld_mux *mux, u32 val) - { - struct i2c_client *client = mux->client; - union i2c_smbus_data data = { .byte = val }; -@@ -73,13 +73,13 @@ static int mlxcpld_mux_reg_write(struct i2c_adapter *adap, - static int mlxcpld_mux_select_chan(struct i2c_mux_core *muxc, u32 chan) - { - struct mlxcpld_mux *mux = i2c_mux_priv(muxc); -- u8 regval = chan + 1; -+ u32 regval = chan + 1; - int err = 0; - - /* Only select the channel if its different from the last channel */ -- if (mux->last_chan != regval) { -+ if (mux->last_val != regval) { - err = mlxcpld_mux_reg_write(muxc->parent, mux, regval); -- mux->last_chan = err < 0 ? 0 : regval; -+ mux->last_val = err < 0 ? -1 : regval; - } - - return err; -@@ -90,9 +90,9 @@ static int mlxcpld_mux_deselect(struct i2c_mux_core *muxc, u32 chan) - struct mlxcpld_mux *mux = i2c_mux_priv(muxc); - - /* Deselect active channel */ -- mux->last_chan = 0; -+ mux->last_val = -1; - -- return mlxcpld_mux_reg_write(muxc->parent, mux, mux->last_chan); -+ return mlxcpld_mux_reg_write(muxc->parent, mux, 0); - } - - /* Probe/reomove functions */ -@@ -122,7 +122,7 @@ static int mlxcpld_mux_probe(struct platform_device *pdev) - data = i2c_mux_priv(muxc); - data->client = client; - memcpy(&data->pdata, pdata, sizeof(*pdata)); -- data->last_chan = 0; /* force the first selection */ -+ data->last_val = -1; /* force the first selection */ - - /* Create an adapter for each channel. */ - for (num = 0; num < CPLD_MUX_MAX_NCHANS; num++) { --- -2.20.1 - diff --git a/patch/0007-platform-mellanox-Split-logic-in-init-and-exit-flow.patch b/patch/0007-platform-mellanox-Split-logic-in-init-and-exit-flow.patch new file mode 100644 index 000000000000..825a3a6e098d --- /dev/null +++ b/patch/0007-platform-mellanox-Split-logic-in-init-and-exit-flow.patch @@ -0,0 +1,458 @@ +From c182cf6f64708b3531f38c10e43b5e8333071e19 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:24 +0200 +Subject: [PATCH backport 6.1.42 07/85] platform: mellanox: Split logic in init + and exit flow + +Split logic in mlxplat_init()/mlxplat_exit() routines. +Separate initialization of I2C infrastructure and others platform +drivers. + +Motivation is to provide synchronization between I2C bus and mux +drivers and other drivers using this infrastructure. +I2C main bus and MUX busses are implemented in FPGA logic. On some new +systems the numbers allocated for these busses could be variable +depending on order of initialization of I2C native busses. Since bus +numbers are passed to some other platform drivers during initialization +flow, it is necessary to synchronize completion of I2C infrastructure +drivers and activation of rest of drivers. + +Thus initialization flow will be performed in synchronized order. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-8-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 313 ++++++++++++++++++---------- + 1 file changed, 204 insertions(+), 109 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 2d33d1e5d427..bd94d82ecce5 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -319,6 +319,9 @@ + /* Default value for PWM control register for rack switch system */ + #define MLXPLAT_REGMAP_NVSWITCH_PWM_DEFAULT 0xf4 + ++#define MLXPLAT_I2C_MAIN_BUS_NOTIFIED 0x01 ++#define MLXPLAT_I2C_MAIN_BUS_HANDLE_CREATED 0x02 ++ + /* mlxplat_priv - platform private data + * @pdev_i2c - i2c controller platform device + * @pdev_mux - array of mux platform devices +@@ -330,6 +333,7 @@ + * @regmap: device register map + * @hotplug_resources: system hotplug resources + * @hotplug_resources_size: size of system hotplug resources ++ * @hi2c_main_init_status: init status of I2C main bus + */ + struct mlxplat_priv { + struct platform_device *pdev_i2c; +@@ -342,9 +346,11 @@ struct mlxplat_priv { + void *regmap; + struct resource *hotplug_resources; + unsigned int hotplug_resources_size; ++ u8 i2c_main_init_status; + }; + + static struct platform_device *mlxplat_dev; ++static int mlxplat_i2c_main_complition_notify(void *handle, int id); + + /* Regions for LPC I2C controller and LPC base register space */ + static const struct resource mlxplat_lpc_resources[] = { +@@ -379,6 +385,7 @@ static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_i2c_ng_data = { + .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX, + .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET, + .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_I2C, ++ .completion_notify = mlxplat_i2c_main_complition_notify, + }; + + /* Platform default channels */ +@@ -6050,68 +6057,9 @@ static void mlxplat_post_exit(void) + mlxplat_lpc_cpld_device_exit(); + } + +-static int __init mlxplat_init(void) ++static int mlxplat_post_init(struct mlxplat_priv *priv) + { +- unsigned int hotplug_resources_size; +- struct resource *hotplug_resources; +- struct mlxplat_priv *priv; +- int i, j, nr, err; +- +- if (!dmi_check_system(mlxplat_dmi_table)) +- return -ENODEV; +- +- err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size); +- if (err) +- return err; +- +- priv = devm_kzalloc(&mlxplat_dev->dev, sizeof(struct mlxplat_priv), +- GFP_KERNEL); +- if (!priv) { +- err = -ENOMEM; +- goto fail_alloc; +- } +- platform_set_drvdata(mlxplat_dev, priv); +- +- priv->hotplug_resources = hotplug_resources; +- priv->hotplug_resources_size = hotplug_resources_size; +- +- if (!mlxplat_regmap_config) +- mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config; +- +- priv->regmap = devm_regmap_init(&mlxplat_dev->dev, NULL, +- &mlxplat_mlxcpld_regmap_ctx, +- mlxplat_regmap_config); +- if (IS_ERR(priv->regmap)) { +- err = PTR_ERR(priv->regmap); +- goto fail_alloc; +- } +- +- err = mlxplat_mlxcpld_verify_bus_topology(&nr); +- if (nr < 0) +- goto fail_alloc; +- +- nr = (nr == mlxplat_max_adap_num) ? -1 : nr; +- if (mlxplat_i2c) +- mlxplat_i2c->regmap = priv->regmap; +- priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld", +- nr, priv->hotplug_resources, +- priv->hotplug_resources_size, +- mlxplat_i2c, sizeof(*mlxplat_i2c)); +- if (IS_ERR(priv->pdev_i2c)) { +- err = PTR_ERR(priv->pdev_i2c); +- goto fail_alloc; +- } +- +- for (i = 0; i < mlxplat_mux_num; i++) { +- priv->pdev_mux[i] = platform_device_register_resndata(&priv->pdev_i2c->dev, +- "i2c-mux-reg", i, NULL, 0, +- &mlxplat_mux_data[i], +- sizeof(mlxplat_mux_data[i])); +- if (IS_ERR(priv->pdev_mux[i])) { +- err = PTR_ERR(priv->pdev_mux[i]); +- goto fail_platform_mux_register; +- } +- } ++ int i = 0, err; + + /* Add hotplug driver */ + if (mlxplat_hotplug) { +@@ -6124,19 +6072,10 @@ static int __init mlxplat_init(void) + mlxplat_hotplug, sizeof(*mlxplat_hotplug)); + if (IS_ERR(priv->pdev_hotplug)) { + err = PTR_ERR(priv->pdev_hotplug); +- goto fail_platform_mux_register; ++ goto fail_platform_hotplug_register; + } + } + +- /* Set default registers. */ +- for (j = 0; j < mlxplat_regmap_config->num_reg_defaults; j++) { +- err = regmap_write(priv->regmap, +- mlxplat_regmap_config->reg_defaults[j].reg, +- mlxplat_regmap_config->reg_defaults[j].def); +- if (err) +- goto fail_platform_mux_register; +- } +- + /* Add LED driver. */ + if (mlxplat_led) { + mlxplat_led->regmap = priv->regmap; +@@ -6146,7 +6085,7 @@ static int __init mlxplat_init(void) + sizeof(*mlxplat_led)); + if (IS_ERR(priv->pdev_led)) { + err = PTR_ERR(priv->pdev_led); +- goto fail_platform_hotplug_register; ++ goto fail_platform_leds_register; + } + } + +@@ -6160,7 +6099,7 @@ static int __init mlxplat_init(void) + sizeof(*mlxplat_regs_io)); + if (IS_ERR(priv->pdev_io_regs)) { + err = PTR_ERR(priv->pdev_io_regs); +- goto fail_platform_led_register; ++ goto fail_platform_io_register; + } + } + +@@ -6173,7 +6112,7 @@ static int __init mlxplat_init(void) + sizeof(*mlxplat_fan)); + if (IS_ERR(priv->pdev_fan)) { + err = PTR_ERR(priv->pdev_fan); +- goto fail_platform_io_regs_register; ++ goto fail_platform_fan_register; + } + } + +@@ -6181,59 +6120,42 @@ static int __init mlxplat_init(void) + err = mlxplat_mlxcpld_check_wd_capability(priv->regmap); + if (err) + goto fail_platform_wd_register; +- for (j = 0; j < MLXPLAT_CPLD_WD_MAX_DEVS; j++) { +- if (mlxplat_wd_data[j]) { +- mlxplat_wd_data[j]->regmap = priv->regmap; +- priv->pdev_wd[j] = +- platform_device_register_resndata(&mlxplat_dev->dev, "mlx-wdt", j, +- NULL, 0, mlxplat_wd_data[j], +- sizeof(*mlxplat_wd_data[j])); +- if (IS_ERR(priv->pdev_wd[j])) { +- err = PTR_ERR(priv->pdev_wd[j]); ++ for (i = 0; i < MLXPLAT_CPLD_WD_MAX_DEVS; i++) { ++ if (mlxplat_wd_data[i]) { ++ mlxplat_wd_data[i]->regmap = priv->regmap; ++ priv->pdev_wd[i] = ++ platform_device_register_resndata(&mlxplat_dev->dev, "mlx-wdt", i, ++ NULL, 0, mlxplat_wd_data[i], ++ sizeof(*mlxplat_wd_data[i])); ++ if (IS_ERR(priv->pdev_wd[i])) { ++ err = PTR_ERR(priv->pdev_wd[i]); + goto fail_platform_wd_register; + } + } + } + +- /* Sync registers with hardware. */ +- regcache_mark_dirty(priv->regmap); +- err = regcache_sync(priv->regmap); +- if (err) +- goto fail_platform_wd_register; +- + return 0; + + fail_platform_wd_register: +- while (--j >= 0) +- platform_device_unregister(priv->pdev_wd[j]); +- if (mlxplat_fan) +- platform_device_unregister(priv->pdev_fan); +-fail_platform_io_regs_register: ++ while (--i >= 0) ++ platform_device_unregister(priv->pdev_wd[i]); ++fail_platform_fan_register: + if (mlxplat_regs_io) + platform_device_unregister(priv->pdev_io_regs); +-fail_platform_led_register: ++fail_platform_io_register: + if (mlxplat_led) + platform_device_unregister(priv->pdev_led); +-fail_platform_hotplug_register: ++fail_platform_leds_register: + if (mlxplat_hotplug) + platform_device_unregister(priv->pdev_hotplug); +-fail_platform_mux_register: +- while (--i >= 0) +- platform_device_unregister(priv->pdev_mux[i]); +- platform_device_unregister(priv->pdev_i2c); +-fail_alloc: +- ++fail_platform_hotplug_register: + return err; + } +-module_init(mlxplat_init); + +-static void __exit mlxplat_exit(void) ++static void mlxplat_pre_exit(struct mlxplat_priv *priv) + { +- struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); + int i; + +- if (pm_power_off) +- pm_power_off = NULL; + for (i = MLXPLAT_CPLD_WD_MAX_DEVS - 1; i >= 0 ; i--) + platform_device_unregister(priv->pdev_wd[i]); + if (priv->pdev_fan) +@@ -6244,13 +6166,186 @@ static void __exit mlxplat_exit(void) + platform_device_unregister(priv->pdev_led); + if (priv->pdev_hotplug) + platform_device_unregister(priv->pdev_hotplug); ++} ++ ++static int ++mlxplat_i2c_mux_complition_notify(void *handle, struct i2c_adapter *parent, ++ struct i2c_adapter *adapters[]) ++{ ++ struct mlxplat_priv *priv = handle; ++ ++ return mlxplat_post_init(priv); ++} + +- for (i = mlxplat_mux_num - 1; i >= 0 ; i--) ++static int mlxplat_i2c_mux_topolgy_init(struct mlxplat_priv *priv) ++{ ++ int i, err; ++ ++ if (!priv->pdev_i2c) { ++ priv->i2c_main_init_status = MLXPLAT_I2C_MAIN_BUS_NOTIFIED; ++ return 0; ++ } ++ ++ priv->i2c_main_init_status = MLXPLAT_I2C_MAIN_BUS_HANDLE_CREATED; ++ for (i = 0; i < mlxplat_mux_num; i++) { ++ priv->pdev_mux[i] = platform_device_register_resndata(&priv->pdev_i2c->dev, ++ "i2c-mux-reg", i, NULL, 0, ++ &mlxplat_mux_data[i], ++ sizeof(mlxplat_mux_data[i])); ++ if (IS_ERR(priv->pdev_mux[i])) { ++ err = PTR_ERR(priv->pdev_mux[i]); ++ goto fail_platform_mux_register; ++ } ++ } ++ ++ return mlxplat_i2c_mux_complition_notify(priv, NULL, NULL); ++ ++fail_platform_mux_register: ++ while (--i >= 0) + platform_device_unregister(priv->pdev_mux[i]); ++ return err; ++} ++ ++static void mlxplat_i2c_mux_topolgy_exit(struct mlxplat_priv *priv) ++{ ++ int i; ++ ++ for (i = mlxplat_mux_num - 1; i >= 0 ; i--) { ++ if (priv->pdev_mux[i]) ++ platform_device_unregister(priv->pdev_mux[i]); ++ } + +- platform_device_unregister(priv->pdev_i2c); + mlxplat_post_exit(); + } ++ ++static int mlxplat_i2c_main_complition_notify(void *handle, int id) ++{ ++ struct mlxplat_priv *priv = handle; ++ ++ return mlxplat_i2c_mux_topolgy_init(priv); ++} ++ ++static int mlxplat_i2c_main_init(struct mlxplat_priv *priv) ++{ ++ int nr, err; ++ ++ if (!mlxplat_i2c) ++ return 0; ++ ++ err = mlxplat_mlxcpld_verify_bus_topology(&nr); ++ if (nr < 0) ++ goto fail_mlxplat_mlxcpld_verify_bus_topology; ++ ++ nr = (nr == mlxplat_max_adap_num) ? -1 : nr; ++ mlxplat_i2c->regmap = priv->regmap; ++ mlxplat_i2c->handle = priv; ++ ++ priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld", ++ nr, priv->hotplug_resources, ++ priv->hotplug_resources_size, ++ mlxplat_i2c, sizeof(*mlxplat_i2c)); ++ if (IS_ERR(priv->pdev_i2c)) { ++ err = PTR_ERR(priv->pdev_i2c); ++ goto fail_platform_i2c_register; ++ } ++ ++ if (priv->i2c_main_init_status == MLXPLAT_I2C_MAIN_BUS_NOTIFIED) { ++ err = mlxplat_i2c_mux_topolgy_init(priv); ++ if (err) ++ goto fail_mlxplat_i2c_mux_topolgy_init; ++ } ++ ++ return 0; ++ ++fail_mlxplat_i2c_mux_topolgy_init: ++fail_platform_i2c_register: ++fail_mlxplat_mlxcpld_verify_bus_topology: ++ return err; ++} ++ ++static void mlxplat_i2c_main_exit(struct mlxplat_priv *priv) ++{ ++ mlxplat_i2c_mux_topolgy_exit(priv); ++ if (priv->pdev_i2c) ++ platform_device_unregister(priv->pdev_i2c); ++} ++ ++static int __init mlxplat_init(void) ++{ ++ unsigned int hotplug_resources_size; ++ struct resource *hotplug_resources; ++ struct mlxplat_priv *priv; ++ int i, err; ++ ++ if (!dmi_check_system(mlxplat_dmi_table)) ++ return -ENODEV; ++ ++ err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size); ++ if (err) ++ return err; ++ ++ priv = devm_kzalloc(&mlxplat_dev->dev, sizeof(struct mlxplat_priv), ++ GFP_KERNEL); ++ if (!priv) { ++ err = -ENOMEM; ++ goto fail_alloc; ++ } ++ platform_set_drvdata(mlxplat_dev, priv); ++ priv->hotplug_resources = hotplug_resources; ++ priv->hotplug_resources_size = hotplug_resources_size; ++ ++ if (!mlxplat_regmap_config) ++ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config; ++ ++ priv->regmap = devm_regmap_init(&mlxplat_dev->dev, NULL, ++ &mlxplat_mlxcpld_regmap_ctx, ++ mlxplat_regmap_config); ++ if (IS_ERR(priv->regmap)) { ++ err = PTR_ERR(priv->regmap); ++ goto fail_alloc; ++ } ++ ++ /* Set default registers. */ ++ for (i = 0; i < mlxplat_regmap_config->num_reg_defaults; i++) { ++ err = regmap_write(priv->regmap, ++ mlxplat_regmap_config->reg_defaults[i].reg, ++ mlxplat_regmap_config->reg_defaults[i].def); ++ if (err) ++ goto fail_regmap_write; ++ } ++ ++ err = mlxplat_i2c_main_init(priv); ++ if (err) ++ goto fail_mlxplat_i2c_main_init; ++ ++ /* Sync registers with hardware. */ ++ regcache_mark_dirty(priv->regmap); ++ err = regcache_sync(priv->regmap); ++ if (err) ++ goto fail_regcache_sync; ++ ++ return 0; ++ ++fail_regcache_sync: ++ mlxplat_pre_exit(priv); ++fail_mlxplat_i2c_main_init: ++fail_regmap_write: ++fail_alloc: ++ mlxplat_post_exit(); ++ ++ return err; ++} ++module_init(mlxplat_init); ++ ++static void __exit mlxplat_exit(void) ++{ ++ struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); ++ ++ if (pm_power_off) ++ pm_power_off = NULL; ++ mlxplat_pre_exit(priv); ++ mlxplat_i2c_main_exit(priv); ++} + module_exit(mlxplat_exit); + + MODULE_AUTHOR("Vadim Pasternak (vadimp@mellanox.com)"); +-- +2.20.1 + diff --git a/patch/0008-i2c-mux-mlxcpld-Get-rid-of-adapter-numbers-enforceme.patch b/patch/0008-i2c-mux-mlxcpld-Get-rid-of-adapter-numbers-enforceme.patch deleted file mode 100644 index d8557be1a4db..000000000000 --- a/patch/0008-i2c-mux-mlxcpld-Get-rid-of-adapter-numbers-enforceme.patch +++ /dev/null @@ -1,72 +0,0 @@ -From a57efb1d682024397507e3d1f21455289ae2af67 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 8 Feb 2021 22:16:03 +0200 -Subject: [PATCH backport 5.10 008/182] i2c: mux: mlxcpld: Get rid of adapter - numbers enforcement - -Do not set the argument 'force_nr' of i2c_mux_add_adapter() routine, -instead provide argument 'chan_id'. -Rename mux ids array from 'adap_ids' to 'chan_ids'. - -The motivation is to prepare infrastructure to be able to: -- Create only the child adapters which are actually needed - for which - channel ids are specified. -- To assign 'nrs' to these child adapters dynamically, with no 'nr' - enforcement. - -Signed-off-by: Vadim Pasternak -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 7 ++----- - include/linux/platform_data/mlxcpld.h | 4 ++-- - 2 files changed, 4 insertions(+), 7 deletions(-) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index 113ad84cdd94..e99a7ad09886 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -101,9 +101,8 @@ static int mlxcpld_mux_probe(struct platform_device *pdev) - struct mlxcpld_mux_plat_data *pdata = dev_get_platdata(&pdev->dev); - struct i2c_client *client = to_i2c_client(pdev->dev.parent); - struct i2c_mux_core *muxc; -- int num, force; - struct mlxcpld_mux *data; -- int err; -+ int num, err; - - if (!pdata) - return -EINVAL; -@@ -130,9 +129,7 @@ static int mlxcpld_mux_probe(struct platform_device *pdev) - /* discard unconfigured channels */ - break; - -- force = pdata->adap_ids[num]; -- -- err = i2c_mux_add_adapter(muxc, force, num, 0); -+ err = i2c_mux_add_adapter(muxc, 0, pdata->chan_ids[num], 0); - if (err) - goto virt_reg_failed; - } -diff --git a/include/linux/platform_data/mlxcpld.h b/include/linux/platform_data/mlxcpld.h -index b08dcb183fca..f3cb628bb779 100644 ---- a/include/linux/platform_data/mlxcpld.h -+++ b/include/linux/platform_data/mlxcpld.h -@@ -39,12 +39,12 @@ - /* Platform data for the CPLD I2C multiplexers */ - - /* mlxcpld_mux_plat_data - per mux data, used with i2c_register_board_info -- * @adap_ids - adapter array -+ * @chan_ids - channels array - * @num_adaps - number of adapters - * @sel_reg_addr - mux select register offset in CPLD space - */ - struct mlxcpld_mux_plat_data { -- int *adap_ids; -+ int *chan_ids; - int num_adaps; - int sel_reg_addr; - }; --- -2.20.1 - diff --git a/patch/0008-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch b/patch/0008-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch new file mode 100644 index 000000000000..a2d87c031552 --- /dev/null +++ b/patch/0008-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch @@ -0,0 +1,84 @@ +From 9c901b497e90f874d903f9cbbe8d6076e8c9956a Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:25 +0200 +Subject: [PATCH backport 6.1.42 08/85] platform: mellanox: Extend all systems + with I2C notification callback + +Motivation is to provide synchronization between I2C main bus and other +platform drivers using this notification callback. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-9-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index bd94d82ecce5..e541046c9100 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -363,6 +363,11 @@ static const struct resource mlxplat_lpc_resources[] = { + IORESOURCE_IO), + }; + ++/* Platform systems default i2c data */ ++static struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_i2c_default_data = { ++ .completion_notify = mlxplat_i2c_main_complition_notify, ++}; ++ + /* Platform i2c next generation systems data */ + static struct mlxreg_core_data mlxplat_mlxcpld_i2c_ng_items_data[] = { + { +@@ -5479,6 +5484,7 @@ static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) + mlxplat_led = &mlxplat_default_led_data; + mlxplat_regs_io = &mlxplat_default_regs_io_data; + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; ++ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + + return 1; + } +@@ -5501,6 +5507,7 @@ static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi + mlxplat_led = &mlxplat_default_led_wc_data; + mlxplat_regs_io = &mlxplat_default_regs_io_data; + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; ++ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + + return 1; + } +@@ -5548,6 +5555,7 @@ static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi) + mlxplat_led = &mlxplat_msn21xx_led_data; + mlxplat_regs_io = &mlxplat_msn21xx_regs_io_data; + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; ++ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + + return 1; + } +@@ -5570,6 +5578,7 @@ static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi) + mlxplat_led = &mlxplat_default_led_data; + mlxplat_regs_io = &mlxplat_msn21xx_regs_io_data; + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; ++ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + + return 1; + } +@@ -5592,6 +5601,7 @@ static int __init mlxplat_dmi_msn201x_matched(const struct dmi_system_id *dmi) + mlxplat_led = &mlxplat_msn21xx_led_data; + mlxplat_regs_io = &mlxplat_msn21xx_regs_io_data; + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; ++ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + + return 1; + } +@@ -5641,6 +5651,7 @@ static int __init mlxplat_dmi_comex_matched(const struct dmi_system_id *dmi) + mlxplat_fan = &mlxplat_default_fan_data; + for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) + mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; ++ mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_comex; + + return 1; +-- +2.20.1 + diff --git a/patch/0009-i2c-mux-mlxcpld-Extend-driver-to-support-word-addres.patch b/patch/0009-i2c-mux-mlxcpld-Extend-driver-to-support-word-addres.patch deleted file mode 100644 index 7bd99a3b5363..000000000000 --- a/patch/0009-i2c-mux-mlxcpld-Extend-driver-to-support-word-addres.patch +++ /dev/null @@ -1,116 +0,0 @@ -From 1436eab9059e8f2a137ca657cc133dd6aabfe7f0 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 8 Feb 2021 22:16:04 +0200 -Subject: [PATCH backport 5.10 009/182] i2c: mux: mlxcpld: Extend driver to - support word address space devices - -Extend driver to allow I2C routing control through CPLD devices with -word address space. Till now only CPLD devices with byte address space -have been supported. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 47 ++++++++++++++++++++++----- - include/linux/platform_data/mlxcpld.h | 2 ++ - 2 files changed, 41 insertions(+), 8 deletions(-) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index e99a7ad09886..10767ad4adb4 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -63,19 +63,39 @@ static int mlxcpld_mux_reg_write(struct i2c_adapter *adap, - struct mlxcpld_mux *mux, u32 val) - { - struct i2c_client *client = mux->client; -- union i2c_smbus_data data = { .byte = val }; -- -- return __i2c_smbus_xfer(adap, client->addr, client->flags, -- I2C_SMBUS_WRITE, mux->pdata.sel_reg_addr, -- I2C_SMBUS_BYTE_DATA, &data); -+ union i2c_smbus_data data; -+ struct i2c_msg msg; -+ u8 buf[3]; -+ -+ switch (mux->pdata.reg_size) { -+ case 1: -+ data.byte = val; -+ return __i2c_smbus_xfer(adap, client->addr, client->flags, -+ I2C_SMBUS_WRITE, mux->pdata.sel_reg_addr, -+ I2C_SMBUS_BYTE_DATA, &data); -+ case 2: -+ buf[0] = mux->pdata.sel_reg_addr >> 8; -+ buf[1] = mux->pdata.sel_reg_addr; -+ buf[2] = val; -+ msg.addr = client->addr; -+ msg.buf = buf; -+ msg.len = mux->pdata.reg_size + 1; -+ msg.flags = 0; -+ return __i2c_transfer(adap, &msg, 1); -+ default: -+ return -EINVAL; -+ } - } - - static int mlxcpld_mux_select_chan(struct i2c_mux_core *muxc, u32 chan) - { - struct mlxcpld_mux *mux = i2c_mux_priv(muxc); -- u32 regval = chan + 1; -+ u32 regval = chan; - int err = 0; - -+ if (mux->pdata.reg_size == 1) -+ regval += 1; -+ - /* Only select the channel if its different from the last channel */ - if (mux->last_val != regval) { - err = mlxcpld_mux_reg_write(muxc->parent, mux, regval); -@@ -103,12 +123,23 @@ static int mlxcpld_mux_probe(struct platform_device *pdev) - struct i2c_mux_core *muxc; - struct mlxcpld_mux *data; - int num, err; -+ u32 func; - - if (!pdata) - return -EINVAL; - -- if (!i2c_check_functionality(client->adapter, -- I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) -+ switch (pdata->reg_size) { -+ case 1: -+ func = I2C_FUNC_SMBUS_WRITE_BYTE_DATA; -+ break; -+ case 2: -+ func = I2C_FUNC_I2C; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ if (!i2c_check_functionality(client->adapter, func)) - return -ENODEV; - - muxc = i2c_mux_alloc(client->adapter, &pdev->dev, CPLD_MUX_MAX_NCHANS, -diff --git a/include/linux/platform_data/mlxcpld.h b/include/linux/platform_data/mlxcpld.h -index f3cb628bb779..341c7796e36b 100644 ---- a/include/linux/platform_data/mlxcpld.h -+++ b/include/linux/platform_data/mlxcpld.h -@@ -42,11 +42,13 @@ - * @chan_ids - channels array - * @num_adaps - number of adapters - * @sel_reg_addr - mux select register offset in CPLD space -+ * @reg_size: register size in bytes - */ - struct mlxcpld_mux_plat_data { - int *chan_ids; - int num_adaps; - int sel_reg_addr; -+ u8 reg_size; - }; - - #endif /* _LINUX_I2C_MLXCPLD_H */ --- -2.20.1 - diff --git a/patch/0009-platform-mellanox-mlx-platform-Add-mux-selection-reg.patch b/patch/0009-platform-mellanox-mlx-platform-Add-mux-selection-reg.patch new file mode 100644 index 000000000000..27a182d0ff07 --- /dev/null +++ b/patch/0009-platform-mellanox-mlx-platform-Add-mux-selection-reg.patch @@ -0,0 +1,102 @@ +From e3494fcd4510b98a5fd816dde3fd773f7f34b340 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:28 +0200 +Subject: [PATCH backport 6.1.42 09/85] platform: mellanox: mlx-platform: Add + mux selection register to regmap +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Extend writeable, readable, volatile registers of the 'regmap' object +with for I2C mux selector registers. + +The motivation is to pass this object extended with selector registers +to I2C mux driver working over ‘regmap’. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-12-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 28 ++++++++++++++++++++-------- + 1 file changed, 20 insertions(+), 8 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index e541046c9100..60062d9f3b9b 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -139,6 +139,10 @@ + #define MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET 0xd2 + #define MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET 0xd3 + #define MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET 0xd9 ++#define MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET 0xdb ++#define MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET 0xda ++#define MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET 0xdc ++#define MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET 0xdd + #define MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET 0xde + #define MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET 0xdf + #define MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET 0xe0 +@@ -172,23 +176,19 @@ + #define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET 0xfc + #define MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET 0xfd + #define MLXPLAT_CPLD_LPC_IO_RANGE 0x100 +-#define MLXPLAT_CPLD_LPC_I2C_CH1_OFF 0xdb +-#define MLXPLAT_CPLD_LPC_I2C_CH2_OFF 0xda +-#define MLXPLAT_CPLD_LPC_I2C_CH3_OFF 0xdc +-#define MLXPLAT_CPLD_LPC_I2C_CH4_OFF 0xdd + + #define MLXPLAT_CPLD_LPC_PIO_OFFSET 0x10000UL + #define MLXPLAT_CPLD_LPC_REG1 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \ +- MLXPLAT_CPLD_LPC_I2C_CH1_OFF) | \ ++ MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET) | \ + MLXPLAT_CPLD_LPC_PIO_OFFSET) + #define MLXPLAT_CPLD_LPC_REG2 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \ +- MLXPLAT_CPLD_LPC_I2C_CH2_OFF) | \ ++ MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET) | \ + MLXPLAT_CPLD_LPC_PIO_OFFSET) + #define MLXPLAT_CPLD_LPC_REG3 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \ +- MLXPLAT_CPLD_LPC_I2C_CH3_OFF) | \ ++ MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET) | \ + MLXPLAT_CPLD_LPC_PIO_OFFSET) + #define MLXPLAT_CPLD_LPC_REG4 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \ +- MLXPLAT_CPLD_LPC_I2C_CH4_OFF) | \ ++ MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET) | \ + MLXPLAT_CPLD_LPC_PIO_OFFSET) + + /* Masks for aggregation, psu, pwr and fan event in CPLD related registers. */ +@@ -4980,6 +4980,10 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: +@@ -5107,6 +5111,10 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: +@@ -5254,6 +5262,10 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG_CTRL_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH2_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH3_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_I2C_CH4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: +-- +2.20.1 + diff --git a/patch/0010-i2c-mux-mlxcpld-Extend-supported-mux-number.patch b/patch/0010-i2c-mux-mlxcpld-Extend-supported-mux-number.patch deleted file mode 100644 index 7693e62ac9e7..000000000000 --- a/patch/0010-i2c-mux-mlxcpld-Extend-supported-mux-number.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 3b78386d062ab776009356916ff5d82bd423cd8e Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 8 Feb 2021 22:16:05 +0200 -Subject: [PATCH backport 5.10 010/182] i2c: mux: mlxcpld: Extend supported mux - number - -Allow to extend mux number supported by driver. -Currently it is limited by eight, which is not enough for new coming -Mellanox modular system with line cards, which require up to 64 mux -support. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 10 ++-------- - 1 file changed, 2 insertions(+), 8 deletions(-) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index 10767ad4adb4..5e0672f9979b 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -15,8 +15,6 @@ - #include - #include - --#define CPLD_MUX_MAX_NCHANS 8 -- - /* mlxcpld_mux - mux control structure: - * @last_val - last selected register value or -1 if mux deselected - * @client - I2C device client -@@ -142,7 +140,7 @@ static int mlxcpld_mux_probe(struct platform_device *pdev) - if (!i2c_check_functionality(client->adapter, func)) - return -ENODEV; - -- muxc = i2c_mux_alloc(client->adapter, &pdev->dev, CPLD_MUX_MAX_NCHANS, -+ muxc = i2c_mux_alloc(client->adapter, &pdev->dev, pdata->num_adaps, - sizeof(*data), 0, mlxcpld_mux_select_chan, - mlxcpld_mux_deselect); - if (!muxc) -@@ -155,11 +153,7 @@ static int mlxcpld_mux_probe(struct platform_device *pdev) - data->last_val = -1; /* force the first selection */ - - /* Create an adapter for each channel. */ -- for (num = 0; num < CPLD_MUX_MAX_NCHANS; num++) { -- if (num >= pdata->num_adaps) -- /* discard unconfigured channels */ -- break; -- -+ for (num = 0; num < pdata->num_adaps; num++) { - err = i2c_mux_add_adapter(muxc, 0, pdata->chan_ids[num], 0); - if (err) - goto virt_reg_failed; --- -2.20.1 - diff --git a/patch/0010-platform-mellanox-mlx-platform-Move-bus-shift-assign.patch b/patch/0010-platform-mellanox-mlx-platform-Move-bus-shift-assign.patch new file mode 100644 index 000000000000..aaee2599b74b --- /dev/null +++ b/patch/0010-platform-mellanox-mlx-platform-Move-bus-shift-assign.patch @@ -0,0 +1,38 @@ +From efa7f35fe8d6d88cb1aa04ef6839d4de7c7ecd6c Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:29 +0200 +Subject: [PATCH backport 6.1.42 10/85] platform: mellanox: mlx-platform: Move + bus shift assignment out of the loop + +Move assignment of bus shift setting out of the loop to avoid redundant +operation. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-13-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 60062d9f3b9b..7b6779cdb134 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -6008,10 +6008,11 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr) + shift = *nr - mlxplat_mux_data[i].parent; + mlxplat_mux_data[i].parent = *nr; + mlxplat_mux_data[i].base_nr += shift; +- if (shift > 0) +- mlxplat_hotplug->shift_nr = shift; + } + ++ if (shift > 0) ++ mlxplat_hotplug->shift_nr = shift; ++ + return 0; + } + +-- +2.20.1 + diff --git a/patch/0011-i2c-mux-mlxcpld-Add-callback-to-notify-mux-creation-.patch b/patch/0011-i2c-mux-mlxcpld-Add-callback-to-notify-mux-creation-.patch deleted file mode 100644 index 61d942c824dc..000000000000 --- a/patch/0011-i2c-mux-mlxcpld-Add-callback-to-notify-mux-creation-.patch +++ /dev/null @@ -1,60 +0,0 @@ -From d07723d636eed0ac64b2903d2e5bc92af9abfe40 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 8 Feb 2021 22:16:06 +0200 -Subject: [PATCH backport 5.10 011/182] i2c: mux: mlxcpld: Add callback to - notify mux creation completion - -Add notification to inform caller that mux objects array has been -created. It allows to user, invoked platform device registration for -"i2c-mux-mlxcpld" driver, to be notified that mux infrastructure is -available, and thus some devices could be connected to this -infrastructure. - -Signed-off-by: Vadim Pasternak -Acked-by: Peter Rosin -Signed-off-by: Wolfram Sang ---- - drivers/i2c/muxes/i2c-mux-mlxcpld.c | 4 ++++ - include/linux/platform_data/mlxcpld.h | 5 +++++ - 2 files changed, 9 insertions(+) - -diff --git a/drivers/i2c/muxes/i2c-mux-mlxcpld.c b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -index 5e0672f9979b..1a879f6a31ef 100644 ---- a/drivers/i2c/muxes/i2c-mux-mlxcpld.c -+++ b/drivers/i2c/muxes/i2c-mux-mlxcpld.c -@@ -159,6 +159,10 @@ static int mlxcpld_mux_probe(struct platform_device *pdev) - goto virt_reg_failed; - } - -+ /* Notify caller when all channels' adapters are created. */ -+ if (pdata->completion_notify) -+ pdata->completion_notify(pdata->handle, muxc->parent, muxc->adapter); -+ - return 0; - - virt_reg_failed: -diff --git a/include/linux/platform_data/mlxcpld.h b/include/linux/platform_data/mlxcpld.h -index 341c7796e36b..68f5c5a9b172 100644 ---- a/include/linux/platform_data/mlxcpld.h -+++ b/include/linux/platform_data/mlxcpld.h -@@ -43,12 +43,17 @@ - * @num_adaps - number of adapters - * @sel_reg_addr - mux select register offset in CPLD space - * @reg_size: register size in bytes -+ * @handle: handle to be passed by callback -+ * @completion_notify: callback to notify when all the adapters are created - */ - struct mlxcpld_mux_plat_data { - int *chan_ids; - int num_adaps; - int sel_reg_addr; - u8 reg_size; -+ void *handle; -+ int (*completion_notify)(void *handle, struct i2c_adapter *parent, -+ struct i2c_adapter *adapters[]); - }; - - #endif /* _LINUX_I2C_MLXCPLD_H */ --- -2.20.1 - diff --git a/patch/0011-platform-mellanox-mlx-platform-Initialize-shift-vari.patch b/patch/0011-platform-mellanox-mlx-platform-Initialize-shift-vari.patch new file mode 100644 index 000000000000..2269275b74e0 --- /dev/null +++ b/patch/0011-platform-mellanox-mlx-platform-Initialize-shift-vari.patch @@ -0,0 +1,37 @@ +From cf1b6d5dd2e66e5ce675ad6466cf4af034d0ea3c Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Tue, 7 Mar 2023 11:58:42 +0100 +Subject: [PATCH backport 6.1.42 11/85] platform: mellanox: mlx-platform: + Initialize shift variable to 0 + +Initialize shift variable in mlxplat_mlxcpld_verify_bus_topology() +to 0 to avoid the following compile error: + +drivers/platform/x86/mlx-platform.c:6013 + mlxplat_mlxcpld_verify_bus_topology() error: uninitialized symbol 'shift'. + +Fixes: 50b823fdd357 ("platform: mellanox: mlx-platform: Move bus shift assignment out of the loop") +Cc: Vadim Pasternak +Cc: Michael Shych +Signed-off-by: Hans de Goede +Link: https://lore.kernel.org/r/20230307105842.286118-1-hdegoede@redhat.com +--- + drivers/platform/x86/mlx-platform.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 7b6779cdb134..67367f010139 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -5980,7 +5980,7 @@ MODULE_DEVICE_TABLE(dmi, mlxplat_dmi_table); + static int mlxplat_mlxcpld_verify_bus_topology(int *nr) + { + struct i2c_adapter *search_adap; +- int shift, i; ++ int i, shift = 0; + + /* Scan adapters from expected id to verify it is free. */ + *nr = MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR; +-- +2.20.1 + diff --git a/patch/0012-hwmon-mlxreg-fan-Add-support-for-fan-drawers-capabil.patch b/patch/0012-hwmon-mlxreg-fan-Add-support-for-fan-drawers-capabil.patch deleted file mode 100644 index 3ead7b7b0a2f..000000000000 --- a/patch/0012-hwmon-mlxreg-fan-Add-support-for-fan-drawers-capabil.patch +++ /dev/null @@ -1,135 +0,0 @@ -From 868be8beaf13aefd82d53a6aa9d5c9644652e5f4 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 22 Mar 2021 19:22:37 +0200 -Subject: [PATCH backport 5.10 012/182] hwmon: (mlxreg-fan) Add support for fan - drawers capability and present registers - -Add support for fan drawer's capability and present registers in order -to set mapping between the fan drawers and tachometers. Some systems -are equipped with fan drawers with one tachometer inside. Others with -fan drawers with several tachometers inside. Using present register -along with tachometer-to-drawer mapping allows to skip reading missed -tachometers and expose input for them as zero, instead of exposing -fault code returned by hardware. - -Signed-off-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20210322172237.2213584-1-vadimp@nvidia.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/mlxreg-fan.c | 51 +++++++++++++++++++++++++++++++++++++- - 1 file changed, 50 insertions(+), 1 deletion(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index bd8f5a3aaad9..89fe7b9fe26b 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -67,11 +67,13 @@ - * @connected: indicates if tachometer is connected; - * @reg: register offset; - * @mask: fault mask; -+ * @prsnt: present register offset; - */ - struct mlxreg_fan_tacho { - bool connected; - u32 reg; - u32 mask; -+ u32 prsnt; - }; - - /* -@@ -92,6 +94,7 @@ struct mlxreg_fan_pwm { - * @regmap: register map of parent device; - * @tacho: tachometer data; - * @pwm: PWM data; -+ * @tachos_per_drwr - number of tachometers per drawer; - * @samples: minimum allowed samples per pulse; - * @divider: divider value for tachometer RPM calculation; - * @cooling: cooling device levels; -@@ -103,6 +106,7 @@ struct mlxreg_fan { - struct mlxreg_core_platform_data *pdata; - struct mlxreg_fan_tacho tacho[MLXREG_FAN_MAX_TACHO]; - struct mlxreg_fan_pwm pwm; -+ int tachos_per_drwr; - int samples; - int divider; - u8 cooling_levels[MLXREG_FAN_MAX_STATE + 1]; -@@ -123,6 +127,26 @@ mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, - tacho = &fan->tacho[channel]; - switch (attr) { - case hwmon_fan_input: -+ /* -+ * Check FAN presence: FAN related bit in presence register is one, -+ * if FAN is physically connected, zero - otherwise. -+ */ -+ if (tacho->prsnt && fan->tachos_per_drwr) { -+ err = regmap_read(fan->regmap, tacho->prsnt, ®val); -+ if (err) -+ return err; -+ -+ /* -+ * Map channel to presence bit - drawer can be equipped with -+ * one or few FANs, while presence is indicated per drawer. -+ */ -+ if (BIT(channel / fan->tachos_per_drwr) & regval) { -+ /* FAN is not connected - return zero for FAN speed. */ -+ *val = 0; -+ return 0; -+ } -+ } -+ - err = regmap_read(fan->regmap, tacho->reg, ®val); - if (err) - return err; -@@ -395,8 +419,8 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan, - struct mlxreg_core_platform_data *pdata) - { - struct mlxreg_core_data *data = pdata->data; -+ int tacho_num = 0, tacho_avail = 0, i; - bool configured = false; -- int tacho_num = 0, i; - int err; - - fan->samples = MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF; -@@ -421,7 +445,9 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan, - - fan->tacho[tacho_num].reg = data->reg; - fan->tacho[tacho_num].mask = data->mask; -+ fan->tacho[tacho_num].prsnt = data->reg_prsnt; - fan->tacho[tacho_num++].connected = true; -+ tacho_avail++; - } else if (strnstr(data->label, "pwm", sizeof(data->label))) { - if (fan->pwm.connected) { - dev_err(fan->dev, "duplicate pwm entry: %s\n", -@@ -459,6 +485,29 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan, - } - } - -+ if (pdata->capability) { -+ int drwr_avail; -+ u32 regval; -+ -+ /* Obtain the number of FAN drawers, supported by system. */ -+ err = regmap_read(fan->regmap, pdata->capability, ®val); -+ if (err) { -+ dev_err(fan->dev, "Failed to query capability register 0x%08x\n", -+ pdata->capability); -+ return err; -+ } -+ -+ drwr_avail = hweight32(regval); -+ if (!tacho_avail || !drwr_avail || tacho_avail < drwr_avail) { -+ dev_err(fan->dev, "Configuration is invalid: drawers num %d tachos num %d\n", -+ drwr_avail, tacho_avail); -+ return -EINVAL; -+ } -+ -+ /* Set the number of tachometers per one drawer. */ -+ fan->tachos_per_drwr = tacho_avail / drwr_avail; -+ } -+ - /* Init cooling levels per PWM state. */ - for (i = 0; i < MLXREG_FAN_SPEED_MIN_LEVEL; i++) - fan->cooling_levels[i] = MLXREG_FAN_SPEED_MIN_LEVEL; --- -2.20.1 - diff --git a/patch/0012-platform-mellanox-Fix-order-in-exit-flow.patch b/patch/0012-platform-mellanox-Fix-order-in-exit-flow.patch new file mode 100644 index 000000000000..fd16ec8fff4b --- /dev/null +++ b/patch/0012-platform-mellanox-Fix-order-in-exit-flow.patch @@ -0,0 +1,42 @@ +From 257c3eaf7d68e1855ea9ac93298c5231db24e2e1 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 13 Aug 2023 08:37:32 +0000 +Subject: [PATH backport v6.1 12/32] platform: mellanox: Fix order in exit flow + +Fix exit flow order: call mlxplat_post_exit() after +mlxplat_i2c_main_exit() in order to unregister main i2c driver before +to "mlxplat" driver. + +Fixes: 0170f616f496 ("platform: mellanox: Split initialization procedure") +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230813083735.39090-2-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 67367f010139..5fb3348023a7 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -6238,8 +6238,6 @@ static void mlxplat_i2c_mux_topolgy_exit(struct mlxplat_priv *priv) + if (priv->pdev_mux[i]) + platform_device_unregister(priv->pdev_mux[i]); + } +- +- mlxplat_post_exit(); + } + + static int mlxplat_i2c_main_complition_notify(void *handle, int id) +@@ -6369,6 +6367,7 @@ static void __exit mlxplat_exit(void) + pm_power_off = NULL; + mlxplat_pre_exit(priv); + mlxplat_i2c_main_exit(priv); ++ mlxplat_post_exit(); + } + module_exit(mlxplat_exit); + +-- +2.20.1 + diff --git a/patch/0013-hwmon-pmbus-shrink-code-and-remove-pmbus_do_remove.patch b/patch/0013-hwmon-pmbus-shrink-code-and-remove-pmbus_do_remove.patch deleted file mode 100644 index a33825f171cf..000000000000 --- a/patch/0013-hwmon-pmbus-shrink-code-and-remove-pmbus_do_remove.patch +++ /dev/null @@ -1,511 +0,0 @@ -From ab269af4b9fc3631547a09d9050b266a7b2fd113 Mon Sep 17 00:00:00 2001 -From: Bartosz Golaszewski -Date: Mon, 26 Oct 2020 11:53:52 +0100 -Subject: [PATCH 13/66] hwmon: (pmbus) shrink code and remove pmbus_do_remove() - -The only action currently performed in pmbus_do_remove() is removing the -debugfs hierarchy. We can schedule a devm action at probe time and remove -pmbus_do_remove() entirely from all pmbus drivers. - -Signed-off-by: Bartosz Golaszewski -Link: https://lore.kernel.org/r/20201026105352.20359-1-brgl@bgdev.pl -[groeck: Removed references to pmbus_do_remove from documentation] -Signed-off-by: Guenter Roeck ---- - Documentation/hwmon/pmbus-core.rst | 6 ------ - Documentation/hwmon/pmbus.rst | 6 ------ - drivers/hwmon/pmbus/adm1266.c | 1 - - drivers/hwmon/pmbus/adm1275.c | 1 - - drivers/hwmon/pmbus/bel-pfe.c | 1 - - drivers/hwmon/pmbus/dni_dps460.c | 1 - - drivers/hwmon/pmbus/dps1900.c | 1 - - drivers/hwmon/pmbus/ibm-cffps.c | 1 - - drivers/hwmon/pmbus/inspur-ipsps.c | 1 - - drivers/hwmon/pmbus/ir35221.c | 1 - - drivers/hwmon/pmbus/ir38064.c | 1 - - drivers/hwmon/pmbus/irps5401.c | 1 - - drivers/hwmon/pmbus/isl68137.c | 1 - - drivers/hwmon/pmbus/lm25066.c | 1 - - drivers/hwmon/pmbus/ltc2978.c | 1 - - drivers/hwmon/pmbus/ltc3815.c | 1 - - drivers/hwmon/pmbus/max16064.c | 1 - - drivers/hwmon/pmbus/max16601.c | 1 - - drivers/hwmon/pmbus/max20730.c | 1 - - drivers/hwmon/pmbus/max20751.c | 1 - - drivers/hwmon/pmbus/max31785.c | 1 - - drivers/hwmon/pmbus/max34440.c | 1 - - drivers/hwmon/pmbus/max8688.c | 1 - - drivers/hwmon/pmbus/mp2975.c | 1 - - drivers/hwmon/pmbus/pmbus.c | 1 - - drivers/hwmon/pmbus/pmbus.h | 1 - - drivers/hwmon/pmbus/pmbus_core.c | 20 +++++++++----------- - drivers/hwmon/pmbus/pxe1610.c | 1 - - drivers/hwmon/pmbus/tps40422.c | 1 - - drivers/hwmon/pmbus/tps53679.c | 1 - - drivers/hwmon/pmbus/ucd9000.c | 1 - - drivers/hwmon/pmbus/ucd9200.c | 1 - - drivers/hwmon/pmbus/xdpe12284.c | 1 - - drivers/hwmon/pmbus/zl6100.c | 1 - - 34 files changed, 9 insertions(+), 54 deletions(-) - -diff --git a/Documentation/hwmon/pmbus-core.rst b/Documentation/hwmon/pmbus-core.rst -index e22c4f6808bc..73e23ab42cc3 100644 ---- a/Documentation/hwmon/pmbus-core.rst -+++ b/Documentation/hwmon/pmbus-core.rst -@@ -277,12 +277,6 @@ with the pointer to struct pmbus_driver_info as additional argument. Calls - identify function if supported. Must only be called from device probe - function. - --:: -- -- void pmbus_do_remove(struct i2c_client *client); -- --Execute driver remove function. Similar to standard driver remove function. -- - :: - - const struct pmbus_driver_info -diff --git a/Documentation/hwmon/pmbus.rst b/Documentation/hwmon/pmbus.rst -index fb3ad67dedc1..c44f14115413 100644 ---- a/Documentation/hwmon/pmbus.rst -+++ b/Documentation/hwmon/pmbus.rst -@@ -148,11 +148,6 @@ Emerson DS1200 power modules might look as follows:: - return pmbus_do_probe(client, &ds1200_info); - } - -- static int ds1200_remove(struct i2c_client *client) -- { -- return pmbus_do_remove(client); -- } -- - static const struct i2c_device_id ds1200_id[] = { - {"ds1200", 0}, - {} -@@ -166,7 +161,6 @@ Emerson DS1200 power modules might look as follows:: - .name = "ds1200", - }, - .probe_new = ds1200_probe, -- .remove = ds1200_remove, - .id_table = ds1200_id, - }; - -diff --git a/drivers/hwmon/pmbus/adm1266.c b/drivers/hwmon/pmbus/adm1266.c -index c7b373ba92f2..4d2e4ddcfbfd 100644 ---- a/drivers/hwmon/pmbus/adm1266.c -+++ b/drivers/hwmon/pmbus/adm1266.c -@@ -502,7 +502,6 @@ static struct i2c_driver adm1266_driver = { - .of_match_table = adm1266_of_match, - }, - .probe_new = adm1266_probe, -- .remove = pmbus_do_remove, - .id_table = adm1266_id, - }; - -diff --git a/drivers/hwmon/pmbus/adm1275.c b/drivers/hwmon/pmbus/adm1275.c -index e7997f37b266..38a6515b0763 100644 ---- a/drivers/hwmon/pmbus/adm1275.c -+++ b/drivers/hwmon/pmbus/adm1275.c -@@ -797,7 +797,6 @@ static struct i2c_driver adm1275_driver = { - .name = "adm1275", - }, - .probe_new = adm1275_probe, -- .remove = pmbus_do_remove, - .id_table = adm1275_id, - }; - -diff --git a/drivers/hwmon/pmbus/bel-pfe.c b/drivers/hwmon/pmbus/bel-pfe.c -index 2c5b853d6c7f..aed7542d7ce5 100644 ---- a/drivers/hwmon/pmbus/bel-pfe.c -+++ b/drivers/hwmon/pmbus/bel-pfe.c -@@ -121,7 +121,6 @@ static struct i2c_driver pfe_pmbus_driver = { - .name = "bel-pfe", - }, - .probe_new = pfe_pmbus_probe, -- .remove = pmbus_do_remove, - .id_table = pfe_device_id, - }; - -diff --git a/drivers/hwmon/pmbus/dni_dps460.c b/drivers/hwmon/pmbus/dni_dps460.c -index 4e96a430bbe9..0d6fc448d27f 100644 ---- a/drivers/hwmon/pmbus/dni_dps460.c -+++ b/drivers/hwmon/pmbus/dni_dps460.c -@@ -375,7 +375,6 @@ static int dni_dps460_remove(struct i2c_client *client) - sysfs_remove_group(&client->dev.kobj, &dni_dps460_attr_grp); - if (data->info) - kfree(data->info); -- pmbus_do_remove(client); - return 0; - } - -diff --git a/drivers/hwmon/pmbus/dps1900.c b/drivers/hwmon/pmbus/dps1900.c -index decbd07c6d6e..c7400d4f1bfa 100644 ---- a/drivers/hwmon/pmbus/dps1900.c -+++ b/drivers/hwmon/pmbus/dps1900.c -@@ -151,7 +151,6 @@ static struct i2c_driver dps1900_driver = { - .name = "dps1900", - }, - .probe = dps1900_probe, -- .remove = pmbus_do_remove, - .id_table = dps1900_id, - }; - -diff --git a/drivers/hwmon/pmbus/ibm-cffps.c b/drivers/hwmon/pmbus/ibm-cffps.c -index 2fb7540ee952..d6bbbb223871 100644 ---- a/drivers/hwmon/pmbus/ibm-cffps.c -+++ b/drivers/hwmon/pmbus/ibm-cffps.c -@@ -617,7 +617,6 @@ static struct i2c_driver ibm_cffps_driver = { - .of_match_table = ibm_cffps_of_match, - }, - .probe_new = ibm_cffps_probe, -- .remove = pmbus_do_remove, - .id_table = ibm_cffps_id, - }; - -diff --git a/drivers/hwmon/pmbus/inspur-ipsps.c b/drivers/hwmon/pmbus/inspur-ipsps.c -index be493182174d..88c5865c4d6f 100644 ---- a/drivers/hwmon/pmbus/inspur-ipsps.c -+++ b/drivers/hwmon/pmbus/inspur-ipsps.c -@@ -216,7 +216,6 @@ static struct i2c_driver ipsps_driver = { - .of_match_table = of_match_ptr(ipsps_of_match), - }, - .probe_new = ipsps_probe, -- .remove = pmbus_do_remove, - .id_table = ipsps_id, - }; - -diff --git a/drivers/hwmon/pmbus/ir35221.c b/drivers/hwmon/pmbus/ir35221.c -index 5fadb1def49f..3aebeb1443fd 100644 ---- a/drivers/hwmon/pmbus/ir35221.c -+++ b/drivers/hwmon/pmbus/ir35221.c -@@ -137,7 +137,6 @@ static struct i2c_driver ir35221_driver = { - .name = "ir35221", - }, - .probe_new = ir35221_probe, -- .remove = pmbus_do_remove, - .id_table = ir35221_id, - }; - -diff --git a/drivers/hwmon/pmbus/ir38064.c b/drivers/hwmon/pmbus/ir38064.c -index 9ac563ce7dd8..46f17c4b4873 100644 ---- a/drivers/hwmon/pmbus/ir38064.c -+++ b/drivers/hwmon/pmbus/ir38064.c -@@ -53,7 +53,6 @@ static struct i2c_driver ir38064_driver = { - .name = "ir38064", - }, - .probe_new = ir38064_probe, -- .remove = pmbus_do_remove, - .id_table = ir38064_id, - }; - -diff --git a/drivers/hwmon/pmbus/irps5401.c b/drivers/hwmon/pmbus/irps5401.c -index 44aeafcbd56c..93ef6d64a33a 100644 ---- a/drivers/hwmon/pmbus/irps5401.c -+++ b/drivers/hwmon/pmbus/irps5401.c -@@ -55,7 +55,6 @@ static struct i2c_driver irps5401_driver = { - .name = "irps5401", - }, - .probe_new = irps5401_probe, -- .remove = pmbus_do_remove, - .id_table = irps5401_id, - }; - -diff --git a/drivers/hwmon/pmbus/isl68137.c b/drivers/hwmon/pmbus/isl68137.c -index 3f1b826dac8a..789242ed72e5 100644 ---- a/drivers/hwmon/pmbus/isl68137.c -+++ b/drivers/hwmon/pmbus/isl68137.c -@@ -324,7 +324,6 @@ static struct i2c_driver isl68137_driver = { - .name = "isl68137", - }, - .probe_new = isl68137_probe, -- .remove = pmbus_do_remove, - .id_table = raa_dmpvr_id, - }; - -diff --git a/drivers/hwmon/pmbus/lm25066.c b/drivers/hwmon/pmbus/lm25066.c -index 17199a1104c7..9041a1c0f175 100644 ---- a/drivers/hwmon/pmbus/lm25066.c -+++ b/drivers/hwmon/pmbus/lm25066.c -@@ -531,7 +531,6 @@ static struct i2c_driver lm25066_driver = { - .name = "lm25066", - }, - .probe_new = lm25066_probe, -- .remove = pmbus_do_remove, - .id_table = lm25066_id, - }; - -diff --git a/drivers/hwmon/pmbus/ltc2978.c b/drivers/hwmon/pmbus/ltc2978.c -index 9a024cf70145..7e53fa95b92d 100644 ---- a/drivers/hwmon/pmbus/ltc2978.c -+++ b/drivers/hwmon/pmbus/ltc2978.c -@@ -875,7 +875,6 @@ static struct i2c_driver ltc2978_driver = { - .of_match_table = of_match_ptr(ltc2978_of_match), - }, - .probe_new = ltc2978_probe, -- .remove = pmbus_do_remove, - .id_table = ltc2978_id, - }; - -diff --git a/drivers/hwmon/pmbus/ltc3815.c b/drivers/hwmon/pmbus/ltc3815.c -index 8328fb367ad6..e45e14d26c9a 100644 ---- a/drivers/hwmon/pmbus/ltc3815.c -+++ b/drivers/hwmon/pmbus/ltc3815.c -@@ -200,7 +200,6 @@ static struct i2c_driver ltc3815_driver = { - .name = "ltc3815", - }, - .probe_new = ltc3815_probe, -- .remove = pmbus_do_remove, - .id_table = ltc3815_id, - }; - -diff --git a/drivers/hwmon/pmbus/max16064.c b/drivers/hwmon/pmbus/max16064.c -index 26e7f5ef9d7f..d79add99083e 100644 ---- a/drivers/hwmon/pmbus/max16064.c -+++ b/drivers/hwmon/pmbus/max16064.c -@@ -103,7 +103,6 @@ static struct i2c_driver max16064_driver = { - .name = "max16064", - }, - .probe_new = max16064_probe, -- .remove = pmbus_do_remove, - .id_table = max16064_id, - }; - -diff --git a/drivers/hwmon/pmbus/max16601.c b/drivers/hwmon/pmbus/max16601.c -index 71bb74e27a5c..a960b86e72d2 100644 ---- a/drivers/hwmon/pmbus/max16601.c -+++ b/drivers/hwmon/pmbus/max16601.c -@@ -302,7 +302,6 @@ static struct i2c_driver max16601_driver = { - .name = "max16601", - }, - .probe_new = max16601_probe, -- .remove = pmbus_do_remove, - .id_table = max16601_id, - }; - -diff --git a/drivers/hwmon/pmbus/max20730.c b/drivers/hwmon/pmbus/max20730.c -index be83b98411c7..315b3b081f3e 100644 ---- a/drivers/hwmon/pmbus/max20730.c -+++ b/drivers/hwmon/pmbus/max20730.c -@@ -779,7 +779,6 @@ static struct i2c_driver max20730_driver = { - .of_match_table = max20730_of_match, - }, - .probe_new = max20730_probe, -- .remove = pmbus_do_remove, - .id_table = max20730_id, - }; - -diff --git a/drivers/hwmon/pmbus/max20751.c b/drivers/hwmon/pmbus/max20751.c -index 921e92d82aec..9d42f82fdd99 100644 ---- a/drivers/hwmon/pmbus/max20751.c -+++ b/drivers/hwmon/pmbus/max20751.c -@@ -43,7 +43,6 @@ static struct i2c_driver max20751_driver = { - .name = "max20751", - }, - .probe_new = max20751_probe, -- .remove = pmbus_do_remove, - .id_table = max20751_id, - }; - -diff --git a/drivers/hwmon/pmbus/max31785.c b/drivers/hwmon/pmbus/max31785.c -index 839b957bc03e..e5a9f4019cd5 100644 ---- a/drivers/hwmon/pmbus/max31785.c -+++ b/drivers/hwmon/pmbus/max31785.c -@@ -390,7 +390,6 @@ static struct i2c_driver max31785_driver = { - .of_match_table = max31785_of_match, - }, - .probe_new = max31785_probe, -- .remove = pmbus_do_remove, - .id_table = max31785_id, - }; - -diff --git a/drivers/hwmon/pmbus/max34440.c b/drivers/hwmon/pmbus/max34440.c -index f4cb196aaaf3..dad66b3c0116 100644 ---- a/drivers/hwmon/pmbus/max34440.c -+++ b/drivers/hwmon/pmbus/max34440.c -@@ -521,7 +521,6 @@ static struct i2c_driver max34440_driver = { - .name = "max34440", - }, - .probe_new = max34440_probe, -- .remove = pmbus_do_remove, - .id_table = max34440_id, - }; - -diff --git a/drivers/hwmon/pmbus/max8688.c b/drivers/hwmon/pmbus/max8688.c -index 4b2239a6afd3..329dc851fc59 100644 ---- a/drivers/hwmon/pmbus/max8688.c -+++ b/drivers/hwmon/pmbus/max8688.c -@@ -183,7 +183,6 @@ static struct i2c_driver max8688_driver = { - .name = "max8688", - }, - .probe_new = max8688_probe, -- .remove = pmbus_do_remove, - .id_table = max8688_id, - }; - -diff --git a/drivers/hwmon/pmbus/mp2975.c b/drivers/hwmon/pmbus/mp2975.c -index 1c3e2a9453b1..60fbdb371332 100644 ---- a/drivers/hwmon/pmbus/mp2975.c -+++ b/drivers/hwmon/pmbus/mp2975.c -@@ -758,7 +758,6 @@ static struct i2c_driver mp2975_driver = { - .of_match_table = of_match_ptr(mp2975_of_match), - }, - .probe_new = mp2975_probe, -- .remove = pmbus_do_remove, - .id_table = mp2975_id, - }; - -diff --git a/drivers/hwmon/pmbus/pmbus.c b/drivers/hwmon/pmbus/pmbus.c -index 20f1af9165c2..a1b4260e75b2 100644 ---- a/drivers/hwmon/pmbus/pmbus.c -+++ b/drivers/hwmon/pmbus/pmbus.c -@@ -238,7 +238,6 @@ static struct i2c_driver pmbus_driver = { - .name = "pmbus", - }, - .probe_new = pmbus_probe, -- .remove = pmbus_do_remove, - .id_table = pmbus_id, - }; - -diff --git a/drivers/hwmon/pmbus/pmbus.h b/drivers/hwmon/pmbus/pmbus.h -index 88a5df2633fb..4c30ec89f5bf 100644 ---- a/drivers/hwmon/pmbus/pmbus.h -+++ b/drivers/hwmon/pmbus/pmbus.h -@@ -490,7 +490,6 @@ void pmbus_clear_faults(struct i2c_client *client); - bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); - bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); - int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info); --int pmbus_do_remove(struct i2c_client *client); - const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client - *client); - int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, -diff --git a/drivers/hwmon/pmbus/pmbus_core.c b/drivers/hwmon/pmbus/pmbus_core.c -index b0e2820a2d57..192442b3b7a2 100644 ---- a/drivers/hwmon/pmbus/pmbus_core.c -+++ b/drivers/hwmon/pmbus/pmbus_core.c -@@ -2395,6 +2395,13 @@ static int pmbus_debugfs_set_pec(void *data, u64 val) - DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_pec, pmbus_debugfs_get_pec, - pmbus_debugfs_set_pec, "%llu\n"); - -+static void pmbus_remove_debugfs(void *data) -+{ -+ struct dentry *entry = data; -+ -+ debugfs_remove_recursive(entry); -+} -+ - static int pmbus_init_debugfs(struct i2c_client *client, - struct pmbus_data *data) - { -@@ -2530,7 +2537,8 @@ static int pmbus_init_debugfs(struct i2c_client *client, - } - } - -- return 0; -+ return devm_add_action_or_reset(data->dev, -+ pmbus_remove_debugfs, data->debugfs); - } - #else - static int pmbus_init_debugfs(struct i2c_client *client, -@@ -2617,16 +2625,6 @@ int pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info) - } - EXPORT_SYMBOL_GPL(pmbus_do_probe); - --int pmbus_do_remove(struct i2c_client *client) --{ -- struct pmbus_data *data = i2c_get_clientdata(client); -- -- debugfs_remove_recursive(data->debugfs); -- -- return 0; --} --EXPORT_SYMBOL_GPL(pmbus_do_remove); -- - struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client) - { - struct pmbus_data *data = i2c_get_clientdata(client); -diff --git a/drivers/hwmon/pmbus/pxe1610.c b/drivers/hwmon/pmbus/pxe1610.c -index 212433eb6cc3..eb4a06003b7f 100644 ---- a/drivers/hwmon/pmbus/pxe1610.c -+++ b/drivers/hwmon/pmbus/pxe1610.c -@@ -140,7 +140,6 @@ static struct i2c_driver pxe1610_driver = { - .name = "pxe1610", - }, - .probe_new = pxe1610_probe, -- .remove = pmbus_do_remove, - .id_table = pxe1610_id, - }; - -diff --git a/drivers/hwmon/pmbus/tps40422.c b/drivers/hwmon/pmbus/tps40422.c -index edbdfa809d51..f7f00ab6f46c 100644 ---- a/drivers/hwmon/pmbus/tps40422.c -+++ b/drivers/hwmon/pmbus/tps40422.c -@@ -43,7 +43,6 @@ static struct i2c_driver tps40422_driver = { - .name = "tps40422", - }, - .probe_new = tps40422_probe, -- .remove = pmbus_do_remove, - .id_table = tps40422_id, - }; - -diff --git a/drivers/hwmon/pmbus/tps53679.c b/drivers/hwmon/pmbus/tps53679.c -index db2bdf2a1f02..ba838fa311c3 100644 ---- a/drivers/hwmon/pmbus/tps53679.c -+++ b/drivers/hwmon/pmbus/tps53679.c -@@ -251,7 +251,6 @@ static struct i2c_driver tps53679_driver = { - .of_match_table = of_match_ptr(tps53679_of_match), - }, - .probe_new = tps53679_probe, -- .remove = pmbus_do_remove, - .id_table = tps53679_id, - }; - -diff --git a/drivers/hwmon/pmbus/ucd9000.c b/drivers/hwmon/pmbus/ucd9000.c -index f8017993e2b4..a15e6fe3e425 100644 ---- a/drivers/hwmon/pmbus/ucd9000.c -+++ b/drivers/hwmon/pmbus/ucd9000.c -@@ -621,7 +621,6 @@ static struct i2c_driver ucd9000_driver = { - .of_match_table = of_match_ptr(ucd9000_of_match), - }, - .probe_new = ucd9000_probe, -- .remove = pmbus_do_remove, - .id_table = ucd9000_id, - }; - -diff --git a/drivers/hwmon/pmbus/ucd9200.c b/drivers/hwmon/pmbus/ucd9200.c -index e111e25e1619..47cc7ca9d329 100644 ---- a/drivers/hwmon/pmbus/ucd9200.c -+++ b/drivers/hwmon/pmbus/ucd9200.c -@@ -201,7 +201,6 @@ static struct i2c_driver ucd9200_driver = { - .of_match_table = of_match_ptr(ucd9200_of_match), - }, - .probe_new = ucd9200_probe, -- .remove = pmbus_do_remove, - .id_table = ucd9200_id, - }; - -diff --git a/drivers/hwmon/pmbus/xdpe12284.c b/drivers/hwmon/pmbus/xdpe12284.c -index c95ac934fde4..f8bc0f41cd5f 100644 ---- a/drivers/hwmon/pmbus/xdpe12284.c -+++ b/drivers/hwmon/pmbus/xdpe12284.c -@@ -160,7 +160,6 @@ static struct i2c_driver xdpe122_driver = { - .of_match_table = of_match_ptr(xdpe122_of_match), - }, - .probe_new = xdpe122_probe, -- .remove = pmbus_do_remove, - .id_table = xdpe122_id, - }; - -diff --git a/drivers/hwmon/pmbus/zl6100.c b/drivers/hwmon/pmbus/zl6100.c -index e8bda340482b..69120ca7aaa8 100644 ---- a/drivers/hwmon/pmbus/zl6100.c -+++ b/drivers/hwmon/pmbus/zl6100.c -@@ -396,7 +396,6 @@ static struct i2c_driver zl6100_driver = { - .name = "zl6100", - }, - .probe_new = zl6100_probe, -- .remove = pmbus_do_remove, - .id_table = zl6100_id, - }; - --- -2.17.1 - diff --git a/patch/0013-platform-mellanox-mlx-platform-Fix-signals-polarity-.patch b/patch/0013-platform-mellanox-mlx-platform-Fix-signals-polarity-.patch new file mode 100644 index 000000000000..2fbabe2d101b --- /dev/null +++ b/patch/0013-platform-mellanox-mlx-platform-Fix-signals-polarity-.patch @@ -0,0 +1,61 @@ +From 3813bfae9b78253deff0007f75d5f25e16256888 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 13 Aug 2023 08:37:33 +0000 +Subject: [PATH backport v6.1 13/32] platform: mellanox: mlx-platform: Fix + signals polarity and latch mask + +Change polarity of chassis health and power signals and fix latch reset +mask for L1 switch. + +Fixes: dd635e33b5c9 ("platform: mellanox: Introduce support of new Nvidia L1 switch") +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230813083735.39090-3-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 5fb3348023a7..69256af04f05 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -237,7 +237,7 @@ + #define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0) + #define MLXPLAT_CPLD_EROT_MASK GENMASK(1, 0) + #define MLXPLAT_CPLD_PWR_BUTTON_MASK BIT(0) +-#define MLXPLAT_CPLD_LATCH_RST_MASK BIT(5) ++#define MLXPLAT_CPLD_LATCH_RST_MASK BIT(6) + #define MLXPLAT_CPLD_THERMAL1_PDB_MASK BIT(3) + #define MLXPLAT_CPLD_THERMAL2_PDB_MASK BIT(4) + #define MLXPLAT_CPLD_INTRUSION_MASK BIT(6) +@@ -2475,7 +2475,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_l1_switch_events_items[] = { + .reg = MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET, + .mask = MLXPLAT_CPLD_PWR_BUTTON_MASK, + .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_pwr_events_items_data), +- .inversed = 0, ++ .inversed = 1, + .health = false, + }, + { +@@ -2484,7 +2484,7 @@ static struct mlxreg_core_item mlxplat_mlxcpld_l1_switch_events_items[] = { + .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET, + .mask = MLXPLAT_CPLD_L1_CHA_HEALTH_MASK, + .count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_health_events_items_data), +- .inversed = 0, ++ .inversed = 1, + .health = false, + .ind = 8, + }, +@@ -3677,7 +3677,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + { + .label = "latch_reset", + .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, +- .mask = GENMASK(7, 0) & ~BIT(5), ++ .mask = GENMASK(7, 0) & ~BIT(6), + .mode = 0200, + }, + { +-- +2.20.1 + diff --git a/patch/0014-platform-mellanox-mlx-platform-Modify-graceful-shutd.patch b/patch/0014-platform-mellanox-mlx-platform-Modify-graceful-shutd.patch new file mode 100644 index 000000000000..cdcef3c16bd3 --- /dev/null +++ b/patch/0014-platform-mellanox-mlx-platform-Modify-graceful-shutd.patch @@ -0,0 +1,46 @@ +From e36789aba49f2728284d169c67162a7075f9931c Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 13 Aug 2023 08:37:34 +0000 +Subject: [PATH backport v6.1 14/32] platform: mellanox: mlx-platform: Modify + graceful shutdown callback and power down mask + +Use kernel_power_off() instead of kernel_halt() to pass through +machine_power_off() -> pm_power_off(), otherwise axillary power does +not go off. + +Change "power down" bitmask. + +Fixes: dd635e33b5c9 ("platform: mellanox: Introduce support of new Nvidia L1 switch") +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230813083735.39090-4-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 69256af04f05..240bc3174caf 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -222,7 +222,7 @@ + MLXPLAT_CPLD_AGGR_MASK_LC_SDWN) + #define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1 + #define MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2 BIT(2) +-#define MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT BIT(4) ++#define MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT GENMASK(5, 4) + #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6) + #define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0) + #define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0) +@@ -2356,7 +2356,7 @@ mlxplat_mlxcpld_l1_switch_pwr_events_handler(void *handle, enum mlxreg_hotplug_k + u8 action) + { + dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button"); +- kernel_halt(); ++ kernel_power_off(); + return 0; + } + +-- +2.20.1 + diff --git a/patch/0015-mlxsw-core-Remove-critical-trip-points-from-thermal-.patch b/patch/0015-mlxsw-core-Remove-critical-trip-points-from-thermal-.patch deleted file mode 100644 index 600339762762..000000000000 --- a/patch/0015-mlxsw-core-Remove-critical-trip-points-from-thermal-.patch +++ /dev/null @@ -1,124 +0,0 @@ -From 2bea2ba313dd45240a0295de02762b2a2af2a18d Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Tue, 6 Apr 2021 15:27:33 +0300 -Subject: [PATCH backport 5.10 015/182] mlxsw: core: Remove critical trip - points from thermal zones - -Disable software thermal protection by removing critical trip points -from all thermal zones. - -The software thermal protection is redundant given there are two layers -of protection below it in firmware and hardware. The first layer is -performed by firmware, the second, in case firmware was not able to -perform protection, by hardware. -The temperature threshold set for hardware protection is always higher -than for firmware. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - .../ethernet/mellanox/mlxsw/core_thermal.c | 27 +++++-------------- - 1 file changed, 6 insertions(+), 21 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -index ecd1856bef5e..5b37449d4b66 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -@@ -19,7 +19,6 @@ - #define MLXSW_THERMAL_ASIC_TEMP_NORM 75000 /* 75C */ - #define MLXSW_THERMAL_ASIC_TEMP_HIGH 85000 /* 85C */ - #define MLXSW_THERMAL_ASIC_TEMP_HOT 105000 /* 105C */ --#define MLXSW_THERMAL_ASIC_TEMP_CRIT 140000 /* 140C */ - #define MLXSW_THERMAL_HYSTERESIS_TEMP 5000 /* 5C */ - #define MLXSW_THERMAL_MODULE_TEMP_SHIFT (MLXSW_THERMAL_HYSTERESIS_TEMP * 2) - #define MLXSW_THERMAL_ZONE_MAX_NAME 16 -@@ -37,7 +36,6 @@ enum mlxsw_thermal_trips { - MLXSW_THERMAL_TEMP_TRIP_NORM, - MLXSW_THERMAL_TEMP_TRIP_HIGH, - MLXSW_THERMAL_TEMP_TRIP_HOT, -- MLXSW_THERMAL_TEMP_TRIP_CRIT, - }; - - struct mlxsw_thermal_trip { -@@ -67,16 +65,9 @@ static const struct mlxsw_thermal_trip default_thermal_trips[] = { - { /* Warning */ - .type = THERMAL_TRIP_HOT, - .temp = MLXSW_THERMAL_ASIC_TEMP_HOT, -- .hyst = MLXSW_THERMAL_HYSTERESIS_TEMP, - .min_state = MLXSW_THERMAL_MAX_STATE, - .max_state = MLXSW_THERMAL_MAX_STATE, - }, -- { /* Critical - soft poweroff */ -- .type = THERMAL_TRIP_CRITICAL, -- .temp = MLXSW_THERMAL_ASIC_TEMP_CRIT, -- .min_state = MLXSW_THERMAL_MAX_STATE, -- .max_state = MLXSW_THERMAL_MAX_STATE, -- } - }; - - #define MLXSW_THERMAL_NUM_TRIPS ARRAY_SIZE(default_thermal_trips) -@@ -146,7 +137,6 @@ mlxsw_thermal_module_trips_reset(struct mlxsw_thermal_module *tz) - tz->trips[MLXSW_THERMAL_TEMP_TRIP_NORM].temp = 0; - tz->trips[MLXSW_THERMAL_TEMP_TRIP_HIGH].temp = 0; - tz->trips[MLXSW_THERMAL_TEMP_TRIP_HOT].temp = 0; -- tz->trips[MLXSW_THERMAL_TEMP_TRIP_CRIT].temp = 0; - } - - static int -@@ -175,11 +165,10 @@ mlxsw_thermal_module_trips_update(struct device *dev, struct mlxsw_core *core, - } - - /* According to the system thermal requirements, the thermal zones are -- * defined with four trip points. The critical and emergency -+ * defined with three trip points. The critical and emergency - * temperature thresholds, provided by QSFP module are set as "active" -- * and "hot" trip points, "normal" and "critical" trip points are -- * derived from "active" and "hot" by subtracting or adding double -- * hysteresis value. -+ * and "hot" trip points, "normal" trip point is derived from "active" -+ * by subtracting double hysteresis value. - */ - if (crit_temp >= MLXSW_THERMAL_MODULE_TEMP_SHIFT) - tz->trips[MLXSW_THERMAL_TEMP_TRIP_NORM].temp = crit_temp - -@@ -188,8 +177,6 @@ mlxsw_thermal_module_trips_update(struct device *dev, struct mlxsw_core *core, - tz->trips[MLXSW_THERMAL_TEMP_TRIP_NORM].temp = crit_temp; - tz->trips[MLXSW_THERMAL_TEMP_TRIP_HIGH].temp = crit_temp; - tz->trips[MLXSW_THERMAL_TEMP_TRIP_HOT].temp = emerg_temp; -- tz->trips[MLXSW_THERMAL_TEMP_TRIP_CRIT].temp = emerg_temp + -- MLXSW_THERMAL_MODULE_TEMP_SHIFT; - - return 0; - } -@@ -202,7 +189,7 @@ static void mlxsw_thermal_tz_score_update(struct mlxsw_thermal *thermal, - struct mlxsw_thermal_trip *trip = trips; - unsigned int score, delta, i, shift = 1; - -- /* Calculate thermal zone score, if temperature is above the critical -+ /* Calculate thermal zone score, if temperature is above the hot - * threshold score is set to MLXSW_THERMAL_TEMP_SCORE_MAX. - */ - score = MLXSW_THERMAL_TEMP_SCORE_MAX; -@@ -325,8 +312,7 @@ static int mlxsw_thermal_set_trip_temp(struct thermal_zone_device *tzdev, - { - struct mlxsw_thermal *thermal = tzdev->devdata; - -- if (trip < 0 || trip >= MLXSW_THERMAL_NUM_TRIPS || -- temp > MLXSW_THERMAL_ASIC_TEMP_CRIT) -+ if (trip < 0 || trip >= MLXSW_THERMAL_NUM_TRIPS) - return -EINVAL; - - thermal->trips[trip].temp = temp; -@@ -494,8 +480,7 @@ mlxsw_thermal_module_trip_temp_set(struct thermal_zone_device *tzdev, - { - struct mlxsw_thermal_module *tz = tzdev->devdata; - -- if (trip < 0 || trip >= MLXSW_THERMAL_NUM_TRIPS || -- temp > tz->trips[MLXSW_THERMAL_TEMP_TRIP_CRIT].temp) -+ if (trip < 0 || trip >= MLXSW_THERMAL_NUM_TRIPS) - return -EINVAL; - - tz->trips[trip].temp = temp; --- -2.20.1 - diff --git a/patch/0015-platform-mellanox-Change-register-offset-addresses.patch b/patch/0015-platform-mellanox-Change-register-offset-addresses.patch new file mode 100644 index 000000000000..ac10474b0756 --- /dev/null +++ b/patch/0015-platform-mellanox-Change-register-offset-addresses.patch @@ -0,0 +1,46 @@ +From 3c3fbec3ebc2df518c0e1db05a7f14b3f39ef25f Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 13 Aug 2023 08:37:35 +0000 +Subject: [PATH backport v6.1 15/32] platform: mellanox: Change register offset + addresses + +Move debug register offsets to different location due to hardware changes. + +Fixes: dd635e33b5c9 ("platform: mellanox: Introduce support of new Nvidia L1 switch") +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230813083735.39090-5-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + drivers/platform/x86/mlx-platform.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 240bc3174caf..7d33977d9c60 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -62,10 +62,6 @@ + #define MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET 0x37 + #define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a + #define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b +-#define MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET 0x3c +-#define MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET 0x3d +-#define MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET 0x3e +-#define MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET 0x3f + #define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40 + #define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET 0x41 + #define MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET 0x42 +@@ -126,6 +122,10 @@ + #define MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET 0xaa + #define MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET 0xab + #define MLXPLAT_CPLD_LPC_REG_LC_PWR_ON 0xb2 ++#define MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET 0xb6 ++#define MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET 0xb7 ++#define MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET 0xb8 ++#define MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET 0xb9 + #define MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET 0xc2 + #define MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT 0xc3 + #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET 0xc7 +-- +2.20.1 + diff --git a/patch/0016-net-don-t-include-ethtool.h-from-netdevice.h.patch b/patch/0016-net-don-t-include-ethtool.h-from-netdevice.h.patch deleted file mode 100644 index e025e2025852..000000000000 --- a/patch/0016-net-don-t-include-ethtool.h-from-netdevice.h.patch +++ /dev/null @@ -1,619 +0,0 @@ -From e8c1cb7fb9d5ab0cfcf496efa208dae75d25a789 Mon Sep 17 00:00:00 2001 -From: Jakub Kicinski -Date: Fri, 20 Nov 2020 14:50:52 -0800 -Subject: [PATCH backport 5.10 016/182] net: don't include ethtool.h from - netdevice.h - -linux/netdevice.h is included in very many places, touching any -of its dependecies causes large incremental builds. - -Drop the linux/ethtool.h include, linux/netdevice.h just needs -a forward declaration of struct ethtool_ops. - -Fix all the places which made use of this implicit include. - -Acked-by: Johannes Berg -Acked-by: Shannon Nelson -Reviewed-by: Jesse Brandeburg -Link: https://lore.kernel.org/r/20201120225052.1427503-1-kuba@kernel.org -Signed-off-by: Jakub Kicinski ---- - drivers/isdn/capi/capi.c | 1 + - drivers/media/pci/ttpci/av7110_av.c | 1 + - drivers/net/bonding/bond_procfs.c | 1 + - drivers/net/can/usb/gs_usb.c | 1 + - drivers/net/ethernet/amazon/ena/ena_ethtool.c | 1 + - drivers/net/ethernet/aquantia/atlantic/aq_nic.h | 2 ++ - drivers/net/ethernet/broadcom/bnxt/bnxt.h | 1 + - drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c | 1 + - drivers/net/ethernet/cavium/liquidio/lio_ethtool.c | 1 + - drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c | 1 + - drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 1 + - drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c | 1 + - drivers/net/ethernet/google/gve/gve_ethtool.c | 1 + - drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + - drivers/net/ethernet/huawei/hinic/hinic_port.h | 1 + - drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c | 1 + - drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h | 1 + - drivers/net/ethernet/mellanox/mlx4/mlx4_en.h | 1 + - drivers/net/ethernet/mellanox/mlxsw/core_env.h | 3 +++ - drivers/net/ethernet/mellanox/mlxsw/spectrum.h | 1 + - drivers/net/ethernet/mellanox/mlxsw/switchx2.c | 1 + - drivers/net/ethernet/pensando/ionic/ionic_lif.c | 1 + - drivers/net/ethernet/pensando/ionic/ionic_stats.c | 1 + - drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c | 1 + - drivers/net/geneve.c | 1 + - drivers/net/hyperv/netvsc_drv.c | 1 + - drivers/net/hyperv/rndis_filter.c | 1 + - drivers/net/ipvlan/ipvlan_main.c | 2 ++ - drivers/net/nlmon.c | 1 + - drivers/net/team/team.c | 1 + - drivers/net/vrf.c | 1 + - drivers/net/vsockmon.c | 1 + - drivers/net/wimax/i2400m/usb.c | 1 + - drivers/scsi/bnx2fc/bnx2fc_fcoe.c | 2 ++ - drivers/scsi/fcoe/fcoe_transport.c | 1 + - drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c | 2 ++ - include/linux/netdevice.h | 2 +- - include/linux/qed/qed_if.h | 1 + - include/net/cfg80211.h | 1 + - include/rdma/ib_addr.h | 1 + - include/rdma/ib_verbs.h | 1 + - net/packet/af_packet.c | 1 + - net/sched/sch_cbs.c | 1 + - net/sched/sch_taprio.c | 1 + - net/socket.c | 1 + - 45 files changed, 51 insertions(+), 1 deletion(-) - -diff --git a/drivers/isdn/capi/capi.c b/drivers/isdn/capi/capi.c -index 85767f52fe3c..fdf87acccd06 100644 ---- a/drivers/isdn/capi/capi.c -+++ b/drivers/isdn/capi/capi.c -@@ -11,6 +11,7 @@ - - #include - #include -+#include - #include - #include - #include -diff --git a/drivers/media/pci/ttpci/av7110_av.c b/drivers/media/pci/ttpci/av7110_av.c -index ea9f7d0058a2..91f4866c7e59 100644 ---- a/drivers/media/pci/ttpci/av7110_av.c -+++ b/drivers/media/pci/ttpci/av7110_av.c -@@ -11,6 +11,7 @@ - * the project's page is at https://linuxtv.org - */ - -+#include - #include - #include - #include -diff --git a/drivers/net/bonding/bond_procfs.c b/drivers/net/bonding/bond_procfs.c -index fd5c9cbe45b1..56d34be5e797 100644 ---- a/drivers/net/bonding/bond_procfs.c -+++ b/drivers/net/bonding/bond_procfs.c -@@ -1,5 +1,6 @@ - // SPDX-License-Identifier: GPL-2.0 - #include -+#include - #include - #include - #include -diff --git a/drivers/net/can/usb/gs_usb.c b/drivers/net/can/usb/gs_usb.c -index a879200eaab0..5503eb028902 100644 ---- a/drivers/net/can/usb/gs_usb.c -+++ b/drivers/net/can/usb/gs_usb.c -@@ -9,6 +9,7 @@ - * Many thanks to all socketcan devs! - */ - -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/amazon/ena/ena_ethtool.c b/drivers/net/ethernet/amazon/ena/ena_ethtool.c -index 3b2cd28f962d..6cdd9efe8df3 100644 ---- a/drivers/net/ethernet/amazon/ena/ena_ethtool.c -+++ b/drivers/net/ethernet/amazon/ena/ena_ethtool.c -@@ -3,6 +3,7 @@ - * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved. - */ - -+#include - #include - - #include "ena_netdev.h" -diff --git a/drivers/net/ethernet/aquantia/atlantic/aq_nic.h b/drivers/net/ethernet/aquantia/atlantic/aq_nic.h -index 6da3efa289a3..b7f7d6f66633 100644 ---- a/drivers/net/ethernet/aquantia/atlantic/aq_nic.h -+++ b/drivers/net/ethernet/aquantia/atlantic/aq_nic.h -@@ -10,6 +10,8 @@ - #ifndef AQ_NIC_H - #define AQ_NIC_H - -+#include -+ - #include "aq_common.h" - #include "aq_rss.h" - #include "aq_hw.h" -diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h -index 34affd1de91d..b74884e6b8c6 100644 ---- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h -+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h -@@ -20,6 +20,7 @@ - #define DRV_VER_MIN 10 - #define DRV_VER_UPD 1 - -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c b/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c -index 819f9df9425c..883905db21a3 100644 ---- a/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c -+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c -@@ -8,6 +8,7 @@ - * the Free Software Foundation. - */ - -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/cavium/liquidio/lio_ethtool.c b/drivers/net/ethernet/cavium/liquidio/lio_ethtool.c -index 16eebfc52109..66f2c553370c 100644 ---- a/drivers/net/ethernet/cavium/liquidio/lio_ethtool.c -+++ b/drivers/net/ethernet/cavium/liquidio/lio_ethtool.c -@@ -15,6 +15,7 @@ - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or - * NONINFRINGEMENT. See the GNU General Public License for more details. - ***********************************************************************/ -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c b/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c -index c7bdac79299a..2f218fbfed06 100644 ---- a/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c -+++ b/drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c -@@ -5,6 +5,7 @@ - - /* ETHTOOL Support for VNIC_VF Device*/ - -+#include - #include - #include - -diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h -index 2dd486915629..e4647ff7d81a 100644 ---- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h -+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h -@@ -39,6 +39,7 @@ - - #include - #include -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c -index cd8f9a481d73..d546993bda09 100644 ---- a/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c -+++ b/drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c -@@ -33,6 +33,7 @@ - * SOFTWARE. - */ - -+#include - #include - - #include "t4vf_common.h" -diff --git a/drivers/net/ethernet/google/gve/gve_ethtool.c b/drivers/net/ethernet/google/gve/gve_ethtool.c -index c53a04313944..458e79b8d625 100644 ---- a/drivers/net/ethernet/google/gve/gve_ethtool.c -+++ b/drivers/net/ethernet/google/gve/gve_ethtool.c -@@ -4,6 +4,7 @@ - * Copyright (C) 2015-2019 Google, Inc. - */ - -+#include - #include - #include "gve.h" - #include "gve_adminq.h" -diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h -index 4a9576a449e1..fa1da6f88b88 100644 ---- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h -+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h -@@ -25,6 +25,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/huawei/hinic/hinic_port.h b/drivers/net/ethernet/huawei/hinic/hinic_port.h -index 9c3cbe45c9ec..c9ae3d4dc547 100644 ---- a/drivers/net/ethernet/huawei/hinic/hinic_port.h -+++ b/drivers/net/ethernet/huawei/hinic/hinic_port.h -@@ -8,6 +8,7 @@ - #define HINIC_PORT_H - - #include -+#include - #include - #include - -diff --git a/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c b/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c -index 908fefaa6b85..66776ba7bfb6 100644 ---- a/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c -+++ b/drivers/net/ethernet/intel/fm10k/fm10k_ethtool.c -@@ -1,6 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright(c) 2013 - 2019 Intel Corporation. */ - -+#include - #include - - #include "fm10k.h" -diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h -index d6253f2a414d..dae1b04eac84 100644 ---- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h -+++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h -@@ -11,6 +11,7 @@ - #ifndef OTX2_COMMON_H - #define OTX2_COMMON_H - -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h -index 0aa4a23ad3de..19b737813777 100644 ---- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h -+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h -@@ -36,6 +36,7 @@ - - #include - #include -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -index 8e36a2634ef5..2b23f8a87862 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -@@ -4,6 +4,9 @@ - #ifndef _MLXSW_CORE_ENV_H - #define _MLXSW_CORE_ENV_H - -+struct ethtool_modinfo; -+struct ethtool_eeprom; -+ - int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, - int off, int *temp); - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum.h -index 3e7576e671df..980e7eafcd32 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.h -@@ -4,6 +4,7 @@ - #ifndef _MLXSW_SPECTRUM_H - #define _MLXSW_SPECTRUM_H - -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/mellanox/mlxsw/switchx2.c b/drivers/net/ethernet/mellanox/mlxsw/switchx2.c -index 28bfe1ea9d94..131b2a53d261 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/switchx2.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/switchx2.c -@@ -6,6 +6,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/pensando/ionic/ionic_lif.c b/drivers/net/ethernet/pensando/ionic/ionic_lif.c -index cb12d0171517..209ebe3f2569 100644 ---- a/drivers/net/ethernet/pensando/ionic/ionic_lif.c -+++ b/drivers/net/ethernet/pensando/ionic/ionic_lif.c -@@ -1,6 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ - -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/pensando/ionic/ionic_stats.c b/drivers/net/ethernet/pensando/ionic/ionic_stats.c -index ff20a2ac4c2f..6ae75b771a15 100644 ---- a/drivers/net/ethernet/pensando/ionic/ionic_stats.c -+++ b/drivers/net/ethernet/pensando/ionic/ionic_stats.c -@@ -1,6 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0 - /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */ - -+#include - #include - #include - #include -diff --git a/drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c b/drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c -index 2adcf24848a4..ab1e0fcccabb 100644 ---- a/drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c -+++ b/drivers/net/ethernet/qualcomm/rmnet/rmnet_vnd.c -@@ -5,6 +5,7 @@ - */ - - #include -+#include - #include - #include - #include "rmnet_config.h" -diff --git a/drivers/net/geneve.c b/drivers/net/geneve.c -index 081939cb420b..c339cf5339da 100644 ---- a/drivers/net/geneve.c -+++ b/drivers/net/geneve.c -@@ -7,6 +7,7 @@ - - #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -+#include - #include - #include - #include -diff --git a/drivers/net/hyperv/netvsc_drv.c b/drivers/net/hyperv/netvsc_drv.c -index f2020be43cfe..2548a40dc5d2 100644 ---- a/drivers/net/hyperv/netvsc_drv.c -+++ b/drivers/net/hyperv/netvsc_drv.c -@@ -10,6 +10,7 @@ - - #include - #include -+#include - #include - #include - #include -diff --git a/drivers/net/hyperv/rndis_filter.c b/drivers/net/hyperv/rndis_filter.c -index 90bc0008fa2f..1f51b92e23d5 100644 ---- a/drivers/net/hyperv/rndis_filter.c -+++ b/drivers/net/hyperv/rndis_filter.c -@@ -6,6 +6,7 @@ - * Haiyang Zhang - * Hank Janssen - */ -+#include - #include - #include - #include -diff --git a/drivers/net/ipvlan/ipvlan_main.c b/drivers/net/ipvlan/ipvlan_main.c -index 60b7d93bb834..a707502a0c0f 100644 ---- a/drivers/net/ipvlan/ipvlan_main.c -+++ b/drivers/net/ipvlan/ipvlan_main.c -@@ -2,6 +2,8 @@ - /* Copyright (c) 2014 Mahesh Bandewar - */ - -+#include -+ - #include "ipvlan.h" - - static int ipvlan_set_port_mode(struct ipvl_port *port, u16 nval, -diff --git a/drivers/net/nlmon.c b/drivers/net/nlmon.c -index afb119f38325..5e19a6839dea 100644 ---- a/drivers/net/nlmon.c -+++ b/drivers/net/nlmon.c -@@ -1,4 +1,5 @@ - // SPDX-License-Identifier: GPL-2.0-only -+#include - #include - #include - #include -diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c -index 7117d559a32e..af1977e6c307 100644 ---- a/drivers/net/team/team.c -+++ b/drivers/net/team/team.c -@@ -4,6 +4,7 @@ - * Copyright (c) 2011 Jiri Pirko - */ - -+#include - #include - #include - #include -diff --git a/drivers/net/vrf.c b/drivers/net/vrf.c -index 8ab0b5a8dfef..9ecae9ff0e31 100644 ---- a/drivers/net/vrf.c -+++ b/drivers/net/vrf.c -@@ -9,6 +9,7 @@ - * Based on dummy, team and ipvlan drivers - */ - -+#include - #include - #include - #include -diff --git a/drivers/net/vsockmon.c b/drivers/net/vsockmon.c -index e8563acf98e8..b1bb1b04b664 100644 ---- a/drivers/net/vsockmon.c -+++ b/drivers/net/vsockmon.c -@@ -1,4 +1,5 @@ - // SPDX-License-Identifier: GPL-2.0-only -+#include - #include - #include - #include -diff --git a/drivers/net/wimax/i2400m/usb.c b/drivers/net/wimax/i2400m/usb.c -index b684e97ac976..bfc2c57148a1 100644 ---- a/drivers/net/wimax/i2400m/usb.c -+++ b/drivers/net/wimax/i2400m/usb.c -@@ -51,6 +51,7 @@ - #include "i2400m-usb.h" - #include - #include -+#include - #include - #include - -diff --git a/drivers/scsi/bnx2fc/bnx2fc_fcoe.c b/drivers/scsi/bnx2fc/bnx2fc_fcoe.c -index 8f47bf83694f..9b4a5872c241 100644 ---- a/drivers/scsi/bnx2fc/bnx2fc_fcoe.c -+++ b/drivers/scsi/bnx2fc/bnx2fc_fcoe.c -@@ -16,6 +16,8 @@ - - #include "bnx2fc.h" - -+#include -+ - static struct list_head adapter_list; - static struct list_head if_list; - static u32 adapter_count; -diff --git a/drivers/scsi/fcoe/fcoe_transport.c b/drivers/scsi/fcoe/fcoe_transport.c -index 6e187d0e71fd..b927b3d84523 100644 ---- a/drivers/scsi/fcoe/fcoe_transport.c -+++ b/drivers/scsi/fcoe/fcoe_transport.c -@@ -10,6 +10,7 @@ - #include - #include - #include -+#include - #include - #include - #include -diff --git a/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c b/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c -index ace4a6d28562..ad55cd738847 100644 ---- a/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c -+++ b/drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c -@@ -7,6 +7,8 @@ - * - */ - -+#include -+ - #include "ethsw.h" - - static struct { -diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h -index ef75567efd27..c70027ea28a2 100644 ---- a/include/linux/netdevice.h -+++ b/include/linux/netdevice.h -@@ -34,7 +34,6 @@ - #include - #include - --#include - #include - #ifdef CONFIG_DCB - #include -@@ -51,6 +50,7 @@ - - struct netpoll_info; - struct device; -+struct ethtool_ops; - struct phy_device; - struct dsa_port; - struct ip_tunnel_parm; -diff --git a/include/linux/qed/qed_if.h b/include/linux/qed/qed_if.h -index 57fb295ea41a..68d17a4fbf20 100644 ---- a/include/linux/qed/qed_if.h -+++ b/include/linux/qed/qed_if.h -@@ -7,6 +7,7 @@ - #ifndef _QED_IF_H - #define _QED_IF_H - -+#include - #include - #include - #include -diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h -index 2a819be384a7..e6cd150f8da3 100644 ---- a/include/net/cfg80211.h -+++ b/include/net/cfg80211.h -@@ -10,6 +10,7 @@ - * Copyright (C) 2018-2020 Intel Corporation - */ - -+#include - #include - #include - #include -diff --git a/include/rdma/ib_addr.h b/include/rdma/ib_addr.h -index b0e636ac6690..d808dc3d239e 100644 ---- a/include/rdma/ib_addr.h -+++ b/include/rdma/ib_addr.h -@@ -7,6 +7,7 @@ - #ifndef IB_ADDR_H - #define IB_ADDR_H - -+#include - #include - #include - #include -diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h -index ac6ffa561884..48c4503c16de 100644 ---- a/include/rdma/ib_verbs.h -+++ b/include/rdma/ib_verbs.h -@@ -12,6 +12,7 @@ - #ifndef IB_VERBS_H - #define IB_VERBS_H - -+#include - #include - #include - #include -diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c -index eaa030e2ad55..d8816ae47015 100644 ---- a/net/packet/af_packet.c -+++ b/net/packet/af_packet.c -@@ -46,6 +46,7 @@ - * Copyright (C) 2011, - */ - -+#include - #include - #include - #include -diff --git a/net/sched/sch_cbs.c b/net/sched/sch_cbs.c -index 2eaac2ff380f..459cc240eda9 100644 ---- a/net/sched/sch_cbs.c -+++ b/net/sched/sch_cbs.c -@@ -50,6 +50,7 @@ - * locredit = max_frame_size * (sendslope / port_transmit_rate) - */ - -+#include - #include - #include - #include -diff --git a/net/sched/sch_taprio.c b/net/sched/sch_taprio.c -index 7f33b31c7b8b..360e24afd9b1 100644 ---- a/net/sched/sch_taprio.c -+++ b/net/sched/sch_taprio.c -@@ -6,6 +6,7 @@ - * - */ - -+#include - #include - #include - #include -diff --git a/net/socket.c b/net/socket.c -index 8657112a687a..eceffde4e0f1 100644 ---- a/net/socket.c -+++ b/net/socket.c -@@ -52,6 +52,7 @@ - * Based upon Swansea University Computer Society NET3.039 - */ - -+#include - #include - #include - #include --- -2.20.1 - diff --git a/patch/0016-platform-mellanox-Add-new-attributes.patch b/patch/0016-platform-mellanox-Add-new-attributes.patch new file mode 100644 index 000000000000..79f3516f6ece --- /dev/null +++ b/patch/0016-platform-mellanox-Add-new-attributes.patch @@ -0,0 +1,51 @@ +From 65441ac095819a650d3197f750b6c04a734abdc3 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 23 Jul 2023 21:05:12 +0000 +Subject: [PATH backport v6.1 16/32] platform: mellanox: Add new attributes + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39632.html + +Add new attribute: +"lid_open" - to indicate system intrusion detection. +"reset_long_pwr_pb" - to indicate that system has been reset due to +long press of power button. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 7d33977d9c60..26748c285ddc 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -3792,6 +3792,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mask = GENMASK(7, 0) & ~BIT(1), + .mode = 0444, + }, ++ { ++ .label = "lid_open", ++ .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET, ++ .mask = GENMASK(7, 0) & ~BIT(2), ++ .mode = 0444, ++ }, + { + .label = "clk_brd1_boot_fail", + .reg = MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET, +@@ -4431,6 +4437,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = { + .mask = GENMASK(7, 0) & ~BIT(6), + .mode = 0444, + }, ++ { ++ .label = "reset_long_pwr_pb", ++ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, ++ .mask = GENMASK(7, 0) & ~BIT(7), ++ .mode = 0444, ++ }, + { + .label = "pwr_cycle", + .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, +-- +2.20.1 + diff --git a/patch/0017-mlxsw-reg-Extend-MTMP-register-with-new-threshold-fi.patch b/patch/0017-mlxsw-reg-Extend-MTMP-register-with-new-threshold-fi.patch deleted file mode 100644 index 7aefcf08f7b8..000000000000 --- a/patch/0017-mlxsw-reg-Extend-MTMP-register-with-new-threshold-fi.patch +++ /dev/null @@ -1,148 +0,0 @@ -From 91f0e76459d7a0e3156e7427d6ad347d345e2909 Mon Sep 17 00:00:00 2001 -From: Mykola Kostenok -Date: Tue, 8 Jun 2021 15:44:11 +0300 -Subject: [PATCH backport 5.10 017/182] mlxsw: reg: Extend MTMP register with - new threshold field - -Extend Management Temperature (MTMP) register with new field specifying -the maximum temperature threshold. - -Extend mlxsw_reg_mtmp_unpack() function with two extra arguments, -providing high and maximum temperature thresholds. For modules, these -thresholds correspond to critical and emergency thresholds that are read -from the module's EEPROM. - -Signed-off-by: Mykola Kostenok -Acked-by: Vadim Pasternak -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - .../net/ethernet/mellanox/mlxsw/core_env.c | 2 +- - .../net/ethernet/mellanox/mlxsw/core_hwmon.c | 6 +++--- - .../ethernet/mellanox/mlxsw/core_thermal.c | 6 +++--- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 20 ++++++++++++++++++- - 4 files changed, 26 insertions(+), 8 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index dd26865bd587..bcad1327d861 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -142,7 +142,7 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, - err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl); - if (err) - return err; -- mlxsw_reg_mtmp_unpack(mtmp_pl, &module_temp, NULL, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, &module_temp, NULL, NULL, NULL, NULL); - if (!module_temp) { - *temp = 0; - return 0; -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c -index 2196c946698a..d41afdfbd085 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c -@@ -72,7 +72,7 @@ static ssize_t mlxsw_hwmon_temp_show(struct device *dev, - dev_err(mlxsw_hwmon->bus_info->dev, "Failed to query temp sensor\n"); - return err; - } -- mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL, NULL, NULL); - return sprintf(buf, "%d\n", temp); - } - -@@ -95,7 +95,7 @@ static ssize_t mlxsw_hwmon_temp_max_show(struct device *dev, - dev_err(mlxsw_hwmon->bus_info->dev, "Failed to query temp sensor\n"); - return err; - } -- mlxsw_reg_mtmp_unpack(mtmp_pl, NULL, &temp_max, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, NULL, &temp_max, NULL, NULL, NULL); - return sprintf(buf, "%d\n", temp_max); - } - -@@ -239,7 +239,7 @@ static int mlxsw_hwmon_module_temp_get(struct device *dev, - dev_err(dev, "Failed to query module temperature\n"); - return err; - } -- mlxsw_reg_mtmp_unpack(mtmp_pl, p_temp, NULL, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, p_temp, NULL, NULL, NULL, NULL); - - return 0; - } -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -index 5b37449d4b66..a1025177c6ae 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -@@ -273,7 +273,7 @@ static int mlxsw_thermal_get_temp(struct thermal_zone_device *tzdev, - dev_err(dev, "Failed to query temp sensor\n"); - return err; - } -- mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL, NULL, NULL); - if (temp > 0) - mlxsw_thermal_tz_score_update(thermal, tzdev, thermal->trips, - temp); -@@ -434,7 +434,7 @@ static int mlxsw_thermal_module_temp_get(struct thermal_zone_device *tzdev, - *p_temp = (int) temp; - return 0; - } -- mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL, NULL, NULL); - *p_temp = temp; - - if (!temp) -@@ -552,7 +552,7 @@ static int mlxsw_thermal_gearbox_temp_get(struct thermal_zone_device *tzdev, - if (err) - return err; - -- mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL, NULL, NULL); - if (temp > 0) - mlxsw_thermal_tz_score_update(thermal, tzdev, tz->trips, temp); - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index c670bf3464c2..dfcde953174c 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -8485,6 +8485,14 @@ MLXSW_ITEM32(reg, mtmp, sensor_index, 0x00, 0, 12); - ((s16)((GENMASK(15, 0) + (v_) + 1) \ - * 125)); }) - -+/* reg_mtmp_max_operational_temperature -+ * The highest temperature in the nominal operational range. Reading is in -+ * 0.125 Celsius degrees units. -+ * In case of module this is SFF critical temperature threshold. -+ * Access: RO -+ */ -+MLXSW_ITEM32(reg, mtmp, max_operational_temperature, 0x04, 16, 16); -+ - /* reg_mtmp_temperature - * Temperature reading from the sensor. Reading is in 0.125 Celsius - * degrees units. -@@ -8563,7 +8571,9 @@ static inline void mlxsw_reg_mtmp_pack(char *payload, u16 sensor_index, - } - - static inline void mlxsw_reg_mtmp_unpack(char *payload, int *p_temp, -- int *p_max_temp, char *sensor_name) -+ int *p_max_temp, int *p_temp_hi, -+ int *p_max_oper_temp, -+ char *sensor_name) - { - s16 temp; - -@@ -8575,6 +8585,14 @@ static inline void mlxsw_reg_mtmp_unpack(char *payload, int *p_temp, - temp = mlxsw_reg_mtmp_max_temperature_get(payload); - *p_max_temp = MLXSW_REG_MTMP_TEMP_TO_MC(temp); - } -+ if (p_temp_hi) { -+ temp = mlxsw_reg_mtmp_temperature_threshold_hi_get(payload); -+ *p_temp_hi = MLXSW_REG_MTMP_TEMP_TO_MC(temp); -+ } -+ if (p_max_oper_temp) { -+ temp = mlxsw_reg_mtmp_max_operational_temperature_get(payload); -+ *p_max_oper_temp = MLXSW_REG_MTMP_TEMP_TO_MC(temp); -+ } - if (sensor_name) - mlxsw_reg_mtmp_sensor_name_memcpy_from(payload, sensor_name); - } --- -2.20.1 - diff --git a/patch/0017-platform-mellanox-Add-field-upgrade-capability-regis.patch b/patch/0017-platform-mellanox-Add-field-upgrade-capability-regis.patch new file mode 100644 index 000000000000..1c3d641503b0 --- /dev/null +++ b/patch/0017-platform-mellanox-Add-field-upgrade-capability-regis.patch @@ -0,0 +1,82 @@ +From 02ec65e86e92d25eaf0280db68cc045a97e70ea5 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 23 Jul 2023 21:13:52 +0000 +Subject: [PATH backport v6.1 17/32] platform: mellanox: Add field upgrade + capability register + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39635.html + +Add new register to indicate the method of FPGA/CPLD field upgrade +supported on the specific system. +Currently two masks are available: +b00 - field upgrade through LPC gateway (new method introduced to + accelerate field upgrade process). +b11 - field upgrade through CPU GPIO pins (old method). + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 26748c285ddc..647a10252c2f 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -62,6 +62,7 @@ + #define MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET 0x37 + #define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a + #define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b ++#define MLXPLAT_CPLD_LPC_REG_FU_CAP_OFFSET 0x3c + #define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40 + #define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET 0x41 + #define MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET 0x42 +@@ -236,6 +237,7 @@ + #define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4) + #define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0) + #define MLXPLAT_CPLD_EROT_MASK GENMASK(1, 0) ++#define MLXPLAT_CPLD_FU_CAP_MASK GENMASK(1, 0) + #define MLXPLAT_CPLD_PWR_BUTTON_MASK BIT(0) + #define MLXPLAT_CPLD_LATCH_RST_MASK BIT(6) + #define MLXPLAT_CPLD_THERMAL1_PDB_MASK BIT(3) +@@ -3680,6 +3682,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mask = GENMASK(7, 0) & ~BIT(6), + .mode = 0200, + }, ++ { ++ .label = "jtag_cap", ++ .reg = MLXPLAT_CPLD_LPC_REG_FU_CAP_OFFSET, ++ .mask = MLXPLAT_CPLD_FU_CAP_MASK, ++ .bit = 1, ++ .mode = 0444, ++ }, + { + .label = "jtag_enable", + .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, +@@ -4935,6 +4944,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET: + case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_FU_CAP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET: +@@ -5046,6 +5056,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_FU_CAP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET: +@@ -5203,6 +5214,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: + case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_FU_CAP_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET: + case MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET: +-- +2.20.1 + diff --git a/patch/0018-mlxsw-thermal-Add-function-for-reading-module-temper.patch b/patch/0018-mlxsw-thermal-Add-function-for-reading-module-temper.patch deleted file mode 100644 index 859469331612..000000000000 --- a/patch/0018-mlxsw-thermal-Add-function-for-reading-module-temper.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 890ffa911705403d5f56ec57bf92f74b65758c87 Mon Sep 17 00:00:00 2001 -From: Mykola Kostenok -Date: Tue, 8 Jun 2021 15:44:13 +0300 -Subject: [PATCH backport 5.10 018/182] mlxsw: thermal: Add function for - reading module temperature and thresholds - -Provide new function mlxsw_thermal_module_temp_and_thresholds_get() for -reading temperature and temperature thresholds by a single operation. -The motivation is to reduce the number of transactions with the device -which is important when operating over a slow bus such as I2C. - -Currently, the sole caller of the function is only using it to read the -module's temperature. The next patch will also use it to query the -module's temperature thresholds. - -Signed-off-by: Mykola Kostenok -Acked-by: Vadim Pasternak -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - .../ethernet/mellanox/mlxsw/core_thermal.c | 50 +++++++++++++------ - 1 file changed, 35 insertions(+), 15 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -index a1025177c6ae..abbe02546164 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -@@ -412,29 +412,49 @@ static int mlxsw_thermal_module_unbind(struct thermal_zone_device *tzdev, - return err; - } - -+static void -+mlxsw_thermal_module_temp_and_thresholds_get(struct mlxsw_core *core, -+ u16 sensor_index, int *p_temp, -+ int *p_crit_temp, -+ int *p_emerg_temp) -+{ -+ char mtmp_pl[MLXSW_REG_MTMP_LEN]; -+ int err; -+ -+ /* Read module temperature and thresholds. */ -+ mlxsw_reg_mtmp_pack(mtmp_pl, sensor_index, false, false); -+ err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl); -+ if (err) { -+ /* Set temperature and thresholds to zero to avoid passing -+ * uninitialized data back to the caller. -+ */ -+ *p_temp = 0; -+ *p_crit_temp = 0; -+ *p_emerg_temp = 0; -+ -+ return; -+ } -+ mlxsw_reg_mtmp_unpack(mtmp_pl, p_temp, NULL, p_crit_temp, p_emerg_temp, -+ NULL); -+} -+ - static int mlxsw_thermal_module_temp_get(struct thermal_zone_device *tzdev, - int *p_temp) - { - struct mlxsw_thermal_module *tz = tzdev->devdata; - struct mlxsw_thermal *thermal = tz->parent; -- struct device *dev = thermal->bus_info->dev; -- char mtmp_pl[MLXSW_REG_MTMP_LEN]; -+ struct device *dev; -+ u16 sensor_index; - int temp; - int err; - -- /* Read module temperature. */ -- mlxsw_reg_mtmp_pack(mtmp_pl, MLXSW_REG_MTMP_MODULE_INDEX_MIN + -- tz->module, false, false); -- err = mlxsw_reg_query(thermal->core, MLXSW_REG(mtmp), mtmp_pl); -- if (err) { -- /* Do not return error - in case of broken module's sensor -- * it will cause error message flooding. -- */ -- temp = 0; -- *p_temp = (int) temp; -- return 0; -- } -- mlxsw_reg_mtmp_unpack(mtmp_pl, &temp, NULL, NULL, NULL, NULL); -+ dev = thermal->bus_info->dev; -+ sensor_index = MLXSW_REG_MTMP_MODULE_INDEX_MIN + tz->module; -+ -+ /* Read module temperature and thresholds. */ -+ mlxsw_thermal_module_temp_and_thresholds_get(thermal->core, -+ sensor_index, &temp, NULL, -+ NULL); - *p_temp = temp; - - if (!temp) --- -2.20.1 - diff --git a/patch/0018-platform-mellanox-Modify-reset-causes-description.patch b/patch/0018-platform-mellanox-Modify-reset-causes-description.patch new file mode 100644 index 000000000000..0cca1b5527b1 --- /dev/null +++ b/patch/0018-platform-mellanox-Modify-reset-causes-description.patch @@ -0,0 +1,53 @@ +From 153daa685be413192d55d015d8387becaa6b58b2 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 23 Jul 2023 21:25:49 +0000 +Subject: [PATH backport v6.1 18/32] platform: mellanox: Modify reset causes + description + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39636.html + +For system of classes VMOD0005, VMOD0010: +- remove "reset_from_comex", since this cause doesn't define specific + reason. +- add more specific reason "reset_sw_reset", which is set along with + removed "reset_from_comex". + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 647a10252c2f..5b0579752afb 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -3556,12 +3556,6 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mask = GENMASK(7, 0) & ~BIT(2), + .mode = 0444, + }, +- { +- .label = "reset_from_comex", +- .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, +- .mask = GENMASK(7, 0) & ~BIT(4), +- .mode = 0444, +- }, + { + .label = "reset_from_asic", + .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, +@@ -3580,6 +3574,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mask = GENMASK(7, 0) & ~BIT(7), + .mode = 0444, + }, ++ { ++ .label = "reset_sw_reset", ++ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, ++ .mask = GENMASK(7, 0) & ~BIT(0), ++ .mode = 0444, ++ }, + { + .label = "reset_comex_pwr_fail", + .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, +-- +2.20.1 + diff --git a/patch/0019-mlxsw-thermal-Read-module-temperature-thresholds-usi.patch b/patch/0019-mlxsw-thermal-Read-module-temperature-thresholds-usi.patch deleted file mode 100644 index 1c9c57a16609..000000000000 --- a/patch/0019-mlxsw-thermal-Read-module-temperature-thresholds-usi.patch +++ /dev/null @@ -1,132 +0,0 @@ -From 5e6f570de0f814bd843fdc5b36251538bdf7405f Mon Sep 17 00:00:00 2001 -From: Mykola Kostenok -Date: Tue, 8 Jun 2021 15:44:14 +0300 -Subject: [PATCH backport 5.10 019/182] mlxsw: thermal: Read module temperature - thresholds using MTMP register - -mlxsw_thermal_module_trips_update() is used to update the trip points of -the module's thermal zone. Currently, this is done by querying the -thresholds from the module's EEPROM via MCIA register. This data does -not pass validation and in some cases can be unreliable. For example, -due to some problem with transceiver module. - -Previous patch made it possible to read module's temperature and -thresholds via MTMP register. Therefore, extend -mlxsw_thermal_module_trips_update() to use the thresholds queried from -MTMP, if valid. - -This is both more reliable and more efficient than current method, as -temperature and thresholds are queried in one transaction instead of -three. This is significant when working over a slow bus such as I2C. - -Signed-off-by: Mykola Kostenok -Acked-by: Vadim Pasternak -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - .../ethernet/mellanox/mlxsw/core_thermal.c | 47 ++++++++++++------- - 1 file changed, 30 insertions(+), 17 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -index abbe02546164..1f9ae663e133 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -@@ -141,22 +141,27 @@ mlxsw_thermal_module_trips_reset(struct mlxsw_thermal_module *tz) - - static int - mlxsw_thermal_module_trips_update(struct device *dev, struct mlxsw_core *core, -- struct mlxsw_thermal_module *tz) -+ struct mlxsw_thermal_module *tz, -+ int crit_temp, int emerg_temp) - { -- int crit_temp, emerg_temp; - int err; - -- err = mlxsw_env_module_temp_thresholds_get(core, tz->module, -- SFP_TEMP_HIGH_WARN, -- &crit_temp); -- if (err) -- return err; -+ /* Do not try to query temperature thresholds directly from the module's -+ * EEPROM if we got valid thresholds from MTMP. -+ */ -+ if (!emerg_temp || !crit_temp) { -+ err = mlxsw_env_module_temp_thresholds_get(core, tz->module, -+ SFP_TEMP_HIGH_WARN, -+ &crit_temp); -+ if (err) -+ return err; - -- err = mlxsw_env_module_temp_thresholds_get(core, tz->module, -- SFP_TEMP_HIGH_ALARM, -- &emerg_temp); -- if (err) -- return err; -+ err = mlxsw_env_module_temp_thresholds_get(core, tz->module, -+ SFP_TEMP_HIGH_ALARM, -+ &emerg_temp); -+ if (err) -+ return err; -+ } - - if (crit_temp > emerg_temp) { - dev_warn(dev, "%s : Critical threshold %d is above emergency threshold %d\n", -@@ -443,9 +448,9 @@ static int mlxsw_thermal_module_temp_get(struct thermal_zone_device *tzdev, - { - struct mlxsw_thermal_module *tz = tzdev->devdata; - struct mlxsw_thermal *thermal = tz->parent; -+ int temp, crit_temp, emerg_temp; - struct device *dev; - u16 sensor_index; -- int temp; - int err; - - dev = thermal->bus_info->dev; -@@ -453,15 +458,16 @@ static int mlxsw_thermal_module_temp_get(struct thermal_zone_device *tzdev, - - /* Read module temperature and thresholds. */ - mlxsw_thermal_module_temp_and_thresholds_get(thermal->core, -- sensor_index, &temp, NULL, -- NULL); -+ sensor_index, &temp, -+ &crit_temp, &emerg_temp); - *p_temp = temp; - - if (!temp) - return 0; - - /* Update trip points. */ -- err = mlxsw_thermal_module_trips_update(dev, thermal->core, tz); -+ err = mlxsw_thermal_module_trips_update(dev, thermal->core, tz, -+ crit_temp, emerg_temp); - if (!err && temp > 0) - mlxsw_thermal_tz_score_update(thermal, tzdev, tz->trips, temp); - -@@ -696,7 +702,10 @@ mlxsw_thermal_module_init(struct device *dev, struct mlxsw_core *core, - struct mlxsw_thermal *thermal, u8 module) - { - struct mlxsw_thermal_module *module_tz; -+ int crit_temp, emerg_temp; -+ u16 sensor_index; - -+ sensor_index = MLXSW_REG_MTMP_MODULE_INDEX_MIN + module; - module_tz = &thermal->tz_module_arr[module]; - /* Skip if parent is already set (case of port split). */ - if (module_tz->parent) -@@ -707,8 +716,12 @@ mlxsw_thermal_module_init(struct device *dev, struct mlxsw_core *core, - sizeof(thermal->trips)); - /* Initialize all trip point. */ - mlxsw_thermal_module_trips_reset(module_tz); -+ /* Read module temperature and thresholds. */ -+ mlxsw_thermal_module_temp_and_thresholds_get(core, sensor_index, NULL, -+ &crit_temp, &emerg_temp); - /* Update trip point according to the module data. */ -- return mlxsw_thermal_module_trips_update(dev, core, module_tz); -+ return mlxsw_thermal_module_trips_update(dev, core, module_tz, -+ crit_temp, emerg_temp); - } - - static void mlxsw_thermal_module_fini(struct mlxsw_thermal_module *module_tz) --- -2.20.1 - diff --git a/patch/0019-platform-mellanox-mlx-platform-Modify-health-and-pow.patch b/patch/0019-platform-mellanox-mlx-platform-Modify-health-and-pow.patch new file mode 100644 index 000000000000..b4a4afce8c56 --- /dev/null +++ b/patch/0019-platform-mellanox-mlx-platform-Modify-health-and-pow.patch @@ -0,0 +1,42 @@ +From 05834de8484930c01d705e078e63eb44fbacd362 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 23 Jul 2023 21:42:37 +0000 +Subject: [PATH backport v6.1 19/32] platform: mellanox: mlx-platform: Modify + health and power hotplug action + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39634.html + +Set explicitly hotplug event action for health and power signals for +L1 switch as "MLXREG_HOTPLUG_DEVICE_NO_ACTION" in order to allow +processing of notification callback even I2C parent bus is not +specified. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 5b0579752afb..648b27eff0b0 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -2373,6 +2373,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_pwr_events_items_data[] + .reg = MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET, + .mask = MLXPLAT_CPLD_PWR_BUTTON_MASK, + .hpdev.nr = MLXPLAT_CPLD_NR_NONE, ++ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, + .hpdev.notifier = &mlxplat_mlxcpld_l1_switch_pwr_events_notifier, + }, + }; +@@ -2433,6 +2434,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_l1_switch_health_events_items_dat + .reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET, + .mask = MLXPLAT_CPLD_INTRUSION_MASK, + .hpdev.nr = MLXPLAT_CPLD_NR_NONE, ++ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, + .hpdev.notifier = &mlxplat_mlxcpld_l1_switch_intrusion_events_notifier, + }, + { +-- +2.20.1 + diff --git a/patch/0020-mlxsw-thermal-Fix-null-dereference-of-NULL-temperatu.patch b/patch/0020-mlxsw-thermal-Fix-null-dereference-of-NULL-temperatu.patch deleted file mode 100644 index c6037026520d..000000000000 --- a/patch/0020-mlxsw-thermal-Fix-null-dereference-of-NULL-temperatu.patch +++ /dev/null @@ -1,45 +0,0 @@ -From d64eceef0d6b71a60ba6d5981463c639c89b2cce Mon Sep 17 00:00:00 2001 -From: Colin Ian King -Date: Wed, 9 Jun 2021 18:56:57 +0100 -Subject: [PATCH backport 5.10 020/182] mlxsw: thermal: Fix null dereference of - NULL temperature parameter - -The call to mlxsw_thermal_module_temp_and_thresholds_get passes a NULL -pointer for the temperature and this can be dereferenced in this function -if the mlxsw_reg_query call fails. The simplist fix is to pass the -address of dummy temperature variable instead of a NULL pointer. - -Addresses-Coverity: ("Explicit null dereferenced") -Fixes: 72a64c2fe9d8 ("mlxsw: thermal: Read module temperature thresholds using MTMP register") -Signed-off-by: Colin Ian King -Reviewed-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mellanox/mlxsw/core_thermal.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -index 1f9ae663e133..b29824448aa8 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -@@ -702,7 +702,7 @@ mlxsw_thermal_module_init(struct device *dev, struct mlxsw_core *core, - struct mlxsw_thermal *thermal, u8 module) - { - struct mlxsw_thermal_module *module_tz; -- int crit_temp, emerg_temp; -+ int dummy_temp, crit_temp, emerg_temp; - u16 sensor_index; - - sensor_index = MLXSW_REG_MTMP_MODULE_INDEX_MIN + module; -@@ -717,7 +717,7 @@ mlxsw_thermal_module_init(struct device *dev, struct mlxsw_core *core, - /* Initialize all trip point. */ - mlxsw_thermal_module_trips_reset(module_tz); - /* Read module temperature and thresholds. */ -- mlxsw_thermal_module_temp_and_thresholds_get(core, sensor_index, NULL, -+ mlxsw_thermal_module_temp_and_thresholds_get(core, sensor_index, &dummy_temp, - &crit_temp, &emerg_temp); - /* Update trip point according to the module data. */ - return mlxsw_thermal_module_trips_update(dev, core, module_tz, --- -2.20.1 - diff --git a/patch/0020-platform-mellanox-mlx-platform-Add-reset-cause-attri.patch b/patch/0020-platform-mellanox-mlx-platform-Add-reset-cause-attri.patch new file mode 100644 index 000000000000..744bbc21c7a6 --- /dev/null +++ b/patch/0020-platform-mellanox-mlx-platform-Add-reset-cause-attri.patch @@ -0,0 +1,38 @@ +From 9a981f2c8011e3840eb126404cb77a476f77e2c7 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 05:20:15 +0000 +Subject: [PATH backport v6.1 20/32] platform: mellanox: mlx-platform: Add + reset cause attribute + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39638.html + +Extend IO registers description for some system types with reset cause +attribute "reset_swb_dc_dc_pwr_fail" to indicate reset caused by switch +board DC-DC power failure. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 648b27eff0b0..8e07ed3dc552 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -3558,6 +3558,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mask = GENMASK(7, 0) & ~BIT(2), + .mode = 0444, + }, ++ { ++ .label = "reset_swb_dc_dc_pwr_fail", ++ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, ++ .mask = GENMASK(7, 0) & ~BIT(3), ++ .mode = 0444, ++ }, + { + .label = "reset_from_asic", + .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, +-- +2.20.1 + diff --git a/patch/0021-mlxsw-reg-Add-bank-number-to-MCIA-register.patch b/patch/0021-mlxsw-reg-Add-bank-number-to-MCIA-register.patch deleted file mode 100644 index a7791538347c..000000000000 --- a/patch/0021-mlxsw-reg-Add-bank-number-to-MCIA-register.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 4fb08df650df57f76a7bbe71a6e9e6e9e0b447e9 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Mon, 21 Jun 2021 10:50:39 +0300 -Subject: [PATCH backport 5.10 021/182] mlxsw: reg: Add bank number to MCIA - register - -Add bank number to MCIA (Management Cable Info Access) register in order -to allow access to banked pages on EEPROMs using CMIS (Common Management -Interface Specification) memory map. - -Signed-off-by: Ido Schimmel -Reviewed-by: Jiri Pirko -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index dfcde953174c..d9b5cfb939f0 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -8736,6 +8736,12 @@ MLXSW_ITEM32(reg, mcia, page_number, 0x04, 16, 8); - */ - MLXSW_ITEM32(reg, mcia, device_address, 0x04, 0, 16); - -+/* reg_mcia_bank_number -+ * Bank number. -+ * Access: Index -+ */ -+MLXSW_ITEM32(reg, mcia, bank_number, 0x08, 16, 8); -+ - /* reg_mcia_size - * Number of bytes to read/write (up to 48 bytes). - * Access: RW --- -2.20.1 - diff --git a/patch/0021-platform-mellanox-mlx-platform-add-support-for-addit.patch b/patch/0021-platform-mellanox-mlx-platform-add-support-for-addit.patch new file mode 100644 index 000000000000..27ab1fb8837e --- /dev/null +++ b/patch/0021-platform-mellanox-mlx-platform-add-support-for-addit.patch @@ -0,0 +1,131 @@ +From baa136fc6b3c26501c77070a73abd2d6f95b462a Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 05:54:47 +0000 +Subject: [PATH backport v6.1 21/32] platform: mellanox: mlx-platform: add + support for additional CPLD + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39641.html + +Extend to support 5-th CPLD version, PN and minimal version registers. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 31 +++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 8e07ed3dc552..dce35934cc37 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -95,6 +95,9 @@ + #define MLXPLAT_CPLD_LPC_REG_FAN_OFFSET 0x88 + #define MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET 0x89 + #define MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET 0x8a ++#define MLXPLAT_CPLD_LPC_REG_CPLD5_VER_OFFSET 0x8e ++#define MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET 0x8f ++#define MLXPLAT_CPLD_LPC_REG_CPLD5_PN1_OFFSET 0x90 + #define MLXPLAT_CPLD_LPC_REG_EROT_OFFSET 0x91 + #define MLXPLAT_CPLD_LPC_REG_EROT_EVENT_OFFSET 0x92 + #define MLXPLAT_CPLD_LPC_REG_EROT_MASK_OFFSET 0x93 +@@ -129,6 +132,7 @@ + #define MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET 0xb9 + #define MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET 0xc2 + #define MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT 0xc3 ++#define MLXPLAT_CPLD_LPC_REG_CPLD5_MVER_OFFSET 0xc4 + #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET 0xc7 + #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET 0xc8 + #define MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET 0xc9 +@@ -3431,6 +3435,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .bit = GENMASK(7, 0), + .mode = 0444, + }, ++ { ++ .label = "cpld5_version", ++ .reg = MLXPLAT_CPLD_LPC_REG_CPLD5_VER_OFFSET, ++ .bit = GENMASK(7, 0), ++ .mode = 0444, ++ }, + { + .label = "cpld1_pn", + .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET, +@@ -3459,6 +3469,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .mode = 0444, + .regnum = 2, + }, ++ { ++ .label = "cpld5_pn", ++ .reg = MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET, ++ .bit = GENMASK(15, 0), ++ .mode = 0444, ++ .regnum = 2, ++ }, + { + .label = "cpld1_version_min", + .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET, +@@ -3483,6 +3500,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { + .bit = GENMASK(7, 0), + .mode = 0444, + }, ++ { ++ .label = "cpld5_version_min", ++ .reg = MLXPLAT_CPLD_LPC_REG_CPLD5_MVER_OFFSET, ++ .bit = GENMASK(7, 0), ++ .mode = 0444, ++ }, + { + .label = "asic_reset", + .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET, +@@ -5031,6 +5054,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD2_PN_OFFSET: +@@ -5039,6 +5063,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: +@@ -5150,6 +5176,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_MVER_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: +@@ -5191,6 +5218,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD1_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD2_PN_OFFSET: +@@ -5199,6 +5227,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: +@@ -5302,6 +5332,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD4_MVER_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_CPLD5_MVER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET: + case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: +-- +2.20.1 + diff --git a/patch/0022-mlxsw-reg-Document-possible-MCIA-status-values.patch b/patch/0022-mlxsw-reg-Document-possible-MCIA-status-values.patch deleted file mode 100644 index 2aae853fab3c..000000000000 --- a/patch/0022-mlxsw-reg-Document-possible-MCIA-status-values.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 40d91f6687efb9d0f12e1b5a00e0260032255047 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Mon, 21 Jun 2021 10:50:40 +0300 -Subject: [PATCH backport 5.10 022/182] mlxsw: reg: Document possible MCIA - status values - -Will be used to emit meaningful messages to user space via extack in a -subsequent patch. - -Signed-off-by: Ido Schimmel -Reviewed-by: Jiri Pirko -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index d9b5cfb939f0..04f0c96c8068 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -8712,6 +8712,20 @@ MLXSW_ITEM32(reg, mcia, l, 0x00, 31, 1); - */ - MLXSW_ITEM32(reg, mcia, module, 0x00, 16, 8); - -+enum { -+ MLXSW_REG_MCIA_STATUS_GOOD = 0, -+ /* No response from module's EEPROM. */ -+ MLXSW_REG_MCIA_STATUS_NO_EEPROM_MODULE = 1, -+ /* Module type not supported by the device. */ -+ MLXSW_REG_MCIA_STATUS_MODULE_NOT_SUPPORTED = 2, -+ /* No module present indication. */ -+ MLXSW_REG_MCIA_STATUS_MODULE_NOT_CONNECTED = 3, -+ /* Error occurred while trying to access module's EEPROM using I2C. */ -+ MLXSW_REG_MCIA_STATUS_I2C_ERROR = 9, -+ /* Module is disabled. */ -+ MLXSW_REG_MCIA_STATUS_MODULE_DISABLED = 16, -+}; -+ - /* reg_mcia_status - * Module status. - * Access: RO --- -2.20.1 - diff --git a/patch/0022-platform-mellanox-mlx-platform-Modify-power-off-call.patch b/patch/0022-platform-mellanox-mlx-platform-Modify-power-off-call.patch new file mode 100644 index 000000000000..2b9debe07234 --- /dev/null +++ b/patch/0022-platform-mellanox-mlx-platform-Modify-power-off-call.patch @@ -0,0 +1,37 @@ +From cca82c5a6efc06d8d9b5c7b8b83054ff09363bc4 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 06:22:13 +0000 +Subject: [PATH backport v6.1 22/32] platform: mellanox: mlx-platform: Modify + power off callback + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39639.html + +Extend platform power off callback with kernel_halt() call. + +When powering off, the process involves setting a halt bit in the +register space, which is then activated after a certain delay and +power off auxiliary power. By invoking `kernel_halt()` within this +timeframe, the intention is to facilitate a clean system power-off +sequence. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index dce35934cc37..a505f619f337 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -5539,6 +5539,7 @@ static void mlxplat_poweroff(void) + struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); + + regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, MLXPLAT_CPLD_HALT_MASK); ++ kernel_halt(); + } + + static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) +-- +2.20.1 + diff --git a/patch/0023-ethtool-Allow-network-drivers-to-dump-arbitrary-EEPR.patch b/patch/0023-ethtool-Allow-network-drivers-to-dump-arbitrary-EEPR.patch deleted file mode 100644 index c83c0a0439b6..000000000000 --- a/patch/0023-ethtool-Allow-network-drivers-to-dump-arbitrary-EEPR.patch +++ /dev/null @@ -1,515 +0,0 @@ -From fb781e6c43371a263caf5dd3ab4d43f5dc7eeb76 Mon Sep 17 00:00:00 2001 -From: Vladyslav Tarasiuk -Date: Fri, 9 Apr 2021 11:06:34 +0300 -Subject: [PATCH backport 5.10 023/182] ethtool: Allow network drivers to dump - arbitrary EEPROM data - -Define get_module_eeprom_by_page() ethtool callback and implement -netlink infrastructure. - -get_module_eeprom_by_page() allows network drivers to dump a part of -module's EEPROM specified by page and bank numbers along with offset and -length. It is effectively a netlink replacement for get_module_info() -and get_module_eeprom() pair, which is needed due to emergence of -complex non-linear EEPROM layouts. - -Signed-off-by: Vladyslav Tarasiuk -Signed-off-by: David S. Miller ---- - Documentation/networking/ethtool-netlink.rst | 103 +++++++---- - include/linux/ethtool.h | 33 +++- - include/uapi/linux/ethtool_netlink.h | 19 +++ - net/ethtool/Makefile | 2 +- - net/ethtool/eeprom.c | 171 +++++++++++++++++++ - net/ethtool/netlink.c | 11 ++ - net/ethtool/netlink.h | 2 + - 7 files changed, 306 insertions(+), 35 deletions(-) - create mode 100644 net/ethtool/eeprom.c - -diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst -index 30b98245979f..4fa59accec79 100644 ---- a/Documentation/networking/ethtool-netlink.rst -+++ b/Documentation/networking/ethtool-netlink.rst -@@ -208,41 +208,43 @@ Userspace to kernel: - ``ETHTOOL_MSG_CABLE_TEST_ACT`` action start cable test - ``ETHTOOL_MSG_CABLE_TEST_TDR_ACT`` action start raw TDR cable test - ``ETHTOOL_MSG_TUNNEL_INFO_GET`` get tunnel offload info -+ ``ETHTOOL_MSG_MODULE_EEPROM_GET`` read SFP module EEPROM - ===================================== ================================ - - Kernel to userspace: - -- ===================================== ================================= -- ``ETHTOOL_MSG_STRSET_GET_REPLY`` string set contents -- ``ETHTOOL_MSG_LINKINFO_GET_REPLY`` link settings -- ``ETHTOOL_MSG_LINKINFO_NTF`` link settings notification -- ``ETHTOOL_MSG_LINKMODES_GET_REPLY`` link modes info -- ``ETHTOOL_MSG_LINKMODES_NTF`` link modes notification -- ``ETHTOOL_MSG_LINKSTATE_GET_REPLY`` link state info -- ``ETHTOOL_MSG_DEBUG_GET_REPLY`` debugging settings -- ``ETHTOOL_MSG_DEBUG_NTF`` debugging settings notification -- ``ETHTOOL_MSG_WOL_GET_REPLY`` wake-on-lan settings -- ``ETHTOOL_MSG_WOL_NTF`` wake-on-lan settings notification -- ``ETHTOOL_MSG_FEATURES_GET_REPLY`` device features -- ``ETHTOOL_MSG_FEATURES_SET_REPLY`` optional reply to FEATURES_SET -- ``ETHTOOL_MSG_FEATURES_NTF`` netdev features notification -- ``ETHTOOL_MSG_PRIVFLAGS_GET_REPLY`` private flags -- ``ETHTOOL_MSG_PRIVFLAGS_NTF`` private flags -- ``ETHTOOL_MSG_RINGS_GET_REPLY`` ring sizes -- ``ETHTOOL_MSG_RINGS_NTF`` ring sizes -- ``ETHTOOL_MSG_CHANNELS_GET_REPLY`` channel counts -- ``ETHTOOL_MSG_CHANNELS_NTF`` channel counts -- ``ETHTOOL_MSG_COALESCE_GET_REPLY`` coalescing parameters -- ``ETHTOOL_MSG_COALESCE_NTF`` coalescing parameters -- ``ETHTOOL_MSG_PAUSE_GET_REPLY`` pause parameters -- ``ETHTOOL_MSG_PAUSE_NTF`` pause parameters -- ``ETHTOOL_MSG_EEE_GET_REPLY`` EEE settings -- ``ETHTOOL_MSG_EEE_NTF`` EEE settings -- ``ETHTOOL_MSG_TSINFO_GET_REPLY`` timestamping info -- ``ETHTOOL_MSG_CABLE_TEST_NTF`` Cable test results -- ``ETHTOOL_MSG_CABLE_TEST_TDR_NTF`` Cable test TDR results -- ``ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY`` tunnel offload info -- ===================================== ================================= -+ ======================================== ================================= -+ ``ETHTOOL_MSG_STRSET_GET_REPLY`` string set contents -+ ``ETHTOOL_MSG_LINKINFO_GET_REPLY`` link settings -+ ``ETHTOOL_MSG_LINKINFO_NTF`` link settings notification -+ ``ETHTOOL_MSG_LINKMODES_GET_REPLY`` link modes info -+ ``ETHTOOL_MSG_LINKMODES_NTF`` link modes notification -+ ``ETHTOOL_MSG_LINKSTATE_GET_REPLY`` link state info -+ ``ETHTOOL_MSG_DEBUG_GET_REPLY`` debugging settings -+ ``ETHTOOL_MSG_DEBUG_NTF`` debugging settings notification -+ ``ETHTOOL_MSG_WOL_GET_REPLY`` wake-on-lan settings -+ ``ETHTOOL_MSG_WOL_NTF`` wake-on-lan settings notification -+ ``ETHTOOL_MSG_FEATURES_GET_REPLY`` device features -+ ``ETHTOOL_MSG_FEATURES_SET_REPLY`` optional reply to FEATURES_SET -+ ``ETHTOOL_MSG_FEATURES_NTF`` netdev features notification -+ ``ETHTOOL_MSG_PRIVFLAGS_GET_REPLY`` private flags -+ ``ETHTOOL_MSG_PRIVFLAGS_NTF`` private flags -+ ``ETHTOOL_MSG_RINGS_GET_REPLY`` ring sizes -+ ``ETHTOOL_MSG_RINGS_NTF`` ring sizes -+ ``ETHTOOL_MSG_CHANNELS_GET_REPLY`` channel counts -+ ``ETHTOOL_MSG_CHANNELS_NTF`` channel counts -+ ``ETHTOOL_MSG_COALESCE_GET_REPLY`` coalescing parameters -+ ``ETHTOOL_MSG_COALESCE_NTF`` coalescing parameters -+ ``ETHTOOL_MSG_PAUSE_GET_REPLY`` pause parameters -+ ``ETHTOOL_MSG_PAUSE_NTF`` pause parameters -+ ``ETHTOOL_MSG_EEE_GET_REPLY`` EEE settings -+ ``ETHTOOL_MSG_EEE_NTF`` EEE settings -+ ``ETHTOOL_MSG_TSINFO_GET_REPLY`` timestamping info -+ ``ETHTOOL_MSG_CABLE_TEST_NTF`` Cable test results -+ ``ETHTOOL_MSG_CABLE_TEST_TDR_NTF`` Cable test TDR results -+ ``ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY`` tunnel offload info -+ ``ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY`` read SFP module EEPROM -+ ===================================== ================================= - - ``GET`` requests are sent by userspace applications to retrieve device - information. They usually do not contain any message specific attributes. -@@ -1279,6 +1281,41 @@ Kernel response contents: - For UDP tunnel table empty ``ETHTOOL_A_TUNNEL_UDP_TABLE_TYPES`` indicates that - the table contains static entries, hard-coded by the NIC. - -+ -+MODULE_EEPROM_GET -+================= -+ -+Fetch module EEPROM data dump. -+This interface is designed to allow dumps of at most 1/2 page at once. This -+means only dumps of 128 (or less) bytes are allowed, without crossing half page -+boundary located at offset 128. For pages other than 0 only high 128 bytes are -+accessible. -+ -+Request contents: -+ -+ ======================================= ====== ========================== -+ ``ETHTOOL_A_MODULE_EEPROM_HEADER`` nested request header -+ ``ETHTOOL_A_MODULE_EEPROM_OFFSET`` u32 offset within a page -+ ``ETHTOOL_A_MODULE_EEPROM_LENGTH`` u32 amount of bytes to read -+ ``ETHTOOL_A_MODULE_EEPROM_PAGE`` u8 page number -+ ``ETHTOOL_A_MODULE_EEPROM_BANK`` u8 bank number -+ ``ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS`` u8 page I2C address -+ ======================================= ====== ========================== -+ -+If ``ETHTOOL_A_MODULE_EEPROM_BANK`` is not specified, bank 0 is assumed. -+ -+Kernel response contents: -+ -+ +---------------------------------------------+--------+---------------------+ -+ | ``ETHTOOL_A_MODULE_EEPROM_HEADER`` | nested | reply header | -+ +---------------------------------------------+--------+---------------------+ -+ | ``ETHTOOL_A_MODULE_EEPROM_DATA`` | binary | array of bytes from | -+ | | | module EEPROM | -+ +---------------------------------------------+--------+---------------------+ -+ -+``ETHTOOL_A_MODULE_EEPROM_DATA`` has an attribute length equal to the amount of -+bytes driver actually read. -+ - Request translation - =================== - -@@ -1356,8 +1393,8 @@ are netlink only. - ``ETHTOOL_GET_DUMP_FLAG`` n/a - ``ETHTOOL_GET_DUMP_DATA`` n/a - ``ETHTOOL_GET_TS_INFO`` ``ETHTOOL_MSG_TSINFO_GET`` -- ``ETHTOOL_GMODULEINFO`` n/a -- ``ETHTOOL_GMODULEEEPROM`` n/a -+ ``ETHTOOL_GMODULEINFO`` ``ETHTOOL_MSG_MODULE_EEPROM_GET`` -+ ``ETHTOOL_GMODULEEEPROM`` ``ETHTOOL_MSG_MODULE_EEPROM_GET`` - ``ETHTOOL_GEEE`` ``ETHTOOL_MSG_EEE_GET`` - ``ETHTOOL_SEEE`` ``ETHTOOL_MSG_EEE_SET`` - ``ETHTOOL_GRSSH`` n/a -diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h -index b98291d391f3..4d199de36e02 100644 ---- a/include/linux/ethtool.h -+++ b/include/linux/ethtool.h -@@ -77,6 +77,7 @@ enum { - #define ETH_RSS_HASH_NO_CHANGE 0 - - struct net_device; -+struct netlink_ext_ack; - - /* Some generic methods drivers may use in their ethtool_ops */ - u32 ethtool_op_get_link(struct net_device *dev); -@@ -258,6 +259,31 @@ struct ethtool_pause_stats { - u64 rx_pause_frames; - }; - -+#define ETH_MODULE_EEPROM_PAGE_LEN 128 -+#define ETH_MODULE_MAX_I2C_ADDRESS 0x7f -+ -+/** -+ * struct ethtool_module_eeprom - EEPROM dump from specified page -+ * @offset: Offset within the specified EEPROM page to begin read, in bytes. -+ * @length: Number of bytes to read. -+ * @page: Page number to read from. -+ * @bank: Page bank number to read from, if applicable by EEPROM spec. -+ * @i2c_address: I2C address of a page. Value less than 0x7f expected. Most -+ * EEPROMs use 0x50 or 0x51. -+ * @data: Pointer to buffer with EEPROM data of @length size. -+ * -+ * This can be used to manage pages during EEPROM dump in ethtool and pass -+ * required information to the driver. -+ */ -+struct ethtool_module_eeprom { -+ __u32 offset; -+ __u32 length; -+ __u8 page; -+ __u8 bank; -+ __u8 i2c_address; -+ __u8 *data; -+}; -+ - /** - * struct ethtool_ops - optional netdev operations - * @supported_coalesce_params: supported types of interrupt coalescing. -@@ -401,6 +427,9 @@ struct ethtool_pause_stats { - * @get_ethtool_phy_stats: Return extended statistics about the PHY device. - * This is only useful if the device maintains PHY statistics and - * cannot use the standard PHY library helpers. -+ * @get_module_eeprom_by_page: Get a region of plug-in module EEPROM data from -+ * specified page. Returns a negative error code or the amount of bytes -+ * read. - * - * All operations are optional (i.e. the function pointer may be set - * to %NULL) and callers must take this into account. Callers must -@@ -505,6 +534,9 @@ struct ethtool_ops { - const struct ethtool_tunable *, void *); - int (*set_phy_tunable)(struct net_device *, - const struct ethtool_tunable *, const void *); -+ int (*get_module_eeprom_by_page)(struct net_device *dev, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack); - }; - - int ethtool_check_ops(const struct ethtool_ops *ops); -@@ -528,7 +560,6 @@ int ethtool_virtdev_set_link_ksettings(struct net_device *dev, - const struct ethtool_link_ksettings *cmd, - u32 *dev_speed, u8 *dev_duplex); - --struct netlink_ext_ack; - struct phy_device; - struct phy_tdr_config; - -diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h -index c94fa2941502..7dda2cee919b 100644 ---- a/include/uapi/linux/ethtool_netlink.h -+++ b/include/uapi/linux/ethtool_netlink.h -@@ -42,6 +42,7 @@ enum { - ETHTOOL_MSG_CABLE_TEST_ACT, - ETHTOOL_MSG_CABLE_TEST_TDR_ACT, - ETHTOOL_MSG_TUNNEL_INFO_GET, -+ ETHTOOL_MSG_MODULE_EEPROM_GET, - - /* add new constants above here */ - __ETHTOOL_MSG_USER_CNT, -@@ -80,6 +81,7 @@ enum { - ETHTOOL_MSG_CABLE_TEST_NTF, - ETHTOOL_MSG_CABLE_TEST_TDR_NTF, - ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY, -+ ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY, - - /* add new constants above here */ - __ETHTOOL_MSG_KERNEL_CNT, -@@ -630,6 +632,23 @@ enum { - ETHTOOL_A_TUNNEL_INFO_MAX = (__ETHTOOL_A_TUNNEL_INFO_CNT - 1) - }; - -+/* MODULE EEPROM */ -+ -+enum { -+ ETHTOOL_A_MODULE_EEPROM_UNSPEC, -+ ETHTOOL_A_MODULE_EEPROM_HEADER, /* nest - _A_HEADER_* */ -+ -+ ETHTOOL_A_MODULE_EEPROM_OFFSET, /* u32 */ -+ ETHTOOL_A_MODULE_EEPROM_LENGTH, /* u32 */ -+ ETHTOOL_A_MODULE_EEPROM_PAGE, /* u8 */ -+ ETHTOOL_A_MODULE_EEPROM_BANK, /* u8 */ -+ ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS, /* u8 */ -+ ETHTOOL_A_MODULE_EEPROM_DATA, /* binary */ -+ -+ __ETHTOOL_A_MODULE_EEPROM_CNT, -+ ETHTOOL_A_MODULE_EEPROM_MAX = (__ETHTOOL_A_MODULE_EEPROM_CNT - 1) -+}; -+ - /* generic netlink info */ - #define ETHTOOL_GENL_NAME "ethtool" - #define ETHTOOL_GENL_VERSION 1 -diff --git a/net/ethtool/Makefile b/net/ethtool/Makefile -index 7a849ff22dad..d604346bc074 100644 ---- a/net/ethtool/Makefile -+++ b/net/ethtool/Makefile -@@ -7,4 +7,4 @@ obj-$(CONFIG_ETHTOOL_NETLINK) += ethtool_nl.o - ethtool_nl-y := netlink.o bitset.o strset.o linkinfo.o linkmodes.o \ - linkstate.o debug.o wol.o features.o privflags.o rings.o \ - channels.o coalesce.o pause.o eee.o tsinfo.o cabletest.o \ -- tunnels.o -+ tunnels.o eeprom.o -diff --git a/net/ethtool/eeprom.c b/net/ethtool/eeprom.c -new file mode 100644 -index 000000000000..8536dd905da5 ---- /dev/null -+++ b/net/ethtool/eeprom.c -@@ -0,0 +1,171 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+ -+#include -+#include "netlink.h" -+#include "common.h" -+ -+struct eeprom_req_info { -+ struct ethnl_req_info base; -+ u32 offset; -+ u32 length; -+ u8 page; -+ u8 bank; -+ u8 i2c_address; -+}; -+ -+struct eeprom_reply_data { -+ struct ethnl_reply_data base; -+ u32 length; -+ u8 *data; -+}; -+ -+#define MODULE_EEPROM_REQINFO(__req_base) \ -+ container_of(__req_base, struct eeprom_req_info, base) -+ -+#define MODULE_EEPROM_REPDATA(__reply_base) \ -+ container_of(__reply_base, struct eeprom_reply_data, base) -+ -+static int eeprom_prepare_data(const struct ethnl_req_info *req_base, -+ struct ethnl_reply_data *reply_base, -+ struct genl_info *info) -+{ -+ struct eeprom_reply_data *reply = MODULE_EEPROM_REPDATA(reply_base); -+ struct eeprom_req_info *request = MODULE_EEPROM_REQINFO(req_base); -+ struct ethtool_module_eeprom page_data = {0}; -+ struct net_device *dev = reply_base->dev; -+ int ret; -+ -+ if (!dev->ethtool_ops->get_module_eeprom_by_page) -+ return -EOPNOTSUPP; -+ -+ page_data.offset = request->offset; -+ page_data.length = request->length; -+ page_data.i2c_address = request->i2c_address; -+ page_data.page = request->page; -+ page_data.bank = request->bank; -+ page_data.data = kmalloc(page_data.length, GFP_KERNEL); -+ if (!page_data.data) -+ return -ENOMEM; -+ -+ ret = ethnl_ops_begin(dev); -+ if (ret) -+ goto err_free; -+ -+ ret = dev->ethtool_ops->get_module_eeprom_by_page(dev, &page_data, -+ info->extack); -+ if (ret < 0) -+ goto err_ops; -+ -+ reply->length = ret; -+ reply->data = page_data.data; -+ -+ ethnl_ops_complete(dev); -+ return 0; -+ -+err_ops: -+ ethnl_ops_complete(dev); -+err_free: -+ kfree(page_data.data); -+ return ret; -+} -+ -+static int eeprom_parse_request(struct ethnl_req_info *req_info, struct nlattr **tb, -+ struct netlink_ext_ack *extack) -+{ -+ struct eeprom_req_info *request = MODULE_EEPROM_REQINFO(req_info); -+ -+ if (!tb[ETHTOOL_A_MODULE_EEPROM_OFFSET] || -+ !tb[ETHTOOL_A_MODULE_EEPROM_LENGTH] || -+ !tb[ETHTOOL_A_MODULE_EEPROM_PAGE] || -+ !tb[ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS]) -+ return -EINVAL; -+ -+ request->i2c_address = nla_get_u8(tb[ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS]); -+ request->offset = nla_get_u32(tb[ETHTOOL_A_MODULE_EEPROM_OFFSET]); -+ request->length = nla_get_u32(tb[ETHTOOL_A_MODULE_EEPROM_LENGTH]); -+ -+ if (!request->length) -+ return -EINVAL; -+ -+ /* The following set of conditions limit the API to only dump 1/2 -+ * EEPROM page without crossing low page boundary located at offset 128. -+ * This means user may only request dumps of length limited to 128 from -+ * either low 128 bytes or high 128 bytes. -+ * For pages higher than 0 only high 128 bytes are accessible. -+ */ -+ request->page = nla_get_u8(tb[ETHTOOL_A_MODULE_EEPROM_PAGE]); -+ if (request->page && request->offset < ETH_MODULE_EEPROM_PAGE_LEN) { -+ NL_SET_ERR_MSG_ATTR(extack, tb[ETHTOOL_A_MODULE_EEPROM_PAGE], -+ "reading from lower half page is allowed for page 0 only"); -+ return -EINVAL; -+ } -+ -+ if (request->offset < ETH_MODULE_EEPROM_PAGE_LEN && -+ request->offset + request->length > ETH_MODULE_EEPROM_PAGE_LEN) { -+ NL_SET_ERR_MSG_ATTR(extack, tb[ETHTOOL_A_MODULE_EEPROM_LENGTH], -+ "reading cross half page boundary is illegal"); -+ return -EINVAL; -+ } else if (request->offset >= ETH_MODULE_EEPROM_PAGE_LEN * 2) { -+ NL_SET_ERR_MSG_ATTR(extack, tb[ETHTOOL_A_MODULE_EEPROM_OFFSET], -+ "offset is out of bounds"); -+ return -EINVAL; -+ } else if (request->offset + request->length > ETH_MODULE_EEPROM_PAGE_LEN * 2) { -+ NL_SET_ERR_MSG_ATTR(extack, tb[ETHTOOL_A_MODULE_EEPROM_LENGTH], -+ "reading cross page boundary is illegal"); -+ return -EINVAL; -+ } -+ -+ if (tb[ETHTOOL_A_MODULE_EEPROM_BANK]) -+ request->bank = nla_get_u8(tb[ETHTOOL_A_MODULE_EEPROM_BANK]); -+ -+ return 0; -+} -+ -+static int eeprom_reply_size(const struct ethnl_req_info *req_base, -+ const struct ethnl_reply_data *reply_base) -+{ -+ const struct eeprom_req_info *request = MODULE_EEPROM_REQINFO(req_base); -+ -+ return nla_total_size(sizeof(u8) * request->length); /* _EEPROM_DATA */ -+} -+ -+static int eeprom_fill_reply(struct sk_buff *skb, -+ const struct ethnl_req_info *req_base, -+ const struct ethnl_reply_data *reply_base) -+{ -+ struct eeprom_reply_data *reply = MODULE_EEPROM_REPDATA(reply_base); -+ -+ return nla_put(skb, ETHTOOL_A_MODULE_EEPROM_DATA, reply->length, reply->data); -+} -+ -+static void eeprom_cleanup_data(struct ethnl_reply_data *reply_base) -+{ -+ struct eeprom_reply_data *reply = MODULE_EEPROM_REPDATA(reply_base); -+ -+ kfree(reply->data); -+} -+ -+const struct ethnl_request_ops ethnl_module_eeprom_request_ops = { -+ .request_cmd = ETHTOOL_MSG_MODULE_EEPROM_GET, -+ .reply_cmd = ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY, -+ .hdr_attr = ETHTOOL_A_MODULE_EEPROM_HEADER, -+ .req_info_size = sizeof(struct eeprom_req_info), -+ .reply_data_size = sizeof(struct eeprom_reply_data), -+ -+ .parse_request = eeprom_parse_request, -+ .prepare_data = eeprom_prepare_data, -+ .reply_size = eeprom_reply_size, -+ .fill_reply = eeprom_fill_reply, -+ .cleanup_data = eeprom_cleanup_data, -+}; -+ -+const struct nla_policy ethnl_module_eeprom_get_policy[] = { -+ [ETHTOOL_A_MODULE_EEPROM_HEADER] = NLA_POLICY_NESTED(ethnl_header_policy), -+ [ETHTOOL_A_MODULE_EEPROM_OFFSET] = { .type = NLA_U32 }, -+ [ETHTOOL_A_MODULE_EEPROM_LENGTH] = { .type = NLA_U32 }, -+ [ETHTOOL_A_MODULE_EEPROM_PAGE] = { .type = NLA_U8 }, -+ [ETHTOOL_A_MODULE_EEPROM_BANK] = { .type = NLA_U8 }, -+ [ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS] = -+ NLA_POLICY_RANGE(NLA_U8, 0, ETH_MODULE_MAX_I2C_ADDRESS), -+}; -+ -diff --git a/net/ethtool/netlink.c b/net/ethtool/netlink.c -index 25a55086d2b6..5ae95f423780 100644 ---- a/net/ethtool/netlink.c -+++ b/net/ethtool/netlink.c -@@ -245,6 +245,7 @@ ethnl_default_requests[__ETHTOOL_MSG_USER_CNT] = { - [ETHTOOL_MSG_PAUSE_GET] = ðnl_pause_request_ops, - [ETHTOOL_MSG_EEE_GET] = ðnl_eee_request_ops, - [ETHTOOL_MSG_TSINFO_GET] = ðnl_tsinfo_request_ops, -+ [ETHTOOL_MSG_MODULE_EEPROM_GET] = ðnl_module_eeprom_request_ops, - }; - - static struct ethnl_dump_ctx *ethnl_dump_context(struct netlink_callback *cb) -@@ -913,6 +914,16 @@ static const struct genl_ops ethtool_genl_ops[] = { - .policy = ethnl_tunnel_info_get_policy, - .maxattr = ARRAY_SIZE(ethnl_tunnel_info_get_policy) - 1, - }, -+ { -+ .cmd = ETHTOOL_MSG_MODULE_EEPROM_GET, -+ .flags = GENL_UNS_ADMIN_PERM, -+ .doit = ethnl_default_doit, -+ .start = ethnl_default_start, -+ .dumpit = ethnl_default_dumpit, -+ .done = ethnl_default_done, -+ .policy = ethnl_module_eeprom_get_policy, -+ .maxattr = ARRAY_SIZE(ethnl_module_eeprom_get_policy) - 1, -+ }, - }; - - static const struct genl_multicast_group ethtool_nl_mcgrps[] = { -diff --git a/net/ethtool/netlink.h b/net/ethtool/netlink.h -index 979dee6bb88c..4a07fc93c5cc 100644 ---- a/net/ethtool/netlink.h -+++ b/net/ethtool/netlink.h -@@ -347,6 +347,7 @@ extern const struct ethnl_request_ops ethnl_coalesce_request_ops; - extern const struct ethnl_request_ops ethnl_pause_request_ops; - extern const struct ethnl_request_ops ethnl_eee_request_ops; - extern const struct ethnl_request_ops ethnl_tsinfo_request_ops; -+extern const struct ethnl_request_ops ethnl_module_eeprom_request_ops; - - extern const struct nla_policy ethnl_header_policy[ETHTOOL_A_HEADER_FLAGS + 1]; - extern const struct nla_policy ethnl_header_policy_stats[ETHTOOL_A_HEADER_FLAGS + 1]; -@@ -378,6 +379,7 @@ extern const struct nla_policy ethnl_tsinfo_get_policy[ETHTOOL_A_TSINFO_HEADER + - extern const struct nla_policy ethnl_cable_test_act_policy[ETHTOOL_A_CABLE_TEST_HEADER + 1]; - extern const struct nla_policy ethnl_cable_test_tdr_act_policy[ETHTOOL_A_CABLE_TEST_TDR_CFG + 1]; - extern const struct nla_policy ethnl_tunnel_info_get_policy[ETHTOOL_A_TUNNEL_INFO_HEADER + 1]; -+extern const struct nla_policy ethnl_module_eeprom_get_policy[ETHTOOL_A_MODULE_EEPROM_DATA + 1]; - - int ethnl_set_linkinfo(struct sk_buff *skb, struct genl_info *info); - int ethnl_set_linkmodes(struct sk_buff *skb, struct genl_info *info); --- -2.20.1 - diff --git a/patch/0023-platform-mellanox-Cosmetic-changes.patch b/patch/0023-platform-mellanox-Cosmetic-changes.patch new file mode 100644 index 000000000000..65f5619012cd --- /dev/null +++ b/patch/0023-platform-mellanox-Cosmetic-changes.patch @@ -0,0 +1,76 @@ +From 851d7b63b861b5f042ec40ee148c7a4503cdee0e Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 30 Jul 2023 20:35:23 +0000 +Subject: [PATH backport v6.1 23/32] platform: mellanox: Cosmetic changes + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39637.html + +Fix routines and labels names by s/topolgy/topology. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 14 +++++++------- + 1 file changed, 7 insertions(+), 7 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index a505f619f337..1010064d54e9 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -6265,7 +6265,7 @@ mlxplat_i2c_mux_complition_notify(void *handle, struct i2c_adapter *parent, + return mlxplat_post_init(priv); + } + +-static int mlxplat_i2c_mux_topolgy_init(struct mlxplat_priv *priv) ++static int mlxplat_i2c_mux_topology_init(struct mlxplat_priv *priv) + { + int i, err; + +@@ -6294,7 +6294,7 @@ static int mlxplat_i2c_mux_topolgy_init(struct mlxplat_priv *priv) + return err; + } + +-static void mlxplat_i2c_mux_topolgy_exit(struct mlxplat_priv *priv) ++static void mlxplat_i2c_mux_topology_exit(struct mlxplat_priv *priv) + { + int i; + +@@ -6308,7 +6308,7 @@ static int mlxplat_i2c_main_complition_notify(void *handle, int id) + { + struct mlxplat_priv *priv = handle; + +- return mlxplat_i2c_mux_topolgy_init(priv); ++ return mlxplat_i2c_mux_topology_init(priv); + } + + static int mlxplat_i2c_main_init(struct mlxplat_priv *priv) +@@ -6336,14 +6336,14 @@ static int mlxplat_i2c_main_init(struct mlxplat_priv *priv) + } + + if (priv->i2c_main_init_status == MLXPLAT_I2C_MAIN_BUS_NOTIFIED) { +- err = mlxplat_i2c_mux_topolgy_init(priv); ++ err = mlxplat_i2c_mux_topology_init(priv); + if (err) +- goto fail_mlxplat_i2c_mux_topolgy_init; ++ goto fail_mlxplat_i2c_mux_topology_init; + } + + return 0; + +-fail_mlxplat_i2c_mux_topolgy_init: ++fail_mlxplat_i2c_mux_topology_init: + fail_platform_i2c_register: + fail_mlxplat_mlxcpld_verify_bus_topology: + return err; +@@ -6351,7 +6351,7 @@ static int mlxplat_i2c_main_init(struct mlxplat_priv *priv) + + static void mlxplat_i2c_main_exit(struct mlxplat_priv *priv) + { +- mlxplat_i2c_mux_topolgy_exit(priv); ++ mlxplat_i2c_mux_topology_exit(priv); + if (priv->pdev_i2c) + platform_device_unregister(priv->pdev_i2c); + } +-- +2.20.1 + diff --git a/patch/0024-net-ethtool-Export-helpers-for-getting-EEPROM-info.patch b/patch/0024-net-ethtool-Export-helpers-for-getting-EEPROM-info.patch deleted file mode 100644 index 8bf61f94c6b9..000000000000 --- a/patch/0024-net-ethtool-Export-helpers-for-getting-EEPROM-info.patch +++ /dev/null @@ -1,88 +0,0 @@ -From a7f17fca2ddb48f6f4505a17a68e8014ffe52af2 Mon Sep 17 00:00:00 2001 -From: Andrew Lunn -Date: Fri, 9 Apr 2021 11:06:38 +0300 -Subject: [PATCH backport 5.10 024/182] net: ethtool: Export helpers for - getting EEPROM info - -There are two ways to retrieve information from SFP EEPROMs. Many -devices make use of the common code, and assign the sfp_bus pointer in -the netdev to point to the bus holding the SFP device. Some MAC -drivers directly implement ops in there ethool structure. - -Export within net/ethtool the two helpers used to call these methods, -so that they can also be used in the new netlink code. - -Signed-off-by: Andrew Lunn -Signed-off-by: David S. Miller ---- - net/ethtool/common.h | 5 +++++ - net/ethtool/ioctl.c | 14 +++++++------- - 2 files changed, 12 insertions(+), 7 deletions(-) - -diff --git a/net/ethtool/common.h b/net/ethtool/common.h -index 3d9251c95a8b..955cd1e8b3fe 100644 ---- a/net/ethtool/common.h -+++ b/net/ethtool/common.h -@@ -40,4 +40,9 @@ int __ethtool_get_ts_info(struct net_device *dev, struct ethtool_ts_info *info); - - extern const struct ethtool_phy_ops *ethtool_phy_ops; - -+int ethtool_get_module_info_call(struct net_device *dev, -+ struct ethtool_modinfo *modinfo); -+int ethtool_get_module_eeprom_call(struct net_device *dev, -+ struct ethtool_eeprom *ee, u8 *data); -+ - #endif /* _ETHTOOL_COMMON_H */ -diff --git a/net/ethtool/ioctl.c b/net/ethtool/ioctl.c -index 80d2a00d3097..3aee0a25e443 100644 ---- a/net/ethtool/ioctl.c -+++ b/net/ethtool/ioctl.c -@@ -2280,8 +2280,8 @@ static int ethtool_get_ts_info(struct net_device *dev, void __user *useraddr) - return 0; - } - --static int __ethtool_get_module_info(struct net_device *dev, -- struct ethtool_modinfo *modinfo) -+int ethtool_get_module_info_call(struct net_device *dev, -+ struct ethtool_modinfo *modinfo) - { - const struct ethtool_ops *ops = dev->ethtool_ops; - struct phy_device *phydev = dev->phydev; -@@ -2307,7 +2307,7 @@ static int ethtool_get_module_info(struct net_device *dev, - if (copy_from_user(&modinfo, useraddr, sizeof(modinfo))) - return -EFAULT; - -- ret = __ethtool_get_module_info(dev, &modinfo); -+ ret = ethtool_get_module_info_call(dev, &modinfo); - if (ret) - return ret; - -@@ -2317,8 +2317,8 @@ static int ethtool_get_module_info(struct net_device *dev, - return 0; - } - --static int __ethtool_get_module_eeprom(struct net_device *dev, -- struct ethtool_eeprom *ee, u8 *data) -+int ethtool_get_module_eeprom_call(struct net_device *dev, -+ struct ethtool_eeprom *ee, u8 *data) - { - const struct ethtool_ops *ops = dev->ethtool_ops; - struct phy_device *phydev = dev->phydev; -@@ -2341,12 +2341,12 @@ static int ethtool_get_module_eeprom(struct net_device *dev, - int ret; - struct ethtool_modinfo modinfo; - -- ret = __ethtool_get_module_info(dev, &modinfo); -+ ret = ethtool_get_module_info_call(dev, &modinfo); - if (ret) - return ret; - - return ethtool_get_any_eeprom(dev, useraddr, -- __ethtool_get_module_eeprom, -+ ethtool_get_module_eeprom_call, - modinfo.eeprom_len); - } - --- -2.20.1 - diff --git a/patch/0024-platform-mellanox-mlx-platform-Add-reset-callback.patch b/patch/0024-platform-mellanox-mlx-platform-Add-reset-callback.patch new file mode 100644 index 000000000000..fa0177e36491 --- /dev/null +++ b/patch/0024-platform-mellanox-mlx-platform-Add-reset-callback.patch @@ -0,0 +1,162 @@ +From c581e018f6e8f1bf81b75b118a96425abf7dcc2b Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 30 Jul 2023 20:50:15 +0000 +Subject: [PATH backport v6.1 24/32] platform: mellanox: mlx-platform: Add + reset callback + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39640.html + +On L1 switches reset should include special actions against CPLD device +for performing graceful operations. +For that purpose, special PLATFORM_RESET# signal should be indicated. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 46 +++++++++++++++++++++++++++-- + 1 file changed, 44 insertions(+), 2 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 1010064d54e9..296569492a71 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -35,6 +35,7 @@ + #define MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET 0x09 + #define MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET 0x0a + #define MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET 0x0b ++#define MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET 0x17 + #define MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET 0x19 + #define MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET 0x1c + #define MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET 0x1d +@@ -254,6 +255,7 @@ + MLXPLAT_CPLD_PWM_PG_MASK) + #define MLXPLAT_CPLD_I2C_CAP_BIT 0x04 + #define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT) ++#define MLXPLAT_CPLD_SYS_RESET_MASK BIT(0) + + /* Masks for aggregation for comex carriers */ + #define MLXPLAT_CPLD_AGGR_MASK_CARRIER BIT(1) +@@ -265,6 +267,7 @@ + #define MLXPLAT_CPLD_LPC_LC_MASK GENMASK(7, 0) + + #define MLXPLAT_CPLD_HALT_MASK BIT(3) ++#define MLXPLAT_CPLD_RESET_MASK GENMASK(7, 1) + + /* Default I2C parent bus number */ + #define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1 +@@ -441,6 +444,7 @@ static struct i2c_mux_reg_platform_data mlxplat_default_mux_data[] = { + static int mlxplat_max_adap_num; + static int mlxplat_mux_num; + static struct i2c_mux_reg_platform_data *mlxplat_mux_data; ++static struct notifier_block *mlxplat_reboot_nb; + + /* Platform extended mux data */ + static struct i2c_mux_reg_platform_data mlxplat_extended_mux_data[] = { +@@ -2361,8 +2365,11 @@ static int + mlxplat_mlxcpld_l1_switch_pwr_events_handler(void *handle, enum mlxreg_hotplug_kind kind, + u8 action) + { +- dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button"); +- kernel_power_off(); ++ if (action) { ++ dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button"); ++ kernel_power_off(); ++ } ++ + return 0; + } + +@@ -4957,6 +4964,7 @@ static struct mlxreg_core_platform_data mlxplat_mlxcpld_wd_set_type3[] = { + static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) + { + switch (reg) { ++ case MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET: +@@ -5065,6 +5073,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD5_PN1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: +@@ -5229,6 +5238,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) + case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD5_PN_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD5_PN1_OFFSET: ++ case MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: +@@ -5533,11 +5543,33 @@ static struct mlxreg_core_platform_data + *mlxplat_wd_data[MLXPLAT_CPLD_WD_MAX_DEVS]; + static const struct regmap_config *mlxplat_regmap_config; + ++/* Platform default reset function */ ++static int mlxplat_reboot_notifier(struct notifier_block *nb, unsigned long action, void *unused) ++{ ++ struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); ++ u32 regval; ++ int ret; ++ ++ ret = regmap_read(priv->regmap, MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET, ®val); ++ ++ if (action == SYS_RESTART && !ret && regval & MLXPLAT_CPLD_SYS_RESET_MASK) ++ regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_RESET_GP1_OFFSET, ++ MLXPLAT_CPLD_RESET_MASK); ++ ++ return NOTIFY_DONE; ++} ++ ++static struct notifier_block mlxplat_reboot_default_nb = { ++ .notifier_call = mlxplat_reboot_notifier, ++}; ++ + /* Platform default poweroff function */ + static void mlxplat_poweroff(void) + { + struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); + ++ if (mlxplat_reboot_nb) ++ unregister_reboot_notifier(mlxplat_reboot_nb); + regmap_write(priv->regmap, MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, MLXPLAT_CPLD_HALT_MASK); + kernel_halt(); + } +@@ -5861,6 +5893,7 @@ static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi) + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_rack_switch; + pm_power_off = mlxplat_poweroff; ++ mlxplat_reboot_nb = &mlxplat_reboot_default_nb; + + return 1; + } +@@ -6410,8 +6443,15 @@ static int __init mlxplat_init(void) + if (err) + goto fail_regcache_sync; + ++ if (mlxplat_reboot_nb) { ++ err = register_reboot_notifier(mlxplat_reboot_nb); ++ if (err) ++ goto fail_register_reboot_notifier; ++ } ++ + return 0; + ++fail_register_reboot_notifier: + fail_regcache_sync: + mlxplat_pre_exit(priv); + fail_mlxplat_i2c_main_init: +@@ -6429,6 +6469,8 @@ static void __exit mlxplat_exit(void) + + if (pm_power_off) + pm_power_off = NULL; ++ if (mlxplat_reboot_nb) ++ unregister_reboot_notifier(mlxplat_reboot_nb); + mlxplat_pre_exit(priv); + mlxplat_i2c_main_exit(priv); + mlxplat_post_exit(); +-- +2.20.1 + diff --git a/patch/0025-ethtool-Add-fallback-to-get_module_eeprom-from-netli.patch b/patch/0025-ethtool-Add-fallback-to-get_module_eeprom-from-netli.patch deleted file mode 100644 index 4a360a70ad7b..000000000000 --- a/patch/0025-ethtool-Add-fallback-to-get_module_eeprom-from-netli.patch +++ /dev/null @@ -1,101 +0,0 @@ -From cc57dbcfd101433cdb7238aa6640d83faacaa9f0 Mon Sep 17 00:00:00 2001 -From: Vladyslav Tarasiuk -Date: Fri, 9 Apr 2021 11:06:39 +0300 -Subject: [PATCH backport 5.10 025/182] ethtool: Add fallback to - get_module_eeprom from netlink command - -In case netlink get_module_eeprom_by_page() callback is not implemented -by the driver, try to call old get_module_info() and get_module_eeprom() -pair. Recalculate parameters to get_module_eeprom() offset and len using -page number and their sizes. Return error if this can't be done. - -Signed-off-by: Vladyslav Tarasiuk -Signed-off-by: Andrew Lunn -Signed-off-by: David S. Miller ---- - net/ethtool/eeprom.c | 62 +++++++++++++++++++++++++++++++++++++++++++- - 1 file changed, 61 insertions(+), 1 deletion(-) - -diff --git a/net/ethtool/eeprom.c b/net/ethtool/eeprom.c -index 8536dd905da5..1a49c133d401 100644 ---- a/net/ethtool/eeprom.c -+++ b/net/ethtool/eeprom.c -@@ -25,6 +25,66 @@ struct eeprom_reply_data { - #define MODULE_EEPROM_REPDATA(__reply_base) \ - container_of(__reply_base, struct eeprom_reply_data, base) - -+static int fallback_set_params(struct eeprom_req_info *request, -+ struct ethtool_modinfo *modinfo, -+ struct ethtool_eeprom *eeprom) -+{ -+ u32 offset = request->offset; -+ u32 length = request->length; -+ -+ if (request->page) -+ offset = request->page * ETH_MODULE_EEPROM_PAGE_LEN + offset; -+ -+ if (modinfo->type == ETH_MODULE_SFF_8079 && -+ request->i2c_address == 0x51) -+ offset += ETH_MODULE_EEPROM_PAGE_LEN * 2; -+ -+ if (offset >= modinfo->eeprom_len) -+ return -EINVAL; -+ -+ eeprom->cmd = ETHTOOL_GMODULEEEPROM; -+ eeprom->len = length; -+ eeprom->offset = offset; -+ -+ return 0; -+} -+ -+static int eeprom_fallback(struct eeprom_req_info *request, -+ struct eeprom_reply_data *reply, -+ struct genl_info *info) -+{ -+ struct net_device *dev = reply->base.dev; -+ struct ethtool_modinfo modinfo = {0}; -+ struct ethtool_eeprom eeprom = {0}; -+ u8 *data; -+ int err; -+ -+ modinfo.cmd = ETHTOOL_GMODULEINFO; -+ err = ethtool_get_module_info_call(dev, &modinfo); -+ if (err < 0) -+ return err; -+ -+ err = fallback_set_params(request, &modinfo, &eeprom); -+ if (err < 0) -+ return err; -+ -+ data = kmalloc(eeprom.len, GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ err = ethtool_get_module_eeprom_call(dev, &eeprom, data); -+ if (err < 0) -+ goto err_out; -+ -+ reply->data = data; -+ reply->length = eeprom.len; -+ -+ return 0; -+ -+err_out: -+ kfree(data); -+ return err; -+} -+ - static int eeprom_prepare_data(const struct ethnl_req_info *req_base, - struct ethnl_reply_data *reply_base, - struct genl_info *info) -@@ -36,7 +96,7 @@ static int eeprom_prepare_data(const struct ethnl_req_info *req_base, - int ret; - - if (!dev->ethtool_ops->get_module_eeprom_by_page) -- return -EOPNOTSUPP; -+ return eeprom_fallback(request, reply, info); - - page_data.offset = request->offset; - page_data.length = request->length; --- -2.20.1 - diff --git a/patch/0025-platform-mellanox-mlx-platform-Prepare-driver-to-all.patch b/patch/0025-platform-mellanox-mlx-platform-Prepare-driver-to-all.patch new file mode 100644 index 000000000000..743a8cf3c14d --- /dev/null +++ b/patch/0025-platform-mellanox-mlx-platform-Prepare-driver-to-all.patch @@ -0,0 +1,269 @@ +From 72ca44d6df08d42b18489a68cdb7217481394149 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 08:36:36 +0000 +Subject: [PATH backport v6.1 25/32] platform: mellanox: mlx-platform: Prepare + driver to allow probing through ACPI infrastructure + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39642.html + +Currently driver is activated through DMI hooks. +Prepare driver to allow activation also through ACPI trigger. + +Modify mlxplat_init()/mlxplat_exit() routines. +Add mlxplat_probe()/mlxplat_remove() routines and "mlxplat_driver" +structure. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 91 +++++++++++++++++++---------- + 1 file changed, 61 insertions(+), 30 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 296569492a71..73f887614e04 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -5574,6 +5574,17 @@ static void mlxplat_poweroff(void) + kernel_halt(); + } + ++static int __init mlxplat_register_platform_device(void) ++{ ++ mlxplat_dev = platform_device_register_simple(MLX_PLAT_DEVICE_NAME, -1, ++ mlxplat_lpc_resources, ++ ARRAY_SIZE(mlxplat_lpc_resources)); ++ if (IS_ERR(mlxplat_dev)) ++ return PTR_ERR(mlxplat_dev); ++ else ++ return 1; ++} ++ + static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) + { + int i; +@@ -5594,7 +5605,7 @@ static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; + mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi) +@@ -5617,7 +5628,7 @@ static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; + mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_default_eth_wc_blade_matched(const struct dmi_system_id *dmi) +@@ -5642,7 +5653,7 @@ static int __init mlxplat_dmi_default_eth_wc_blade_matched(const struct dmi_syst + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi) +@@ -5665,7 +5676,7 @@ static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi) + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; + mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi) +@@ -5688,7 +5699,7 @@ static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi) + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; + mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_msn201x_matched(const struct dmi_system_id *dmi) +@@ -5711,7 +5722,7 @@ static int __init mlxplat_dmi_msn201x_matched(const struct dmi_system_id *dmi) + mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; + mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_qmb7xx_matched(const struct dmi_system_id *dmi) +@@ -5737,7 +5748,7 @@ static int __init mlxplat_dmi_qmb7xx_matched(const struct dmi_system_id *dmi) + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_comex_matched(const struct dmi_system_id *dmi) +@@ -5762,7 +5773,7 @@ static int __init mlxplat_dmi_comex_matched(const struct dmi_system_id *dmi) + mlxplat_i2c = &mlxplat_mlxcpld_i2c_default_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_comex; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_ng400_matched(const struct dmi_system_id *dmi) +@@ -5788,7 +5799,7 @@ static int __init mlxplat_dmi_ng400_matched(const struct dmi_system_id *dmi) + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi) +@@ -5808,7 +5819,7 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi) + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_eth_modular; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_chassis_blade_matched(const struct dmi_system_id *dmi) +@@ -5830,7 +5841,7 @@ static int __init mlxplat_dmi_chassis_blade_matched(const struct dmi_system_id * + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_rack_switch_matched(const struct dmi_system_id *dmi) +@@ -5851,7 +5862,7 @@ static int __init mlxplat_dmi_rack_switch_matched(const struct dmi_system_id *dm + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_rack_switch; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_ng800_matched(const struct dmi_system_id *dmi) +@@ -5872,7 +5883,7 @@ static int __init mlxplat_dmi_ng800_matched(const struct dmi_system_id *dmi) + mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi) +@@ -5895,7 +5906,7 @@ static int __init mlxplat_dmi_l1_switch_matched(const struct dmi_system_id *dmi) + pm_power_off = mlxplat_poweroff; + mlxplat_reboot_nb = &mlxplat_reboot_default_nb; + +- return 1; ++ return mlxplat_register_platform_device(); + } + + static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { +@@ -6139,12 +6150,6 @@ static int mlxplat_lpc_cpld_device_init(struct resource **hotplug_resources, + { + int err; + +- mlxplat_dev = platform_device_register_simple(MLX_PLAT_DEVICE_NAME, PLATFORM_DEVID_NONE, +- mlxplat_lpc_resources, +- ARRAY_SIZE(mlxplat_lpc_resources)); +- if (IS_ERR(mlxplat_dev)) +- return PTR_ERR(mlxplat_dev); +- + mlxplat_mlxcpld_regmap_ctx.base = devm_ioport_map(&mlxplat_dev->dev, + mlxplat_lpc_resources[1].start, 1); + if (!mlxplat_mlxcpld_regmap_ctx.base) { +@@ -6158,13 +6163,11 @@ static int mlxplat_lpc_cpld_device_init(struct resource **hotplug_resources, + return 0; + + fail_devm_ioport_map: +- platform_device_unregister(mlxplat_dev); + return err; + } + + static void mlxplat_lpc_cpld_device_exit(void) + { +- platform_device_unregister(mlxplat_dev); + } + + static int +@@ -6389,16 +6392,13 @@ static void mlxplat_i2c_main_exit(struct mlxplat_priv *priv) + platform_device_unregister(priv->pdev_i2c); + } + +-static int __init mlxplat_init(void) ++static int mlxplat_probe(struct platform_device *pdev) + { +- unsigned int hotplug_resources_size; +- struct resource *hotplug_resources; ++ unsigned int hotplug_resources_size = 0; ++ struct resource *hotplug_resources = NULL; + struct mlxplat_priv *priv; + int i, err; + +- if (!dmi_check_system(mlxplat_dmi_table)) +- return -ENODEV; +- + err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size); + if (err) + return err; +@@ -6461,9 +6461,8 @@ static int __init mlxplat_init(void) + + return err; + } +-module_init(mlxplat_init); + +-static void __exit mlxplat_exit(void) ++static int mlxplat_remove(struct platform_device *pdev) + { + struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); + +@@ -6474,6 +6473,38 @@ static void __exit mlxplat_exit(void) + mlxplat_pre_exit(priv); + mlxplat_i2c_main_exit(priv); + mlxplat_post_exit(); ++ return 0; ++} ++ ++static struct platform_driver mlxplat_driver = { ++ .driver = { ++ .name = "mlxplat", ++ .probe_type = PROBE_FORCE_SYNCHRONOUS, ++ }, ++ .probe = mlxplat_probe, ++ .remove = mlxplat_remove, ++}; ++ ++static int __init mlxplat_init(void) ++{ ++ int err; ++ ++ if (!dmi_check_system(mlxplat_dmi_table)) ++ return -ENODEV; ++ ++ err = platform_driver_register(&mlxplat_driver); ++ if (err) ++ return err; ++ return 0; ++} ++module_init(mlxplat_init); ++ ++static void __exit mlxplat_exit(void) ++{ ++ if (mlxplat_dev) ++ platform_device_unregister(mlxplat_dev); ++ ++ platform_driver_unregister(&mlxplat_driver); + } + module_exit(mlxplat_exit); + +-- +2.20.1 + diff --git a/patch/0026-mlxsw-core-Add-support-for-module-EEPROM-read-by-pag.patch b/patch/0026-mlxsw-core-Add-support-for-module-EEPROM-read-by-pag.patch deleted file mode 100644 index 0c74eda54296..000000000000 --- a/patch/0026-mlxsw-core-Add-support-for-module-EEPROM-read-by-pag.patch +++ /dev/null @@ -1,233 +0,0 @@ -From 37a0a27a7d38597e4b60b4ff483a20a2cdfeaac6 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Mon, 21 Jun 2021 10:50:41 +0300 -Subject: [PATCH backport 5.10 026/182] mlxsw: core: Add support for module - EEPROM read by page - -Add support for ethtool_ops::get_module_eeprom_by_page() which allows -user space to read transceiver module EEPROM based on passed parameters. - -The I2C address is not validated in order to avoid module-specific code. -In case of wrong address, error will be returned from device's firmware. - -Tested by comparing output with legacy method (ioctl) output. - -Signed-off-by: Ido Schimmel -Tested-by: Vadim Pasternak -Reviewed-by: Jiri Pirko -Signed-off-by: David S. Miller ---- - .../net/ethernet/mellanox/mlxsw/core_env.c | 74 +++++++++++++++++++ - .../net/ethernet/mellanox/mlxsw/core_env.h | 7 ++ - drivers/net/ethernet/mellanox/mlxsw/minimal.c | 13 ++++ - .../mellanox/mlxsw/spectrum_ethtool.c | 42 +++++++---- - 4 files changed, 122 insertions(+), 14 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index bcad1327d861..db85923547b0 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -3,6 +3,7 @@ - - #include - #include -+#include - #include - - #include "core.h" -@@ -306,6 +307,79 @@ int mlxsw_env_get_module_eeprom(struct net_device *netdev, - } - EXPORT_SYMBOL(mlxsw_env_get_module_eeprom); - -+static int mlxsw_env_mcia_status_process(const char *mcia_pl, -+ struct netlink_ext_ack *extack) -+{ -+ u8 status = mlxsw_reg_mcia_status_get(mcia_pl); -+ -+ switch (status) { -+ case MLXSW_REG_MCIA_STATUS_GOOD: -+ return 0; -+ case MLXSW_REG_MCIA_STATUS_NO_EEPROM_MODULE: -+ NL_SET_ERR_MSG_MOD(extack, "No response from module's EEPROM"); -+ return -EIO; -+ case MLXSW_REG_MCIA_STATUS_MODULE_NOT_SUPPORTED: -+ NL_SET_ERR_MSG_MOD(extack, "Module type not supported by the device"); -+ return -EOPNOTSUPP; -+ case MLXSW_REG_MCIA_STATUS_MODULE_NOT_CONNECTED: -+ NL_SET_ERR_MSG_MOD(extack, "No module present indication"); -+ return -EIO; -+ case MLXSW_REG_MCIA_STATUS_I2C_ERROR: -+ NL_SET_ERR_MSG_MOD(extack, "Error occurred while trying to access module's EEPROM using I2C"); -+ return -EIO; -+ case MLXSW_REG_MCIA_STATUS_MODULE_DISABLED: -+ NL_SET_ERR_MSG_MOD(extack, "Module is disabled"); -+ return -EIO; -+ default: -+ NL_SET_ERR_MSG_MOD(extack, "Unknown error"); -+ return -EIO; -+ } -+} -+ -+int -+mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack) -+{ -+ u32 bytes_read = 0; -+ u16 device_addr; -+ -+ /* Offset cannot be larger than 2 * ETH_MODULE_EEPROM_PAGE_LEN */ -+ device_addr = page->offset; -+ -+ while (bytes_read < page->length) { -+ char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE]; -+ char mcia_pl[MLXSW_REG_MCIA_LEN]; -+ u8 size; -+ int err; -+ -+ size = min_t(u8, page->length - bytes_read, -+ MLXSW_REG_MCIA_EEPROM_SIZE); -+ -+ mlxsw_reg_mcia_pack(mcia_pl, module, 0, page->page, -+ device_addr + bytes_read, size, -+ page->i2c_address); -+ mlxsw_reg_mcia_bank_number_set(mcia_pl, page->bank); -+ -+ err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcia), mcia_pl); -+ if (err) { -+ NL_SET_ERR_MSG_MOD(extack, "Failed to access module's EEPROM"); -+ return err; -+ } -+ -+ err = mlxsw_env_mcia_status_process(mcia_pl, extack); -+ if (err) -+ return err; -+ -+ mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp); -+ memcpy(page->data + bytes_read, eeprom_tmp, size); -+ bytes_read += size; -+ } -+ -+ return bytes_read; -+} -+EXPORT_SYMBOL(mlxsw_env_get_module_eeprom_by_page); -+ - static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core, - u8 module, - bool *p_has_temp_sensor) -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -index 2b23f8a87862..0bf5bd0f8a7e 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -@@ -4,6 +4,8 @@ - #ifndef _MLXSW_CORE_ENV_H - #define _MLXSW_CORE_ENV_H - -+#include -+ - struct ethtool_modinfo; - struct ethtool_eeprom; - -@@ -17,6 +19,11 @@ int mlxsw_env_get_module_eeprom(struct net_device *netdev, - struct mlxsw_core *mlxsw_core, int module, - struct ethtool_eeprom *ee, u8 *data); - -+int -+mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack); -+ - int - mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module, - u64 *p_counter); -diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -index 443dc44452ef..af4c9b44d9cf 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -@@ -112,10 +112,23 @@ mlxsw_m_get_module_eeprom(struct net_device *netdev, struct ethtool_eeprom *ee, - ee, data); - } - -+static int -+mlxsw_m_get_module_eeprom_by_page(struct net_device *netdev, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlxsw_m_port *mlxsw_m_port = netdev_priv(netdev); -+ struct mlxsw_core *core = mlxsw_m_port->mlxsw_m->core; -+ -+ return mlxsw_env_get_module_eeprom_by_page(core, mlxsw_m_port->module, -+ page, extack); -+} -+ - static const struct ethtool_ops mlxsw_m_port_ethtool_ops = { - .get_drvinfo = mlxsw_m_module_get_drvinfo, - .get_module_info = mlxsw_m_get_module_info, - .get_module_eeprom = mlxsw_m_get_module_eeprom, -+ .get_module_eeprom_by_page = mlxsw_m_get_module_eeprom_by_page, - }; - - static int -diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c -index 68333ecf6151..369b9d0dc5d4 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_ethtool.c -@@ -1053,6 +1053,19 @@ static int mlxsw_sp_get_module_eeprom(struct net_device *netdev, - return err; - } - -+static int -+mlxsw_sp_get_module_eeprom_by_page(struct net_device *dev, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); -+ struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; -+ u8 module = mlxsw_sp_port->mapping.module; -+ -+ return mlxsw_env_get_module_eeprom_by_page(mlxsw_sp->core, module, page, -+ extack); -+} -+ - static int - mlxsw_sp_get_ts_info(struct net_device *netdev, struct ethtool_ts_info *info) - { -@@ -1063,20 +1076,21 @@ mlxsw_sp_get_ts_info(struct net_device *netdev, struct ethtool_ts_info *info) - } - - const struct ethtool_ops mlxsw_sp_port_ethtool_ops = { -- .get_drvinfo = mlxsw_sp_port_get_drvinfo, -- .get_link = ethtool_op_get_link, -- .get_link_ext_state = mlxsw_sp_port_get_link_ext_state, -- .get_pauseparam = mlxsw_sp_port_get_pauseparam, -- .set_pauseparam = mlxsw_sp_port_set_pauseparam, -- .get_strings = mlxsw_sp_port_get_strings, -- .set_phys_id = mlxsw_sp_port_set_phys_id, -- .get_ethtool_stats = mlxsw_sp_port_get_stats, -- .get_sset_count = mlxsw_sp_port_get_sset_count, -- .get_link_ksettings = mlxsw_sp_port_get_link_ksettings, -- .set_link_ksettings = mlxsw_sp_port_set_link_ksettings, -- .get_module_info = mlxsw_sp_get_module_info, -- .get_module_eeprom = mlxsw_sp_get_module_eeprom, -- .get_ts_info = mlxsw_sp_get_ts_info, -+ .get_drvinfo = mlxsw_sp_port_get_drvinfo, -+ .get_link = ethtool_op_get_link, -+ .get_link_ext_state = mlxsw_sp_port_get_link_ext_state, -+ .get_pauseparam = mlxsw_sp_port_get_pauseparam, -+ .set_pauseparam = mlxsw_sp_port_set_pauseparam, -+ .get_strings = mlxsw_sp_port_get_strings, -+ .set_phys_id = mlxsw_sp_port_set_phys_id, -+ .get_ethtool_stats = mlxsw_sp_port_get_stats, -+ .get_sset_count = mlxsw_sp_port_get_sset_count, -+ .get_link_ksettings = mlxsw_sp_port_get_link_ksettings, -+ .set_link_ksettings = mlxsw_sp_port_set_link_ksettings, -+ .get_module_info = mlxsw_sp_get_module_info, -+ .get_module_eeprom = mlxsw_sp_get_module_eeprom, -+ .get_module_eeprom_by_page = mlxsw_sp_get_module_eeprom_by_page, -+ .get_ts_info = mlxsw_sp_get_ts_info, - }; - - struct mlxsw_sp1_port_link_mode { --- -2.20.1 - diff --git a/patch/0026-platform-mellanox-mlx-platform-Introduce-ACPI-init-f.patch b/patch/0026-platform-mellanox-mlx-platform-Introduce-ACPI-init-f.patch new file mode 100644 index 000000000000..3a2bae4a6b02 --- /dev/null +++ b/patch/0026-platform-mellanox-mlx-platform-Introduce-ACPI-init-f.patch @@ -0,0 +1,55 @@ +From 003ecc1dc963e5bc53be9796139431e3189f31c2 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 08:53:07 +0000 +Subject: [PATH backport v6.1 26/32] platform: mellanox: mlx-platform: + Introduce ACPI init flow + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39643.html + +Introduce support for ACPI initialization flow - add ACPI match hook. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 73f887614e04..feedfba0acf3 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -6396,9 +6396,14 @@ static int mlxplat_probe(struct platform_device *pdev) + { + unsigned int hotplug_resources_size = 0; + struct resource *hotplug_resources = NULL; ++ struct acpi_device *acpi_dev; + struct mlxplat_priv *priv; + int i, err; + ++ acpi_dev = ACPI_COMPANION(&pdev->dev); ++ if (acpi_dev) ++ mlxplat_dev = pdev; ++ + err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size); + if (err) + return err; +@@ -6476,9 +6481,16 @@ static int mlxplat_remove(struct platform_device *pdev) + return 0; + } + ++static const struct acpi_device_id mlxplat_acpi_table[] = { ++ { "MLNXBF49", 0 }, ++ {} ++}; ++MODULE_DEVICE_TABLE(acpi, mlxplat_acpi_table); ++ + static struct platform_driver mlxplat_driver = { + .driver = { + .name = "mlxplat", ++ .acpi_match_table = ACPI_PTR(mlxplat_acpi_table), + .probe_type = PROBE_FORCE_SYNCHRONOUS, + }, + .probe = mlxplat_probe, +-- +2.20.1 + diff --git a/patch/0027-ethtool-Decrease-size-of-module-EEPROM-get-policy-ar.patch b/patch/0027-ethtool-Decrease-size-of-module-EEPROM-get-policy-ar.patch deleted file mode 100644 index 51e2b23f5820..000000000000 --- a/patch/0027-ethtool-Decrease-size-of-module-EEPROM-get-policy-ar.patch +++ /dev/null @@ -1,31 +0,0 @@ -From 9de352f9a4b7575e8934eb000b1cf388520020e5 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Tue, 22 Jun 2021 09:50:48 +0300 -Subject: [PATCH backport 5.10 027/182] ethtool: Decrease size of module EEPROM - get policy array - -The 'ETHTOOL_A_MODULE_EEPROM_DATA' attribute is not part of the get -request. - -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - net/ethtool/netlink.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/net/ethtool/netlink.h b/net/ethtool/netlink.h -index 4a07fc93c5cc..28dbd582c860 100644 ---- a/net/ethtool/netlink.h -+++ b/net/ethtool/netlink.h -@@ -379,7 +379,7 @@ extern const struct nla_policy ethnl_tsinfo_get_policy[ETHTOOL_A_TSINFO_HEADER + - extern const struct nla_policy ethnl_cable_test_act_policy[ETHTOOL_A_CABLE_TEST_HEADER + 1]; - extern const struct nla_policy ethnl_cable_test_tdr_act_policy[ETHTOOL_A_CABLE_TEST_TDR_CFG + 1]; - extern const struct nla_policy ethnl_tunnel_info_get_policy[ETHTOOL_A_TUNNEL_INFO_HEADER + 1]; --extern const struct nla_policy ethnl_module_eeprom_get_policy[ETHTOOL_A_MODULE_EEPROM_DATA + 1]; -+extern const struct nla_policy ethnl_module_eeprom_get_policy[ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS + 1]; - - int ethnl_set_linkinfo(struct sk_buff *skb, struct genl_info *info); - int ethnl_set_linkmodes(struct sk_buff *skb, struct genl_info *info); --- -2.20.1 - diff --git a/patch/0027-platform-mellanox-mlx-platform-Get-interrupt-line-th.patch b/patch/0027-platform-mellanox-mlx-platform-Get-interrupt-line-th.patch new file mode 100644 index 000000000000..d98f9a44ba3a --- /dev/null +++ b/patch/0027-platform-mellanox-mlx-platform-Get-interrupt-line-th.patch @@ -0,0 +1,74 @@ +From 7f7f1a8c4df413bc1faf50d4f5cd77f3f5f19796 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 10:10:52 +0000 +Subject: [PATH backport v6.1 27/32] platform: mellanox: mlx-platform: Get + interrupt line through ACPI + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39645.html + +Add support for getting system interrupt line from ACPI table. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index feedfba0acf3..3eccb6628ccc 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -343,6 +343,7 @@ + * @hotplug_resources: system hotplug resources + * @hotplug_resources_size: size of system hotplug resources + * @hi2c_main_init_status: init status of I2C main bus ++ * @irq_fpga: FPGA IRQ number + */ + struct mlxplat_priv { + struct platform_device *pdev_i2c; +@@ -356,6 +357,7 @@ struct mlxplat_priv { + struct resource *hotplug_resources; + unsigned int hotplug_resources_size; + u8 i2c_main_init_status; ++ int irq_fpga; + }; + + static struct platform_device *mlxplat_dev; +@@ -6188,6 +6190,8 @@ static int mlxplat_post_init(struct mlxplat_priv *priv) + /* Add hotplug driver */ + if (mlxplat_hotplug) { + mlxplat_hotplug->regmap = priv->regmap; ++ if (priv->irq_fpga) ++ mlxplat_hotplug->irq = priv->irq_fpga; + priv->pdev_hotplug = + platform_device_register_resndata(&mlxplat_dev->dev, + "mlxreg-hotplug", PLATFORM_DEVID_NONE, +@@ -6398,11 +6402,15 @@ static int mlxplat_probe(struct platform_device *pdev) + struct resource *hotplug_resources = NULL; + struct acpi_device *acpi_dev; + struct mlxplat_priv *priv; +- int i, err; ++ int irq_fpga = 0, i, err; + + acpi_dev = ACPI_COMPANION(&pdev->dev); +- if (acpi_dev) ++ if (acpi_dev) { ++ irq_fpga = acpi_dev_gpio_irq_get(acpi_dev, 0); ++ if (irq_fpga < 0) ++ return -ENODEV; + mlxplat_dev = pdev; ++ } + + err = mlxplat_pre_init(&hotplug_resources, &hotplug_resources_size); + if (err) +@@ -6417,6 +6425,7 @@ static int mlxplat_probe(struct platform_device *pdev) + platform_set_drvdata(mlxplat_dev, priv); + priv->hotplug_resources = hotplug_resources; + priv->hotplug_resources_size = hotplug_resources_size; ++ priv->irq_fpga = irq_fpga; + + if (!mlxplat_regmap_config) + mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config; +-- +2.20.1 + diff --git a/patch/0028-ethtool-Use-kernel-data-types-for-internal-EEPROM-st.patch b/patch/0028-ethtool-Use-kernel-data-types-for-internal-EEPROM-st.patch deleted file mode 100644 index 39c905997a11..000000000000 --- a/patch/0028-ethtool-Use-kernel-data-types-for-internal-EEPROM-st.patch +++ /dev/null @@ -1,43 +0,0 @@ -From e6b7a06472dd05d7eb4d8daec023534223e6772f Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Tue, 22 Jun 2021 09:50:50 +0300 -Subject: [PATCH backport 5.10 028/182] ethtool: Use kernel data types for - internal EEPROM struct - -The struct is not visible to user space and therefore should not use the -user visible data types. - -Instead, use internal data types like other structures in the file. - -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - include/linux/ethtool.h | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - -diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h -index 4d199de36e02..dbabd804b2cb 100644 ---- a/include/linux/ethtool.h -+++ b/include/linux/ethtool.h -@@ -276,12 +276,12 @@ struct ethtool_pause_stats { - * required information to the driver. - */ - struct ethtool_module_eeprom { -- __u32 offset; -- __u32 length; -- __u8 page; -- __u8 bank; -- __u8 i2c_address; -- __u8 *data; -+ u32 offset; -+ u32 length; -+ u8 page; -+ u8 bank; -+ u8 i2c_address; -+ u8 *data; - }; - - /** --- -2.20.1 - diff --git a/patch/0028-platform-mellanox-Add-initial-support-for-PCIe-based.patch b/patch/0028-platform-mellanox-Add-initial-support-for-PCIe-based.patch new file mode 100644 index 000000000000..1e38c81d38a8 --- /dev/null +++ b/patch/0028-platform-mellanox-Add-initial-support-for-PCIe-based.patch @@ -0,0 +1,221 @@ +From c3e2605f6350ab19e38352e4c8b3b78621bf8a2f Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 30 Jul 2023 21:17:07 +0000 +Subject: [PATH backport v6.1 28/32] platform: mellanox: Add initial support + for PCIe based programming logic device + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39644.html + +Extend driver to support logic implemented by FPGA device connected +through PCIe bus. + +The motivation two support new generation of Nvidia COME module +equipped with Lattice LFD2NX-40 FPGA device. + +In order to support new Nvidia COME module FPGA device driver +initialization flow is modified. In case FPGA device is detected, +system resources are to be mapped to this device, otherwise system +resources are to be mapped same as it has been done before for Lattice +LPC based CPLD. + +FPGA device is associated with three PCIe devices: +- PCIe-LPC bridge for main register space access. +- PCIe-I2C bridge for I2C controller access. +- PCIe-JTAG bridge for JTAG access. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/x86/mlx-platform.c | 134 +++++++++++++++++++++++++++- + 1 file changed, 132 insertions(+), 2 deletions(-) + +diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c +index 3eccb6628ccc..44f107965832 100644 +--- a/drivers/platform/x86/mlx-platform.c ++++ b/drivers/platform/x86/mlx-platform.c +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -331,6 +332,12 @@ + #define MLXPLAT_I2C_MAIN_BUS_NOTIFIED 0x01 + #define MLXPLAT_I2C_MAIN_BUS_HANDLE_CREATED 0x02 + ++/* Lattice FPGA PCI configuration */ ++#define PCI_VENDOR_ID_LATTICE 0x1204 ++#define PCI_DEVICE_ID_LATTICE_I2C_BRIDGE 0x9c2f ++#define PCI_DEVICE_ID_LATTICE_JTAG_BRIDGE 0x9c30 ++#define PCI_DEVICE_ID_LATTICE_LPC_BRIDGE 0x9c32 ++ + /* mlxplat_priv - platform private data + * @pdev_i2c - i2c controller platform device + * @pdev_mux - array of mux platform devices +@@ -362,6 +369,7 @@ struct mlxplat_priv { + + static struct platform_device *mlxplat_dev; + static int mlxplat_i2c_main_complition_notify(void *handle, int id); ++static void __iomem *i2c_bridge_addr, *jtag_bridge_addr; + + /* Regions for LPC I2C controller and LPC base register space */ + static const struct resource mlxplat_lpc_resources[] = { +@@ -5544,6 +5552,9 @@ static struct mlxreg_core_platform_data *mlxplat_fan; + static struct mlxreg_core_platform_data + *mlxplat_wd_data[MLXPLAT_CPLD_WD_MAX_DEVS]; + static const struct regmap_config *mlxplat_regmap_config; ++static struct pci_dev *lpc_bridge; ++static struct pci_dev *i2c_bridge; ++static struct pci_dev *jtag_bridge; + + /* Platform default reset function */ + static int mlxplat_reboot_notifier(struct notifier_block *nb, unsigned long action, void *unused) +@@ -6172,15 +6183,131 @@ static void mlxplat_lpc_cpld_device_exit(void) + { + } + ++static int ++mlxplat_pci_fpga_device_init(unsigned int device, const char *res_name, struct pci_dev **pci_bridge, ++ void __iomem **pci_bridge_addr) ++{ ++ void __iomem *pci_mem_addr; ++ struct pci_dev *pci_dev; ++ int err; ++ ++ pci_dev = pci_get_device(PCI_VENDOR_ID_LATTICE, device, NULL); ++ if (!pci_dev) ++ return -ENODEV; ++ ++ err = pci_enable_device(pci_dev); ++ if (err) { ++ dev_err(&pci_dev->dev, "pci_enable_device failed with error %d\n", err); ++ goto fail_pci_enable_device; ++ } ++ ++ err = pci_request_region(pci_dev, 0, res_name); ++ if (err) { ++ dev_err(&pci_dev->dev, "pci_request_regions failed with error %d\n", err); ++ goto fail_pci_request_regions; ++ } ++ ++ err = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(64)); ++ if (err) { ++ err = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); ++ if (err) { ++ dev_err(&pci_dev->dev, "dma_set_mask failed with error %d\n", err); ++ goto fail_pci_set_dma_mask; ++ } ++ } ++ ++ pci_set_master(pci_dev); ++ ++ pci_mem_addr = devm_ioremap(&pci_dev->dev, pci_resource_start(pci_dev, 0), ++ pci_resource_len(pci_dev, 0)); ++ if (!pci_mem_addr) { ++ dev_err(&mlxplat_dev->dev, "ioremap failed\n"); ++ err = -EIO; ++ goto fail_ioremap; ++ } ++ ++ *pci_bridge = pci_dev; ++ *pci_bridge_addr = pci_mem_addr; ++ ++ return 0; ++ ++fail_ioremap: ++fail_pci_set_dma_mask: ++ pci_release_regions(pci_dev); ++fail_pci_request_regions: ++ pci_disable_device(pci_dev); ++fail_pci_enable_device: ++ return err; ++} ++ ++static void ++mlxplat_pci_fpga_device_exit(struct pci_dev *pci_bridge, ++ void __iomem *pci_bridge_addr) ++{ ++ iounmap(pci_bridge_addr); ++ pci_release_regions(pci_bridge); ++ pci_disable_device(pci_bridge); ++} ++ ++static int ++mlxplat_pci_fpga_devices_init(struct resource **hotplug_resources, ++ unsigned int *hotplug_resources_size) ++{ ++ int err; ++ ++ err = mlxplat_pci_fpga_device_init(PCI_DEVICE_ID_LATTICE_LPC_BRIDGE, ++ "mlxplat_lpc_bridge", &lpc_bridge, ++ &mlxplat_mlxcpld_regmap_ctx.base); ++ if (err) ++ goto mlxplat_pci_fpga_device_init_lpc_fail; ++ ++ err = mlxplat_pci_fpga_device_init(PCI_DEVICE_ID_LATTICE_I2C_BRIDGE, ++ "mlxplat_i2c_bridge", &i2c_bridge, ++ &i2c_bridge_addr); ++ if (err) ++ goto mlxplat_pci_fpga_device_init_i2c_fail; ++ ++ err = mlxplat_pci_fpga_device_init(PCI_DEVICE_ID_LATTICE_JTAG_BRIDGE, ++ "mlxplat_jtag_bridge", &jtag_bridge, ++ &jtag_bridge_addr); ++ if (err) ++ goto mlxplat_pci_fpga_device_init_jtag_fail; ++ ++ return 0; ++ ++mlxplat_pci_fpga_device_init_jtag_fail: ++ mlxplat_pci_fpga_device_exit(i2c_bridge, i2c_bridge_addr); ++mlxplat_pci_fpga_device_init_i2c_fail: ++ mlxplat_pci_fpga_device_exit(lpc_bridge, mlxplat_mlxcpld_regmap_ctx.base); ++mlxplat_pci_fpga_device_init_lpc_fail: ++ return err; ++} ++ ++static void mlxplat_pci_fpga_devices_exit(void) ++{ ++ mlxplat_pci_fpga_device_exit(jtag_bridge, jtag_bridge_addr); ++ mlxplat_pci_fpga_device_exit(i2c_bridge, i2c_bridge_addr); ++ mlxplat_pci_fpga_device_exit(lpc_bridge, mlxplat_mlxcpld_regmap_ctx.base); ++} ++ + static int + mlxplat_pre_init(struct resource **hotplug_resources, unsigned int *hotplug_resources_size) + { +- return mlxplat_lpc_cpld_device_init(hotplug_resources, hotplug_resources_size); ++ int err; ++ ++ err = mlxplat_pci_fpga_devices_init(hotplug_resources, hotplug_resources_size); ++ if (err == -ENODEV) ++ return mlxplat_lpc_cpld_device_init(hotplug_resources, hotplug_resources_size); ++ ++ return err; + } + + static void mlxplat_post_exit(void) + { +- mlxplat_lpc_cpld_device_exit(); ++ if (lpc_bridge) ++ mlxplat_pci_fpga_devices_exit(); ++ else ++ mlxplat_lpc_cpld_device_exit(); + } + + static int mlxplat_post_init(struct mlxplat_priv *priv) +@@ -6366,6 +6493,9 @@ static int mlxplat_i2c_main_init(struct mlxplat_priv *priv) + mlxplat_i2c->regmap = priv->regmap; + mlxplat_i2c->handle = priv; + ++ /* Set mapped base address of I2C-LPC bridge over PCIe */ ++ if (lpc_bridge) ++ mlxplat_i2c->addr = i2c_bridge_addr; + priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld", + nr, priv->hotplug_resources, + priv->hotplug_resources_size, +-- +2.20.1 + diff --git a/patch/0029-ethtool-Validate-module-EEPROM-length-as-part-of-pol.patch b/patch/0029-ethtool-Validate-module-EEPROM-length-as-part-of-pol.patch deleted file mode 100644 index a383cc9c4013..000000000000 --- a/patch/0029-ethtool-Validate-module-EEPROM-length-as-part-of-pol.patch +++ /dev/null @@ -1,49 +0,0 @@ -From fcd35def3bc31428ecc63e8c5f2e8c3c7b61ba9f Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Tue, 22 Jun 2021 09:50:51 +0300 -Subject: [PATCH backport 5.10 029/182] ethtool: Validate module EEPROM length - as part of policy - -Validate the number of bytes to read from the module EEPROM as part of -the netlink policy and remove the corresponding check from the code. - -This also makes it possible to query the length range from user space: - - $ genl ctrl policy name ethtool - ... - ID: 0x14 policy[32]:attr[3]: type=U32 range:[1,128] - ... - -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - net/ethtool/eeprom.c | 6 ++---- - 1 file changed, 2 insertions(+), 4 deletions(-) - -diff --git a/net/ethtool/eeprom.c b/net/ethtool/eeprom.c -index 1a49c133d401..a08fc04bcfd2 100644 ---- a/net/ethtool/eeprom.c -+++ b/net/ethtool/eeprom.c -@@ -144,9 +144,6 @@ static int eeprom_parse_request(struct ethnl_req_info *req_info, struct nlattr * - request->offset = nla_get_u32(tb[ETHTOOL_A_MODULE_EEPROM_OFFSET]); - request->length = nla_get_u32(tb[ETHTOOL_A_MODULE_EEPROM_LENGTH]); - -- if (!request->length) -- return -EINVAL; -- - /* The following set of conditions limit the API to only dump 1/2 - * EEPROM page without crossing low page boundary located at offset 128. - * This means user may only request dumps of length limited to 128 from -@@ -222,7 +219,8 @@ const struct ethnl_request_ops ethnl_module_eeprom_request_ops = { - const struct nla_policy ethnl_module_eeprom_get_policy[] = { - [ETHTOOL_A_MODULE_EEPROM_HEADER] = NLA_POLICY_NESTED(ethnl_header_policy), - [ETHTOOL_A_MODULE_EEPROM_OFFSET] = { .type = NLA_U32 }, -- [ETHTOOL_A_MODULE_EEPROM_LENGTH] = { .type = NLA_U32 }, -+ [ETHTOOL_A_MODULE_EEPROM_LENGTH] = -+ NLA_POLICY_RANGE(NLA_U32, 1, ETH_MODULE_EEPROM_PAGE_LEN), - [ETHTOOL_A_MODULE_EEPROM_PAGE] = { .type = NLA_U8 }, - [ETHTOOL_A_MODULE_EEPROM_BANK] = { .type = NLA_U8 }, - [ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS] = --- -2.20.1 - diff --git a/patch/0029-platform-mellanox-mlxreg-hotplug-Extend-condition-fo.patch b/patch/0029-platform-mellanox-mlxreg-hotplug-Extend-condition-fo.patch new file mode 100644 index 000000000000..cb00d56a1895 --- /dev/null +++ b/patch/0029-platform-mellanox-mlxreg-hotplug-Extend-condition-fo.patch @@ -0,0 +1,35 @@ +From 4c391b315de93194876fb0a5a3faf6b02becf776 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 19 Mar 2023 15:04:26 +0000 +Subject: [PATH backport v6.1 29/32] platform/mellanox: mlxreg-hotplug: Extend + condition for notification callback processing + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39646.html + +Allow processing of notification callback in routine +mlxreg_hotplug_device_create() in case hotplug object is configured +with action "MLXREG_HOTPLUG_DEVICE_NO_ACTION" in case no I2C parent bus +is specified. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/platform/mellanox/mlxreg-hotplug.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/platform/mellanox/mlxreg-hotplug.c b/drivers/platform/mellanox/mlxreg-hotplug.c +index 117bc3f395fd..4936cf158ac8 100644 +--- a/drivers/platform/mellanox/mlxreg-hotplug.c ++++ b/drivers/platform/mellanox/mlxreg-hotplug.c +@@ -113,7 +113,7 @@ static int mlxreg_hotplug_device_create(struct mlxreg_hotplug_priv_data *priv, + * Return if adapter number is negative. It could be in case hotplug + * event is not associated with hotplug device. + */ +- if (data->hpdev.nr < 0) ++ if (data->hpdev.nr < 0 && data->hpdev.action != MLXREG_HOTPLUG_DEVICE_NO_ACTION) + return 0; + + pdata = dev_get_platdata(&priv->pdev->dev); +-- +2.20.1 + diff --git a/patch/0030-ethtool-Validate-module-EEPROM-offset-as-part-of-pol.patch b/patch/0030-ethtool-Validate-module-EEPROM-offset-as-part-of-pol.patch deleted file mode 100644 index 20c0ded341bc..000000000000 --- a/patch/0030-ethtool-Validate-module-EEPROM-offset-as-part-of-pol.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 51dcef46e453de30ef187afd4e7086d3af2ea432 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Tue, 22 Jun 2021 09:50:52 +0300 -Subject: [PATCH backport 5.10 030/182] ethtool: Validate module EEPROM offset - as part of policy - -Validate the offset to read from module EEPROM as part of the netlink -policy and remove the corresponding check from the code. - -This also makes it possible to query the offset range from user space: - - $ genl ctrl policy name ethtool - ... - ID: 0x14 policy[32]:attr[2]: type=U32 range:[0,255] - ... - -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - net/ethtool/eeprom.c | 7 ++----- - 1 file changed, 2 insertions(+), 5 deletions(-) - -diff --git a/net/ethtool/eeprom.c b/net/ethtool/eeprom.c -index a08fc04bcfd2..937c08902c71 100644 ---- a/net/ethtool/eeprom.c -+++ b/net/ethtool/eeprom.c -@@ -162,10 +162,6 @@ static int eeprom_parse_request(struct ethnl_req_info *req_info, struct nlattr * - NL_SET_ERR_MSG_ATTR(extack, tb[ETHTOOL_A_MODULE_EEPROM_LENGTH], - "reading cross half page boundary is illegal"); - return -EINVAL; -- } else if (request->offset >= ETH_MODULE_EEPROM_PAGE_LEN * 2) { -- NL_SET_ERR_MSG_ATTR(extack, tb[ETHTOOL_A_MODULE_EEPROM_OFFSET], -- "offset is out of bounds"); -- return -EINVAL; - } else if (request->offset + request->length > ETH_MODULE_EEPROM_PAGE_LEN * 2) { - NL_SET_ERR_MSG_ATTR(extack, tb[ETHTOOL_A_MODULE_EEPROM_LENGTH], - "reading cross page boundary is illegal"); -@@ -218,7 +214,8 @@ const struct ethnl_request_ops ethnl_module_eeprom_request_ops = { - - const struct nla_policy ethnl_module_eeprom_get_policy[] = { - [ETHTOOL_A_MODULE_EEPROM_HEADER] = NLA_POLICY_NESTED(ethnl_header_policy), -- [ETHTOOL_A_MODULE_EEPROM_OFFSET] = { .type = NLA_U32 }, -+ [ETHTOOL_A_MODULE_EEPROM_OFFSET] = -+ NLA_POLICY_MAX(NLA_U32, ETH_MODULE_EEPROM_PAGE_LEN * 2 - 1), - [ETHTOOL_A_MODULE_EEPROM_LENGTH] = - NLA_POLICY_RANGE(NLA_U32, 1, ETH_MODULE_EEPROM_PAGE_LEN), - [ETHTOOL_A_MODULE_EEPROM_PAGE] = { .type = NLA_U8 }, --- -2.20.1 - diff --git a/patch/0285-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch b/patch/0030-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch similarity index 85% rename from patch/0285-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch rename to patch/0030-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch index 48204a3c39a8..25f2f962b0af 100644 --- a/patch/0285-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch +++ b/patch/0030-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch @@ -1,23 +1,24 @@ -From 6d9121cc262724d7a5fbc67f2c0be90fd95391d7 Mon Sep 17 00:00:00 2001 +From ddec9cfeb44ed194cadee824f3f49c057bf7a560 Mon Sep 17 00:00:00 2001 From: Michael Shych Date: Wed, 12 Jul 2023 14:26:38 +0000 -Subject: [PATCH backport v5.10.164 4/5] platform: mellanox: nvsw-sn2201: - change fans i2c busses. +Subject: [PATH backport v6.1 30/32] platform: mellanox: nvsw-sn2201: change + fans i2c busses. -Link: https://patchwork.kernel.org/project/platform-driver-x86/patch/20230814203406.12399-16-vadimp@nvidia.com/ +Link: https://www.spinics.net/lists/platform-driver-x86/msg39647.html Define the exact i2c bus (adapter number) of fans on the SN2201 system. This will cause fan's EEPROMs be connected already from nvsw-sn2201 platform driver and not from user space after receiving udev events. Signed-off-by: Michael Shych -Signed-off-by: Ciju Rajan K +Reviewed-by: Vadim Pasternak +Signed-off-by: Vadim Pasternak --- drivers/platform/mellanox/nvsw-sn2201.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/platform/mellanox/nvsw-sn2201.c b/drivers/platform/mellanox/nvsw-sn2201.c -index 51da240ce4f9..65b677690851 100644 +index 7b9c107c17ce..75b699676ca6 100644 --- a/drivers/platform/mellanox/nvsw-sn2201.c +++ b/drivers/platform/mellanox/nvsw-sn2201.c @@ -84,6 +84,10 @@ diff --git a/patch/0031-mlxsw-core_env-Read-module-temperature-thresholds-us.patch b/patch/0031-mlxsw-core_env-Read-module-temperature-thresholds-us.patch deleted file mode 100644 index 693e3a0be258..000000000000 --- a/patch/0031-mlxsw-core_env-Read-module-temperature-thresholds-us.patch +++ /dev/null @@ -1,74 +0,0 @@ -From b99eea2d9ce7ba73de38b82a7ed2057a777d4893 Mon Sep 17 00:00:00 2001 -From: Mykola Kostenok -Date: Tue, 8 Jun 2021 15:44:12 +0300 -Subject: [PATCH backport 5.10 031/182] mlxsw: core_env: Read module - temperature thresholds using MTMP register - -Currently, module temperature thresholds are obtained from Management -Cable Info Access (MCIA) register by specifying the thresholds offsets -within module EEPROM layout. This data does not pass validation and in -some cases can be unreliable. For example, due to some problem with the -module. - -Add support for a new feature provided by Management Temperature (MTMP) -register for sanitization of temperature thresholds values. - -Extend mlxsw_env_module_temp_thresholds_get() to get temperature -thresholds through MTMP field 'max_operational_temperature' - if it is -not zero, feature is supported. Otherwise fallback to old method and get -the thresholds through MCIA. - -Signed-off-by: Mykola Kostenok -Acked-by: Vadim Pasternak -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mellanox/mlxsw/core_env.c | 13 +++++++++++-- - 1 file changed, 11 insertions(+), 2 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index db85923547b0..4a0dbdb6730b 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -126,6 +126,7 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module, - int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, - int off, int *temp) - { -+ unsigned int module_temp, module_crit, module_emerg; - char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE]; - union { - u8 buf[MLXSW_REG_MCIA_TH_ITEM_SIZE]; -@@ -133,7 +134,6 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, - } temp_thresh; - char mcia_pl[MLXSW_REG_MCIA_LEN] = {0}; - char mtmp_pl[MLXSW_REG_MTMP_LEN]; -- unsigned int module_temp; - bool qsfp, cmis; - int page; - int err; -@@ -143,12 +143,21 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, - err = mlxsw_reg_query(core, MLXSW_REG(mtmp), mtmp_pl); - if (err) - return err; -- mlxsw_reg_mtmp_unpack(mtmp_pl, &module_temp, NULL, NULL, NULL, NULL); -+ mlxsw_reg_mtmp_unpack(mtmp_pl, &module_temp, NULL, &module_crit, -+ &module_emerg, NULL); - if (!module_temp) { - *temp = 0; - return 0; - } - -+ /* Validate if threshold reading is available through MTMP register, -+ * otherwise fallback to read through MCIA. -+ */ -+ if (module_emerg) { -+ *temp = off == SFP_TEMP_HIGH_WARN ? module_crit : module_emerg; -+ return 0; -+ } -+ - /* Read Free Side Device Temperature Thresholds from page 03h - * (MSB at lower byte address). - * Bytes: --- -2.20.1 - diff --git a/patch/0032-mlxsw-core_env-Avoid-unnecessary-memcpy-s.patch b/patch/0032-mlxsw-core_env-Avoid-unnecessary-memcpy-s.patch deleted file mode 100644 index 8e4ab4ac2c9d..000000000000 --- a/patch/0032-mlxsw-core_env-Avoid-unnecessary-memcpy-s.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 3aed771d128c6c2789da04ec0d09f11688d17855 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Thu, 24 Jun 2021 22:47:24 +0300 -Subject: [PATCH backport 5.10 032/182] mlxsw: core_env: Avoid unnecessary - memcpy()s - -Simply get a pointer to the data in the register payload instead of -copying it to a temporary buffer. - -Signed-off-by: Ido Schimmel -Reviewed-by: Jiri Pirko -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mellanox/mlxsw/core_env.c | 16 ++++++++-------- - 1 file changed, 8 insertions(+), 8 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index 4a0dbdb6730b..3713c45cfa1e 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -26,8 +26,8 @@ struct mlxsw_env { - static int mlxsw_env_validate_cable_ident(struct mlxsw_core *core, int id, - bool *qsfp, bool *cmis) - { -- char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE]; - char mcia_pl[MLXSW_REG_MCIA_LEN]; -+ char *eeprom_tmp; - u8 ident; - int err; - -@@ -36,7 +36,7 @@ static int mlxsw_env_validate_cable_ident(struct mlxsw_core *core, int id, - err = mlxsw_reg_query(core, MLXSW_REG(mcia), mcia_pl); - if (err) - return err; -- mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp); -+ eeprom_tmp = mlxsw_reg_mcia_eeprom_data(mcia_pl); - ident = eeprom_tmp[0]; - *cmis = false; - switch (ident) { -@@ -64,8 +64,8 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module, - u16 offset, u16 size, void *data, - bool qsfp, unsigned int *p_read_size) - { -- char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE]; - char mcia_pl[MLXSW_REG_MCIA_LEN]; -+ char *eeprom_tmp; - u16 i2c_addr; - u8 page = 0; - int status; -@@ -116,7 +116,7 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module, - if (status) - return -EIO; - -- mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp); -+ eeprom_tmp = mlxsw_reg_mcia_eeprom_data(mcia_pl); - memcpy(data, eeprom_tmp, size); - *p_read_size = size; - -@@ -127,13 +127,13 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, - int off, int *temp) - { - unsigned int module_temp, module_crit, module_emerg; -- char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE]; - union { - u8 buf[MLXSW_REG_MCIA_TH_ITEM_SIZE]; - u16 temp; - } temp_thresh; - char mcia_pl[MLXSW_REG_MCIA_LEN] = {0}; - char mtmp_pl[MLXSW_REG_MTMP_LEN]; -+ char *eeprom_tmp; - bool qsfp, cmis; - int page; - int err; -@@ -195,7 +195,7 @@ int mlxsw_env_module_temp_thresholds_get(struct mlxsw_core *core, int module, - if (err) - return err; - -- mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp); -+ eeprom_tmp = mlxsw_reg_mcia_eeprom_data(mcia_pl); - memcpy(temp_thresh.buf, eeprom_tmp, MLXSW_REG_MCIA_TH_ITEM_SIZE); - *temp = temp_thresh.temp * 1000; - -@@ -357,8 +357,8 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module, - device_addr = page->offset; - - while (bytes_read < page->length) { -- char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE]; - char mcia_pl[MLXSW_REG_MCIA_LEN]; -+ char *eeprom_tmp; - u8 size; - int err; - -@@ -380,7 +380,7 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module, - if (err) - return err; - -- mlxsw_reg_mcia_eeprom_memcpy_from(mcia_pl, eeprom_tmp); -+ eeprom_tmp = mlxsw_reg_mcia_eeprom_data(mcia_pl); - memcpy(page->data + bytes_read, eeprom_tmp, size); - bytes_read += size; - } --- -2.20.1 - diff --git a/patch/0032-platform_data-mlxreg-Add-field-with-mapped-resource-.patch b/patch/0032-platform_data-mlxreg-Add-field-with-mapped-resource-.patch new file mode 100644 index 000000000000..7ca1f62651e9 --- /dev/null +++ b/patch/0032-platform_data-mlxreg-Add-field-with-mapped-resource-.patch @@ -0,0 +1,37 @@ +From e24134a55160359b2763e42b650bf8473683627c Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 9 Nov 2022 09:43:28 +0200 +Subject: [PATCH backport 6.1.42 29/85] platform_data/mlxreg: Add field with + mapped resource address + +Add field with PCIe remapped based address for passing it across +relevant platform drivers sharing common system resources. + +Signed-off-by: Vadim Pasternak +--- + include/linux/platform_data/mlxreg.h | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/include/linux/platform_data/mlxreg.h b/include/linux/platform_data/mlxreg.h +index a6bd74e29b6b..0b9f81a6f753 100644 +--- a/include/linux/platform_data/mlxreg.h ++++ b/include/linux/platform_data/mlxreg.h +@@ -216,6 +216,7 @@ struct mlxreg_core_platform_data { + * @mask_low: low aggregation interrupt common mask; + * @deferred_nr: I2C adapter number must be exist prior probing execution; + * @shift_nr: I2C adapter numbers must be incremented by this value; ++ * @addr: mapped resource address; + * @handle: handle to be passed by callback; + * @completion_notify: callback to notify when platform driver probing is done; + */ +@@ -230,6 +231,7 @@ struct mlxreg_core_hotplug_platform_data { + u32 mask_low; + int deferred_nr; + int shift_nr; ++ void __iomem *addr; + void *handle; + int (*completion_notify)(void *handle, int id); + }; +-- +2.20.1 + diff --git a/patch/0033-i2c-mlxcpld-Allow-driver-to-run-on-ARM64-architectur.patch b/patch/0033-i2c-mlxcpld-Allow-driver-to-run-on-ARM64-architectur.patch new file mode 100644 index 000000000000..14135321bc17 --- /dev/null +++ b/patch/0033-i2c-mlxcpld-Allow-driver-to-run-on-ARM64-architectur.patch @@ -0,0 +1,29 @@ +From 836d88c01519a1a004e0c6138fb26a69a95e2ee8 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 7 Nov 2022 12:00:37 +0200 +Subject: [PATCH backport 6.1.42 33/85] i2c: mlxcpld: Allow driver to run on + ARM64 architecture + +Extend driver dependency by ARM64 architecture. + +Signed-off-by: Vadim Pasternak +--- + drivers/i2c/busses/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index e50f9603d189..9460528c0b1b 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -1363,7 +1363,7 @@ config I2C_ICY + + config I2C_MLXCPLD + tristate "Mellanox I2C driver" +- depends on X86_64 || COMPILE_TEST ++ depends on X86_64 || ARM64 || COMPILE_TEST + help + This exposes the Mellanox platform I2C busses to the linux I2C layer + for X86 based systems. +-- +2.20.1 + diff --git a/patch/0034-i2c-mlxcpld-Add-support-for-extended-transaction-len.patch b/patch/0034-i2c-mlxcpld-Add-support-for-extended-transaction-len.patch new file mode 100644 index 000000000000..268cf56a06f3 --- /dev/null +++ b/patch/0034-i2c-mlxcpld-Add-support-for-extended-transaction-len.patch @@ -0,0 +1,58 @@ +From 4b25a65a3e3b1ad6f2773295d3d749a7ae2c71a4 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 12:48:08 +0000 +Subject: [PATCH backport 6.1.42 34/85] i2c: mlxcpld: Add support for extended + transaction length for i2c-mlxcpld + +Add support for extended length of read and write transactions. +New FPGA logic allows to increase size of the read and write +transactions length. This feature is verified through capability +register 'CPBLTY_REG'. Two bits 5 and 6 of the register are used for +length capability detection. Value '10' indicates support of extended +transaction length - 128 bytes for read transactions and 132 for write +transactions. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/i2c/busses/i2c-mlxcpld.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c +index 081f51ef0551..14a63d5e1cdd 100644 +--- a/drivers/i2c/busses/i2c-mlxcpld.c ++++ b/drivers/i2c/busses/i2c-mlxcpld.c +@@ -22,6 +22,7 @@ + #define MLXCPLD_I2C_BUS_NUM 1 + #define MLXCPLD_I2C_DATA_REG_SZ 36 + #define MLXCPLD_I2C_DATA_SZ_BIT BIT(5) ++#define MLXCPLD_I2C_DATA_EXT2_SZ_BIT BIT(6) + #define MLXCPLD_I2C_DATA_SZ_MASK GENMASK(6, 5) + #define MLXCPLD_I2C_SMBUS_BLK_BIT BIT(7) + #define MLXCPLD_I2C_MAX_ADDR_LEN 4 +@@ -466,6 +467,13 @@ static const struct i2c_adapter_quirks mlxcpld_i2c_quirks_ext = { + .max_comb_1st_msg_len = 4, + }; + ++static const struct i2c_adapter_quirks mlxcpld_i2c_quirks_ext2 = { ++ .flags = I2C_AQ_COMB_WRITE_THEN_READ, ++ .max_read_len = (MLXCPLD_I2C_DATA_REG_SZ - 4) * 4, ++ .max_write_len = (MLXCPLD_I2C_DATA_REG_SZ - 4) * 4 + MLXCPLD_I2C_MAX_ADDR_LEN, ++ .max_comb_1st_msg_len = 4, ++}; ++ + static struct i2c_adapter mlxcpld_i2c_adapter = { + .owner = THIS_MODULE, + .name = "i2c-mlxcpld", +@@ -547,6 +555,8 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev) + /* Check support for extended transaction length */ + if ((val & MLXCPLD_I2C_DATA_SZ_MASK) == MLXCPLD_I2C_DATA_SZ_BIT) + mlxcpld_i2c_adapter.quirks = &mlxcpld_i2c_quirks_ext; ++ else if ((val & MLXCPLD_I2C_DATA_SZ_MASK) == MLXCPLD_I2C_DATA_EXT2_SZ_BIT) ++ mlxcpld_i2c_adapter.quirks = &mlxcpld_i2c_quirks_ext2; + /* Check support for smbus block transaction */ + if (val & MLXCPLD_I2C_SMBUS_BLK_BIT) + priv->smbus_block = true; +-- +2.20.1 + diff --git a/patch/0035-hwmon-pmbus-Increase-maximum-number-of-phases-per-pa.patch b/patch/0035-hwmon-pmbus-Increase-maximum-number-of-phases-per-pa.patch deleted file mode 100644 index 8c567981f9ff..000000000000 --- a/patch/0035-hwmon-pmbus-Increase-maximum-number-of-phases-per-pa.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 9a37a1e841f05b5a2f35728c6531411335c8db00 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Tue, 11 May 2021 08:56:17 +0300 -Subject: [PATCH backport 5.10 035/182] hwmon: (pmbus) Increase maximum number - of phases per page - -Increase maximum number of phases from 8 to 10 to support multi-phase -devices allowing up to 10 phases. - -Signed-off-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20210511055619.118104-2-vadimp@nvidia.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/pmbus/pmbus.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/hwmon/pmbus/pmbus.h b/drivers/hwmon/pmbus/pmbus.h -index c88ac5fd91f0..cb6dbe29c0bf 100644 ---- a/drivers/hwmon/pmbus/pmbus.h -+++ b/drivers/hwmon/pmbus/pmbus.h -@@ -376,7 +376,7 @@ enum pmbus_sensor_classes { - }; - - #define PMBUS_PAGES 32 /* Per PMBus specification */ --#define PMBUS_PHASES 8 /* Maximum number of phases per page */ -+#define PMBUS_PHASES 10 /* Maximum number of phases per page */ - - /* Functionality bit mask */ - #define PMBUS_HAVE_VIN BIT(0) --- -2.20.1 - diff --git a/patch/0035-i2c-mlxcpld-Support-PCIe-mapped-register-space.patch b/patch/0035-i2c-mlxcpld-Support-PCIe-mapped-register-space.patch new file mode 100644 index 000000000000..f173bbc60e76 --- /dev/null +++ b/patch/0035-i2c-mlxcpld-Support-PCIe-mapped-register-space.patch @@ -0,0 +1,184 @@ +From 94ecef5305797c5461b39715900b2d99048e6bb3 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 24 Jul 2023 12:39:33 +0000 +Subject: [PATCH backport 6.1.42 35/85] i2c: mlxcpld: Support PCIe mapped + register space + +Currently driver uses constant base address of register space. +On new systems this base address and access to it are different. + +On old it is space mapped to Low Pin Count bus and accessed through +port-mapped I/O. + +On new systems base address of the register space is mapped to PCIe +space and accessed through memory-mapped I/O. + +Use base address passed to the driver through platform data. + +Implement new routines for register space access, which is limited by +two bytes of transaction size. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + drivers/i2c/busses/i2c-mlxcpld.c | 94 +++++++++++++++++++++++++++++--- + 1 file changed, 86 insertions(+), 8 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c +index 14a63d5e1cdd..2ce2c324ea4f 100644 +--- a/drivers/i2c/busses/i2c-mlxcpld.c ++++ b/drivers/i2c/busses/i2c-mlxcpld.c +@@ -70,6 +70,7 @@ struct mlxcpld_i2c_curr_xfer { + struct mlxcpld_i2c_priv { + struct i2c_adapter adap; + u32 base_addr; ++ void __iomem *addr; + struct mutex lock; + struct mlxcpld_i2c_curr_xfer xfer; + struct device *dev; +@@ -77,7 +78,7 @@ struct mlxcpld_i2c_priv { + int polling_time; + }; + +-static void mlxcpld_i2c_lpc_write_buf(u8 *data, u8 len, u32 addr) ++static void mlxcpld_i2c_lpc_write_buf_ioport(u8 *data, u8 len, u32 addr) + { + int i; + +@@ -87,7 +88,7 @@ static void mlxcpld_i2c_lpc_write_buf(u8 *data, u8 len, u32 addr) + outb(*(data + i), addr + i); + } + +-static void mlxcpld_i2c_lpc_read_buf(u8 *data, u8 len, u32 addr) ++static void mlxcpld_i2c_lpc_read_buf_ioport(u8 *data, u8 len, u32 addr) + { + int i; + +@@ -97,8 +98,8 @@ static void mlxcpld_i2c_lpc_read_buf(u8 *data, u8 len, u32 addr) + *(data + i) = inb(addr + i); + } + +-static void mlxcpld_i2c_read_comm(struct mlxcpld_i2c_priv *priv, u8 offs, +- u8 *data, u8 datalen) ++static void mlxcpld_i2c_read_comm_ioport(struct mlxcpld_i2c_priv *priv, u8 offs, ++ u8 *data, u8 datalen) + { + u32 addr = priv->base_addr + offs; + +@@ -117,13 +118,13 @@ static void mlxcpld_i2c_read_comm(struct mlxcpld_i2c_priv *priv, u8 offs, + *((u32 *)data) = inl(addr); + break; + default: +- mlxcpld_i2c_lpc_read_buf(data, datalen, addr); ++ mlxcpld_i2c_lpc_read_buf_ioport(data, datalen, addr); + break; + } + } + +-static void mlxcpld_i2c_write_comm(struct mlxcpld_i2c_priv *priv, u8 offs, +- u8 *data, u8 datalen) ++static void mlxcpld_i2c_write_comm_ioport(struct mlxcpld_i2c_priv *priv, u8 offs, ++ u8 *data, u8 datalen) + { + u32 addr = priv->base_addr + offs; + +@@ -142,11 +143,85 @@ static void mlxcpld_i2c_write_comm(struct mlxcpld_i2c_priv *priv, u8 offs, + outl(*((u32 *)data), addr); + break; + default: +- mlxcpld_i2c_lpc_write_buf(data, datalen, addr); ++ mlxcpld_i2c_lpc_write_buf_ioport(data, datalen, addr); + break; + } + } + ++static void mlxcpld_i2c_lpc_write_buf_io(u8 *data, u8 len, void __iomem *addr) ++{ ++ int i; ++ ++ for (i = 0; i < len - len % 2; i += 2) ++ iowrite16(*(u16 *)(data + i), addr + i); ++ for (; i < len; ++i) ++ iowrite8(*(data + i), addr + i); ++} ++ ++static void mlxcpld_i2c_lpc_read_buf_io(u8 *data, u8 len, void __iomem *addr) ++{ ++ int i; ++ ++ for (i = 0; i < len - len % 2; i += 2) ++ *(u16 *)(data + i) = ioread16(addr + i); ++ for (; i < len; ++i) ++ *(data + i) = ioread8(addr + i); ++} ++ ++static void mlxcpld_i2c_read_comm_io(struct mlxcpld_i2c_priv *priv, u8 offs, ++ u8 *data, u8 datalen) ++{ ++ void __iomem *addr = priv->addr + offs; ++ ++ switch (datalen) { ++ case 1: ++ *(data) = ioread8(addr); ++ break; ++ case 2: ++ *((u16 *)data) = ioread16(addr); ++ break; ++ default: ++ mlxcpld_i2c_lpc_read_buf_io(data, datalen, addr); ++ break; ++ } ++} ++ ++static void mlxcpld_i2c_write_comm_io(struct mlxcpld_i2c_priv *priv, u8 offs, ++ u8 *data, u8 datalen) ++{ ++ void __iomem *addr = priv->addr + offs; ++ ++ switch (datalen) { ++ case 1: ++ iowrite8(*(data), addr); ++ break; ++ case 2: ++ iowrite16(*((u16 *)data), addr); ++ break; ++ default: ++ mlxcpld_i2c_lpc_write_buf_io(data, datalen, addr); ++ break; ++ } ++} ++ ++static void mlxcpld_i2c_write_comm(struct mlxcpld_i2c_priv *priv, u8 offs, ++ u8 *data, u8 datalen) ++{ ++ if (priv->addr) ++ mlxcpld_i2c_write_comm_io(priv, offs, data, datalen); ++ else ++ mlxcpld_i2c_write_comm_ioport(priv, offs, data, datalen); ++} ++ ++static void mlxcpld_i2c_read_comm(struct mlxcpld_i2c_priv *priv, u8 offs, ++ u8 *data, u8 datalen) ++{ ++ if (priv->addr) ++ mlxcpld_i2c_read_comm_io(priv, offs, data, datalen); ++ else ++ mlxcpld_i2c_read_comm_ioport(priv, offs, data, datalen); ++} ++ + /* + * Check validity of received i2c messages parameters. + * Returns 0 if OK, other - in case of invalid parameters. +@@ -543,6 +618,9 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev) + /* Set I2C bus frequency if platform data provides this info. */ + pdata = dev_get_platdata(&pdev->dev); + if (pdata) { ++ if (pdata->addr) ++ priv->addr = pdata->addr; ++ + err = mlxcpld_i2c_set_frequency(priv, pdata); + if (err) + goto mlxcpld_i2_probe_failed; +-- +2.20.1 + diff --git a/patch/0036-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2888-c.patch b/patch/0036-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2888-c.patch deleted file mode 100644 index caeafa7ec92c..000000000000 --- a/patch/0036-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2888-c.patch +++ /dev/null @@ -1,603 +0,0 @@ -From: Vadim Pasternak -Date: Tue, 11 May 2021 08:56:18 +0300 -Subject: 0036 hwmon: (pmbus) Add support for MPS Multi-phase - mp2888 controller - -Add support for mp2888 device from Monolithic Power Systems, Inc. (MPS) -vendor. This is a digital, multi-phase, pulse-width modulation -controller. - -This device supports: -- One power rail. -- Programmable Multi-Phase up to 10 Phases. -- PWM-VID Interface -- One pages 0 for telemetry. -- Programmable pins for PMBus Address. -- Built-In EEPROM to Store Custom Configurations. -- Can configured VOUT readout in direct or VID format and allows - setting of different formats on rails 1 and 2. For VID the following - protocols are available: VR13 mode with 5-mV DAC; VR13 mode with - 10-mV DAC, IMVP9 mode with 5-mV DAC. - -Signed-off-by: Vadim Pasternak -Reported-by: kernel test robot -Link: https://lore.kernel.org/r/20210511055619.118104-3-vadimp@nvidia.com -[groeck: Add MODULE_IMPORT_NS] -Signed-off-by: Guenter Roeck ---- - Documentation/hwmon/mp2888.rst | 113 +++++++++ - drivers/hwmon/pmbus/Kconfig | 9 + - drivers/hwmon/pmbus/Makefile | 1 + - drivers/hwmon/pmbus/mp2888.c | 408 +++++++++++++++++++++++++++++++++ - 4 files changed, 531 insertions(+) - create mode 100644 Documentation/hwmon/mp2888.rst - create mode 100644 drivers/hwmon/pmbus/mp2888.c - -diff --git a/Documentation/hwmon/mp2888.rst b/Documentation/hwmon/mp2888.rst -new file mode 100644 -index 000000000000..5e578fd7b147 ---- /dev/null -+++ b/Documentation/hwmon/mp2888.rst -@@ -0,0 +1,113 @@ -+.. SPDX-License-Identifier: GPL-2.0 -+ -+Kernel driver mp2888 -+==================== -+ -+Supported chips: -+ -+ * MPS MP12254 -+ -+ Prefix: 'mp2888' -+ -+Author: -+ -+ Vadim Pasternak -+ -+Description -+----------- -+ -+This driver implements support for Monolithic Power Systems, Inc. (MPS) -+vendor dual-loop, digital, multi-phase controller MP2888. -+ -+This device: supports: -+ -+- One power rail. -+- Programmable Multi-Phase up to 10 Phases. -+- PWM-VID Interface -+- One pages 0 for telemetry. -+- Programmable pins for PMBus Address. -+- Built-In EEPROM to Store Custom Configurations. -+ -+Device complaint with: -+ -+- PMBus rev 1.3 interface. -+ -+Device supports direct format for reading output current, output voltage, -+input and output power and temperature. -+Device supports linear format for reading input voltage and input power. -+ -+The driver provides the next attributes for the current: -+ -+- for current out input and maximum alarm; -+- for phase current: input and label. -+ -+The driver exports the following attributes via the 'sysfs' files, where: -+ -+- 'n' is number of configured phases (from 1 to 10); -+- index 1 for "iout"; -+- indexes 2 ... 1 + n for phases. -+ -+**curr[1-{1+n}]_input** -+ -+**curr[1-{1+n}]_label** -+ -+**curr1_max** -+ -+**curr1_max_alarm** -+ -+The driver provides the next attributes for the voltage: -+ -+- for voltage in: input, low and high critical thresholds, low and high -+ critical alarms; -+- for voltage out: input and high alarm; -+ -+The driver exports the following attributes via the 'sysfs' files, where -+ -+**in1_crit** -+ -+**in1_crit_alarm** -+ -+**in1_input** -+ -+**in1_label** -+ -+**in1_min** -+ -+**in1_min_alarm** -+ -+**in2_alarm** -+ -+**in2_input** -+ -+**in2_label** -+ -+The driver provides the next attributes for the power: -+ -+- for power in alarm and input. -+- for power out: cap, cap alarm an input. -+ -+The driver exports the following attributes via the 'sysfs' files, where -+- indexes 1 for "pin"; -+- indexes 2 for "pout"; -+ -+**power1_alarm** -+ -+**power1_input** -+ -+**power1_label** -+ -+**power2_input** -+ -+**power2_label** -+ -+**power2_max** -+ -+**power2_max_alarm** -+ -+The driver provides the next attributes for the temperature: -+ -+**temp1_input** -+ -+**temp1_max** -+ -+**temp1_max_alarm** -diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig -index 91a7ce9df6f5..1c887540f33d 100644 ---- a/drivers/hwmon/pmbus/Kconfig -+++ b/drivers/hwmon/pmbus/Kconfig -@@ -221,6 +221,15 @@ config SENSORS_MAX8688 - This driver can also be built as a module. If so, the module will - be called max8688. - -+config SENSORS_MP2888 -+ tristate "MPS MP2888" -+ help -+ If you say yes here you get hardware monitoring support for MPS -+ MP2888 Digital, Multi-Phase, Pulse-Width Modulation Controller. -+ -+ This driver can also be built as a module. If so, the module will -+ be called mp2888. -+ - config SENSORS_MP2975 - tristate "MPS MP2975" - help -diff --git a/drivers/hwmon/pmbus/Makefile b/drivers/hwmon/pmbus/Makefile -index 925f4901b5f4..70d8f9043c23 100644 ---- a/drivers/hwmon/pmbus/Makefile -+++ b/drivers/hwmon/pmbus/Makefile -@@ -25,6 +25,7 @@ obj-$(CONFIG_SENSORS_MAX31785) += max31785.o - obj-$(CONFIG_SENSORS_MAX34440) += max34440.o - obj-$(CONFIG_SENSORS_DNI_DPS460) += dni_dps460.o - obj-$(CONFIG_SENSORS_MAX8688) += max8688.o -+obj-$(CONFIG_SENSORS_MP2888) += mp2888.o - obj-$(CONFIG_SENSORS_MP2975) += mp2975.o - obj-$(CONFIG_SENSORS_PXE1610) += pxe1610.o - obj-$(CONFIG_SENSORS_TPS40422) += tps40422.o -diff --git a/drivers/hwmon/pmbus/mp2888.c b/drivers/hwmon/pmbus/mp2888.c -new file mode 100644 -index 000000000000..8ecd4adfef40 ---- /dev/null -+++ b/drivers/hwmon/pmbus/mp2888.c -@@ -0,0 +1,408 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Hardware monitoring driver for MPS Multi-phase Digital VR Controllers -+ * -+ * Copyright (C) 2020 Nvidia Technologies Ltd. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "pmbus.h" -+ -+/* Vendor specific registers. */ -+#define MP2888_MFR_SYS_CONFIG 0x44 -+#define MP2888_MFR_READ_CS1_2 0x73 -+#define MP2888_MFR_READ_CS3_4 0x74 -+#define MP2888_MFR_READ_CS5_6 0x75 -+#define MP2888_MFR_READ_CS7_8 0x76 -+#define MP2888_MFR_READ_CS9_10 0x77 -+#define MP2888_MFR_VR_CONFIG1 0xe1 -+ -+#define MP2888_TOTAL_CURRENT_RESOLUTION BIT(3) -+#define MP2888_PHASE_CURRENT_RESOLUTION BIT(4) -+#define MP2888_DRMOS_KCS GENMASK(2, 0) -+#define MP2888_TEMP_UNIT 10 -+#define MP2888_MAX_PHASE 10 -+ -+struct mp2888_data { -+ struct pmbus_driver_info info; -+ int total_curr_resolution; -+ int phase_curr_resolution; -+ int curr_sense_gain; -+}; -+ -+#define to_mp2888_data(x) container_of(x, struct mp2888_data, info) -+ -+static int mp2888_read_byte_data(struct i2c_client *client, int page, int reg) -+{ -+ switch (reg) { -+ case PMBUS_VOUT_MODE: -+ /* Enforce VOUT direct format. */ -+ return PB_VOUT_MODE_DIRECT; -+ default: -+ return -ENODATA; -+ } -+} -+ -+static int -+mp2888_current_sense_gain_and_resolution_get(struct i2c_client *client, struct mp2888_data *data) -+{ -+ int ret; -+ -+ /* -+ * Obtain DrMOS current sense gain of power stage from the register -+ * , bits 0-2. The value is selected as below: -+ * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. Other -+ * values are reserved. -+ */ -+ ret = i2c_smbus_read_word_data(client, MP2888_MFR_SYS_CONFIG); -+ if (ret < 0) -+ return ret; -+ -+ switch (ret & MP2888_DRMOS_KCS) { -+ case 0: -+ data->curr_sense_gain = 85; -+ break; -+ case 1: -+ data->curr_sense_gain = 97; -+ break; -+ case 2: -+ data->curr_sense_gain = 100; -+ break; -+ case 3: -+ data->curr_sense_gain = 50; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ /* -+ * Obtain resolution selector for total and phase current report and protection. -+ * 0: original resolution; 1: half resolution (in such case phase current value should -+ * be doubled. -+ */ -+ data->total_curr_resolution = (ret & MP2888_TOTAL_CURRENT_RESOLUTION) >> 3; -+ data->phase_curr_resolution = (ret & MP2888_PHASE_CURRENT_RESOLUTION) >> 4; -+ -+ return 0; -+} -+ -+static int -+mp2888_read_phase(struct i2c_client *client, struct mp2888_data *data, int page, int phase, u8 reg) -+{ -+ int ret; -+ -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ if (ret < 0) -+ return ret; -+ -+ if (!((phase + 1) % 2)) -+ ret >>= 8; -+ ret &= 0xff; -+ -+ /* -+ * Output value is calculated as: (READ_CSx / 80 – 1.23) / (Kcs * Rcs) -+ * where: -+ * - Kcs is the DrMOS current sense gain of power stage, which is obtained from the -+ * register MP2888_MFR_VR_CONFIG1, bits 13-12 with the following selection of DrMOS -+ * (data->curr_sense_gain): -+ * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. -+ * - Rcs is the internal phase current sense resistor. This parameter depends on hardware -+ * assembly. By default it is set to 1kΩ. In case of different assembly, user should -+ * scale this parameter by dividing it by Rcs. -+ * If phase current resolution bit is set to 1, READ_CSx value should be doubled. -+ * Note, that current phase sensing, providing by the device is not accurate. This is -+ * because sampling of current occurrence of bit weight has a big deviation, especially for -+ * light load. -+ */ -+ ret = DIV_ROUND_CLOSEST(ret * 100 - 9800, data->curr_sense_gain); -+ ret = (data->phase_curr_resolution) ? ret * 2 : ret; -+ /* Scale according to total current resolution. */ -+ ret = (data->total_curr_resolution) ? ret * 8 : ret * 4; -+ return ret; -+} -+ -+static int -+mp2888_read_phases(struct i2c_client *client, struct mp2888_data *data, int page, int phase) -+{ -+ int ret; -+ -+ switch (phase) { -+ case 0 ... 1: -+ ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS1_2); -+ break; -+ case 2 ... 3: -+ ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS3_4); -+ break; -+ case 4 ... 5: -+ ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS5_6); -+ break; -+ case 6 ... 7: -+ ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS7_8); -+ break; -+ case 8 ... 9: -+ ret = mp2888_read_phase(client, data, page, phase, MP2888_MFR_READ_CS9_10); -+ break; -+ default: -+ return -ENODATA; -+ } -+ return ret; -+} -+ -+static int mp2888_read_word_data(struct i2c_client *client, int page, int phase, int reg) -+{ -+ const struct pmbus_driver_info *info = pmbus_get_driver_info(client); -+ struct mp2888_data *data = to_mp2888_data(info); -+ int ret; -+ -+ switch (reg) { -+ case PMBUS_READ_VIN: -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ if (ret <= 0) -+ return ret; -+ -+ /* -+ * READ_VIN requires fixup to scale it to linear11 format. Register data format -+ * provides 10 bits for mantissa and 6 bits for exponent. Bits 15:10 are set with -+ * the fixed value 111011b. -+ */ -+ ret = (ret & GENMASK(9, 0)) | ((ret & GENMASK(31, 10)) << 1); -+ break; -+ case PMBUS_OT_WARN_LIMIT: -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ if (ret < 0) -+ return ret; -+ /* -+ * Chip reports limits in degrees C, but the actual temperature in 10th of -+ * degrees C - scaling is needed to match both. -+ */ -+ ret *= MP2888_TEMP_UNIT; -+ break; -+ case PMBUS_READ_IOUT: -+ if (phase != 0xff) -+ return mp2888_read_phases(client, data, page, phase); -+ -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ if (ret < 0) -+ return ret; -+ /* -+ * READ_IOUT register has unused bits 15:12 with fixed value 1110b. Clear these -+ * bits and scale with total current resolution. Data is provided in direct format. -+ */ -+ ret &= GENMASK(11, 0); -+ ret = data->total_curr_resolution ? ret * 2 : ret; -+ break; -+ case PMBUS_IOUT_OC_WARN_LIMIT: -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ if (ret < 0) -+ return ret; -+ ret &= GENMASK(9, 0); -+ /* -+ * Chip reports limits with resolution 1A or 2A, if total current resolution bit is -+ * set 1. Actual current is reported with 0.25A or respectively 0.5A resolution. -+ * Scaling is needed to match both. -+ */ -+ ret = data->total_curr_resolution ? ret * 8 : ret * 4; -+ break; -+ case PMBUS_READ_POUT: -+ case PMBUS_READ_PIN: -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ if (ret < 0) -+ return ret; -+ ret = data->total_curr_resolution ? ret * 2 : ret; -+ break; -+ case PMBUS_POUT_OP_WARN_LIMIT: -+ ret = pmbus_read_word_data(client, page, phase, reg); -+ if (ret < 0) -+ return ret; -+ /* -+ * Chip reports limits with resolution 1W or 2W, if total current resolution bit is -+ * set 1. Actual power is reported with 0.5W or 1W respectively resolution. Scaling -+ * is needed to match both. -+ */ -+ ret = data->total_curr_resolution ? ret * 4 : ret * 2; -+ break; -+ /* -+ * The below registers are not implemented by device or implemented not according to the -+ * spec. Skip all of them to avoid exposing non-relevant inputs to sysfs. -+ */ -+ case PMBUS_OT_FAULT_LIMIT: -+ case PMBUS_UT_WARN_LIMIT: -+ case PMBUS_UT_FAULT_LIMIT: -+ case PMBUS_VIN_UV_FAULT_LIMIT: -+ case PMBUS_VOUT_UV_WARN_LIMIT: -+ case PMBUS_VOUT_OV_WARN_LIMIT: -+ case PMBUS_VOUT_UV_FAULT_LIMIT: -+ case PMBUS_VOUT_OV_FAULT_LIMIT: -+ case PMBUS_VIN_OV_WARN_LIMIT: -+ case PMBUS_IOUT_OC_LV_FAULT_LIMIT: -+ case PMBUS_IOUT_OC_FAULT_LIMIT: -+ case PMBUS_POUT_MAX: -+ case PMBUS_IOUT_UC_FAULT_LIMIT: -+ case PMBUS_POUT_OP_FAULT_LIMIT: -+ case PMBUS_PIN_OP_WARN_LIMIT: -+ case PMBUS_MFR_VIN_MIN: -+ case PMBUS_MFR_VOUT_MIN: -+ case PMBUS_MFR_VIN_MAX: -+ case PMBUS_MFR_VOUT_MAX: -+ case PMBUS_MFR_IIN_MAX: -+ case PMBUS_MFR_IOUT_MAX: -+ case PMBUS_MFR_PIN_MAX: -+ case PMBUS_MFR_POUT_MAX: -+ case PMBUS_MFR_MAX_TEMP_1: -+ return -ENXIO; -+ default: -+ return -ENODATA; -+ } -+ -+ return ret; -+} -+ -+static int mp2888_write_word_data(struct i2c_client *client, int page, int reg, u16 word) -+{ -+ const struct pmbus_driver_info *info = pmbus_get_driver_info(client); -+ struct mp2888_data *data = to_mp2888_data(info); -+ -+ switch (reg) { -+ case PMBUS_OT_WARN_LIMIT: -+ word = DIV_ROUND_CLOSEST(word, MP2888_TEMP_UNIT); -+ /* Drop unused bits 15:8. */ -+ word = clamp_val(word, 0, GENMASK(7, 0)); -+ break; -+ case PMBUS_IOUT_OC_WARN_LIMIT: -+ /* Fix limit according to total curent resolution. */ -+ word = data->total_curr_resolution ? DIV_ROUND_CLOSEST(word, 8) : -+ DIV_ROUND_CLOSEST(word, 4); -+ /* Drop unused bits 15:10. */ -+ word = clamp_val(word, 0, GENMASK(9, 0)); -+ break; -+ case PMBUS_POUT_OP_WARN_LIMIT: -+ /* Fix limit according to total curent resolution. */ -+ word = data->total_curr_resolution ? DIV_ROUND_CLOSEST(word, 4) : -+ DIV_ROUND_CLOSEST(word, 2); -+ /* Drop unused bits 15:10. */ -+ word = clamp_val(word, 0, GENMASK(9, 0)); -+ break; -+ default: -+ return -ENODATA; -+ } -+ return pmbus_write_word_data(client, page, reg, word); -+} -+ -+static int -+mp2888_identify_multiphase(struct i2c_client *client, struct mp2888_data *data, -+ struct pmbus_driver_info *info) -+{ -+ int ret; -+ -+ ret = i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0); -+ if (ret < 0) -+ return ret; -+ -+ /* Identify multiphase number - could be from 1 to 10. */ -+ ret = i2c_smbus_read_word_data(client, MP2888_MFR_VR_CONFIG1); -+ if (ret <= 0) -+ return ret; -+ -+ info->phases[0] = ret & GENMASK(3, 0); -+ -+ /* -+ * The device provides a total of 10 PWM pins, and can be configured to different phase -+ * count applications for rail. -+ */ -+ if (info->phases[0] > MP2888_MAX_PHASE) -+ return -EINVAL; -+ -+ return 0; -+} -+ -+static struct pmbus_driver_info mp2888_info = { -+ .pages = 1, -+ .format[PSC_VOLTAGE_IN] = linear, -+ .format[PSC_VOLTAGE_OUT] = direct, -+ .format[PSC_TEMPERATURE] = direct, -+ .format[PSC_CURRENT_IN] = linear, -+ .format[PSC_CURRENT_OUT] = direct, -+ .format[PSC_POWER] = direct, -+ .m[PSC_TEMPERATURE] = 1, -+ .R[PSC_TEMPERATURE] = 1, -+ .m[PSC_VOLTAGE_OUT] = 1, -+ .R[PSC_VOLTAGE_OUT] = 3, -+ .m[PSC_CURRENT_OUT] = 4, -+ .m[PSC_POWER] = 1, -+ .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT | -+ PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP | -+ PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT | -+ PMBUS_PHASE_VIRTUAL, -+ .pfunc[0] = PMBUS_HAVE_IOUT, -+ .pfunc[1] = PMBUS_HAVE_IOUT, -+ .pfunc[2] = PMBUS_HAVE_IOUT, -+ .pfunc[3] = PMBUS_HAVE_IOUT, -+ .pfunc[4] = PMBUS_HAVE_IOUT, -+ .pfunc[5] = PMBUS_HAVE_IOUT, -+ .pfunc[6] = PMBUS_HAVE_IOUT, -+ .pfunc[7] = PMBUS_HAVE_IOUT, -+ .pfunc[8] = PMBUS_HAVE_IOUT, -+ .pfunc[9] = PMBUS_HAVE_IOUT, -+ .read_byte_data = mp2888_read_byte_data, -+ .read_word_data = mp2888_read_word_data, -+ .write_word_data = mp2888_write_word_data, -+}; -+ -+static int mp2888_probe(struct i2c_client *client) -+{ -+ struct pmbus_driver_info *info; -+ struct mp2888_data *data; -+ int ret; -+ -+ data = devm_kzalloc(&client->dev, sizeof(struct mp2888_data), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ -+ memcpy(&data->info, &mp2888_info, sizeof(*info)); -+ info = &data->info; -+ -+ /* Identify multiphase configuration. */ -+ ret = mp2888_identify_multiphase(client, data, info); -+ if (ret) -+ return ret; -+ -+ /* Obtain current sense gain of power stage and current resolution. */ -+ ret = mp2888_current_sense_gain_and_resolution_get(client, data); -+ if (ret) -+ return ret; -+ -+ return pmbus_do_probe(client, info); -+} -+ -+static const struct i2c_device_id mp2888_id[] = { -+ {"mp2888", 0}, -+ {} -+}; -+ -+MODULE_DEVICE_TABLE(i2c, mp2888_id); -+ -+static const struct of_device_id __maybe_unused mp2888_of_match[] = { -+ {.compatible = "mps,mp2888"}, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, mp2888_of_match); -+ -+static struct i2c_driver mp2888_driver = { -+ .driver = { -+ .name = "mp2888", -+ .of_match_table = of_match_ptr(mp2888_of_match), -+ }, -+ .probe_new = mp2888_probe, -+ .id_table = mp2888_id, -+}; -+ -+module_i2c_driver(mp2888_driver); -+ -+MODULE_AUTHOR("Vadim Pasternak "); -+MODULE_DESCRIPTION("PMBus driver for MPS MP2888 device"); -+MODULE_LICENSE("GPL"); -+MODULE_IMPORT_NS(PMBUS); --- -2.17.1 - diff --git a/patch/0097-2-mlxsw-i2c-Fix-chunk-size-setting.patch b/patch/0036-mlxsw-i2c-Fix-chunk-size-setting-in-output-mailbox-b.patch similarity index 69% rename from patch/0097-2-mlxsw-i2c-Fix-chunk-size-setting.patch rename to patch/0036-mlxsw-i2c-Fix-chunk-size-setting-in-output-mailbox-b.patch index d80528ad2e34..d6d038b2b248 100644 --- a/patch/0097-2-mlxsw-i2c-Fix-chunk-size-setting.patch +++ b/patch/0036-mlxsw-i2c-Fix-chunk-size-setting-in-output-mailbox-b.patch @@ -1,10 +1,10 @@ -From ac91378962238d34030bb4035308f88ba173165f Mon Sep 17 00:00:00 2001 +From 4d32fdf801c1938afb7994b6e69543fa59b018a9 Mon Sep 17 00:00:00 2001 From: Vadim Pasternak -Date: Tue, 15 Aug 2023 09:22:01 +0000 -Subject: mlxsw: i2c: Fix chunk size setting in output mailbox buffer +Date: Mon, 14 Aug 2023 10:44:40 +0000 +Subject: [PATH backport v6.1 36/41] mlxsw: i2c: Fix chunk size setting in + output mailbox buffer -Links: https://github.com/jpirko/linux_mlxsw/commit/e4f63bb2ded0b1c812ef5cea900124b756837071 - http://patchwork.mtl.labs.mlnx/patch/4591830/ +Link: https://github.com/jpirko/linux_mlxsw/commit/2f7618bfe14f09690bd374417e790bbeaf6fb6bf The driver reads commands output from the output mailbox. If the size of the output mailbox is not a multiple of the transaction / @@ -14,7 +14,7 @@ errors. Fix by determining the number of transactions using DIV_ROUND_UP(). -Fixes: 3029a69 ("mlxsw: i2c: Allow flexible setting of I2C transactions size") +Fixes: 3029a693beda ("mlxsw: i2c: Allow flexible setting of I2C transactions size") Signed-off-by: Vadim Pasternak Reviewed-by: Ido Schimmel --- @@ -22,10 +22,10 @@ Reviewed-by: Ido Schimmel 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c -index b8a5c0cbb6b5..cc99ec3f4e96 100644 +index f5f5f8dc3d19..26e05f129e35 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c +++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c -@@ -447,7 +447,7 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, +@@ -444,7 +444,7 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, } else { /* No input mailbox is case of initialization query command. */ reg_size = MLXSW_I2C_MAX_DATA_SIZE; @@ -35,5 +35,5 @@ index b8a5c0cbb6b5..cc99ec3f4e96 100644 if (mutex_lock_interruptible(&mlxsw_i2c->cmd.lock) < 0) { dev_err(&client->dev, "Could not acquire lock"); -- -2.14.1 +2.20.1 diff --git a/patch/0037-dt-bindings-Add-MP2888-voltage-regulator-device.patch b/patch/0037-dt-bindings-Add-MP2888-voltage-regulator-device.patch deleted file mode 100644 index e29b37ab6ccf..000000000000 --- a/patch/0037-dt-bindings-Add-MP2888-voltage-regulator-device.patch +++ /dev/null @@ -1,33 +0,0 @@ -From f5c7f2a6c2443f8991fef683ad7bd8b2cddf5415 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Tue, 11 May 2021 08:56:19 +0300 -Subject: [PATCH backport 5.10 037/182] dt-bindings: Add MP2888 voltage - regulator device - -Monolithic Power Systems, Inc. (MPS) dual-loop, digital, multi-phase -controller. - -Signed-off-by: Vadim Pasternak -Acked-by: Rob Herring -Link: https://lore.kernel.org/r/20210511055619.118104-4-vadimp@nvidia.com -Signed-off-by: Guenter Roeck ---- - Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml -index ab623ba930d5..52bc54b2d723 100644 ---- a/Documentation/devicetree/bindings/trivial-devices.yaml -+++ b/Documentation/devicetree/bindings/trivial-devices.yaml -@@ -82,6 +82,8 @@ properties: - - fsl,mpl3115 - # MPR121: Proximity Capacitive Touch Sensor Controller - - fsl,mpr121 -+ # Monolithic Power Systems Inc. multi-phase controller mp2888 -+ - mps,mp2888 - # Monolithic Power Systems Inc. multi-phase controller mp2975 - - mps,mp2975 - # G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface --- -2.20.1 - diff --git a/patch/0037-mlxsw-i2c-Limit-single-transaction-buffer-size.patch b/patch/0037-mlxsw-i2c-Limit-single-transaction-buffer-size.patch new file mode 100644 index 000000000000..3fa61239f8bd --- /dev/null +++ b/patch/0037-mlxsw-i2c-Limit-single-transaction-buffer-size.patch @@ -0,0 +1,57 @@ +From 1a589f97c28418f9d50b8efa25e6e437dfc700e3 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Mon, 14 Aug 2023 10:44:41 +0000 +Subject: [PATH backport v6.1 37/41] mlxsw: i2c: Limit single transaction + buffer size + +Link: https://github.com/jpirko/linux_mlxsw/commit/162fc0c49b08baf613b1fba211f4d9852845b5b8 + +Maximum size of buffer is obtained from underlying I2C adapter and in +case adapter allows I2C transaction buffer size greater than 100 bytes, +transaction will fail due to firmware limitation. + +As a result driver will fail initialization. + +Limit the maximum size of transaction buffer by 100 bytes to fit to +firmware. + +Remove unnecessary calculation: +max_t(u16, MLXSW_I2C_BLK_DEF, quirk_size). +This condition can not happened. + +Fixes: 3029a693beda ("mlxsw: i2c: Allow flexible setting of I2C transactions size") +Signed-off-by: Vadim Pasternak +Reviewed-by: Petr Machata +--- + drivers/net/ethernet/mellanox/mlxsw/i2c.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c +index 26e05f129e35..d9a71ad9adae 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c +@@ -48,6 +48,7 @@ + #define MLXSW_I2C_MBOX_SIZE_BITS 12 + #define MLXSW_I2C_ADDR_BUF_SIZE 4 + #define MLXSW_I2C_BLK_DEF 32 ++#define MLXSW_I2C_BLK_MAX 100 + #define MLXSW_I2C_RETRY 5 + #define MLXSW_I2C_TIMEOUT_MSECS 5000 + #define MLXSW_I2C_MAX_DATA_SIZE 256 +@@ -653,9 +654,10 @@ static int mlxsw_i2c_probe(struct i2c_client *client, + return -EOPNOTSUPP; + } + +- mlxsw_i2c->block_size = max_t(u16, MLXSW_I2C_BLK_DEF, +- min_t(u16, quirks->max_read_len, +- quirks->max_write_len)); ++ mlxsw_i2c->block_size = min_t(u16, min_t(u16, quirks->max_read_len, ++ quirks->max_write_len), ++ MLXSW_I2C_BLK_MAX); ++ + } else { + mlxsw_i2c->block_size = MLXSW_I2C_BLK_DEF; + } +-- +2.20.1 + diff --git a/patch/0038-ethtool-wire-in-generic-SFP-module-access.patch b/patch/0038-ethtool-wire-in-generic-SFP-module-access.patch deleted file mode 100644 index 21d2a7accc5e..000000000000 --- a/patch/0038-ethtool-wire-in-generic-SFP-module-access.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 0d7b7f6e65905dbfcda016e81987587cd19bc3a4 Mon Sep 17 00:00:00 2001 -From: Andrew Lunn -Date: Fri, 9 Apr 2021 11:06:41 +0300 -Subject: [PATCH backport 5.10 038/182] ethtool: wire in generic SFP module - access - -If the device has a sfp bus attached, call its -sfp_get_module_eeprom_by_page() function, otherwise use the ethtool op -for the device. This follows how the IOCTL works. - -Signed-off-by: Andrew Lunn -Signed-off-by: David S. Miller ---- - net/ethtool/eeprom.c | 25 ++++++++++++++++++++----- - 1 file changed, 20 insertions(+), 5 deletions(-) - -diff --git a/net/ethtool/eeprom.c b/net/ethtool/eeprom.c -index 937c08902c71..d0a5484ec423 100644 ---- a/net/ethtool/eeprom.c -+++ b/net/ethtool/eeprom.c -@@ -1,6 +1,7 @@ - // SPDX-License-Identifier: GPL-2.0-only - - #include -+#include - #include "netlink.h" - #include "common.h" - -@@ -85,6 +86,21 @@ static int eeprom_fallback(struct eeprom_req_info *request, - return err; - } - -+static int get_module_eeprom_by_page(struct net_device *dev, -+ struct ethtool_module_eeprom *page_data, -+ struct netlink_ext_ack *extack) -+{ -+ const struct ethtool_ops *ops = dev->ethtool_ops; -+ -+ if (dev->sfp_bus) -+ return sfp_get_module_eeprom_by_page(dev->sfp_bus, page_data, extack); -+ -+ if (ops->get_module_info) -+ return ops->get_module_eeprom_by_page(dev, page_data, extack); -+ -+ return -EOPNOTSUPP; -+} -+ - static int eeprom_prepare_data(const struct ethnl_req_info *req_base, - struct ethnl_reply_data *reply_base, - struct genl_info *info) -@@ -95,9 +111,6 @@ static int eeprom_prepare_data(const struct ethnl_req_info *req_base, - struct net_device *dev = reply_base->dev; - int ret; - -- if (!dev->ethtool_ops->get_module_eeprom_by_page) -- return eeprom_fallback(request, reply, info); -- - page_data.offset = request->offset; - page_data.length = request->length; - page_data.i2c_address = request->i2c_address; -@@ -111,8 +124,7 @@ static int eeprom_prepare_data(const struct ethnl_req_info *req_base, - if (ret) - goto err_free; - -- ret = dev->ethtool_ops->get_module_eeprom_by_page(dev, &page_data, -- info->extack); -+ ret = get_module_eeprom_by_page(dev, &page_data, info->extack); - if (ret < 0) - goto err_ops; - -@@ -126,6 +138,9 @@ static int eeprom_prepare_data(const struct ethnl_req_info *req_base, - ethnl_ops_complete(dev); - err_free: - kfree(page_data.data); -+ -+ if (ret == -EOPNOTSUPP) -+ return eeprom_fallback(request, reply, info); - return ret; - } - --- -2.20.1 - diff --git a/patch/0097-3-mlxsw-core_hwmon-Adjust-module-label-names.patch b/patch/0038-mlxsw-core_hwmon-Adjust-module-label-names-based-on-.patch similarity index 72% rename from patch/0097-3-mlxsw-core_hwmon-Adjust-module-label-names.patch rename to patch/0038-mlxsw-core_hwmon-Adjust-module-label-names-based-on-.patch index 7dbb2a24e82a..85611880ba70 100644 --- a/patch/0097-3-mlxsw-core_hwmon-Adjust-module-label-names.patch +++ b/patch/0038-mlxsw-core_hwmon-Adjust-module-label-names-based-on-.patch @@ -1,13 +1,13 @@ -From 33aa62a331425d5828d417eeac7fab697eb45286 Mon Sep 17 00:00:00 2001 +From b5fb1b551d27dc4f66856efececab648058c6097 Mon Sep 17 00:00:00 2001 From: Vadim Pasternak -Date: Wed, 16 Aug 2023 11:56:51 +0000 -Subject: mlxsw: core_hwmon: Adjust module label names based on MTCAP sensor - counter +Date: Wed, 16 Aug 2023 07:02:38 +0000 +Subject: [PATH backport v6.1 38/41] mlxsw: core_hwmon: Adjust module label + names based on MTCAP sensor counter MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -Link: https://github.com/jpirko/linux_mlxsw/commit/0c604fbc8916ce220b2d30f0f75aa9566b18f496 +Link: https://github.com/jpirko/linux_mlxsw/commit/0f7d9d1f513b4585a99c49683e637274b3389c4c Transceiver module temperature sensors are indexed after ASIC and platform sensors. The current label printing method does not take this @@ -34,25 +34,24 @@ front panel 002: +47.0°C (crit = +70.0°C, emerg = +75.0°C) Fixes: a53779de6a0e ("mlxsw: core: Add QSFP module temperature label attribute to hwmon") Signed-off-by: Vadim Pasternak Reviewed-by: Ido Schimmel -Signed-off-by: Ciju Rajan K --- drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c -index d41afdfbd085..464787b10b73 100644 +index 70735068cf29..0fd290d776ff 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c -@@ -377,7 +377,8 @@ mlxsw_hwmon_module_temp_label_show(struct device *dev, +@@ -405,7 +405,8 @@ mlxsw_hwmon_module_temp_label_show(struct device *dev, container_of(attr, struct mlxsw_hwmon_attr, dev_attr); return sprintf(buf, "front panel %03u\n", -- mlwsw_hwmon_attr->type_index); -+ mlwsw_hwmon_attr->type_index + 1 - -+ mlwsw_hwmon_attr->hwmon->sensor_count); +- mlxsw_hwmon_attr->type_index); ++ mlxsw_hwmon_attr->type_index + 1 - ++ mlxsw_hwmon_attr->mlxsw_hwmon_dev->sensor_count); } static ssize_t -- -2.14.1 +2.20.1 diff --git a/patch/0039-ethtool-Fix-NULL-pointer-dereference-during-module-E.patch b/patch/0039-ethtool-Fix-NULL-pointer-dereference-during-module-E.patch deleted file mode 100644 index 915fa7178ca4..000000000000 --- a/patch/0039-ethtool-Fix-NULL-pointer-dereference-during-module-E.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 0802cc637330e62a5db45bb3cfaa4d92f1df9a14 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Sun, 6 Jun 2021 17:24:22 +0300 -Subject: [PATCH backport 5.10 039/182] ethtool: Fix NULL pointer dereference - during module EEPROM dump - -When get_module_eeprom_by_page() is not implemented by the driver, NULL -pointer dereference can occur [1]. - -Fix by testing if get_module_eeprom_by_page() is implemented instead of -get_module_info(). - -[1] - BUG: kernel NULL pointer dereference, address: 0000000000000000 - [...] - CPU: 0 PID: 251 Comm: ethtool Not tainted 5.13.0-rc3-custom-00940-g3822d0670c9d #989 - Call Trace: - eeprom_prepare_data+0x101/0x2d0 - ethnl_default_doit+0xc2/0x290 - genl_family_rcv_msg_doit+0xdc/0x140 - genl_rcv_msg+0xd7/0x1d0 - netlink_rcv_skb+0x49/0xf0 - genl_rcv+0x1f/0x30 - netlink_unicast+0x1f6/0x2c0 - netlink_sendmsg+0x1f9/0x400 - __sys_sendto+0xe1/0x130 - __x64_sys_sendto+0x1b/0x20 - do_syscall_64+0x3a/0x70 - entry_SYSCALL_64_after_hwframe+0x44/0xae - -Fixes: c97a31f66ebc ("ethtool: wire in generic SFP module access") -Signed-off-by: Ido Schimmel -Acked-by: Moshe Shemesh -Signed-off-by: David S. Miller ---- - net/ethtool/eeprom.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/net/ethtool/eeprom.c b/net/ethtool/eeprom.c -index d0a5484ec423..7e6b37a54add 100644 ---- a/net/ethtool/eeprom.c -+++ b/net/ethtool/eeprom.c -@@ -95,7 +95,7 @@ static int get_module_eeprom_by_page(struct net_device *dev, - if (dev->sfp_bus) - return sfp_get_module_eeprom_by_page(dev->sfp_bus, page_data, extack); - -- if (ops->get_module_info) -+ if (ops->get_module_eeprom_by_page) - return ops->get_module_eeprom_by_page(dev, page_data, extack); - - return -EOPNOTSUPP; --- -2.20.1 - diff --git a/patch/0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch b/patch/0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch new file mode 100644 index 000000000000..dd5ff2ae4ec7 --- /dev/null +++ b/patch/0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch @@ -0,0 +1,80 @@ +From 692437ce4ead73e449b3f75688de24462665b592 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 16 Aug 2023 16:32:29 +0000 +Subject: [PATH backport v6.1 39/41] mlxsw: reg: Limit MTBR register payload to + a single data record + +Link: https://github.com/jpirko/linux_mlxsw/commit/b7dcef023af55d2385c9ab1869f937769dffdb35 + +The MTBR register is used to read temperatures from multiple sensors in +one transaction, but the driver only reads from a single sensor in each +transaction. + +Rrestrict the payload size of the MTBR register to prevent the +transmission of redundant data to the firmware. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Ido Schimmel +--- + drivers/net/ethernet/mellanox/mlxsw/core_env.c | 2 +- + drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c | 2 +- + drivers/net/ethernet/mellanox/mlxsw/reg.h | 6 +++--- + 3 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c +index 0107cbc32fc7..550475a108ef 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c +@@ -777,7 +777,7 @@ static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core, + int err; + + mlxsw_reg_mtbr_pack(mtbr_pl, slot_index, +- MLXSW_REG_MTBR_BASE_MODULE_INDEX + module, 1); ++ MLXSW_REG_MTBR_BASE_MODULE_INDEX + module); + err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mtbr), mtbr_pl); + if (err) + return err; +diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c +index 0fd290d776ff..9c12e1feb643 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c +@@ -293,7 +293,7 @@ static ssize_t mlxsw_hwmon_module_temp_fault_show(struct device *dev, + + module = mlxsw_hwmon_attr->type_index - mlxsw_hwmon_dev->sensor_count; + mlxsw_reg_mtbr_pack(mtbr_pl, mlxsw_hwmon_dev->slot_index, +- MLXSW_REG_MTBR_BASE_MODULE_INDEX + module, 1); ++ MLXSW_REG_MTBR_BASE_MODULE_INDEX + module); + err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtbr), mtbr_pl); + if (err) { + dev_err(dev, "Failed to query module temperature sensor\n"); +diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h +index 0777bed5bb1a..9f8fb567b432 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h ++++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h +@@ -9453,7 +9453,7 @@ MLXSW_ITEM_BIT_ARRAY(reg, mtwe, sensor_warning, 0x0, 0x10, 1); + #define MLXSW_REG_MTBR_ID 0x900F + #define MLXSW_REG_MTBR_BASE_LEN 0x10 /* base length, without records */ + #define MLXSW_REG_MTBR_REC_LEN 0x04 /* record length */ +-#define MLXSW_REG_MTBR_REC_MAX_COUNT 47 /* firmware limitation */ ++#define MLXSW_REG_MTBR_REC_MAX_COUNT 1 + #define MLXSW_REG_MTBR_LEN (MLXSW_REG_MTBR_BASE_LEN + \ + MLXSW_REG_MTBR_REC_LEN * \ + MLXSW_REG_MTBR_REC_MAX_COUNT) +@@ -9499,12 +9499,12 @@ MLXSW_ITEM32_INDEXED(reg, mtbr, rec_temp, MLXSW_REG_MTBR_BASE_LEN, 0, 16, + MLXSW_REG_MTBR_REC_LEN, 0x00, false); + + static inline void mlxsw_reg_mtbr_pack(char *payload, u8 slot_index, +- u16 base_sensor_index, u8 num_rec) ++ u16 base_sensor_index) + { + MLXSW_REG_ZERO(mtbr, payload); + mlxsw_reg_mtbr_slot_index_set(payload, slot_index); + mlxsw_reg_mtbr_base_sensor_index_set(payload, base_sensor_index); +- mlxsw_reg_mtbr_num_rec_set(payload, num_rec); ++ mlxsw_reg_mtbr_num_rec_set(payload, 1); + } + + /* Error codes from temperatute reading */ +-- +2.20.1 + diff --git a/patch/0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch b/patch/0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch new file mode 100644 index 000000000000..8e7586ac1bd3 --- /dev/null +++ b/patch/0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch @@ -0,0 +1,37 @@ +From b5df3db752ef8f40d75e14e49099c9c0be34c550 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 16 Aug 2023 16:32:30 +0000 +Subject: [PATH backport v6.1 40/41] mlxsw: core: Extend allowed list of + external cooling devices for thermal zone binding + +Link: https://github.com/jpirko/linux_mlxsw/commit/667f898094e6cf623cc5234dbda6a684321b80a4 + +Extend the list of allowed external cooling devices for thermal zone +binding to include devices of type "emc2305". + +The motivation is to provide support for the system SN2201, which is +equipped with the Spectrum-1 ASIC. +The system's airflow control is managed by the EMC2305 RPM-based PWM +Fan Speed Controller as the cooling device. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Ido Schimmel +--- + drivers/net/ethernet/mellanox/mlxsw/core_thermal.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c +index ef5e61708df3..d0620344da68 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c +@@ -28,6 +28,7 @@ + /* External cooling devices, allowed for binding to mlxsw thermal zones. */ + static char * const mlxsw_thermal_external_allowed_cdev[] = { + "mlxreg_fan", ++ "emc2305", + }; + + enum mlxsw_thermal_trips { +-- +2.20.1 + diff --git a/patch/0040-phy-sfp-add-netlink-SFP-support-to-generic-SFP-code.patch b/patch/0040-phy-sfp-add-netlink-SFP-support-to-generic-SFP-code.patch deleted file mode 100644 index edb898e854a4..000000000000 --- a/patch/0040-phy-sfp-add-netlink-SFP-support-to-generic-SFP-code.patch +++ /dev/null @@ -1,146 +0,0 @@ -From 8d067ab81436b720438e85423718bdb590092a2a Mon Sep 17 00:00:00 2001 -From: Andrew Lunn -Date: Fri, 9 Apr 2021 11:06:40 +0300 -Subject: [PATCH backport 5.10 040/182] phy: sfp: add netlink SFP support to - generic SFP code - -The new netlink API for reading SFP data requires a new op to be -implemented. The idea of the new netlink SFP code is that userspace is -responsible to parsing the EEPROM data and requesting pages, rather -than have the kernel decide what pages are interesting and returning -them. This allows greater flexibility for newer formats. - -Currently the generic SFP code only supports simple SFPs. Allow i2c -address 0x50 and 0x51 to be accessed with page and bank must always be -0. This interface will later be extended when for example QSFP support -is added. - -Signed-off-by: Andrew Lunn -Signed-off-by: Vladyslav Tarasiuk -Signed-off-by: David S. Miller ---- - drivers/net/phy/sfp-bus.c | 20 ++++++++++++++++++++ - drivers/net/phy/sfp.c | 25 +++++++++++++++++++++++++ - drivers/net/phy/sfp.h | 3 +++ - include/linux/sfp.h | 10 ++++++++++ - 4 files changed, 58 insertions(+) - -diff --git a/drivers/net/phy/sfp-bus.c b/drivers/net/phy/sfp-bus.c -index 850915a37f4c..d973110c2868 100644 ---- a/drivers/net/phy/sfp-bus.c -+++ b/drivers/net/phy/sfp-bus.c -@@ -544,6 +544,26 @@ int sfp_get_module_eeprom(struct sfp_bus *bus, struct ethtool_eeprom *ee, - } - EXPORT_SYMBOL_GPL(sfp_get_module_eeprom); - -+/** -+ * sfp_get_module_eeprom_by_page() - Read a page from the SFP module EEPROM -+ * @bus: a pointer to the &struct sfp_bus structure for the sfp module -+ * @page: a &struct ethtool_module_eeprom -+ * @extack: extack for reporting problems -+ * -+ * Read an EEPROM page as specified by the supplied @page. See the -+ * documentation for &struct ethtool_module_eeprom for the page to be read. -+ * -+ * Returns 0 on success or a negative errno number. More error -+ * information might be provided via extack -+ */ -+int sfp_get_module_eeprom_by_page(struct sfp_bus *bus, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack) -+{ -+ return bus->socket_ops->module_eeprom_by_page(bus->sfp, page, extack); -+} -+EXPORT_SYMBOL_GPL(sfp_get_module_eeprom_by_page); -+ - /** - * sfp_upstream_start() - Inform the SFP that the network device is up - * @bus: a pointer to the &struct sfp_bus structure for the sfp module -diff --git a/drivers/net/phy/sfp.c b/drivers/net/phy/sfp.c -index dcbe278086dc..cc171c0087db 100644 ---- a/drivers/net/phy/sfp.c -+++ b/drivers/net/phy/sfp.c -@@ -2302,6 +2302,30 @@ static int sfp_module_eeprom(struct sfp *sfp, struct ethtool_eeprom *ee, - return 0; - } - -+static int sfp_module_eeprom_by_page(struct sfp *sfp, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack) -+{ -+ if (page->bank) { -+ NL_SET_ERR_MSG(extack, "Banks not supported"); -+ return -EOPNOTSUPP; -+ } -+ -+ if (page->page) { -+ NL_SET_ERR_MSG(extack, "Only page 0 supported"); -+ return -EOPNOTSUPP; -+ } -+ -+ if (page->i2c_address != 0x50 && -+ page->i2c_address != 0x51) { -+ NL_SET_ERR_MSG(extack, "Only address 0x50 and 0x51 supported"); -+ return -EOPNOTSUPP; -+ } -+ -+ return sfp_read(sfp, page->i2c_address == 0x51, page->offset, -+ page->data, page->length); -+}; -+ - static const struct sfp_socket_ops sfp_module_ops = { - .attach = sfp_attach, - .detach = sfp_detach, -@@ -2309,6 +2333,7 @@ static const struct sfp_socket_ops sfp_module_ops = { - .stop = sfp_stop, - .module_info = sfp_module_info, - .module_eeprom = sfp_module_eeprom, -+ .module_eeprom_by_page = sfp_module_eeprom_by_page, - }; - - static void sfp_timeout(struct work_struct *work) -diff --git a/drivers/net/phy/sfp.h b/drivers/net/phy/sfp.h -index b83f70526270..27226535c72b 100644 ---- a/drivers/net/phy/sfp.h -+++ b/drivers/net/phy/sfp.h -@@ -14,6 +14,9 @@ struct sfp_socket_ops { - int (*module_info)(struct sfp *sfp, struct ethtool_modinfo *modinfo); - int (*module_eeprom)(struct sfp *sfp, struct ethtool_eeprom *ee, - u8 *data); -+ int (*module_eeprom_by_page)(struct sfp *sfp, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack); - }; - - int sfp_add_phy(struct sfp_bus *bus, struct phy_device *phydev); -diff --git a/include/linux/sfp.h b/include/linux/sfp.h -index 38893e4dd0f0..302094b855fb 100644 ---- a/include/linux/sfp.h -+++ b/include/linux/sfp.h -@@ -542,6 +542,9 @@ phy_interface_t sfp_select_interface(struct sfp_bus *bus, - int sfp_get_module_info(struct sfp_bus *bus, struct ethtool_modinfo *modinfo); - int sfp_get_module_eeprom(struct sfp_bus *bus, struct ethtool_eeprom *ee, - u8 *data); -+int sfp_get_module_eeprom_by_page(struct sfp_bus *bus, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack); - void sfp_upstream_start(struct sfp_bus *bus); - void sfp_upstream_stop(struct sfp_bus *bus); - void sfp_bus_put(struct sfp_bus *bus); -@@ -587,6 +590,13 @@ static inline int sfp_get_module_eeprom(struct sfp_bus *bus, - return -EOPNOTSUPP; - } - -+static inline int sfp_get_module_eeprom_by_page(struct sfp_bus *bus, -+ const struct ethtool_module_eeprom *page, -+ struct netlink_ext_ack *extack) -+{ -+ return -EOPNOTSUPP; -+} -+ - static inline void sfp_upstream_start(struct sfp_bus *bus) - { - } --- -2.20.1 - diff --git a/patch/0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch b/patch/0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch new file mode 100644 index 000000000000..b5efc0b875cb --- /dev/null +++ b/patch/0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch @@ -0,0 +1,35 @@ +From a097327af0b5392d49fe9085fd041ca78b88d3d6 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 16 Aug 2023 16:32:31 +0000 +Subject: [PATH backport v6.1 41/41] mlxsw: i2c: Utilize standard macros for + dividing buffer into chunks + +Link: https://github.com/jpirko/linux_mlxsw/commit/da27e5f14b284ae5e3730df19971618725671dd7 + +Use standard macro DIV_ROUND_UP() to determine the number of chunks +required for a given buffer. + +Signed-off-by: Vadim Pasternak +Reviewed-by: Ido Schimmel +--- + drivers/net/ethernet/mellanox/mlxsw/i2c.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c +index d9a71ad9adae..8eb32152ee04 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c +@@ -424,9 +424,7 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, + + if (in_mbox) { + reg_size = mlxsw_i2c_get_reg_size(in_mbox); +- num = reg_size / mlxsw_i2c->block_size; +- if (reg_size % mlxsw_i2c->block_size) +- num++; ++ num = DIV_ROUND_UP(reg_size, mlxsw_i2c->block_size); + + if (mutex_lock_interruptible(&mlxsw_i2c->cmd.lock) < 0) { + dev_err(&client->dev, "Could not acquire lock"); +-- +2.20.1 + diff --git a/patch/0042-ethtool-support-FEC-settings-over-netlink.patch b/patch/0042-ethtool-support-FEC-settings-over-netlink.patch deleted file mode 100644 index 9f068e85cc75..000000000000 --- a/patch/0042-ethtool-support-FEC-settings-over-netlink.patch +++ /dev/null @@ -1,64 +0,0 @@ -From f2b51f5d52f45a147feb6a5a8d05695849d19d46 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 8 Jul 2021 06:46:53 +0000 -Subject: [PATCH backport 5.10 042/182] ethtool: support FEC settings over - netlink - -Backport from upstream commit 1e5d1f69d9fb8ea0679f9e85915e8e7fdacfbe7a -Added in order to align UAPI interface for 'ethtool' (need for -align with enumerated values of -ETHTOOL_MSG_MODULE_EEPROM_GET and ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY: -+ ETHTOOL_MSG_FEC_GET, -+ ETHTOOL_MSG_FEC_SET, - ETHTOOL_MSG_MODULE_EEPROM_GET, -... -+ ETHTOOL_MSG_FEC_GET_REPLY, -+ ETHTOOL_MSG_FEC_NTF, - ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY, -Only these changes is taken from the whole patch. - -Add FEC API to netlink. - -This is not a 1-to-1 conversion. - -FEC settings already depend on link modes to tell user which -modes are supported. Take this further an use link modes for -manual configuration. Old struct ethtool_fecparam is still -used to talk to the drivers, so we need to translate back -and forth. We can revisit the internal API if number of FEC -encodings starts to grow. - -Enforce only one active FEC bit (by using a bit position -rather than another mask). - -Signed-off-by: Jakub Kicinski -Signed-off-by: David S. Miller ---- - include/uapi/linux/ethtool_netlink.h | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h -index 7dda2cee919b..8ac5c7e64314 100644 ---- a/include/uapi/linux/ethtool_netlink.h -+++ b/include/uapi/linux/ethtool_netlink.h -@@ -42,6 +42,8 @@ enum { - ETHTOOL_MSG_CABLE_TEST_ACT, - ETHTOOL_MSG_CABLE_TEST_TDR_ACT, - ETHTOOL_MSG_TUNNEL_INFO_GET, -+ ETHTOOL_MSG_FEC_GET, -+ ETHTOOL_MSG_FEC_SET, - ETHTOOL_MSG_MODULE_EEPROM_GET, - - /* add new constants above here */ -@@ -81,6 +83,8 @@ enum { - ETHTOOL_MSG_CABLE_TEST_NTF, - ETHTOOL_MSG_CABLE_TEST_TDR_NTF, - ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY, -+ ETHTOOL_MSG_FEC_GET_REPLY, -+ ETHTOOL_MSG_FEC_NTF, - ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY, - - /* add new constants above here */ --- -2.20.1 - diff --git a/patch/0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch b/patch/0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch new file mode 100644 index 000000000000..08e93d5d6d34 --- /dev/null +++ b/patch/0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch @@ -0,0 +1,47 @@ +From fa70f126d07b6fe84c1c110fb3a3923570b72f2e Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 23 Jul 2023 06:49:01 +0000 +Subject: [PATCH backport 6.1.42 43/85] hwmon: (mlxreg-fan) Extend number of + supporetd fans + +Some new big modular systems can be equipped with up to 24 fans. +Extend maximum number of fans accordingly. + +Signed-off-by: Vadim Pasternak +--- + drivers/hwmon/mlxreg-fan.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c +index dad94d2892b2..c515e1d2fe4e 100644 +--- a/drivers/hwmon/mlxreg-fan.c ++++ b/drivers/hwmon/mlxreg-fan.c +@@ -12,7 +12,7 @@ + #include + #include + +-#define MLXREG_FAN_MAX_TACHO 14 ++#define MLXREG_FAN_MAX_TACHO 24 + #define MLXREG_FAN_MAX_PWM 4 + #define MLXREG_FAN_PWM_NOT_CONNECTED 0xff + #define MLXREG_FAN_MAX_STATE 10 +@@ -300,6 +300,16 @@ static const struct hwmon_channel_info *mlxreg_fan_hwmon_info[] = { + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, ++ HWMON_F_INPUT | HWMON_F_FAULT, + HWMON_F_INPUT | HWMON_F_FAULT), + HWMON_CHANNEL_INFO(pwm, + HWMON_PWM_INPUT, +-- +2.20.1 + diff --git a/patch/0045-i2c-mlxcpld-Fix-criteria-for-frequency-setting.patch b/patch/0045-i2c-mlxcpld-Fix-criteria-for-frequency-setting.patch deleted file mode 100644 index 07d2df567e8a..000000000000 --- a/patch/0045-i2c-mlxcpld-Fix-criteria-for-frequency-setting.patch +++ /dev/null @@ -1,31 +0,0 @@ -From a0ea663d696f2d67fc5ac8f33ab26b60b932f5cd Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sat, 10 Jul 2021 07:24:22 +0000 -Subject: [PATCH backport 5.10 045/182] i2c: mlxcpld: Fix criteria for - frequency setting - -Value for getting frequency capability wrongly has been taken from -register offset instead of register value. - -Fixes: 66b0c2846ba8de ("i2c: mlxcpld: Add support for I2C bus frequency setting") -Signed-off-by: Vadim Pasternak ---- - drivers/i2c/busses/i2c-mlxcpld.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index 4e0b7c2882ce..6d41c3db8a2b 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -495,7 +495,7 @@ mlxcpld_i2c_set_frequency(struct mlxcpld_i2c_priv *priv, - return err; - - /* Set frequency only if it is not 100KHz, which is default. */ -- switch ((data->reg & data->mask) >> data->bit) { -+ switch ((regval & data->mask) >> data->bit) { - case MLXCPLD_I2C_FREQ_1000KHZ: - freq = MLXCPLD_I2C_FREQ_1000KHZ_SET; - break; --- -2.20.1 - diff --git a/patch/0046-i2c-mlxcpld-Reduce-polling-time-for-performance-impr.patch b/patch/0046-i2c-mlxcpld-Reduce-polling-time-for-performance-impr.patch deleted file mode 100644 index 88bce22b4918..000000000000 --- a/patch/0046-i2c-mlxcpld-Reduce-polling-time-for-performance-impr.patch +++ /dev/null @@ -1,33 +0,0 @@ -From fdcccb92ef348e32a9e3693f8a2e3df9dfa48ccf Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Tue, 6 Jul 2021 09:37:04 +0000 -Subject: [PATCH backport 5.10 046/182] i2c: mlxcpld: Reduce polling time for - performance improvement - -Decrease polling time 'MLXCPLD_I2C_POLL_TIME' from 400 usec to 200 -usec. It improves performance of I2C transactions. - -Reliability of setting polling time to 200 usec has been validated -across all the supported systems. - -Signed-off-by: Vadim Pasternak ---- - drivers/i2c/busses/i2c-mlxcpld.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index 6d41c3db8a2b..8e110d792147 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -27,7 +27,7 @@ - #define MLXCPLD_I2C_MAX_ADDR_LEN 4 - #define MLXCPLD_I2C_RETR_NUM 2 - #define MLXCPLD_I2C_XFER_TO 500000 /* usec */ --#define MLXCPLD_I2C_POLL_TIME 400 /* usec */ -+#define MLXCPLD_I2C_POLL_TIME 200 /* usec */ - - /* LPC I2C registers */ - #define MLXCPLD_LPCI2C_CPBLTY_REG 0x0 --- -2.20.1 - diff --git a/patch/0047-i2c-mlxcpld-Allow-flexible-polling-time-setting-for-.patch b/patch/0047-i2c-mlxcpld-Allow-flexible-polling-time-setting-for-.patch deleted file mode 100644 index 57f526861cf8..000000000000 --- a/patch/0047-i2c-mlxcpld-Allow-flexible-polling-time-setting-for-.patch +++ /dev/null @@ -1,83 +0,0 @@ -From a0fb4893521ea063db085162385c1eac83cafb07 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Tue, 6 Jul 2021 18:23:46 +0000 -Subject: [PATCH backport 5.10 047/182] i2c: mlxcpld: Allow flexible polling - time setting for I2C transactions - -Allow polling time setting according to I2C frequency supported across -the system. For base frequency 400 KHz and 1 MHz set polling time is set -four times less than for system with base frequency 100KHz. - -Signed-off-by: Vadim Pasternak ---- - drivers/i2c/busses/i2c-mlxcpld.c | 14 +++++++++----- - 1 file changed, 9 insertions(+), 5 deletions(-) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index 8e110d792147..56aa424fd71d 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -49,7 +49,7 @@ - #define MLXCPLD_LPCI2C_NACK_IND 2 - - #define MLXCPLD_I2C_FREQ_1000KHZ_SET 0x04 --#define MLXCPLD_I2C_FREQ_400KHZ_SET 0x0f -+#define MLXCPLD_I2C_FREQ_400KHZ_SET 0x0c - #define MLXCPLD_I2C_FREQ_100KHZ_SET 0x42 - - enum mlxcpld_i2c_frequency { -@@ -73,6 +73,7 @@ struct mlxcpld_i2c_priv { - struct mlxcpld_i2c_curr_xfer xfer; - struct device *dev; - bool smbus_block; -+ int polling_time; - }; - - static void mlxcpld_i2c_lpc_write_buf(u8 *data, u8 len, u32 addr) -@@ -267,8 +268,8 @@ static int mlxcpld_i2c_wait_for_free(struct mlxcpld_i2c_priv *priv) - do { - if (!mlxcpld_i2c_check_busy(priv)) - break; -- usleep_range(MLXCPLD_I2C_POLL_TIME / 2, MLXCPLD_I2C_POLL_TIME); -- timeout += MLXCPLD_I2C_POLL_TIME; -+ usleep_range(priv->polling_time / 2, priv->polling_time); -+ timeout += priv->polling_time; - } while (timeout <= MLXCPLD_I2C_XFER_TO); - - if (timeout > MLXCPLD_I2C_XFER_TO) -@@ -288,10 +289,10 @@ static int mlxcpld_i2c_wait_for_tc(struct mlxcpld_i2c_priv *priv) - u8 datalen, val; - - do { -- usleep_range(MLXCPLD_I2C_POLL_TIME / 2, MLXCPLD_I2C_POLL_TIME); -+ usleep_range(priv->polling_time / 2, priv->polling_time); - if (!mlxcpld_i2c_check_status(priv, &status)) - break; -- timeout += MLXCPLD_I2C_POLL_TIME; -+ timeout += priv->polling_time; - } while (status == 0 && timeout < MLXCPLD_I2C_XFER_TO); - - switch (status) { -@@ -498,9 +499,11 @@ mlxcpld_i2c_set_frequency(struct mlxcpld_i2c_priv *priv, - switch ((regval & data->mask) >> data->bit) { - case MLXCPLD_I2C_FREQ_1000KHZ: - freq = MLXCPLD_I2C_FREQ_1000KHZ_SET; -+ priv->polling_time /= 4; - break; - case MLXCPLD_I2C_FREQ_400KHZ: - freq = MLXCPLD_I2C_FREQ_400KHZ_SET; -+ priv->polling_time /= 4; - break; - default: - return 0; -@@ -527,6 +530,7 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev) - - priv->dev = &pdev->dev; - priv->base_addr = MLXPLAT_CPLD_LPC_I2C_BASE_ADDR; -+ priv->polling_time = MLXCPLD_I2C_POLL_TIME; - - /* Set I2C bus frequency if platform data provides this info. */ - pdata = dev_get_platdata(&pdev->dev); --- -2.20.1 - diff --git a/patch/0186-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch b/patch/0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch similarity index 87% rename from patch/0186-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch rename to patch/0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch index 9347c14df428..1cbb17b71b29 100644 --- a/patch/0186-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch +++ b/patch/0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch @@ -1,13 +1,13 @@ -From 4244de9783c2348e15b40802c70816e4000e342d Mon Sep 17 00:00:00 2001 +From dbffde13eba258aa4bc20eba3e9fe4db4d5716b7 Mon Sep 17 00:00:00 2001 From: Vadim Pasternak Date: Mon, 9 Jan 2023 19:35:31 +0200 -Subject: [PATCH backport 5.10 5/5] platform/mellanox: mlxreg-hotplug: Allow - more flexible hotplug events configuration +Subject: [PATCH backport 6.1.42 51/85] platform/mellanox: mlxreg-hotplug: + Allow more flexible hotplug events configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit -Upstream commit 26e118ea98cf +26e118eaUpstream commit [98cf5ec0b53198e643d5fa8d99b73b49] Currently hotplug configuration in logic device assumes that all items are provided with no holes. @@ -21,12 +21,15 @@ in status/event/mask registers can be associated with hotplug events, while others can be skipped. Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-10-vadimp@nvidia.com +Signed-off-by: Hans de Goede --- drivers/platform/mellanox/mlxreg-hotplug.c | 28 ++++++++++++++++++---- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/platform/mellanox/mlxreg-hotplug.c b/drivers/platform/mellanox/mlxreg-hotplug.c -index 117bc3f39..b7dcc64cd 100644 +index 4936cf158ac8..c5abedd3514d 100644 --- a/drivers/platform/mellanox/mlxreg-hotplug.c +++ b/drivers/platform/mellanox/mlxreg-hotplug.c @@ -239,6 +239,17 @@ static ssize_t mlxreg_hotplug_attr_show(struct device *dev, diff --git a/patch/0052-i2c-mux-Add-register-map-based-mux-driver.patch b/patch/0052-i2c-mux-Add-register-map-based-mux-driver.patch new file mode 100644 index 000000000000..b625f42a48b5 --- /dev/null +++ b/patch/0052-i2c-mux-Add-register-map-based-mux-driver.patch @@ -0,0 +1,246 @@ +From 020e153595d6d9e4494aa930af0af13dddfc4962 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 9 Nov 2022 12:22:12 +0200 +Subject: [PATCH backport 6.1.42 31/85] i2c: mux: Add register map based mux + driver + +Add 'regmap' mux driver to allow virtual bus switching by setting a +single selector register. +The 'regmap' is supposed to be passed to driver within a platform data +by parent platform driver. + +The register can be on type of bus or mapped memory, supported by +'regmap' infrastructure. + +Motivation is to support indirect access to register space. +For example, Lattice FPGA LFD2NX-40 device, being connected through +PCIe bus provides SPI or LPC bus logic through PCIe-to-SPI or +PCIe-to-LPC bridging. Thus, FPGA operates as host controller and some +slave devices can be connected to it. For example: +CPU (PCIe) -> FPGA (PCIe-to-SPI bridge) -> CPLD or another FPGA +CPU (PCIe) -> FPGA (PCIe-to-LPC bridge) -> CPLD or another FPGA +where 1-st FPGA connected to PCIe is located on carrier board, while +2-nd programming logic device is located on some switch board and +cannot be connected to CPU PCIe root complex. + +In case mux selector register is located within the 2-nd device, SPI or +LPC transaction is prepared sent by indirect access, through some +pre-defined protocol. +To support such protocol reg_read()/reg_write() callbacks are provided +to 'regmap' object and these callback implements required indirect +access. + +Signed-off-by: Vadim Pasternak +--- + drivers/i2c/muxes/Kconfig | 12 ++ + drivers/i2c/muxes/Makefile | 1 + + drivers/i2c/muxes/i2c-mux-regmap.c | 121 +++++++++++++++++++ + include/linux/platform_data/i2c-mux-regmap.h | 34 ++++++ + 4 files changed, 168 insertions(+) + create mode 100644 drivers/i2c/muxes/i2c-mux-regmap.c + create mode 100644 include/linux/platform_data/i2c-mux-regmap.h + +diff --git a/drivers/i2c/muxes/Kconfig b/drivers/i2c/muxes/Kconfig +index ea838dbae32e..a509b75bd545 100644 +--- a/drivers/i2c/muxes/Kconfig ++++ b/drivers/i2c/muxes/Kconfig +@@ -99,6 +99,18 @@ config I2C_MUX_REG + This driver can also be built as a module. If so, the module + will be called i2c-mux-reg. + ++config I2C_MUX_REGMAP ++ tristate "Register map based I2C multiplexer" ++ depends on REGMAP ++ help ++ If you say yes to this option, support will be included for a ++ register map based I2C multiplexer. This driver provides access to ++ I2C busses connected through a MUX, which is controlled ++ by a single register through the regmap. ++ ++ This driver can also be built as a module. If so, the module ++ will be called i2c-mux-regmap. ++ + config I2C_DEMUX_PINCTRL + tristate "pinctrl-based I2C demultiplexer" + depends on PINCTRL && OF +diff --git a/drivers/i2c/muxes/Makefile b/drivers/i2c/muxes/Makefile +index 6d9d865e8518..092dca428a75 100644 +--- a/drivers/i2c/muxes/Makefile ++++ b/drivers/i2c/muxes/Makefile +@@ -14,5 +14,6 @@ obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o + obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o + obj-$(CONFIG_I2C_MUX_PINCTRL) += i2c-mux-pinctrl.o + obj-$(CONFIG_I2C_MUX_REG) += i2c-mux-reg.o ++obj-$(CONFIG_I2C_MUX_REGMAP) += i2c-mux-regmap.o + + ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG +diff --git a/drivers/i2c/muxes/i2c-mux-regmap.c b/drivers/i2c/muxes/i2c-mux-regmap.c +new file mode 100644 +index 000000000000..1ab5f94af8a5 +--- /dev/null ++++ b/drivers/i2c/muxes/i2c-mux-regmap.c +@@ -0,0 +1,121 @@ ++// SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 ++/* ++ * Regmap i2c mux driver ++ * ++ * Copyright (C) 2023 Nvidia Technologies Ltd. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* i2c_mux_regmap - mux control structure: ++ * @last_val - last selected register value or -1 if mux deselected; ++ * @pdata: platform data; ++ */ ++struct i2c_mux_regmap { ++ int last_val; ++ struct i2c_mux_regmap_platform_data pdata; ++}; ++ ++static int i2c_mux_regmap_select_chan(struct i2c_mux_core *muxc, u32 chan) ++{ ++ struct i2c_mux_regmap *mux = i2c_mux_priv(muxc); ++ int err = 0; ++ ++ /* Only select the channel if its different from the last channel */ ++ if (mux->last_val != chan) { ++ err = regmap_write(mux->pdata.regmap, mux->pdata.sel_reg_addr, chan); ++ mux->last_val = err < 0 ? -1 : chan; ++ } ++ ++ return err; ++} ++ ++static int i2c_mux_regmap_deselect(struct i2c_mux_core *muxc, u32 chan) ++{ ++ struct i2c_mux_regmap *mux = i2c_mux_priv(muxc); ++ ++ /* Deselect active channel */ ++ mux->last_val = -1; ++ ++ return regmap_write(mux->pdata.regmap, mux->pdata.sel_reg_addr, 0); ++} ++ ++/* Probe/reomove functions */ ++static int i2c_mux_regmap_probe(struct platform_device *pdev) ++{ ++ struct i2c_mux_regmap_platform_data *pdata = dev_get_platdata(&pdev->dev); ++ struct i2c_mux_regmap *mux; ++ struct i2c_adapter *parent; ++ struct i2c_mux_core *muxc; ++ int num, err; ++ ++ if (!pdata) ++ return -EINVAL; ++ ++ mux = devm_kzalloc(&pdev->dev, sizeof(*mux), GFP_KERNEL); ++ if (!mux) ++ return -ENOMEM; ++ ++ memcpy(&mux->pdata, pdata, sizeof(*pdata)); ++ parent = i2c_get_adapter(mux->pdata.parent); ++ if (!parent) ++ return -EPROBE_DEFER; ++ ++ muxc = i2c_mux_alloc(parent, &pdev->dev, pdata->num_adaps, sizeof(*mux), 0, ++ i2c_mux_regmap_select_chan, i2c_mux_regmap_deselect); ++ if (!muxc) ++ return -ENOMEM; ++ ++ platform_set_drvdata(pdev, muxc); ++ muxc->priv = mux; ++ mux->last_val = -1; /* force the first selection */ ++ ++ /* Create an adapter for each channel. */ ++ for (num = 0; num < pdata->num_adaps; num++) { ++ err = i2c_mux_add_adapter(muxc, 0, pdata->chan_ids[num], 0); ++ if (err) ++ goto err_i2c_mux_add_adapter; ++ } ++ ++ /* Notify caller when all channels' adapters are created. */ ++ if (pdata->completion_notify) ++ pdata->completion_notify(pdata->handle, muxc->parent, muxc->adapter); ++ ++ return 0; ++ ++err_i2c_mux_add_adapter: ++ i2c_mux_del_adapters(muxc); ++ return err; ++} ++ ++static int i2c_mux_regmap_remove(struct platform_device *pdev) ++{ ++ struct i2c_mux_core *muxc = platform_get_drvdata(pdev); ++ ++ i2c_mux_del_adapters(muxc); ++ return 0; ++} ++ ++static struct platform_driver i2c_mux_regmap_driver = { ++ .driver = { ++ .name = "i2c-mux-regmap", ++ }, ++ .probe = i2c_mux_regmap_probe, ++ .remove = i2c_mux_regmap_remove, ++}; ++ ++module_platform_driver(i2c_mux_regmap_driver); ++ ++MODULE_AUTHOR("Vadim Pasternak (vadimp@nvidia.com)"); ++MODULE_DESCRIPTION("Regmap I2C multiplexer driver"); ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_ALIAS("platform:i2c-mux-regmap"); +diff --git a/include/linux/platform_data/i2c-mux-regmap.h b/include/linux/platform_data/i2c-mux-regmap.h +new file mode 100644 +index 000000000000..a06614e5edd2 +--- /dev/null ++++ b/include/linux/platform_data/i2c-mux-regmap.h +@@ -0,0 +1,34 @@ ++/* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ ++/* ++ * Regmap i2c mux driver ++ * ++ * Copyright (C) 2023 Nvidia Technologies Ltd. ++ */ ++ ++#ifndef __LINUX_PLATFORM_DATA_I2C_MUX_REGMAP_H ++#define __LINUX_PLATFORM_DATA_I2C_MUX_REGMAP_H ++ ++/** ++ * struct i2c_mux_regmap_platform_data - Platform-dependent data for i2c-mux-regmap ++ * @regmap: register map of parent device; ++ * @parent: Parent I2C bus adapter number ++ * @chan_ids - channels array ++ * @num_adaps - number of adapters ++ * @sel_reg_addr - mux select register offset in CPLD space ++ * @reg_size: register size in bytes ++ * @handle: handle to be passed by callback ++ * @completion_notify: callback to notify when all the adapters are created ++ */ ++struct i2c_mux_regmap_platform_data { ++ void *regmap; ++ int parent; ++ const unsigned int *chan_ids; ++ int num_adaps; ++ int sel_reg_addr; ++ u8 reg_size; ++ void *handle; ++ int (*completion_notify)(void *handle, struct i2c_adapter *parent, ++ struct i2c_adapter *adapters[]); ++}; ++ ++#endif /* __LINUX_PLATFORM_DATA_I2C_MUX_REGMAP_H */ +-- +2.20.1 + diff --git a/patch/0053-mlxsw-core-Avoid-creation-virtual-hwmon-objects-by-t.patch b/patch/0053-mlxsw-core-Avoid-creation-virtual-hwmon-objects-by-t.patch deleted file mode 100644 index f5d69776de8d..000000000000 --- a/patch/0053-mlxsw-core-Avoid-creation-virtual-hwmon-objects-by-t.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 25d36748f03a4c652abd29e909bbe5a30ea67ecf Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Wed, 4 Nov 2020 20:07:15 +0200 -Subject: [PATCH backport 5.10 053/182] mlxsw: core: Avoid creation virtual - hwmon objects by thermal module - -Extend initialization of each thermal zone with 'thermal_zone_params', -set field 'no_hwmon' in this structure to 'true'. -The purpose is to avoid creation of virtual 'hwmon' objects by -'thermal' module. -All 'hwmon' objects are created by 'hwmon' module. -'Thermal' module also creates virtual 'hwmon' by default with each -thermal zone. -It exposes same readout, as 'hwmon', and thus creates in 'sysfs' -duplicated entries. -Such duplicated entries are exposed by 'hwmon' module, like -cat /sys/class/hwmon/hwmon1/temp1_input -38000 -and by 'thermal' module like: -cat /sys/class/hwmon/hwmon2/temp1_input -38000 -The patch removes this duplication. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Jiri Pirko -Signed-off-by: Ido Schimmel ---- - drivers/net/ethernet/mellanox/mlxsw/core_thermal.c | 10 +++++++--- - 1 file changed, 7 insertions(+), 3 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -index b29824448aa8..e1a760519097 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -@@ -357,6 +357,10 @@ static int mlxsw_thermal_trend_get(struct thermal_zone_device *tzdev, - return 0; - } - -+static struct thermal_zone_params mlxsw_thermal_params = { -+ .no_hwmon = true, -+}; -+ - static struct thermal_zone_device_ops mlxsw_thermal_ops = { - .bind = mlxsw_thermal_bind, - .unbind = mlxsw_thermal_unbind, -@@ -678,7 +682,7 @@ mlxsw_thermal_module_tz_init(struct mlxsw_thermal_module *module_tz) - MLXSW_THERMAL_TRIP_MASK, - module_tz, - &mlxsw_thermal_module_ops, -- NULL, 0, -+ &mlxsw_thermal_params, 0, - module_tz->parent->polling_delay); - if (IS_ERR(module_tz->tzdev)) { - err = PTR_ERR(module_tz->tzdev); -@@ -808,7 +812,7 @@ mlxsw_thermal_gearbox_tz_init(struct mlxsw_thermal_module *gearbox_tz) - MLXSW_THERMAL_TRIP_MASK, - gearbox_tz, - &mlxsw_thermal_gearbox_ops, -- NULL, 0, -+ &mlxsw_thermal_params, 0, - gearbox_tz->parent->polling_delay); - if (IS_ERR(gearbox_tz->tzdev)) - return PTR_ERR(gearbox_tz->tzdev); -@@ -968,7 +972,7 @@ int mlxsw_thermal_init(struct mlxsw_core *core, - MLXSW_THERMAL_TRIP_MASK, - thermal, - &mlxsw_thermal_ops, -- NULL, 0, -+ &mlxsw_thermal_params, 0, - thermal->polling_delay); - if (IS_ERR(thermal->tzdev)) { - err = PTR_ERR(thermal->tzdev); --- -2.20.1 - diff --git a/patch/0054-mlxsw-minimal-Simplify-method-of-modules-number-dete.patch b/patch/0054-mlxsw-minimal-Simplify-method-of-modules-number-dete.patch deleted file mode 100644 index bf1bf2ed3360..000000000000 --- a/patch/0054-mlxsw-minimal-Simplify-method-of-modules-number-dete.patch +++ /dev/null @@ -1,183 +0,0 @@ -From 675042fec21be3fbd12388b239676608759f0497 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 19 Jul 2021 17:07:02 +0000 -Subject: [PATCH backport 5.10 054/182] mlxsw: minimal: Simplify method of - modules number detection - -Remove unnecessary access to PMLP register, used to find the number of -module supported by the system. Obtain this information through MGPIR -register instead. The motivation is reduce access to the ASIC. Getting -the number of modules though MGPIR required only single transaction, -while getting this info through PMLP required to run the number of -transaction up to the local ports maximum. - -Signed-off-by: Vadim Pasternak ---- - drivers/net/ethernet/mellanox/mlxsw/minimal.c | 107 ++++-------------- - 1 file changed, 20 insertions(+), 87 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -index af4c9b44d9cf..a8c67b763c8b 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -@@ -131,23 +131,6 @@ static const struct ethtool_ops mlxsw_m_port_ethtool_ops = { - .get_module_eeprom_by_page = mlxsw_m_get_module_eeprom_by_page, - }; - --static int --mlxsw_m_port_module_info_get(struct mlxsw_m *mlxsw_m, u8 local_port, -- u8 *p_module, u8 *p_width) --{ -- char pmlp_pl[MLXSW_REG_PMLP_LEN]; -- int err; -- -- mlxsw_reg_pmlp_pack(pmlp_pl, local_port); -- err = mlxsw_reg_query(mlxsw_m->core, MLXSW_REG(pmlp), pmlp_pl); -- if (err) -- return err; -- *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0); -- *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl); -- -- return 0; --} -- - static int - mlxsw_m_port_dev_addr_get(struct mlxsw_m_port *mlxsw_m_port) - { -@@ -165,7 +148,7 @@ mlxsw_m_port_dev_addr_get(struct mlxsw_m_port *mlxsw_m_port) - * to be such it does not overflow when adding local_port - * value. - */ -- dev->dev_addr[ETH_ALEN - 1] += mlxsw_m_port->module + 1; -+ dev->dev_addr[ETH_ALEN - 1] = mlxsw_m_port->module + 1; - return 0; - } - -@@ -244,91 +227,46 @@ static void mlxsw_m_port_remove(struct mlxsw_m *mlxsw_m, u8 local_port) - mlxsw_core_port_fini(mlxsw_m->core, local_port); - } - --static int mlxsw_m_port_module_map(struct mlxsw_m *mlxsw_m, u8 local_port, -- u8 *last_module) -+static int mlxsw_m_ports_create(struct mlxsw_m *mlxsw_m) - { -- unsigned int max_ports = mlxsw_core_max_ports(mlxsw_m->core); -- u8 module, width; -- int err; -+ char mgpir_pl[MLXSW_REG_MGPIR_LEN]; -+ int i, err; - -- /* Fill out to local port mapping array */ -- err = mlxsw_m_port_module_info_get(mlxsw_m, local_port, &module, -- &width); -+ mlxsw_reg_mgpir_pack(mgpir_pl); -+ err = mlxsw_reg_query(mlxsw_m->core, MLXSW_REG(mgpir), mgpir_pl); - if (err) - return err; - -- if (!width) -- return 0; -- /* Skip, if port belongs to the cluster */ -- if (module == *last_module) -+ mlxsw_reg_mgpir_unpack(mgpir_pl, NULL, NULL, NULL, -+ &mlxsw_m->max_ports); -+ if (!mlxsw_m->max_ports) - return 0; -- *last_module = module; -- -- if (WARN_ON_ONCE(module >= max_ports)) -- return -EINVAL; -- mlxsw_m->module_to_port[module] = ++mlxsw_m->max_ports; -- -- return 0; --} - --static void mlxsw_m_port_module_unmap(struct mlxsw_m *mlxsw_m, u8 module) --{ -- mlxsw_m->module_to_port[module] = -1; --} -- --static int mlxsw_m_ports_create(struct mlxsw_m *mlxsw_m) --{ -- unsigned int max_ports = mlxsw_core_max_ports(mlxsw_m->core); -- u8 last_module = max_ports; -- int i; -- int err; -- -- mlxsw_m->ports = kcalloc(max_ports, sizeof(*mlxsw_m->ports), -+ mlxsw_m->ports = kcalloc(mlxsw_m->max_ports, sizeof(*mlxsw_m->ports), - GFP_KERNEL); - if (!mlxsw_m->ports) - return -ENOMEM; - -- mlxsw_m->module_to_port = kmalloc_array(max_ports, sizeof(int), -+ mlxsw_m->module_to_port = kmalloc_array(mlxsw_m->max_ports, sizeof(int), - GFP_KERNEL); - if (!mlxsw_m->module_to_port) { - err = -ENOMEM; - goto err_module_to_port_alloc; - } - -- /* Invalidate the entries of module to local port mapping array */ -- for (i = 0; i < max_ports; i++) -- mlxsw_m->module_to_port[i] = -1; -- -- /* Fill out module to local port mapping array */ -- for (i = 1; i < max_ports; i++) { -- err = mlxsw_m_port_module_map(mlxsw_m, i, &last_module); -- if (err) -- goto err_module_to_port_map; -- } -- -- /* Create port objects for each valid entry */ -+ /* Create port objects for each entry. */ - for (i = 0; i < mlxsw_m->max_ports; i++) { -- if (mlxsw_m->module_to_port[i] > 0) { -- err = mlxsw_m_port_create(mlxsw_m, -- mlxsw_m->module_to_port[i], -- i); -- if (err) -- goto err_module_to_port_create; -- } -+ mlxsw_m->module_to_port[i] = i; -+ err = mlxsw_m_port_create(mlxsw_m, mlxsw_m->module_to_port[i], i); -+ if (err) -+ goto err_module_to_port_create; - } - - return 0; - - err_module_to_port_create: -- for (i--; i >= 0; i--) { -- if (mlxsw_m->module_to_port[i] > 0) -- mlxsw_m_port_remove(mlxsw_m, -- mlxsw_m->module_to_port[i]); -- } -- i = max_ports; --err_module_to_port_map: -- for (i--; i > 0; i--) -- mlxsw_m_port_module_unmap(mlxsw_m, i); -+ for (i--; i >= 0; i--) -+ mlxsw_m_port_remove(mlxsw_m, mlxsw_m->module_to_port[i]); - kfree(mlxsw_m->module_to_port); - err_module_to_port_alloc: - kfree(mlxsw_m->ports); -@@ -339,13 +277,8 @@ static void mlxsw_m_ports_remove(struct mlxsw_m *mlxsw_m) - { - int i; - -- for (i = 0; i < mlxsw_m->max_ports; i++) { -- if (mlxsw_m->module_to_port[i] > 0) { -- mlxsw_m_port_remove(mlxsw_m, -- mlxsw_m->module_to_port[i]); -- mlxsw_m_port_module_unmap(mlxsw_m, i); -- } -- } -+ for (i = 0; i < mlxsw_m->max_ports; i++) -+ mlxsw_m_port_remove(mlxsw_m, mlxsw_m->module_to_port[i]); - - kfree(mlxsw_m->module_to_port); - kfree(mlxsw_m->ports); --- -2.20.1 - diff --git a/patch/0055-platform_data-mlxreg-Add-new-type-to-support-modular.patch b/patch/0055-platform_data-mlxreg-Add-new-type-to-support-modular.patch deleted file mode 100644 index aa54be4bad36..000000000000 --- a/patch/0055-platform_data-mlxreg-Add-new-type-to-support-modular.patch +++ /dev/null @@ -1,169 +0,0 @@ -From 8f9032570ba6f1b6ddb6cca99ae7712d9e41ea0d Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 14:55:49 +0000 -Subject: [PATCH backport 5.10 055/182] platform_data/mlxreg: Add new type to - support modular systems - -Add new types for the Nvidia modular systems MSN4800 which could -be equipped with the different types of replaceable line cards. - -Add new type to specify the kind of hotplug events for the line cards. -The line card events are generated by the programmable device located -on the main board. This device implements interrupt controller logic. -Line card interrupts are associated with different line cards states -during its initialization: insertion, security signature validation, -power good state, security validation, hardware-firmware -synchronization state, line card PHYs readiness state, firmware -availability for line card ports. Also under some circumstances -hardware can generate thermal shutdown for particular line card. - -Add new type specifying the action, which should be performed when -particular hotplug event is received. This action defines in which way -hotplug event should be handled by hotplug driver. There are the next -actions types: -- Connect I2C device with empty 'platform_data' field according to the - platform topology, if device is configured (for example, power unit - micro-controller driver, when power unit is connected to power source - (this is what is currently supported). -- Connect device with 'platform_data' field set according to the - platform topology. The purpose is to pass 'platform_data' through - hotplug driver to underlying device (for example line card driver). -- No device is associated with hotplug event - just send "udev" event - (this is what is currently supported). - -Extend structure 'mlxreg_hotplug_device' with hotplug action field. - -Extend structure 'mlxreg_core_data' with: -- Registers for line card power and enabling control. -- Slot number field, to indicate at which physical slot replaceable - line card device is located. - -Signed-off-by: Vadim Pasternak ---- - include/linux/platform_data/mlxreg.h | 57 ++++++++++++++++++++++++++++ - 1 file changed, 57 insertions(+) - -diff --git a/include/linux/platform_data/mlxreg.h b/include/linux/platform_data/mlxreg.h -index 101333fe2b8d..49f0e15a10dd 100644 ---- a/include/linux/platform_data/mlxreg.h -+++ b/include/linux/platform_data/mlxreg.h -@@ -24,6 +24,51 @@ enum mlxreg_wdt_type { - MLX_WDT_TYPE3, - }; - -+/** -+ * enum mlxreg_hotplug_kind - kind of hotplug entry -+ * -+ * @MLXREG_HOTPLUG_DEVICE_NA: do not care; -+ * @MLXREG_HOTPLUG_LC_PRESENT: entry for line card presence in/out events; -+ * @MLXREG_HOTPLUG_LC_VERIFIED: entry for line card verification status events -+ * coming after line card security signature validation; -+ * @MLXREG_HOTPLUG_LC_POWERED: entry for line card power on/off events; -+ * @MLXREG_HOTPLUG_LC_SYNCED: entry for line card synchronization events, coming -+ * after hardware-firmware synchronization handshake; -+ * @MLXREG_HOTPLUG_LC_READY: entry for line card ready events, indicating line card -+ PHYs ready / unready state; -+ * @MLXREG_HOTPLUG_LC_ACTIVE: entry for line card active events, indicating firmware -+ * availability / unavailability for the ports on line card; -+ * @MLXREG_HOTPLUG_LC_THERMAL: entry for line card thermal shutdown events, positive -+ * event indicates that system should power off the line -+ * card for which this event has been received; -+ */ -+enum mlxreg_hotplug_kind { -+ MLXREG_HOTPLUG_DEVICE_NA = 0, -+ MLXREG_HOTPLUG_LC_PRESENT = 1, -+ MLXREG_HOTPLUG_LC_VERIFIED = 2, -+ MLXREG_HOTPLUG_LC_POWERED = 3, -+ MLXREG_HOTPLUG_LC_SYNCED = 4, -+ MLXREG_HOTPLUG_LC_READY = 5, -+ MLXREG_HOTPLUG_LC_ACTIVE = 6, -+ MLXREG_HOTPLUG_LC_THERMAL = 7, -+}; -+ -+/** -+ * enum mlxreg_hotplug_device_action - hotplug device action required for -+ * driver's connectivity -+ * -+ * @MLXREG_HOTPLUG_DEVICE_DEFAULT_ACTION: probe device for 'on' event, remove -+ * for 'off' event; -+ * @MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION: probe platform device for 'on' -+ * event, remove for 'off' event; -+ * @MLXREG_HOTPLUG_DEVICE_NO_ACTION: no connectivity action is required; -+ */ -+enum mlxreg_hotplug_device_action { -+ MLXREG_HOTPLUG_DEVICE_DEFAULT_ACTION = 0, -+ MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION = 1, -+ MLXREG_HOTPLUG_DEVICE_NO_ACTION = 2, -+}; -+ - /** - * struct mlxreg_hotplug_device - I2C device data: - * -@@ -31,6 +76,7 @@ enum mlxreg_wdt_type { - * @client: I2C device client; - * @brdinfo: device board information; - * @nr: I2C device adapter number, to which device is to be attached; -+ * @action: action to be performed upon event receiving; - * - * Structure represents I2C hotplug device static data (board topology) and - * dynamic data (related kernel objects handles). -@@ -40,6 +86,7 @@ struct mlxreg_hotplug_device { - struct i2c_client *client; - struct i2c_board_info *brdinfo; - int nr; -+ enum mlxreg_hotplug_device_action action; - }; - - /** -@@ -51,12 +98,16 @@ struct mlxreg_hotplug_device { - * @bit: attribute effective bit; - * @capability: attribute capability register; - * @reg_prsnt: attribute presence register; -+ * @reg_sync: attribute synch register; -+ * @reg_pwr: attribute power register; -+ * @reg_ena: attribute enable register; - * @mode: access mode; - * @np - pointer to node platform associated with attribute; - * @hpdev - hotplug device data; - * @health_cntr: dynamic device health indication counter; - * @attached: true if device has been attached after good health indication; - * @regnum: number of registers occupied by multi-register attribute; -+ * @slot: slot number, at which device is located; - */ - struct mlxreg_core_data { - char label[MLXREG_CORE_LABEL_MAX_SIZE]; -@@ -65,18 +116,23 @@ struct mlxreg_core_data { - u32 bit; - u32 capability; - u32 reg_prsnt; -+ u32 reg_sync; -+ u32 reg_pwr; -+ u32 reg_ena; - umode_t mode; - struct device_node *np; - struct mlxreg_hotplug_device hpdev; - u32 health_cntr; - bool attached; - u8 regnum; -+ u8 slot; - }; - - /** - * struct mlxreg_core_item - same type components controlled by the driver: - * - * @data: component data; -+ * @kind: kind of hotplug attribute; - * @aggr_mask: group aggregation mask; - * @reg: group interrupt status register; - * @mask: group interrupt mask; -@@ -89,6 +145,7 @@ struct mlxreg_core_data { - */ - struct mlxreg_core_item { - struct mlxreg_core_data *data; -+ enum mlxreg_hotplug_kind kind; - u32 aggr_mask; - u32 reg; - u32 mask; --- -2.20.1 - diff --git a/patch/0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch b/patch/0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch new file mode 100644 index 000000000000..e2bd55916ad2 --- /dev/null +++ b/patch/0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch @@ -0,0 +1,181 @@ +From 181881ca73d8864810ded434c6a11217a2d5e3bb Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Wed, 8 Feb 2023 08:33:30 +0200 +Subject: [PATH backport v6.1 31/32] Documentation/ABI: Add new attribute for + mlxreg-io sysfs interfaces + +Upstream commit: [e7210563432a6c6fa65a9c5c11ece2a0adbeeda2] + +Add description for new attributes added for rack manager switch and +NG800 family systems. + +Attributes related to power converter board: +- reset_pwr_converter_fail; +- pwr_converter_prog_en; +Attributes related to External Root of Trust (EROT) devices recovery: +- erot1_ap_reset; +- erot2_ap_reset; +- erot1_recovery; +- erot2_recovery; +- erot1_reset; +- erot2_reset; +- erot1_wp; +- erot2_wp; +- spi_chnl_select; +Attributes related to clock board failures and recovery: +- clk_brd1_boot_fail; +- clk_brd2_boot_fail; +- clk_brd_fail; +- clk_brd_prog_en; +Attributes related to power failures: +- reset_ac_ok_fail; +- asic_pg_fail; + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +Link: https://lore.kernel.org/r/20230208063331.15560-14-vadimp@nvidia.com +Signed-off-by: Hans de Goede +--- + .../ABI/stable/sysfs-driver-mlxreg-io | 122 +++++++++++++++++- + 1 file changed, 121 insertions(+), 1 deletion(-) + +diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io +index af0cbf143c48..60953903d007 100644 +--- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io ++++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io +@@ -522,7 +522,6 @@ Description: These files allow to each of ASICs by writing 1. + + The files are write only. + +- + What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/comm_chnl_ready + Date: July 2022 + KernelVersion: 5.20 +@@ -542,3 +541,124 @@ Description: The file indicates COME module hardware configuration. + The purpose is to expose some minor BOM changes for the same system SKU. + + The file is read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_pwr_converter_fail ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: This file shows the system reset cause due to power converter ++ devices failure. ++ Value 1 in file means this is reset cause, 0 - otherwise. ++ ++ The file is read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_ap_reset ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_ap_reset ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: These files aim to monitor the status of the External Root of Trust (EROT) ++ processor's RESET output to the Application Processor (AP). ++ By reading this file, could be determined if the EROT has invalidated or ++ revoked AP Firmware, at which point it will hold the AP in RESET until a ++ valid firmware is loaded. This protects the AP from running an ++ unauthorized firmware. In the normal flow, the AP reset should be released ++ after the EROT validates the integrity of the FW, and it should be done so ++ as quickly as possible so that the AP boots before the CPU starts to ++ communicate to each ASIC. ++ ++ The files are read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_recovery ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_recovery ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_reset ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_reset ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: These files aim to perform External Root of Trust (EROT) recovery ++ sequence after EROT device failure. ++ These EROT devices protect ASICs from unauthorized access and in normal ++ flow their reset should be released with system power – earliest power ++ up stage, so that EROTs can begin boot and authentication process before ++ CPU starts to communicate to ASICs. ++ Issuing a reset to the EROT while asserting the recovery signal will cause ++ the EROT Application Processor to enter recovery mode so that the EROT FW ++ can be updated/recovered. ++ For reset/recovery the related file should be toggled by 1/0. ++ ++ The files are read/write. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_wp ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_wp ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: These files allow access to External Root of Trust (EROT) for reset ++ and recovery sequence after EROT device failure. ++ Default is 0 (programming disabled). ++ If the system is in locked-down mode writing this file will not be allowed. ++ ++ The files are read/write. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/spi_chnl_select ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: This file allows SPI chip selection for External Root of Trust (EROT) ++ device Out-of-Band recovery. ++ File can be written with 0 or with 1. It selects which EROT can be accessed ++ through SPI device. ++ ++ The file is read/write. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_pg_fail ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak vadimp@nvidia.com ++Description: This file shows ASIC Power Good status. ++ Value 1 in file means ASIC Power Good failed, 0 - otherwise. ++ ++ The file is read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd1_boot_fail ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd2_boot_fail ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd_fail ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak vadimp@nvidia.com ++Description: These files are related to clock boards status in system. ++ - clk_brd1_boot_fail: warning about 1-st clock board failed to boot from CI. ++ - clk_brd2_boot_fail: warning about 2-nd clock board failed to boot from CI. ++ - clk_brd_fail: error about common clock board boot failure. ++ ++ The files are read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd_prog_en ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: This file enables programming of clock boards. ++ Default is 0 (programming disabled). ++ If the system is in locked-down mode writing this file will not be allowed. ++ ++ The file is read/write. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_converter_prog_en ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: This file enables programming of power converters. ++ Default is 0 (programming disabled). ++ If the system is in locked-down mode writing this file will not be allowed. ++ ++ The file is read/write. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_ac_ok_fail ++Date: February 2023 ++KernelVersion: 6.3 ++Contact: Vadim Pasternak ++Description: This file shows the system reset cause due to AC power failure. ++ Value 1 in file means this is reset cause, 0 - otherwise. ++ ++ The file is read only. +-- +2.20.1 + diff --git a/patch/0056-platform-x86-mlx-platform-Add-initial-support-for-ne.patch b/patch/0056-platform-x86-mlx-platform-Add-initial-support-for-ne.patch deleted file mode 100644 index 4cadcdb7b5a4..000000000000 --- a/patch/0056-platform-x86-mlx-platform-Add-initial-support-for-ne.patch +++ /dev/null @@ -1,2888 +0,0 @@ -From e30148789fa7c9554bfbac59e737d92301d09059 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 16:39:11 +0000 -Subject: [PATCH backport 5.10 056/182] platform/x86: mlx-platform: Add initial - support for new modular system - -Add initial chassis management support for Nvidia modular Ethernet -switch systems MSN4800, providing a high performance switching solution -for Enterprise Data Centers (EDC) for building Ethernet based clusters, -High-Performance Computing (HPC) and embedded environments. - -This system could be equipped with the different types of replaceable -line cards and management board. The first system flavor will support -the line card type MSN4800-C16 equipped with Lattice CPLD devices aimed -for system and ASIC control, one Nvidia FPGA for gearboxes (PHYs) -management, and four Nvidia gearboxes for the port control and with -16x100GbE QSFP28 ports and also with various devices for electrical -control. - -The system is equipped with eight slots for line cards, four slots for -power supplies and six slots for fans. It could be configured as fully -populated or with even only one line card. The line cards are -hot-pluggable. -In the future when more line card flavors are to be available (for -example line cards with 8x200Gb Eth port, with 4x400 Eth ports, or with -some kind of smart cards for offloading purpose), any type of line card -could be inserted at any slot. - -The system is based on Nvidia Spectrum-3 ASIC. The switch height is -4U and it fits standard rack size. - -System could be configured as fully populated or with even only one -line card. The line cards are hot-pluggable. - -Line cards are connected to the chassis through I2C interface for the -chassis management operations and through PCIe for the networking -operations. - -The first type of line card supports 16x100GbE QSFP28 Ethernet ports. -Those line cards equipped with the programmable devices aimed for -system control of Nvidia Ethernet switch ASIC control, Nvidia FPGA, -Nvidia gearboxes (PHYs). -The next coming card generations are supposed to support: -- Line cards with 8x200Gbe QSFP28 Ethernet ports. -- Line cards with 4x400Gbe QSFP-DD Ethernet ports. -- Smart cards equipped with Nvidia ARM CPU for offloading and for fast - access to the storage (EBoF). -- Fabric cards for inter-connection. - -The basic system initialization flow with input signals from the -programmable device to kernel hotplug driver and with OS response -to some of these signals is depicted below. - -lc#n_prsnt *-> Input: line card presence in/out events. - Informational event. Required action - 'udev' event - generation for logging. -lc#n_verified *-> Input: line card verification status events coming - after line card security signature validation by - hardware. Required action - connect line card - driver and initialized line card devices feeding - from system auxiliary power domain. -lc#n_pwr <-* Output: line card power on / off from OS. Action - should be performed by platform power management - driver. -lc#n_powered *-> Input: line card power on/off events coming after - line card "power good" on/off events, mean that - line card power up sequence has been successfully - completed or line card "power good" status has been - dropped. Required action - connect line card - devices feeding from system main power domain. -lc#n_synced *-> Input: line card synchronization events, coming - after hardware-firmware synchronization handshake. - Required action - to enable line card, in case - lc#n_ready has been received before. -lc#n_ready *-> Input: line card ready events, indicating line card - PHYs ready / unready states. Required action - - enable line card, in case lc#n_synced has been - received before. -lc#n_enable <-* Output: line card enable from OS - release FPGA and - PHYs line card devices from reset state. Action - should be performed by platform power management - driver. -lc#n_active *-> Input: when line card "active event" is received - for particular line card, its network, hardware - monitoring and thermal interfaces should be - configured according to the configuration obtained - from the firmware. When opposite "inactive event" - is received all the above interfaces should be - teared down. Required action - connect / disconnect - the above line card interfaces through ASIC I2C - chassis management driver. - -For initial support: -- Define new system type 'VMOD0011' to support new modular system. -- Provide initial platform configuration for new system type. -- Extend the registers definitions. -- Add support for modular system registers related to line card - specific events - insertion/removal, power on/off, verification - and activation. -- Add hotplug configuration for the above events. -- Add configurations for hotplug actions for the modular system. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - drivers/platform/x86/mlx-platform.c | 2198 +++++++++++++++++++++++---- - 1 file changed, 1938 insertions(+), 260 deletions(-) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 8bce3da32a42..6d14eb3dab50 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -27,9 +27,14 @@ - #define MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET 0x02 - #define MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET 0x03 - #define MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET 0x04 -+#define MLXPLAT_CPLD_LPC_REG_CPLD1_PN1_OFFSET 0x05 - #define MLXPLAT_CPLD_LPC_REG_CPLD2_PN_OFFSET 0x06 -+#define MLXPLAT_CPLD_LPC_REG_CPLD2_PN1_OFFSET 0x07 - #define MLXPLAT_CPLD_LPC_REG_CPLD3_PN_OFFSET 0x08 -+#define MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET 0x09 - #define MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET 0x0a -+#define MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET 0x0b -+#define MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET 0x1c - #define MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET 0x1d - #define MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET 0x1e - #define MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET 0x1f -@@ -38,13 +43,20 @@ - #define MLXPLAT_CPLD_LPC_REG_LED3_OFFSET 0x22 - #define MLXPLAT_CPLD_LPC_REG_LED4_OFFSET 0x23 - #define MLXPLAT_CPLD_LPC_REG_LED5_OFFSET 0x24 -+#define MLXPLAT_CPLD_LPC_REG_LED6_OFFSET 0x25 -+#define MLXPLAT_CPLD_LPC_REG_LED7_OFFSET 0x26 - #define MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION 0x2a - #define MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET 0x2b -+#define MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET 0x2d - #define MLXPLAT_CPLD_LPC_REG_GP0_OFFSET 0x2e -+#define MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET 0x2f - #define MLXPLAT_CPLD_LPC_REG_GP1_OFFSET 0x30 - #define MLXPLAT_CPLD_LPC_REG_WP1_OFFSET 0x31 - #define MLXPLAT_CPLD_LPC_REG_GP2_OFFSET 0x32 - #define MLXPLAT_CPLD_LPC_REG_WP2_OFFSET 0x33 -+#define MLXPLAT_CPLD_LPC_REG_FIELD_UPGRADE 0x34 -+#define MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET 0x35 -+#define MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET 0x36 - #define MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET 0x37 - #define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a - #define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b -@@ -57,15 +69,39 @@ - #define MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET 0x50 - #define MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET 0x51 - #define MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET 0x52 -+#define MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET 0x56 -+#define MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET 0x57 - #define MLXPLAT_CPLD_LPC_REG_PSU_OFFSET 0x58 - #define MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET 0x59 - #define MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET 0x5a - #define MLXPLAT_CPLD_LPC_REG_PWR_OFFSET 0x64 - #define MLXPLAT_CPLD_LPC_REG_PWR_EVENT_OFFSET 0x65 - #define MLXPLAT_CPLD_LPC_REG_PWR_MASK_OFFSET 0x66 -+#define MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET 0x70 -+#define MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET 0x71 -+#define MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET 0x72 - #define MLXPLAT_CPLD_LPC_REG_FAN_OFFSET 0x88 - #define MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET 0x89 - #define MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET 0x8a -+#define MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET 0x9a -+#define MLXPLAT_CPLD_LPC_REG_LC_VR_EVENT_OFFSET 0x9b -+#define MLXPLAT_CPLD_LPC_REG_LC_VR_MASK_OFFSET 0x9c -+#define MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET 0x9d -+#define MLXPLAT_CPLD_LPC_REG_LC_PG_EVENT_OFFSET 0x9e -+#define MLXPLAT_CPLD_LPC_REG_LC_PG_MASK_OFFSET 0x9f -+#define MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET 0xa0 -+#define MLXPLAT_CPLD_LPC_REG_LC_RD_EVENT_OFFSET 0xa1 -+#define MLXPLAT_CPLD_LPC_REG_LC_RD_MASK_OFFSET 0xa2 -+#define MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET 0xa3 -+#define MLXPLAT_CPLD_LPC_REG_LC_SN_EVENT_OFFSET 0xa4 -+#define MLXPLAT_CPLD_LPC_REG_LC_SN_MASK_OFFSET 0xa5 -+#define MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET 0xa6 -+#define MLXPLAT_CPLD_LPC_REG_LC_OK_EVENT_OFFSET 0xa7 -+#define MLXPLAT_CPLD_LPC_REG_LC_OK_MASK_OFFSET 0xa8 -+#define MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET 0xa9 -+#define MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET 0xaa -+#define MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET 0xab -+#define MLXPLAT_CPLD_LPC_REG_LC_PWR_ON 0xb2 - #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET 0xc7 - #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET 0xc8 - #define MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET 0xc9 -@@ -88,23 +124,28 @@ - #define MLXPLAT_CPLD_LPC_REG_TACHO4_OFFSET 0xe7 - #define MLXPLAT_CPLD_LPC_REG_TACHO5_OFFSET 0xe8 - #define MLXPLAT_CPLD_LPC_REG_TACHO6_OFFSET 0xe9 -+#define MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET 0xea - #define MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET 0xeb - #define MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET 0xec - #define MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET 0xed - #define MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET 0xee - #define MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET 0xef - #define MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET 0xf0 -+#define MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET 0xf3 -+#define MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET 0xf4 - #define MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET 0xf5 - #define MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET 0xf6 - #define MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET 0xf7 - #define MLXPLAT_CPLD_LPC_REG_TACHO_SPEED_OFFSET 0xf8 - #define MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET 0xf9 -+#define MLXPLAT_CPLD_LPC_REG_SLOT_QTY_OFFSET 0xfa - #define MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET 0xfb - #define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET 0xfc - #define MLXPLAT_CPLD_LPC_IO_RANGE 0x100 - #define MLXPLAT_CPLD_LPC_I2C_CH1_OFF 0xdb - #define MLXPLAT_CPLD_LPC_I2C_CH2_OFF 0xda - #define MLXPLAT_CPLD_LPC_I2C_CH3_OFF 0xdc -+#define MLXPLAT_CPLD_LPC_I2C_CH4_OFF 0xdd - - #define MLXPLAT_CPLD_LPC_PIO_OFFSET 0x10000UL - #define MLXPLAT_CPLD_LPC_REG1 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \ -@@ -116,6 +157,9 @@ - #define MLXPLAT_CPLD_LPC_REG3 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \ - MLXPLAT_CPLD_LPC_I2C_CH3_OFF) | \ - MLXPLAT_CPLD_LPC_PIO_OFFSET) -+#define MLXPLAT_CPLD_LPC_REG4 ((MLXPLAT_CPLD_LPC_REG_BASE_ADRR + \ -+ MLXPLAT_CPLD_LPC_I2C_CH4_OFF) | \ -+ MLXPLAT_CPLD_LPC_PIO_OFFSET) - - /* Masks for aggregation, psu, pwr and fan event in CPLD related registers. */ - #define MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF 0x04 -@@ -128,6 +172,24 @@ - #define MLXPLAT_CPLD_AGGR_ASIC_MASK_NG 0x01 - #define MLXPLAT_CPLD_AGGR_MASK_NG_DEF 0x04 - #define MLXPLAT_CPLD_AGGR_MASK_COMEX BIT(0) -+#define MLXPLAT_CPLD_AGGR_MASK_LC BIT(3) -+#define MLXPLAT_CPLD_AGGR_MASK_MODULAR (MLXPLAT_CPLD_AGGR_MASK_NG_DEF | \ -+ MLXPLAT_CPLD_AGGR_MASK_COMEX | \ -+ MLXPLAT_CPLD_AGGR_MASK_LC) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_PRSNT BIT(0) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_RDY BIT(1) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_PG BIT(2) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_SCRD BIT(3) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_SYNC BIT(4) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_ACT BIT(5) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_SDWN BIT(6) -+#define MLXPLAT_CPLD_AGGR_MASK_LC_LOW (MLXPLAT_CPLD_AGGR_MASK_LC_PRSNT | \ -+ MLXPLAT_CPLD_AGGR_MASK_LC_RDY | \ -+ MLXPLAT_CPLD_AGGR_MASK_LC_PG | \ -+ MLXPLAT_CPLD_AGGR_MASK_LC_SCRD | \ -+ MLXPLAT_CPLD_AGGR_MASK_LC_SYNC | \ -+ MLXPLAT_CPLD_AGGR_MASK_LC_ACT | \ -+ MLXPLAT_CPLD_AGGR_MASK_LC_SDWN) - #define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1 - #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6) - #define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0) -@@ -149,6 +211,9 @@ - MLXPLAT_CPLD_AGGR_MASK_CARRIER) - #define MLXPLAT_CPLD_LOW_AGGRCX_MASK 0xc1 - -+/* Masks for aggregation for modular systems */ -+#define MLXPLAT_CPLD_LPC_LC_MASK GENMASK(7, 0) -+ - /* Default I2C parent bus number */ - #define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1 - -@@ -163,9 +228,12 @@ - #define MLXPLAT_CPLD_CH1 2 - #define MLXPLAT_CPLD_CH2 10 - #define MLXPLAT_CPLD_CH3 18 -+#define MLXPLAT_CPLD_CH2_ETH_MODULAR 3 -+#define MLXPLAT_CPLD_CH3_ETH_MODULAR 43 -+#define MLXPLAT_CPLD_CH4_ETH_MODULAR 51 - - /* Number of LPC attached MUX platform devices */ --#define MLXPLAT_CPLD_LPC_MUX_DEVS 3 -+#define MLXPLAT_CPLD_LPC_MUX_DEVS 4 - - /* Hotplug devices adapter numbers */ - #define MLXPLAT_CPLD_NR_NONE -1 -@@ -175,6 +243,11 @@ - #define MLXPLAT_CPLD_FAN2_DEFAULT_NR 12 - #define MLXPLAT_CPLD_FAN3_DEFAULT_NR 13 - #define MLXPLAT_CPLD_FAN4_DEFAULT_NR 14 -+#define MLXPLAT_CPLD_NR_ASIC 3 -+#define MLXPLAT_CPLD_NR_LC_BASE 34 -+ -+#define MLXPLAT_CPLD_NR_LC_SET(nr) (MLXPLAT_CPLD_NR_LC_BASE + (nr)) -+#define MLXPLAT_CPLD_LC_ADDR 0x32 - - /* Masks and default values for watchdogs */ - #define MLXPLAT_CPLD_WD1_CLEAR_MASK GENMASK(7, 1) -@@ -190,6 +263,11 @@ - #define MLXPLAT_CPLD_WD3_DFLT_TIMEOUT 600 - #define MLXPLAT_CPLD_WD_MAX_DEVS 2 - -+#define MLXPLAT_CPLD_LPC_SYSIRQ 17 -+ -+/* Minimum power required for turning on Ethernet modular system (WATT) */ -+#define MLXPLAT_CPLD_ETH_MODULAR_PWR_MIN 50 -+ - /* mlxplat_priv - platform private data - * @pdev_i2c - i2c controller platform device - * @pdev_mux - array of mux platform devices -@@ -318,6 +396,58 @@ static struct i2c_mux_reg_platform_data mlxplat_extended_mux_data[] = { - - }; - -+/* Platform channels for modular system family */ -+static const int mlxplat_modular_upper_channel[] = { 1 }; -+static const int mlxplat_modular_channels[] = { -+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, -+ 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, -+ 38, 39, 40 -+}; -+ -+/* Platform modular mux data */ -+static struct i2c_mux_reg_platform_data mlxplat_modular_mux_data[] = { -+ { -+ .parent = 1, -+ .base_nr = MLXPLAT_CPLD_CH1, -+ .write_only = 1, -+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG4, -+ .reg_size = 1, -+ .idle_in_use = 1, -+ .values = mlxplat_modular_upper_channel, -+ .n_values = ARRAY_SIZE(mlxplat_modular_upper_channel), -+ }, -+ { -+ .parent = 1, -+ .base_nr = MLXPLAT_CPLD_CH2_ETH_MODULAR, -+ .write_only = 1, -+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG1, -+ .reg_size = 1, -+ .idle_in_use = 1, -+ .values = mlxplat_modular_channels, -+ .n_values = ARRAY_SIZE(mlxplat_modular_channels), -+ }, -+ { -+ .parent = MLXPLAT_CPLD_CH1, -+ .base_nr = MLXPLAT_CPLD_CH3_ETH_MODULAR, -+ .write_only = 1, -+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG3, -+ .reg_size = 1, -+ .idle_in_use = 1, -+ .values = mlxplat_msn21xx_channels, -+ .n_values = ARRAY_SIZE(mlxplat_msn21xx_channels), -+ }, -+ { -+ .parent = 1, -+ .base_nr = MLXPLAT_CPLD_CH4_ETH_MODULAR, -+ .write_only = 1, -+ .reg = (void __iomem *)MLXPLAT_CPLD_LPC_REG2, -+ .reg_size = 1, -+ .idle_in_use = 1, -+ .values = mlxplat_msn21xx_channels, -+ .n_values = ARRAY_SIZE(mlxplat_msn21xx_channels), -+ }, -+}; -+ - /* Platform hotplug devices */ - static struct i2c_board_info mlxplat_mlxcpld_pwr[] = { - { -@@ -968,245 +1098,1003 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { - .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, - }; - --/* Platform led default data */ --static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = { -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_pwr_items_data[] = { - { -- .label = "status:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "pwr1", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[0], -+ .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR, - }, - { -- .label = "status:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ .label = "pwr2", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[1], -+ .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR, - }, - { -- .label = "psu:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "pwr3", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_ext_pwr[0], -+ .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR, - }, - { -- .label = "psu:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "pwr4", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_ext_pwr[1], -+ .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR, - }, -+}; -+ -+static -+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_lc_act = { -+ .irq = MLXPLAT_CPLD_LPC_SYSIRQ, -+}; -+ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_asic_items_data[] = { - { -- .label = "fan1:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "asic1", -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, - }, -+}; -+ -+static struct i2c_board_info mlxplat_mlxcpld_lc_i2c_dev[] = { - { -- .label = "fan1:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, - { -- .label = "fan2:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, - { -- .label = "fan2:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, - { -- .label = "fan3:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, - { -- .label = "fan3:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, - { -- .label = "fan4:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, - { -- .label = "fan4:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, --}; -- --static struct mlxreg_core_platform_data mlxplat_default_led_data = { -- .data = mlxplat_mlxcpld_default_led_data, -- .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_data), --}; -- --/* Platform led MSN21xx system family data */ --static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data[] = { - { -- .label = "status:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ I2C_BOARD_INFO("mlxreg-lc", MLXPLAT_CPLD_LC_ADDR), -+ .platform_data = &mlxplat_mlxcpld_lc_act, - }, -+}; -+ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - { -- .label = "status:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ .label = "lc1_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 1, - }, - { -- .label = "fan:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "lc2_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 2, - }, - { -- .label = "fan:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "lc3_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 3, - }, - { -- .label = "psu1:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "lc4_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 4, - }, - { -- .label = "psu1:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "lc5_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(4), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 5, - }, - { -- .label = "psu2:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "lc6_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(5), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 6, - }, - { -- .label = "psu2:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "lc7_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(6), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 7, - }, - { -- .label = "uid:blue", -- .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "lc8_present", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = BIT(7), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 8, - }, - }; - --static struct mlxreg_core_platform_data mlxplat_msn21xx_led_data = { -- .data = mlxplat_mlxcpld_msn21xx_led_data, -- .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_led_data), --}; -- --/* Platform led for default data for 200GbE systems */ --static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_led_data[] = { -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - { -- .label = "status:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "lc1_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(0), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 1, -+ }, -+ { -+ .label = "lc2_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(1), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 2, -+ }, -+ { -+ .label = "lc3_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(2), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 3, -+ }, -+ { -+ .label = "lc4_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(3), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 4, -+ }, -+ { -+ .label = "lc5_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(4), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 5, -+ }, -+ { -+ .label = "lc6_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(5), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 6, -+ }, -+ { -+ .label = "lc7_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(6), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 7, -+ }, -+ { -+ .label = "lc8_verified", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = BIT(7), -+ .reg_prsnt = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .reg_sync = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .reg_pwr = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .reg_ena = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .slot = 8, - }, -+}; -+ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - { -- .label = "status:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ .label = "lc1_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 1, - }, - { -- .label = "psu:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "lc2_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 2, - }, - { -- .label = "psu:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "lc3_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 3, - }, - { -- .label = "fan1:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(0), -+ .label = "lc4_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 4, - }, - { -- .label = "fan1:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(0), -+ .label = "lc5_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(4), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 5, - }, - { -- .label = "fan2:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(1), -+ .label = "lc6_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(5), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 6, - }, - { -- .label = "fan2:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(1), -+ .label = "lc7_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(6), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 7, - }, - { -- .label = "fan3:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(2), -+ .label = "lc8_powered", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = BIT(7), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 8, - }, -+}; -+ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - { -- .label = "fan3:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(2), -+ .label = "lc1_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 1, - }, - { -- .label = "fan4:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(3), -+ .label = "lc2_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 2, - }, - { -- .label = "fan4:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(3), -+ .label = "lc3_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 3, - }, - { -- .label = "fan5:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(4), -+ .label = "lc4_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 4, - }, - { -- .label = "fan5:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(4), -+ .label = "lc5_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(4), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 5, - }, - { -- .label = "fan6:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(5), -+ .label = "lc6_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(5), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 6, - }, - { -- .label = "fan6:orange", -- .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -- .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -- .bit = BIT(5), -+ .label = "lc7_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(6), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 7, - }, - { -- .label = "uid:blue", -- .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "lc8_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = BIT(7), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 8, - }, - }; - --static struct mlxreg_core_platform_data mlxplat_default_ng_led_data = { -- .data = mlxplat_mlxcpld_default_ng_led_data, -- .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_led_data), -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { -+ { -+ .label = "lc1_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 1, -+ }, -+ { -+ .label = "lc2_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 2, -+ }, -+ { -+ .label = "lc3_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 3, -+ }, -+ { -+ .label = "lc4_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 4, -+ }, -+ { -+ .label = "lc5_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(4), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 5, -+ }, -+ { -+ .label = "lc6_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(5), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 6, -+ }, -+ { -+ .label = "lc7_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(6), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 7, -+ }, -+ { -+ .label = "lc8_synced", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = BIT(7), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 8, -+ }, -+}; -+ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { -+ { -+ .label = "lc1_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 1, -+ }, -+ { -+ .label = "lc2_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 2, -+ }, -+ { -+ .label = "lc3_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 3, -+ }, -+ { -+ .label = "lc4_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 4, -+ }, -+ { -+ .label = "lc5_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(4), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 5, -+ }, -+ { -+ .label = "lc6_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(5), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 6, -+ }, -+ { -+ .label = "lc7_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(6), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 7, -+ }, -+ { -+ .label = "lc8_active", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = BIT(7), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 8, -+ }, -+}; -+ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { -+ { -+ .label = "lc1_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 1, -+ }, -+ { -+ .label = "lc2_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 2, -+ }, -+ { -+ .label = "lc3_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 3, -+ }, -+ { -+ .label = "lc4_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 4, -+ }, -+ { -+ .label = "lc5_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(4), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 5, -+ }, -+ { -+ .label = "lc6_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(5), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 6, -+ }, -+ { -+ .label = "lc7_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(6), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 7, -+ }, -+ { -+ .label = "lc8_shutdown", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = BIT(7), -+ .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], -+ .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), -+ .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .slot = 8, -+ }, -+}; -+ -+static struct mlxreg_core_item mlxplat_mlxcpld_modular_items[] = { -+ { -+ .data = mlxplat_mlxcpld_ext_psu_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET, -+ .mask = MLXPLAT_CPLD_PSU_EXT_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_psu_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_pwr_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = MLXPLAT_CPLD_PWR_EXT_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_ext_pwr_items_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_default_ng_fan_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = MLXPLAT_CPLD_FAN_NG_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_fan_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_asic_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_asic_items_data), -+ .inversed = 0, -+ .health = true, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_lc_pr_items_data, -+ .kind = MLXREG_HOTPLUG_LC_PRESENT, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_LC, -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET, -+ .mask = MLXPLAT_CPLD_LPC_LC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_lc_pr_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_lc_ver_items_data, -+ .kind = MLXREG_HOTPLUG_LC_VERIFIED, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_LC, -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET, -+ .mask = MLXPLAT_CPLD_LPC_LC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_lc_ver_items_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_lc_pg_data, -+ .kind = MLXREG_HOTPLUG_LC_POWERED, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_LC, -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET, -+ .mask = MLXPLAT_CPLD_LPC_LC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_lc_pg_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_lc_ready_data, -+ .kind = MLXREG_HOTPLUG_LC_READY, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_LC, -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET, -+ .mask = MLXPLAT_CPLD_LPC_LC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_lc_ready_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_lc_synced_data, -+ .kind = MLXREG_HOTPLUG_LC_SYNCED, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_LC, -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET, -+ .mask = MLXPLAT_CPLD_LPC_LC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_lc_synced_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_lc_act_data, -+ .kind = MLXREG_HOTPLUG_LC_ACTIVE, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_LC, -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET, -+ .mask = MLXPLAT_CPLD_LPC_LC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_lc_act_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_modular_lc_sd_data, -+ .kind = MLXREG_HOTPLUG_LC_THERMAL, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_LC, -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET, -+ .mask = MLXPLAT_CPLD_LPC_LC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_modular_lc_sd_data), -+ .inversed = 0, -+ .health = false, -+ }, -+}; -+ -+static -+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_modular_data = { -+ .items = mlxplat_mlxcpld_modular_items, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_items), -+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, -+ .mask = MLXPLAT_CPLD_AGGR_MASK_MODULAR, -+ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, -+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, -+}; -+ -+/* Platform led default data */ -+static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "status:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ }, -+ { -+ .label = "psu:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan1:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan1:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan2:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan2:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan3:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan3:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan4:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan4:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_default_led_data = { -+ .data = mlxplat_mlxcpld_default_led_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_data), -+}; -+ -+/* Platform led MSN21xx system family data */ -+static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "status:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ }, -+ { -+ .label = "fan:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu1:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu1:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu2:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu2:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "uid:blue", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_msn21xx_led_data = { -+ .data = mlxplat_mlxcpld_msn21xx_led_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_led_data), -+}; -+ -+/* Platform led for default data for 200GbE systems */ -+static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_led_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "status:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ }, -+ { -+ .label = "psu:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan1:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "fan1:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "fan2:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "fan2:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "fan3:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "fan3:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "fan4:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "fan4:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "fan5:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "fan5:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "fan6:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(5), -+ }, -+ { -+ .label = "fan6:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(5), -+ }, -+ { -+ .label = "uid:blue", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_default_ng_led_data = { -+ .data = mlxplat_mlxcpld_default_ng_led_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_led_data), - }; - - /* Platform led for Comex based 100GbE systems */ -@@ -1232,59 +2120,343 @@ static struct mlxreg_core_data mlxplat_mlxcpld_comex_100G_led_data[] = { - .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, - }, - { -- .label = "fan1:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "fan1:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan1:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan2:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan2:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan3:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan3:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan4:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan4:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "uid:blue", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_comex_100G_led_data = { -+ .data = mlxplat_mlxcpld_comex_100G_led_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_comex_100G_led_data), -+}; -+ -+/* Platform led for data for modular systems */ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_led_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "status:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ }, -+ { -+ .label = "psu:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan1:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "fan1:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "fan2:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "fan2:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "fan3:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "fan3:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "fan4:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "fan4:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "fan5:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "fan5:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "fan6:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(5), -+ }, -+ { -+ .label = "fan6:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(5), -+ }, -+ { -+ .label = "fan7:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED6_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(6), -+ }, -+ { -+ .label = "fan7:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED6_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(6), -+ }, -+ { -+ .label = "uid:blue", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan_front:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED6_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan_front:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED6_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "mgmt:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED7_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "mgmt:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED7_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_modular_led_data = { -+ .data = mlxplat_mlxcpld_modular_led_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_led_data), -+}; -+ -+/* Platform register access default */ -+static struct mlxreg_core_data mlxplat_mlxcpld_default_regs_io_data[] = { -+ { -+ .label = "cpld1_version", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld2_version", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld1_pn", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "cpld2_pn", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD2_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "cpld1_version_min", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld2_version_min", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD2_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_long_pb", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_short_pb", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_aux_pwr_or_ref", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_main_pwr_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_sw_reset", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, - }, - { -- .label = "fan1:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "reset_fw_reset", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, - }, - { -- .label = "fan2:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "reset_hotswap_or_wd", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, - }, - { -- .label = "fan2:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "reset_asic_thermal", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, - }, - { -- .label = "fan3:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "psu1_on", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0200, - }, - { -- .label = "fan3:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "psu2_on", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0200, - }, - { -- .label = "fan4:green", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "pwr_cycle", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0200, - }, - { -- .label = "fan4:red", -- .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -- .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .label = "pwr_down", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0200, - }, - { -- .label = "uid:blue", -- .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -- .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .label = "select_iio", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0644, -+ }, -+ { -+ .label = "asic_health", -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .bit = 1, -+ .mode = 0444, - }, - }; - --static struct mlxreg_core_platform_data mlxplat_comex_100G_led_data = { -- .data = mlxplat_mlxcpld_comex_100G_led_data, -- .counter = ARRAY_SIZE(mlxplat_mlxcpld_comex_100G_led_data), -+static struct mlxreg_core_platform_data mlxplat_default_regs_io_data = { -+ .data = mlxplat_mlxcpld_default_regs_io_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_regs_io_data), - }; - --/* Platform register access default */ --static struct mlxreg_core_data mlxplat_mlxcpld_default_regs_io_data[] = { -+/* Platform register access MSN21xx, MSN201x, MSN274x systems families data */ -+static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { - { - .label = "cpld1_version", - .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET, -@@ -1342,33 +2514,33 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_regs_io_data[] = { - .mode = 0444, - }, - { -- .label = "reset_main_pwr_fail", -+ .label = "reset_sw_reset", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(3), - .mode = 0444, - }, - { -- .label = "reset_sw_reset", -+ .label = "reset_main_pwr_fail", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(4), - .mode = 0444, - }, - { -- .label = "reset_fw_reset", -+ .label = "reset_asic_thermal", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(5), - .mode = 0444, - }, - { -- .label = "reset_hotswap_or_wd", -+ .label = "reset_hotswap_or_halt", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(6), - .mode = 0444, - }, - { -- .label = "reset_asic_thermal", -- .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(7), -+ .label = "reset_sff_wd", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), - .mode = 0444, - }, - { -@@ -1410,13 +2582,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_regs_io_data[] = { - }, - }; - --static struct mlxreg_core_platform_data mlxplat_default_regs_io_data = { -- .data = mlxplat_mlxcpld_default_regs_io_data, -- .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_regs_io_data), -+static struct mlxreg_core_platform_data mlxplat_msn21xx_regs_io_data = { -+ .data = mlxplat_mlxcpld_msn21xx_regs_io_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_regs_io_data), - }; - --/* Platform register access MSN21xx, MSN201x, MSN274x systems families data */ --static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { -+/* Platform register access for next generation systems families data */ -+static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - { - .label = "cpld1_version", - .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET, -@@ -1429,6 +2601,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "cpld3_version", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld4_version", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, - { - .label = "cpld1_pn", - .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET, -@@ -1443,6 +2627,20 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { - .mode = 0444, - .regnum = 2, - }, -+ { -+ .label = "cpld3_pn", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD3_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "cpld4_pn", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, - { - .label = "cpld1_version_min", - .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET, -@@ -1455,6 +2653,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "cpld3_version_min", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld4_version_min", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD4_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, - { - .label = "reset_long_pb", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -@@ -1474,32 +2684,86 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { - .mode = 0444, - }, - { -- .label = "reset_sw_reset", -+ .label = "reset_from_comex", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(3), -+ .mask = GENMASK(7, 0) & ~BIT(4), - .mode = 0444, - }, - { -- .label = "reset_main_pwr_fail", -+ .label = "reset_from_asic", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(4), -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_swb_wd", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), - .mode = 0444, - }, - { - .label = "reset_asic_thermal", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_comex_pwr_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_platform", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_soc", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(5), - .mode = 0444, - }, - { -- .label = "reset_hotswap_or_halt", -- .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .label = "reset_comex_wd", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(6), - .mode = 0444, - }, - { -- .label = "reset_sff_wd", -- .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .label = "reset_voltmon_upgrade_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_system", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_sw_pwr_off", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_comex_thermal", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_reload_bios", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_ac_pwr_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(6), - .mode = 0444, - }, -@@ -1528,27 +2792,70 @@ static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_regs_io_data[] = { - .mode = 0200, - }, - { -- .label = "select_iio", -+ .label = "jtag_enable", - .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(6), -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0644, -+ }, -+ { -+ .label = "asic_health", -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .bit = 1, -+ .mode = 0444, -+ }, -+ { -+ .label = "fan_dir", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "voltreg_update_status", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET, -+ .mask = MLXPLAT_CPLD_VOLTREG_UPD_MASK, -+ .bit = 5, -+ .mode = 0444, -+ }, -+ { -+ .label = "vpd_wp", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0644, -+ }, -+ { -+ .label = "pcie_asic_reset_dis", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), - .mode = 0644, - }, - { -- .label = "asic_health", -- .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, -- .mask = MLXPLAT_CPLD_ASIC_MASK, -- .bit = 1, -+ .label = "config1", -+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "config2", -+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "ufm_version", -+ .reg = MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET, -+ .bit = GENMASK(7, 0), - .mode = 0444, - }, - }; - --static struct mlxreg_core_platform_data mlxplat_msn21xx_regs_io_data = { -- .data = mlxplat_mlxcpld_msn21xx_regs_io_data, -- .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_regs_io_data), -+static struct mlxreg_core_platform_data mlxplat_default_ng_regs_io_data = { -+ .data = mlxplat_mlxcpld_default_ng_regs_io_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_regs_io_data), - }; - --/* Platform register access for next generation systems families data */ --static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { -+/* Platform register access for modular systems families data */ -+static struct mlxreg_core_data mlxplat_mlxcpld_modular_regs_io_data[] = { - { - .label = "cpld1_version", - .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET, -@@ -1625,6 +2932,54 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "lc1_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc2_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc3_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc4_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc5_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc6_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc7_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc8_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0644, -+ }, - { - .label = "reset_long_pb", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -@@ -1638,33 +2993,33 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .mode = 0444, - }, - { -- .label = "reset_aux_pwr_or_ref", -+ .label = "reset_aux_pwr_or_fu", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(2), - .mode = 0444, - }, - { -- .label = "reset_from_comex", -+ .label = "reset_mgmt_dc_dc_pwr_fail", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(4), -+ .mask = GENMASK(7, 0) & ~BIT(3), - .mode = 0444, - }, - { -- .label = "reset_from_asic", -+ .label = "reset_sys_comex_bios", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(5), - .mode = 0444, - }, - { -- .label = "reset_swb_wd", -- .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(6), -+ .label = "reset_sw_reset", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), - .mode = 0444, - }, - { -- .label = "reset_asic_thermal", -- .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(7), -+ .label = "reset_aux_pwr_or_reload", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), - .mode = 0444, - }, - { -@@ -1686,47 +3041,144 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .mode = 0444, - }, - { -- .label = "reset_comex_wd", -+ .label = "reset_pwr_off_from_carrier", - .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(6), -+ .mask = GENMASK(7, 0) & ~BIT(7), - .mode = 0444, - }, - { -- .label = "reset_voltmon_upgrade_fail", -+ .label = "reset_swb_wd", - .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(0), - .mode = 0444, - }, - { -- .label = "reset_system", -- .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(1), -+ .label = "reset_swb_aux_pwr_or_fu", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), - .mode = 0444, - }, - { -- .label = "reset_sw_pwr_off", -+ .label = "reset_swb_dc_dc_pwr_fail", - .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(2), -+ .mask = GENMASK(7, 0) & ~BIT(3), - .mode = 0444, - }, - { -- .label = "reset_comex_thermal", -+ .label = "reset_swb_12v_fail", - .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -- .mask = GENMASK(7, 0) & ~BIT(3), -+ .mask = GENMASK(7, 0) & ~BIT(4), - .mode = 0444, - }, - { -- .label = "reset_reload_bios", -+ .label = "reset_system", - .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(5), - .mode = 0444, - }, - { -- .label = "reset_ac_pwr_fail", -+ .label = "reset_thermal_spc_or_pciesw", - .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_safe_mode", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_active_image", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_auth_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(6), - .mode = 0444, - }, -+ { -+ .label = "bios_upgrade_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, -+ }, -+ { -+ .label = "voltreg_update_status", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET, -+ .mask = MLXPLAT_CPLD_VOLTREG_UPD_MASK, -+ .bit = 5, -+ .mode = 0444, -+ }, -+ { -+ .label = "vpd_wp", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0644, -+ }, -+ { -+ .label = "pcie_asic_reset_dis", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0644, -+ }, -+ { -+ .label = "shutdown_unlock", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc1_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0200, -+ }, -+ { -+ .label = "lc2_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0200, -+ }, -+ { -+ .label = "lc3_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0200, -+ }, -+ { -+ .label = "lc4_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0200, -+ }, -+ { -+ .label = "lc5_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0200, -+ }, -+ { -+ .label = "lc6_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0200, -+ }, -+ { -+ .label = "lc7_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0200, -+ }, -+ { -+ .label = "lc8_rst_mask", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0200, -+ }, - { - .label = "psu1_on", - .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -@@ -1752,9 +3204,46 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .mode = 0200, - }, - { -- .label = "jtag_enable", -- .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, -+ .label = "psu3_on", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0200, -+ }, -+ { -+ .label = "psu4_on", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0200, -+ }, -+ { -+ .label = "auto_power_mode", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0644, -+ }, -+ { -+ .label = "pm_mgmt_en", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0644, -+ }, -+ { -+ .label = "jtag_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_FIELD_UPGRADE, -+ .mask = GENMASK(3, 0), -+ .bit = 1, -+ .mode = 0644, -+ }, -+ { -+ .label = "safe_bios_dis", -+ .reg = MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0644, -+ }, -+ { -+ .label = "safe_bios_dis_wp", -+ .reg = MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), - .mode = 0644, - }, - { -@@ -1771,24 +3260,53 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .mode = 0444, - }, - { -- .label = "voltreg_update_status", -- .reg = MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET, -- .mask = MLXPLAT_CPLD_VOLTREG_UPD_MASK, -- .bit = 5, -- .mode = 0444, -+ .label = "lc1_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0644, - }, - { -- .label = "vpd_wp", -- .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .label = "lc2_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc3_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc4_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, - .mask = GENMASK(7, 0) & ~BIT(3), - .mode = 0644, - }, - { -- .label = "pcie_asic_reset_dis", -- .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .label = "lc5_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, - .mask = GENMASK(7, 0) & ~BIT(4), - .mode = 0644, - }, -+ { -+ .label = "lc6_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc7_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0644, -+ }, -+ { -+ .label = "lc8_pwr", -+ .reg = MLXPLAT_CPLD_LPC_REG_LC_PWR_ON, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0644, -+ }, - { - .label = "config1", - .reg = MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET, -@@ -1809,9 +3327,9 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - }, - }; - --static struct mlxreg_core_platform_data mlxplat_default_ng_regs_io_data = { -- .data = mlxplat_mlxcpld_default_ng_regs_io_data, -- .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_regs_io_data), -+static struct mlxreg_core_platform_data mlxplat_modular_regs_io_data = { -+ .data = mlxplat_mlxcpld_modular_regs_io_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_regs_io_data), - }; - - /* Platform FAN default */ -@@ -2152,16 +3670,23 @@ static struct mlxreg_core_platform_data mlxplat_mlxcpld_wd_set_type3[] = { - static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) - { - switch (reg) { -+ case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP0_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WP1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WP2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_FIELD_UPGRADE: -+ case MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET: -+ case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: -@@ -2174,6 +3699,23 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_PWR_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON: - case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET: -@@ -2185,6 +3727,9 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_WD3_TLEFT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET: - return true; - } -@@ -2199,9 +3744,14 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD1_PN1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD2_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD2_PN1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD3_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: - case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET: -@@ -2210,13 +3760,20 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION: - case MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP0_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WP1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WP2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_FIELD_UPGRADE: -+ case MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET: -+ case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: -@@ -2237,6 +3794,30 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON: - case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_WP_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WD1_TMR_OFFSET: -@@ -2252,6 +3833,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD4_MVER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO3_OFFSET: -@@ -2270,6 +3854,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO_SPEED_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_SLOT_QTY_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: -@@ -2286,9 +3871,14 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD4_VER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD1_PN1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD2_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD2_PN1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD3_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: - case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET: -@@ -2297,11 +3887,18 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION: - case MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP0_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_GP2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_FIELD_UPGRADE: -+ case MLXPLAT_CPLD_LPC_SAFE_BIOS_OFFSET: -+ case MLXPLAT_CPLD_LPC_SAFE_BIOS_WP_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: -@@ -2322,6 +3919,30 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_FAN_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_IN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_VR_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PG_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_RD_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_OK_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SN_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON: - case MLXPLAT_CPLD_LPC_REG_WD2_TMR_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WD2_TLEFT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_WD3_TMR_OFFSET: -@@ -2331,6 +3952,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_CPLD3_MVER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CPLD4_MVER_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO3_OFFSET: -@@ -2349,6 +3973,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO_SPEED_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_I2C_CAP_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_SLOT_QTY_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: - case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: -@@ -2382,6 +4007,19 @@ static const struct reg_default mlxplat_mlxcpld_regmap_ng400[] = { - { MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 }, - }; - -+static const struct reg_default mlxplat_mlxcpld_regmap_eth_modular[] = { -+ { MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, 0x61 }, -+ { MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_WD1_ACT_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_WD2_ACT_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_WD3_ACT_OFFSET, 0x00 }, -+ { MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET, -+ MLXPLAT_CPLD_AGGR_MASK_LC_LOW }, -+}; -+ - struct mlxplat_mlxcpld_regmap_context { - void __iomem *base; - }; -@@ -2462,8 +4100,22 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_ng400 = { - .reg_write = mlxplat_mlxcpld_reg_write, - }; - -+static const struct regmap_config mlxplat_mlxcpld_regmap_config_eth_modular = { -+ .reg_bits = 8, -+ .val_bits = 8, -+ .max_register = 255, -+ .cache_type = REGCACHE_FLAT, -+ .writeable_reg = mlxplat_mlxcpld_writeable_reg, -+ .readable_reg = mlxplat_mlxcpld_readable_reg, -+ .volatile_reg = mlxplat_mlxcpld_volatile_reg, -+ .reg_defaults = mlxplat_mlxcpld_regmap_eth_modular, -+ .num_reg_defaults = ARRAY_SIZE(mlxplat_mlxcpld_regmap_eth_modular), -+ .reg_read = mlxplat_mlxcpld_reg_read, -+ .reg_write = mlxplat_mlxcpld_reg_write, -+}; -+ - static struct resource mlxplat_mlxcpld_resources[] = { -- [0] = DEFINE_RES_IRQ_NAMED(17, "mlxreg-hotplug"), -+ [0] = DEFINE_RES_IRQ_NAMED(MLXPLAT_CPLD_LPC_SYSIRQ, "mlxreg-hotplug"), - }; - - static struct platform_device *mlxplat_dev; -@@ -2640,6 +4292,26 @@ static int __init mlxplat_dmi_ng400_matched(const struct dmi_system_id *dmi) - return 1; - } - -+static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi) -+{ -+ int i; -+ -+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; -+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_modular_mux_data); -+ mlxplat_mux_data = mlxplat_modular_mux_data; -+ mlxplat_hotplug = &mlxplat_mlxcpld_modular_data; -+ mlxplat_hotplug->deferred_nr = MLXPLAT_CPLD_CH4_ETH_MODULAR; -+ mlxplat_led = &mlxplat_modular_led_data; -+ mlxplat_regs_io = &mlxplat_modular_regs_io_data; -+ mlxplat_fan = &mlxplat_default_fan_data; -+ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) -+ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; -+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; -+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_eth_modular; -+ -+ return 1; -+} -+ - static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - { - .callback = mlxplat_dmi_default_matched, -@@ -2689,6 +4361,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - DMI_MATCH(DMI_BOARD_NAME, "VMOD0010"), - }, - }, -+ { -+ .callback = mlxplat_dmi_modular_matched, -+ .matches = { -+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0011"), -+ }, -+ }, - { - .callback = mlxplat_dmi_msn274x_matched, - .matches = { --- -2.20.1 - diff --git a/patch/0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch b/patch/0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch new file mode 100644 index 000000000000..943780109efd --- /dev/null +++ b/patch/0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch @@ -0,0 +1,74 @@ +From fe6caa3afd2525ee83f1b2ee13a1650c596f9e1c Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Sun, 13 Aug 2023 17:51:39 +0000 +Subject: [PATH backport v6.1 32/32] Documentation/ABI: Add new attribute for + mlxreg-io sysfs interfaces + +Link: https://www.spinics.net/lists/platform-driver-x86/msg39648.html + +Add documentation for the new attributes: +- CPLD versioning: "cpld5_pn", "cpld5_version", "cpld5_version_min". +- JTAG capability: "jtag_cap", indicating the available method of + CPLD/FPGA devices field update. +- System lid status: "lid_open". +- Reset caused by long press of power button: "reset_long_pwr_pb". + +Signed-off-by: Vadim Pasternak +Reviewed-by: Michael Shych +--- + .../ABI/stable/sysfs-driver-mlxreg-io | 42 +++++++++++++++++++ + 1 file changed, 42 insertions(+) + +diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io +index 60953903d007..633be2bf2cd0 100644 +--- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io ++++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io +@@ -662,3 +662,45 @@ Description: This file shows the system reset cause due to AC power failure. + Value 1 in file means this is reset cause, 0 - otherwise. + + The file is read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_pn ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld5_version_min ++Date: August 2023 ++KernelVersion: 6.6 ++Contact: Vadim Pasternak ++Description: These files show with which CPLD part numbers, version and minor ++ versions have been burned the 5-th CPLD device equipped on a ++ system. ++ ++ The files are read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_cap ++Date: August 2023 ++KernelVersion: 6.6 ++Contact: Vadim Pasternak ++Description: This file indicates the available method of CPLD/FPGA devices ++ field update through the JTAG chain: ++ b00 - field update through LPC bus register memory space. ++ b01 - Reserved. ++ b10 - Reserved. ++ b11 - field update through CPU GPIOs bit-banging. ++ ++ The file is read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lid_open ++Date: August 2023 ++KernelVersion: 6.6 ++Contact: Vadim Pasternak ++Description: 1 - indicates that system lid is opened, otherwise 0. ++ ++ The file is read only. ++ ++What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_long_pwr_pb ++Date: August 2023 ++KernelVersion: 6.6 ++Contact: Vadim Pasternak ++Description: This file if set 1 indicates that system has been reset by ++ long press of power button. ++ ++ The file is read only. +-- +2.20.1 + diff --git a/patch/0057-platform-mellanox-mlxreg-hotplug-Extend-logic-for-ho.patch b/patch/0057-platform-mellanox-mlxreg-hotplug-Extend-logic-for-ho.patch deleted file mode 100644 index 72ea497a3a54..000000000000 --- a/patch/0057-platform-mellanox-mlxreg-hotplug-Extend-logic-for-ho.patch +++ /dev/null @@ -1,301 +0,0 @@ -From 4a9542f7b6208956b87c310942fa47b1afc45494 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 16:50:27 +0000 -Subject: [PATCH backport 5.10 057/182] platform/mellanox: mlxreg-hotplug: - Extend logic for hotplug devices operations - -Extend the structure 'mlxreg_hotplug_device" with platform device field -to allow transition of the register map and system interrupt line number -to underlying hotplug devices, sharing the same register map and -same interrupt line with 'mlxreg-hotplug' driver. - -Extend logic for hotplug devices creation and removing according to -the action associated with the hotplug device description. Previously -hotplug driver was capable to attach / de-attach upon hotplug events -only I2C devices handled by simple I2C drivers. Now it should be able -to attach also devices handled by the platform drivers. - -The motivation is to allow transition of platform data like: -- system interrupt line number, sharing with 'mlxreg-hotplug' to - underlying hotplug devices. -- shared register map of programmable devices on main board to - underlying hotplug devices. - -Additioanlly the number of 'sysfs' attributes is increased, since -modular system defines more 'sysfs' attributes. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - drivers/platform/mellanox/mlxreg-hotplug.c | 123 +++++++++++++++------ - include/linux/platform_data/mlxreg.h | 24 ++++ - 2 files changed, 112 insertions(+), 35 deletions(-) - -diff --git a/drivers/platform/mellanox/mlxreg-hotplug.c b/drivers/platform/mellanox/mlxreg-hotplug.c -index b013445147dd..117bc3f395fd 100644 ---- a/drivers/platform/mellanox/mlxreg-hotplug.c -+++ b/drivers/platform/mellanox/mlxreg-hotplug.c -@@ -28,7 +28,7 @@ - /* ASIC good health mask. */ - #define MLXREG_HOTPLUG_GOOD_HEALTH_MASK 0x02 - --#define MLXREG_HOTPLUG_ATTRS_MAX 24 -+#define MLXREG_HOTPLUG_ATTRS_MAX 128 - #define MLXREG_HOTPLUG_NOT_ASSERT 3 - - /** -@@ -89,9 +89,20 @@ mlxreg_hotplug_udev_event_send(struct kobject *kobj, - return kobject_uevent_env(kobj, KOBJ_CHANGE, mlxreg_hotplug_udev_envp); - } - -+static void -+mlxreg_hotplug_pdata_export(void *pdata, void *regmap) -+{ -+ struct mlxreg_core_hotplug_platform_data *dev_pdata = pdata; -+ -+ /* Export regmap to underlying device. */ -+ dev_pdata->regmap = regmap; -+} -+ - static int mlxreg_hotplug_device_create(struct mlxreg_hotplug_priv_data *priv, -- struct mlxreg_core_data *data) -+ struct mlxreg_core_data *data, -+ enum mlxreg_hotplug_kind kind) - { -+ struct i2c_board_info *brdinfo = data->hpdev.brdinfo; - struct mlxreg_core_hotplug_platform_data *pdata; - struct i2c_client *client; - -@@ -106,46 +117,88 @@ static int mlxreg_hotplug_device_create(struct mlxreg_hotplug_priv_data *priv, - return 0; - - pdata = dev_get_platdata(&priv->pdev->dev); -- data->hpdev.adapter = i2c_get_adapter(data->hpdev.nr + -- pdata->shift_nr); -- if (!data->hpdev.adapter) { -- dev_err(priv->dev, "Failed to get adapter for bus %d\n", -- data->hpdev.nr + pdata->shift_nr); -- return -EFAULT; -- } -+ switch (data->hpdev.action) { -+ case MLXREG_HOTPLUG_DEVICE_DEFAULT_ACTION: -+ data->hpdev.adapter = i2c_get_adapter(data->hpdev.nr + -+ pdata->shift_nr); -+ if (!data->hpdev.adapter) { -+ dev_err(priv->dev, "Failed to get adapter for bus %d\n", -+ data->hpdev.nr + pdata->shift_nr); -+ return -EFAULT; -+ } - -- client = i2c_new_client_device(data->hpdev.adapter, -- data->hpdev.brdinfo); -- if (IS_ERR(client)) { -- dev_err(priv->dev, "Failed to create client %s at bus %d at addr 0x%02x\n", -- data->hpdev.brdinfo->type, data->hpdev.nr + -- pdata->shift_nr, data->hpdev.brdinfo->addr); -+ /* Export platform data to underlying device. */ -+ if (brdinfo->platform_data) -+ mlxreg_hotplug_pdata_export(brdinfo->platform_data, pdata->regmap); - -- i2c_put_adapter(data->hpdev.adapter); -- data->hpdev.adapter = NULL; -- return PTR_ERR(client); -+ client = i2c_new_client_device(data->hpdev.adapter, -+ brdinfo); -+ if (IS_ERR(client)) { -+ dev_err(priv->dev, "Failed to create client %s at bus %d at addr 0x%02x\n", -+ brdinfo->type, data->hpdev.nr + -+ pdata->shift_nr, brdinfo->addr); -+ -+ i2c_put_adapter(data->hpdev.adapter); -+ data->hpdev.adapter = NULL; -+ return PTR_ERR(client); -+ } -+ -+ data->hpdev.client = client; -+ break; -+ case MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION: -+ /* Export platform data to underlying device. */ -+ if (data->hpdev.brdinfo && data->hpdev.brdinfo->platform_data) -+ mlxreg_hotplug_pdata_export(data->hpdev.brdinfo->platform_data, -+ pdata->regmap); -+ /* Pass parent hotplug device handle to underlying device. */ -+ data->notifier = data->hpdev.notifier; -+ data->hpdev.pdev = platform_device_register_resndata(&priv->pdev->dev, -+ brdinfo->type, -+ data->hpdev.nr, -+ NULL, 0, data, -+ sizeof(*data)); -+ if (IS_ERR(data->hpdev.pdev)) -+ return PTR_ERR(data->hpdev.pdev); -+ -+ break; -+ default: -+ break; - } - -- data->hpdev.client = client; -+ if (data->hpdev.notifier && data->hpdev.notifier->user_handler) -+ return data->hpdev.notifier->user_handler(data->hpdev.notifier->handle, kind, 1); - - return 0; - } - - static void - mlxreg_hotplug_device_destroy(struct mlxreg_hotplug_priv_data *priv, -- struct mlxreg_core_data *data) -+ struct mlxreg_core_data *data, -+ enum mlxreg_hotplug_kind kind) - { - /* Notify user by sending hwmon uevent. */ - mlxreg_hotplug_udev_event_send(&priv->hwmon->kobj, data, false); -+ if (data->hpdev.notifier && data->hpdev.notifier->user_handler) -+ data->hpdev.notifier->user_handler(data->hpdev.notifier->handle, kind, 0); -+ -+ switch (data->hpdev.action) { -+ case MLXREG_HOTPLUG_DEVICE_DEFAULT_ACTION: -+ if (data->hpdev.client) { -+ i2c_unregister_device(data->hpdev.client); -+ data->hpdev.client = NULL; -+ } - -- if (data->hpdev.client) { -- i2c_unregister_device(data->hpdev.client); -- data->hpdev.client = NULL; -- } -- -- if (data->hpdev.adapter) { -- i2c_put_adapter(data->hpdev.adapter); -- data->hpdev.adapter = NULL; -+ if (data->hpdev.adapter) { -+ i2c_put_adapter(data->hpdev.adapter); -+ data->hpdev.adapter = NULL; -+ } -+ break; -+ case MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION: -+ if (data->hpdev.pdev) -+ platform_device_unregister(data->hpdev.pdev); -+ break; -+ default: -+ break; - } - } - -@@ -317,14 +370,14 @@ mlxreg_hotplug_work_helper(struct mlxreg_hotplug_priv_data *priv, - data = item->data + bit; - if (regval & BIT(bit)) { - if (item->inversed) -- mlxreg_hotplug_device_destroy(priv, data); -+ mlxreg_hotplug_device_destroy(priv, data, item->kind); - else -- mlxreg_hotplug_device_create(priv, data); -+ mlxreg_hotplug_device_create(priv, data, item->kind); - } else { - if (item->inversed) -- mlxreg_hotplug_device_create(priv, data); -+ mlxreg_hotplug_device_create(priv, data, item->kind); - else -- mlxreg_hotplug_device_destroy(priv, data); -+ mlxreg_hotplug_device_destroy(priv, data, item->kind); - } - } - -@@ -381,7 +434,7 @@ mlxreg_hotplug_health_work_helper(struct mlxreg_hotplug_priv_data *priv, - * ASIC is in steady state. Connect associated - * device, if configured. - */ -- mlxreg_hotplug_device_create(priv, data); -+ mlxreg_hotplug_device_create(priv, data, item->kind); - data->attached = true; - } - } else { -@@ -391,7 +444,7 @@ mlxreg_hotplug_health_work_helper(struct mlxreg_hotplug_priv_data *priv, - * in steady state. Disconnect associated - * device, if it has been connected. - */ -- mlxreg_hotplug_device_destroy(priv, data); -+ mlxreg_hotplug_device_destroy(priv, data, item->kind); - data->attached = false; - data->health_cntr = 0; - } -@@ -630,7 +683,7 @@ static void mlxreg_hotplug_unset_irq(struct mlxreg_hotplug_priv_data *priv) - /* Remove all the attached devices in group. */ - count = item->count; - for (j = 0; j < count; j++, data++) -- mlxreg_hotplug_device_destroy(priv, data); -+ mlxreg_hotplug_device_destroy(priv, data, item->kind); - } - } - -diff --git a/include/linux/platform_data/mlxreg.h b/include/linux/platform_data/mlxreg.h -index 49f0e15a10dd..3122d550dc00 100644 ---- a/include/linux/platform_data/mlxreg.h -+++ b/include/linux/platform_data/mlxreg.h -@@ -69,6 +69,19 @@ enum mlxreg_hotplug_device_action { - MLXREG_HOTPLUG_DEVICE_NO_ACTION = 2, - }; - -+/** -+ * struct mlxreg_core_hotplug_notifier - hotplug notifier block: -+ * -+ * @identity: notifier identity name; -+ * @handle: user handle to be passed by user handler function; -+ * @user_handler: user handler function associated with the event; -+ */ -+struct mlxreg_core_hotplug_notifier { -+ char identity[MLXREG_CORE_LABEL_MAX_SIZE]; -+ void *handle; -+ int (*user_handler)(void *handle, enum mlxreg_hotplug_kind kind, u8 action); -+}; -+ - /** - * struct mlxreg_hotplug_device - I2C device data: - * -@@ -76,7 +89,11 @@ enum mlxreg_hotplug_device_action { - * @client: I2C device client; - * @brdinfo: device board information; - * @nr: I2C device adapter number, to which device is to be attached; -+ * @pdev: platform device, if device is instantiated as a platform device; - * @action: action to be performed upon event receiving; -+ * @handle: user handle to be passed by user handler function; -+ * @user_handler: user handler function associated with the event; -+ * @notifier: pointer to event notifier block; - * - * Structure represents I2C hotplug device static data (board topology) and - * dynamic data (related kernel objects handles). -@@ -86,7 +103,11 @@ struct mlxreg_hotplug_device { - struct i2c_client *client; - struct i2c_board_info *brdinfo; - int nr; -+ struct platform_device *pdev; - enum mlxreg_hotplug_device_action action; -+ void *handle; -+ int (*user_handler)(void *handle, enum mlxreg_hotplug_kind kind, u8 action); -+ struct mlxreg_core_hotplug_notifier *notifier; - }; - - /** -@@ -104,10 +125,12 @@ struct mlxreg_hotplug_device { - * @mode: access mode; - * @np - pointer to node platform associated with attribute; - * @hpdev - hotplug device data; -+ * @notifier: pointer to event notifier block; - * @health_cntr: dynamic device health indication counter; - * @attached: true if device has been attached after good health indication; - * @regnum: number of registers occupied by multi-register attribute; - * @slot: slot number, at which device is located; -+ * @secured: if set indicates that entry access is secured; - */ - struct mlxreg_core_data { - char label[MLXREG_CORE_LABEL_MAX_SIZE]; -@@ -122,6 +145,7 @@ struct mlxreg_core_data { - umode_t mode; - struct device_node *np; - struct mlxreg_hotplug_device hpdev; -+ struct mlxreg_core_hotplug_notifier *notifier; - u32 health_cntr; - bool attached; - u8 regnum; --- -2.20.1 - diff --git a/patch/0058-platform-x86-mlx-platform-Configure-notifier-callbac.patch b/patch/0058-platform-x86-mlx-platform-Configure-notifier-callbac.patch deleted file mode 100644 index 71bb3473513b..000000000000 --- a/patch/0058-platform-x86-mlx-platform-Configure-notifier-callbac.patch +++ /dev/null @@ -1,507 +0,0 @@ -From 810957c2eed0f5e5f239a332d0367dfa02ec03f6 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 17:25:30 +0000 -Subject: [PATCH backport 5.10 058/182] platform/x86: mlx-platform: Configure - notifier callbacks for modular system - -Add event notifier callbacks for modular system line cards. These -callbacks are to be passed to "mlxreg-hotplug" driver by line card -driver during probing. Then, when any line card related hotplug event -is received (insertion ,power, synch, ready), hotplug driver will -invoke callback for the relevant line card. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - drivers/platform/x86/mlx-platform.c | 83 +++++++++++++++++++++++++++++ - 1 file changed, 83 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 6d14eb3dab50..8e1e298cf18b 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -1178,6 +1178,33 @@ static struct i2c_board_info mlxplat_mlxcpld_lc_i2c_dev[] = { - }, - }; - -+static struct mlxreg_core_hotplug_notifier mlxplat_mlxcpld_modular_lc_notifier[] = { -+ { -+ .identity = "lc1", -+ }, -+ { -+ .identity = "lc2", -+ }, -+ { -+ .identity = "lc3", -+ }, -+ { -+ .identity = "lc4", -+ }, -+ { -+ .identity = "lc5", -+ }, -+ { -+ .identity = "lc6", -+ }, -+ { -+ .identity = "lc7", -+ }, -+ { -+ .identity = "lc8", -+ }, -+}; -+ - static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - { - .label = "lc1_present", -@@ -1186,6 +1213,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[0], - .slot = 1, - }, - { -@@ -1195,6 +1223,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[1], - .slot = 2, - }, - { -@@ -1204,6 +1233,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[2], - .slot = 3, - }, - { -@@ -1213,6 +1243,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[3], - .slot = 4, - }, - { -@@ -1222,6 +1253,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[4], - .slot = 5, - }, - { -@@ -1231,6 +1263,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[5], - .slot = 6, - }, - { -@@ -1240,6 +1273,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[6], - .slot = 7, - }, - { -@@ -1249,6 +1283,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pr_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[7], - .slot = 8, - }, - }; -@@ -1265,6 +1300,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[0], - .slot = 1, - }, - { -@@ -1278,6 +1314,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[1], - .slot = 2, - }, - { -@@ -1291,6 +1328,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[2], - .slot = 3, - }, - { -@@ -1304,6 +1342,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[3], - .slot = 4, - }, - { -@@ -1317,6 +1356,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[4], - .slot = 5, - }, - { -@@ -1330,6 +1370,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[5], - .slot = 6, - }, - { -@@ -1343,6 +1384,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[6], - .slot = 7, - }, - { -@@ -1356,6 +1398,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ver_items_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_PLATFORM_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[7], - .slot = 8, - }, - }; -@@ -1368,6 +1411,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[0], - .slot = 1, - }, - { -@@ -1377,6 +1421,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[1], - .slot = 2, - }, - { -@@ -1386,6 +1431,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[2], - .slot = 3, - }, - { -@@ -1395,6 +1441,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[3], - .slot = 4, - }, - { -@@ -1404,6 +1451,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[4], - .slot = 5, - }, - { -@@ -1413,6 +1461,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[5], - .slot = 6, - }, - { -@@ -1422,6 +1471,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[6], - .slot = 7, - }, - { -@@ -1431,6 +1481,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_pg_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[7], - .slot = 8, - }, - }; -@@ -1443,6 +1494,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[0], - .slot = 1, - }, - { -@@ -1452,6 +1504,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[1], - .slot = 2, - }, - { -@@ -1461,6 +1514,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[2], - .slot = 3, - }, - { -@@ -1470,6 +1524,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[3], - .slot = 4, - }, - { -@@ -1479,6 +1534,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[4], - .slot = 5, - }, - { -@@ -1488,6 +1544,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[5], - .slot = 6, - }, - { -@@ -1497,6 +1554,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[6], - .slot = 7, - }, - { -@@ -1506,6 +1564,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_ready_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[7], - .slot = 8, - }, - }; -@@ -1518,6 +1577,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[0], - .slot = 1, - }, - { -@@ -1527,6 +1587,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[1], - .slot = 2, - }, - { -@@ -1536,6 +1597,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[2], - .slot = 3, - }, - { -@@ -1545,6 +1607,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[3], - .slot = 4, - }, - { -@@ -1554,6 +1617,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[4], - .slot = 5, - }, - { -@@ -1563,6 +1627,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[5], - .slot = 6, - }, - { -@@ -1572,6 +1637,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[6], - .slot = 7, - }, - { -@@ -1581,6 +1647,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_synced_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[7], - .slot = 8, - }, - }; -@@ -1593,6 +1660,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[0], - .slot = 1, - }, - { -@@ -1602,6 +1670,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[1], - .slot = 2, - }, - { -@@ -1611,6 +1680,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[2], - .slot = 3, - }, - { -@@ -1620,6 +1690,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[3], - .slot = 4, - }, - { -@@ -1629,6 +1700,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[4], - .slot = 5, - }, - { -@@ -1638,6 +1710,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[5], - .slot = 6, - }, - { -@@ -1647,6 +1720,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[6], - .slot = 7, - }, - { -@@ -1656,6 +1730,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_act_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[7], - .slot = 8, - }, - }; -@@ -1668,6 +1743,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[0], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(0), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[0], - .slot = 1, - }, - { -@@ -1677,6 +1753,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[1], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(1), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[1], - .slot = 2, - }, - { -@@ -1686,6 +1763,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[2], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(2), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[2], - .slot = 3, - }, - { -@@ -1695,6 +1773,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[3], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(3), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[3], - .slot = 4, - }, - { -@@ -1704,6 +1783,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[4], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(4), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[4], - .slot = 5, - }, - { -@@ -1713,6 +1793,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[5], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(5), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[5], - .slot = 6, - }, - { -@@ -1722,6 +1803,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[6], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(6), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[6], - .slot = 7, - }, - { -@@ -1731,6 +1813,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_lc_sd_data[] = { - .hpdev.brdinfo = &mlxplat_mlxcpld_lc_i2c_dev[7], - .hpdev.nr = MLXPLAT_CPLD_NR_LC_SET(7), - .hpdev.action = MLXREG_HOTPLUG_DEVICE_NO_ACTION, -+ .hpdev.notifier = &mlxplat_mlxcpld_modular_lc_notifier[7], - .slot = 8, - }, - }; --- -2.20.1 - diff --git a/patch/0059-platform-mellanox-mlxreg-io-Extend-number-of-hwmon-a.patch b/patch/0059-platform-mellanox-mlxreg-io-Extend-number-of-hwmon-a.patch deleted file mode 100644 index 2050b790d88b..000000000000 --- a/patch/0059-platform-mellanox-mlxreg-io-Extend-number-of-hwmon-a.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 1832955f5b8d4f7dc9e20d4e860564d798f6d24c Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 25 Mar 2021 20:12:07 +0200 -Subject: [PATCH backport 5.10 059/182] platform/mellanox: mlxreg-io: Extend - number of hwmon attributes - -Extend maximum number of the attributes, exposed to 'sysfs'. -It is requires in order to support modular systems, which -provide more attributes for system control, statuses and info. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Jiri Pirko ---- - drivers/platform/mellanox/mlxreg-io.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/platform/mellanox/mlxreg-io.c b/drivers/platform/mellanox/mlxreg-io.c -index a916cd89cbbe..2c2686d5c2fc 100644 ---- a/drivers/platform/mellanox/mlxreg-io.c -+++ b/drivers/platform/mellanox/mlxreg-io.c -@@ -18,7 +18,7 @@ - - /* Attribute parameters. */ - #define MLXREG_IO_ATT_SIZE 10 --#define MLXREG_IO_ATT_NUM 48 -+#define MLXREG_IO_ATT_NUM 96 - - /** - * struct mlxreg_io_priv_data - driver's private data: --- -2.20.1 - diff --git a/patch/0060-platform_data-mlxreg-Add-new-field-for-secured-acces.patch b/patch/0060-platform_data-mlxreg-Add-new-field-for-secured-acces.patch deleted file mode 100644 index 53ed462f7de1..000000000000 --- a/patch/0060-platform_data-mlxreg-Add-new-field-for-secured-acces.patch +++ /dev/null @@ -1,36 +0,0 @@ -From d48bd08b57cf84861e741ef8e5a2c4d3d142401c Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 21:39:51 +0000 -Subject: [PATCH backport 5.10 060/182] platform_data/mlxreg: Add new field for - secured access - -Extend structure 'mlxreg_core_data' with the field "secured". The -purpose of this field is to restrict access to some attributes, if -kernel is configured with security options, like: -LOCK_DOWN_KERNEL_FORCE_CONFIDENTIALITY. -Access to some attributes, which for example, allow burning of some -hardware components, like FPGA, CPLD, SPI, etcetera can break the -system. In case user does not want to allow such access, it can disable -it by setting security options. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael Shych ---- - include/linux/platform_data/mlxreg.h | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/include/linux/platform_data/mlxreg.h b/include/linux/platform_data/mlxreg.h -index 3122d550dc00..40185f9d7c14 100644 ---- a/include/linux/platform_data/mlxreg.h -+++ b/include/linux/platform_data/mlxreg.h -@@ -150,6 +150,7 @@ struct mlxreg_core_data { - bool attached; - u8 regnum; - u8 slot; -+ u8 secured; - }; - - /** --- -2.20.1 - diff --git a/patch/0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch b/patch/0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch new file mode 100644 index 000000000000..ee2b41fb18de --- /dev/null +++ b/patch/0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch @@ -0,0 +1,59 @@ +From aa410417368e3141e96e5331c1353b0e9dcf60fa Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko +Date: Mon, 19 Dec 2022 14:42:33 +0200 +Subject: [PATCH backport 6.1.42 61/85] pinctrl: Introduce struct pinfunction + and PINCTRL_PINFUNCTION() macro + +BugLink: https://bugs.launchpad.net/bugs/2012743 + +There are many pin control drivers define their own data type for +pin function representation which is the same or embed the same data +as newly introduced one. Provide the data type and convenient macro +for all pin control drivers. + +Signed-off-by: Andy Shevchenko +Reviewed-by: Linus Walleij +Acked-by: Mika Westerberg +(cherry picked from commit 443a0a0f0cf4f432c7af6654b7f2f920d411d379) +Signed-off-by: Asmaa Mnebhi +Acked-by: Tim Gardner +Acked-by: Bartlomiej Zolnierkiewicz +Signed-off-by: Bartlomiej Zolnierkiewicz +--- + include/linux/pinctrl/pinctrl.h | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h +index 487117ccb1bc..fb25085d0922 100644 +--- a/include/linux/pinctrl/pinctrl.h ++++ b/include/linux/pinctrl/pinctrl.h +@@ -206,6 +206,26 @@ extern int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, + const char *pin_group, const unsigned **pins, + unsigned *num_pins); + ++/** ++ * struct pinfunction - Description about a function ++ * @name: Name of the function ++ * @groups: An array of groups for this function ++ * @ngroups: Number of groups in @groups ++ */ ++struct pinfunction { ++ const char *name; ++ const char * const *groups; ++ size_t ngroups; ++}; ++ ++/* Convenience macro to define a single named pinfunction */ ++#define PINCTRL_PINFUNCTION(_name, _groups, _ngroups) \ ++(struct pinfunction) { \ ++ .name = (_name), \ ++ .groups = (_groups), \ ++ .ngroups = (_ngroups), \ ++ } ++ + #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_PINCTRL) + extern struct pinctrl_dev *of_pinctrl_get(struct device_node *np); + #else +-- +2.20.1 + diff --git a/patch/0061-platform-mellanox-mlxreg-lc-Add-initial-support-for-.patch b/patch/0061-platform-mellanox-mlxreg-lc-Add-initial-support-for-.patch deleted file mode 100644 index 183716160b66..000000000000 --- a/patch/0061-platform-mellanox-mlxreg-lc-Add-initial-support-for-.patch +++ /dev/null @@ -1,1008 +0,0 @@ -From e8d9090e50da28c82c3bbb7ff2db58aebd1c16ff Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 21:40:46 +0000 -Subject: [PATCH backport 5.10 061/182] platform/mellanox: mlxreg-lc: Add - initial support for Nvidia line card devices - -Provide support for the Nvidia MSN4800-XX line cards for MSN4800 -Ethernet modular switch system, providing a high performance switching -solution for Enterprise Data Centers (EDC) for building Ethernet based -clusters, High-Performance Computing (HPC) and embedded environments. -Initial version provides support for line card type MSN4800-C16. This -type of line card is equipped with: -- Lattice CPLD device, used for system and ports control. -- four Nvidia gearbox devices, used for port splitting. -- FPGA device, used for gearboxes management. -- 16x100G QSFP28 ports. -- hotpswap controllers, voltage regulators, analog-to-digital - convertors, nvram devices. -- status LED. - -During initialization driver creates: -- line card's I2C tree through "i2c-mux-mlxcpd" driver. -- line card's LED objects through "leds-mlxreg" driver. -- line card's CPLD register space input / output "hwmon" attributes for - line control and monitoring through "mlxreg-io" driver. These - attributes provide CPLD and FPAG versioning, control for upgradable - components burning, NVRAM devices write protection, line card - revision, line card power consuming, line card reset cause - indication, etcetera. - -Lattice CPLD device and nvram devices are feeding from auxiliary power -domain and accessible, when line card is powered off. These devices -are connected by line card driver probing routine, invoked after line -card security verification is done by hardware and event lc#n_verified -is received for line card located in slot #n. - -Gearboxes, FPGA, hotpswap controllers, voltage regulators, -analog-to-digital convertors are feeding from main power domain. These -devices are connected after power good event "lc#n_powered" is received -for line card located in slot #n. - -The driver 'mlxreg-lc' is driven by 'mlxreg-hotplug' driver following -relevant "hotplug" events. - -Signed-off-by: Vadim Pasternak ---- - drivers/platform/mellanox/Kconfig | 12 + - drivers/platform/mellanox/Makefile | 1 + - drivers/platform/mellanox/mlxreg-lc.c | 915 ++++++++++++++++++++++++++ - 3 files changed, 928 insertions(+) - create mode 100644 drivers/platform/mellanox/mlxreg-lc.c - -diff --git a/drivers/platform/mellanox/Kconfig b/drivers/platform/mellanox/Kconfig -index 916b39dc11bc..8f6c89f0b4ff 100644 ---- a/drivers/platform/mellanox/Kconfig -+++ b/drivers/platform/mellanox/Kconfig -@@ -34,6 +34,18 @@ config MLXREG_IO - to system resets operation, system reset causes monitoring and some - kinds of mux selection. - -+config MLXREG_LC -+ tristate "Mellanox line card platform driver support" -+ depends on REGMAP -+ depends on HWMON -+ depends on I2C -+ help -+ This driver provides support for the Mellanox MSN4800-XX line cards, -+ which are the part of MSN4800 Ethernet modular switch systems -+ providing a high performance switching solution for Enterprise Data -+ Centers (EDC) for building Ethernet based clusters, High-Performance -+ Computing (HPC) and embedded environments. -+ - config MLXBF_TMFIFO - tristate "Mellanox BlueField SoC TmFifo platform driver" - depends on ARM64 -diff --git a/drivers/platform/mellanox/Makefile b/drivers/platform/mellanox/Makefile -index 499623ccf2fe..e47b6b064881 100644 ---- a/drivers/platform/mellanox/Makefile -+++ b/drivers/platform/mellanox/Makefile -@@ -7,3 +7,4 @@ obj-$(CONFIG_MLXBF_BOOTCTL) += mlxbf-bootctl.o - obj-$(CONFIG_MLXBF_TMFIFO) += mlxbf-tmfifo.o - obj-$(CONFIG_MLXREG_HOTPLUG) += mlxreg-hotplug.o - obj-$(CONFIG_MLXREG_IO) += mlxreg-io.o -+obj-$(CONFIG_MLXREG_LC) += mlxreg-lc.o -diff --git a/drivers/platform/mellanox/mlxreg-lc.c b/drivers/platform/mellanox/mlxreg-lc.c -new file mode 100644 -index 000000000000..2ddad96b154a ---- /dev/null -+++ b/drivers/platform/mellanox/mlxreg-lc.c -@@ -0,0 +1,915 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Nvidia line card driver -+ * -+ * Copyright (C) 2020 Nvidia Technologies Ltd. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* I2C bus IO offsets */ -+#define MLXREG_LC_REG_CPLD1_VER_OFFSET 0x2500 -+#define MLXREG_LC_REG_FPGA1_VER_OFFSET 0x2501 -+#define MLXREG_LC_REG_CPLD1_PN_OFFSET 0x2504 -+#define MLXREG_LC_REG_FPGA1_PN_OFFSET 0x2506 -+#define MLXREG_LC_REG_RESET_CAUSE_OFFSET 0x251d -+#define MLXREG_LC_REG_LED1_OFFSET 0x2520 -+#define MLXREG_LC_REG_GP0_OFFSET 0x252e -+#define MLXREG_LC_REG_FIELD_UPGRADE 0x2534 -+#define MLXREG_LC_CHANNEL_I2C_REG 0x25dc -+#define MLXREG_LC_REG_CPLD1_MVER_OFFSET 0x25de -+#define MLXREG_LC_REG_FPGA1_MVER_OFFSET 0x25df -+#define MLXREG_LC_REG_MAX_POWER_OFFSET 0x25f1 -+#define MLXREG_LC_REG_CONFIG_OFFSET 0x25fb -+#define MLXREG_LC_REG_MAX 0x3fff -+ -+/** -+ * enum mlxreg_lc_type - line cards types -+ * -+ * @MLXREG_LC_SN4800_C16: 100GbE line card with 16 QSFP28 ports; -+ */ -+enum mlxreg_lc_type { -+ MLXREG_LC_SN4800_C16 = 0x0000, -+}; -+ -+/** -+ * enum mlxreg_lc_state - line cards state -+ * -+ * @MLXREG_LC_INITIALIZED: line card is initialized; -+ * @MLXREG_LC_POWERED: line card is powered; -+ * @MLXREG_LC_SYNCED: line card is synchronized between hardware and firmware; -+ */ -+enum mlxreg_lc_state { -+ MLXREG_LC_INITIALIZED = BIT(0), -+ MLXREG_LC_POWERED = BIT(1), -+ MLXREG_LC_SYNCED = BIT(2), -+}; -+ -+#define MLXREG_LC_CONFIGURED (MLXREG_LC_INITIALIZED | MLXREG_LC_POWERED | MLXREG_LC_SYNCED) -+ -+/* mlxreg_lc - device private data -+ * @dev: platform device; -+ * @lock: line card lock; -+ * @par_regmap: parent device regmap handle; -+ * @data: pltaform core data; -+ * @io_data: register access platform data; -+ * @led_data: LED platform data ; -+ * @mux_data: MUX platform data; -+ * @led: LED device; -+ * @io_regs: register access device; -+ * @mux_brdinfo: mux configuration; -+ * @mux: mux devices; -+ * @aux_devs: I2C devices feeding by auxiliary power; -+ * @aux_devs_num: number of I2C devices feeding by auxiliary power; -+ * @main_devs: I2C devices feeding by main power; -+ * @main_devs_num: number of I2C devices feeding by main power; -+ * @state: line card state; -+ */ -+struct mlxreg_lc { -+ struct device *dev; -+ struct mutex lock; /* line card access lock */ -+ void *par_regmap; -+ struct mlxreg_core_data *data; -+ struct mlxreg_core_platform_data *io_data; -+ struct mlxreg_core_platform_data *led_data; -+ struct mlxcpld_mux_plat_data *mux_data; -+ struct platform_device *led; -+ struct platform_device *io_regs; -+ struct i2c_board_info *mux_brdinfo; -+ struct platform_device *mux; -+ struct mlxreg_hotplug_device *aux_devs; -+ int aux_devs_num; -+ struct mlxreg_hotplug_device *main_devs; -+ int main_devs_num; -+ enum mlxreg_lc_state state; -+}; -+ -+static bool mlxreg_lc_writeable_reg(struct device *dev, unsigned int reg) -+{ -+ switch (reg) { -+ case MLXREG_LC_REG_LED1_OFFSET: -+ case MLXREG_LC_REG_GP0_OFFSET: -+ case MLXREG_LC_REG_FIELD_UPGRADE: -+ case MLXREG_LC_CHANNEL_I2C_REG: -+ return true; -+ } -+ return false; -+} -+ -+static bool mlxreg_lc_readable_reg(struct device *dev, unsigned int reg) -+{ -+ switch (reg) { -+ case MLXREG_LC_REG_CPLD1_VER_OFFSET: -+ case MLXREG_LC_REG_FPGA1_VER_OFFSET: -+ case MLXREG_LC_REG_CPLD1_PN_OFFSET: -+ case MLXREG_LC_REG_FPGA1_PN_OFFSET: -+ case MLXREG_LC_REG_RESET_CAUSE_OFFSET: -+ case MLXREG_LC_REG_LED1_OFFSET: -+ case MLXREG_LC_REG_GP0_OFFSET: -+ case MLXREG_LC_REG_FIELD_UPGRADE: -+ case MLXREG_LC_CHANNEL_I2C_REG: -+ case MLXREG_LC_REG_CPLD1_MVER_OFFSET: -+ case MLXREG_LC_REG_FPGA1_MVER_OFFSET: -+ case MLXREG_LC_REG_MAX_POWER_OFFSET: -+ case MLXREG_LC_REG_CONFIG_OFFSET: -+ return true; -+ } -+ return false; -+} -+ -+static bool mlxreg_lc_volatile_reg(struct device *dev, unsigned int reg) -+{ -+ switch (reg) { -+ case MLXREG_LC_REG_CPLD1_VER_OFFSET: -+ case MLXREG_LC_REG_FPGA1_VER_OFFSET: -+ case MLXREG_LC_REG_CPLD1_PN_OFFSET: -+ case MLXREG_LC_REG_FPGA1_PN_OFFSET: -+ case MLXREG_LC_REG_RESET_CAUSE_OFFSET: -+ case MLXREG_LC_REG_LED1_OFFSET: -+ case MLXREG_LC_REG_GP0_OFFSET: -+ case MLXREG_LC_REG_FIELD_UPGRADE: -+ case MLXREG_LC_CHANNEL_I2C_REG: -+ case MLXREG_LC_REG_CPLD1_MVER_OFFSET: -+ case MLXREG_LC_REG_FPGA1_MVER_OFFSET: -+ case MLXREG_LC_REG_MAX_POWER_OFFSET: -+ case MLXREG_LC_REG_CONFIG_OFFSET: -+ return true; -+ } -+ return false; -+} -+ -+static const struct reg_default mlxreg_lc_regmap_default[] = { -+ { MLXREG_LC_CHANNEL_I2C_REG, 0x00 }, -+}; -+ -+/* Configuration for the register map of a device with 2 bytes address space. */ -+static const struct regmap_config mlxreg_lc_regmap_conf = { -+ .reg_bits = 16, -+ .val_bits = 8, -+ .max_register = MLXREG_LC_REG_MAX, -+ .cache_type = REGCACHE_FLAT, -+ .writeable_reg = mlxreg_lc_writeable_reg, -+ .readable_reg = mlxreg_lc_readable_reg, -+ .volatile_reg = mlxreg_lc_volatile_reg, -+ .reg_defaults = mlxreg_lc_regmap_default, -+ .num_reg_defaults = ARRAY_SIZE(mlxreg_lc_regmap_default), -+}; -+ -+/* Default channels vector. -+ * It contains only the channels, which physically connected to the devices, -+ * empty channels are skipped. -+ */ -+static int mlxreg_lc_chan[] = { -+ 0x04, 0x05, 0x06, 0x07, 0x08, 0x10, 0x20, 0x21, 0x22, 0x23, 0x40, 0x41, -+ 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, -+ 0x4e, 0x4f -+}; -+ -+/* Defaul mux configuration. */ -+static struct mlxcpld_mux_plat_data mlxreg_lc_mux_data[] = { -+ { -+ .chan_ids = mlxreg_lc_chan, -+ .num_adaps = ARRAY_SIZE(mlxreg_lc_chan), -+ .sel_reg_addr = MLXREG_LC_CHANNEL_I2C_REG, -+ .reg_size = 2, -+ }, -+}; -+ -+/* Defaul mux board info. */ -+static struct i2c_board_info mlxreg_lc_mux_brdinfo = { -+ I2C_BOARD_INFO("i2c-mux-mlxcpld", 0x32), -+}; -+ -+/* Line card default auxiliary power static devices. */ -+static struct i2c_board_info mlxreg_lc_aux_pwr_devices[] = { -+ { -+ I2C_BOARD_INFO("24c32", 0x51), -+ }, -+ { -+ I2C_BOARD_INFO("24c32", 0x51), -+ }, -+}; -+ -+/* Line card default auxiliary power board info. */ -+static struct mlxreg_hotplug_device mlxreg_lc_aux_pwr_brdinfo[] = { -+ { -+ .brdinfo = &mlxreg_lc_aux_pwr_devices[0], -+ .nr = 3, -+ }, -+ { -+ .brdinfo = &mlxreg_lc_aux_pwr_devices[1], -+ .nr = 4, -+ }, -+}; -+ -+/* Line card default main power static devices. */ -+static struct i2c_board_info mlxreg_lc_main_pwr_devices[] = { -+ { -+ I2C_BOARD_INFO("mp2975", 0x62), -+ }, -+ { -+ I2C_BOARD_INFO("mp2975", 0x64), -+ }, -+ { -+ I2C_BOARD_INFO("max11603", 0x6d), -+ }, -+ { -+ I2C_BOARD_INFO("lm25066", 0x15), -+ }, -+}; -+ -+/* Line card default main power board info. */ -+static struct mlxreg_hotplug_device mlxreg_lc_main_pwr_brdinfo[] = { -+ { -+ .brdinfo = &mlxreg_lc_main_pwr_devices[0], -+ .nr = 0, -+ }, -+ { -+ .brdinfo = &mlxreg_lc_main_pwr_devices[1], -+ .nr = 0, -+ }, -+ { -+ .brdinfo = &mlxreg_lc_main_pwr_devices[2], -+ .nr = 1, -+ }, -+ { -+ .brdinfo = &mlxreg_lc_main_pwr_devices[3], -+ .nr = 2, -+ }, -+}; -+ -+/* LED default data. */ -+static struct mlxreg_core_data mlxreg_lc_led_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXREG_LC_REG_LED1_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "status:orange", -+ .reg = MLXREG_LC_REG_LED1_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxreg_lc_led = { -+ .identity = "pci", -+ .data = mlxreg_lc_led_data, -+ .counter = ARRAY_SIZE(mlxreg_lc_led_data), -+}; -+ -+/* Default register access data. */ -+static struct mlxreg_core_data mlxreg_lc_io_data[] = { -+ { -+ .label = "cpld1_version", -+ .reg = MLXREG_LC_REG_CPLD1_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "fpga1_version", -+ .reg = MLXREG_LC_REG_FPGA1_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld1_pn", -+ .reg = MLXREG_LC_REG_CPLD1_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "fpga1_pn", -+ .reg = MLXREG_LC_REG_FPGA1_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "cpld1_version_min", -+ .reg = MLXREG_LC_REG_CPLD1_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "fpga1_version_min", -+ .reg = MLXREG_LC_REG_FPGA1_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_fpga_not_done", -+ .reg = MLXREG_LC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_aux_pwr_or_ref", -+ .reg = MLXREG_LC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_dc_dc_pwr_fail", -+ .reg = MLXREG_LC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_from_chassis", -+ .reg = MLXREG_LC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_pwr_off_from_chassis", -+ .reg = MLXREG_LC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_line_card", -+ .reg = MLXREG_LC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_line_card_pwr_en", -+ .reg = MLXREG_LC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld_upgrade_en", -+ .reg = MLXREG_LC_REG_FIELD_UPGRADE, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0644, -+ .secured = 1, -+ }, -+ { -+ .label = "fpga_upgrade_en", -+ .reg = MLXREG_LC_REG_FIELD_UPGRADE, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0644, -+ .secured = 1, -+ }, -+ { -+ .label = "qsfp_pwr_en", -+ .reg = MLXREG_LC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0644, -+ }, -+ { -+ .label = "vpd_wp", -+ .reg = MLXREG_LC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0644, -+ .secured = 1, -+ }, -+ { -+ .label = "ini_wp", -+ .reg = MLXREG_LC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0644, -+ .secured = 1, -+ }, -+ { -+ .label = "agb_spi_burn_en", -+ .reg = MLXREG_LC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0644, -+ .secured = 1, -+ }, -+ { -+ .label = "fpga_spi_burn_en", -+ .reg = MLXREG_LC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0644, -+ .secured = 1, -+ }, -+ { -+ .label = "max_power", -+ .reg = MLXREG_LC_REG_MAX_POWER_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "config", -+ .reg = MLXREG_LC_REG_CONFIG_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxreg_lc_regs_io = { -+ .data = mlxreg_lc_io_data, -+ .counter = ARRAY_SIZE(mlxreg_lc_io_data), -+}; -+ -+static int -+mlxreg_lc_create_static_devices(struct mlxreg_lc *mlxreg_lc, struct mlxreg_hotplug_device *devs, -+ int size) -+{ -+ struct mlxreg_hotplug_device *dev = devs; -+ int i; -+ -+ /* Create static I2C device feeding by auxiliary or main power. */ -+ for (i = 0; i < size; i++, dev++) { -+ dev->client = i2c_new_client_device(dev->adapter, dev->brdinfo); -+ if (IS_ERR(dev->client)) { -+ dev_err(mlxreg_lc->dev, "Failed to create client %s at bus %d at addr 0x%02x\n", -+ dev->brdinfo->type, dev->nr, dev->brdinfo->addr); -+ -+ dev->adapter = NULL; -+ goto fail_create_static_devices; -+ } -+ } -+ -+ return 0; -+ -+fail_create_static_devices: -+ while (--i >= 0) { -+ dev = devs + i; -+ i2c_unregister_device(dev->client); -+ dev->client = NULL; -+ } -+ return IS_ERR(dev->client); -+} -+ -+static void -+mlxreg_lc_destroy_static_devices(struct mlxreg_lc *mlxreg_lc, struct mlxreg_hotplug_device *devs, -+ int size) -+{ -+ struct mlxreg_hotplug_device *dev = devs; -+ int i; -+ -+ /* Destroy static I2C device feeding by auxiliary or main power. */ -+ for (i = 0; i < size; i++, dev++) { -+ if (dev->client) { -+ i2c_unregister_device(dev->client); -+ dev->client = NULL; -+ } -+ } -+} -+ -+static int mlxreg_lc_power_on_off(struct mlxreg_lc *mlxreg_lc, u8 action) -+{ -+ u32 regval; -+ int err; -+ -+ mutex_lock(&mlxreg_lc->lock); -+ -+ err = regmap_read(mlxreg_lc->par_regmap, mlxreg_lc->data->reg_pwr, ®val); -+ if (err) -+ goto regmap_read_fail; -+ -+ if (action) -+ regval |= BIT(mlxreg_lc->data->slot - 1); -+ else -+ regval &= ~BIT(mlxreg_lc->data->slot - 1); -+ -+ err = regmap_write(mlxreg_lc->par_regmap, mlxreg_lc->data->reg_pwr, regval); -+ -+ mutex_unlock(&mlxreg_lc->lock); -+ -+regmap_read_fail: -+ return err; -+} -+ -+static int mlxreg_lc_enable_disable(struct mlxreg_lc *mlxreg_lc, bool action) -+{ -+ u32 regval; -+ int err; -+ -+ /* -+ * Hardware holds the line card after powering on in the disabled state. Holding line card -+ * in disabled state protects access to the line components, like FPGA and gearboxes. -+ * Line card should be enabled in order to get it in operational state. Line card could be -+ * disabled for moving it to non-operational state. Enabling line card does not affect the -+ * line card which is already has been enabled. Disabling does not affect the disabled line -+ * card. -+ */ -+ mutex_lock(&mlxreg_lc->lock); -+ -+ err = regmap_read(mlxreg_lc->par_regmap, mlxreg_lc->data->reg_ena, ®val); -+ if (err) -+ goto regmap_read_fail; -+ -+ if (action) -+ regval |= BIT(mlxreg_lc->data->slot - 1); -+ else -+ regval &= ~BIT(mlxreg_lc->data->slot - 1); -+ -+ err = regmap_write(mlxreg_lc->par_regmap, mlxreg_lc->data->reg_ena, regval); -+ -+regmap_read_fail: -+ mutex_unlock(&mlxreg_lc->lock); -+ -+ return err; -+} -+ -+static int -+mlxreg_lc_sn4800_c16_config_init(struct mlxreg_lc *mlxreg_lc, void *regmap, -+ struct mlxreg_core_data *data) -+{ -+ struct device *dev = &data->hpdev.client->dev; -+ -+ /* Set line card configuration according to the type. */ -+ mlxreg_lc->mux_data = mlxreg_lc_mux_data; -+ mlxreg_lc->io_data = &mlxreg_lc_regs_io; -+ mlxreg_lc->led_data = &mlxreg_lc_led; -+ mlxreg_lc->mux_brdinfo = &mlxreg_lc_mux_brdinfo; -+ -+ mlxreg_lc->aux_devs = devm_kmemdup(dev, mlxreg_lc_aux_pwr_brdinfo, -+ sizeof(mlxreg_lc_aux_pwr_brdinfo), GFP_KERNEL); -+ if (!mlxreg_lc->aux_devs) -+ return -ENOMEM; -+ mlxreg_lc->aux_devs_num = ARRAY_SIZE(mlxreg_lc_aux_pwr_brdinfo); -+ mlxreg_lc->main_devs = devm_kmemdup(dev, mlxreg_lc_main_pwr_brdinfo, -+ sizeof(mlxreg_lc_main_pwr_brdinfo), GFP_KERNEL); -+ if (!mlxreg_lc->main_devs) -+ return -ENOMEM; -+ mlxreg_lc->main_devs_num = ARRAY_SIZE(mlxreg_lc_main_pwr_brdinfo); -+ -+ return 0; -+} -+ -+static void -+mlxreg_lc_state_update(struct mlxreg_lc *mlxreg_lc, enum mlxreg_lc_state state, u8 action) -+{ -+ mutex_lock(&mlxreg_lc->lock); -+ -+ if (action) -+ mlxreg_lc->state |= state; -+ else -+ mlxreg_lc->state &= ~state; -+ -+ mutex_unlock(&mlxreg_lc->lock); -+} -+ -+/* -+ * Callback is to be called from mlxreg-hotplug driver to notify about line card about received -+ * event. -+ */ -+static int mlxreg_lc_event_handler(void *handle, enum mlxreg_hotplug_kind kind, u8 action) -+{ -+ struct mlxreg_lc *mlxreg_lc = handle; -+ int err = 0; -+ -+ dev_info(mlxreg_lc->dev, "linecard#%d state %d event kind %d action %d\n", -+ mlxreg_lc->data->slot, mlxreg_lc->state, kind, action); -+ -+ if (!(mlxreg_lc->state & MLXREG_LC_INITIALIZED)) -+ return 0; -+ -+ switch (kind) { -+ case MLXREG_HOTPLUG_LC_SYNCED: -+ /* -+ * Synchronization event - hardware and firmware are synchronized. Power on/off -+ * line card - to allow/disallow main power source. -+ */ -+ mlxreg_lc_state_update(mlxreg_lc, MLXREG_LC_SYNCED, action); -+ /* Power line card if it is not powered yet. */ -+ if (!(mlxreg_lc->state & MLXREG_LC_POWERED) && action) { -+ err = mlxreg_lc_power_on_off(mlxreg_lc, 1); -+ if (err) -+ return err; -+ } -+ /* In case line card is configured - enable it. */ -+ if (mlxreg_lc->state & MLXREG_LC_CONFIGURED && action) -+ err = mlxreg_lc_enable_disable(mlxreg_lc, 1); -+ break; -+ case MLXREG_HOTPLUG_LC_POWERED: -+ /* Power event - attach or de-attach line card device feeding by the main power. */ -+ if (action) { -+ /* Do not create devices, if line card is already powered. */ -+ if (mlxreg_lc->state & MLXREG_LC_POWERED) { -+ /* In case line card is configured - enable it. */ -+ if (mlxreg_lc->state & MLXREG_LC_CONFIGURED) -+ err = mlxreg_lc_enable_disable(mlxreg_lc, 1); -+ return err; -+ } -+ err = mlxreg_lc_create_static_devices(mlxreg_lc, mlxreg_lc->main_devs, -+ mlxreg_lc->main_devs_num); -+ if (err) -+ return err; -+ -+ /* In case line card is already in ready state - enable it. */ -+ if (mlxreg_lc->state & MLXREG_LC_CONFIGURED) -+ err = mlxreg_lc_enable_disable(mlxreg_lc, 1); -+ } else { -+ mlxreg_lc_destroy_static_devices(mlxreg_lc, mlxreg_lc->main_devs, -+ mlxreg_lc->main_devs_num); -+ } -+ mlxreg_lc_state_update(mlxreg_lc, MLXREG_LC_POWERED, action); -+ break; -+ case MLXREG_HOTPLUG_LC_READY: -+ /* -+ * Ready event – enable line card by releasing it from reset or disable it by put -+ * to reset state. -+ */ -+ err = mlxreg_lc_enable_disable(mlxreg_lc, !!action); -+ break; -+ case MLXREG_HOTPLUG_LC_THERMAL: -+ /* Thermal shutdown event – power off line card. */ -+ if (action) -+ err = mlxreg_lc_power_on_off(mlxreg_lc, 0); -+ break; -+ default: -+ break; -+ } -+ -+ return err; -+} -+ -+/* -+ * Callback is to be called from i2c-mux-mlxcpld driver to indicate that all adapter devices has -+ * been created. -+ */ -+static int mlxreg_lc_completion_notify(void *handle, struct i2c_adapter *parent, -+ struct i2c_adapter *adapters[]) -+{ -+ struct mlxreg_hotplug_device *main_dev, *aux_dev; -+ struct mlxreg_lc *mlxreg_lc = handle; -+ u32 regval; -+ int i, err; -+ -+ /* Update I2C devices feeding by auxiliary power. */ -+ aux_dev = mlxreg_lc->aux_devs; -+ for (i = 0; i < mlxreg_lc->aux_devs_num; i++, aux_dev++) { -+ aux_dev->adapter = adapters[aux_dev->nr]; -+ aux_dev->nr = adapters[aux_dev->nr]->nr; -+ } -+ -+ err = mlxreg_lc_create_static_devices(mlxreg_lc, mlxreg_lc->aux_devs, -+ mlxreg_lc->aux_devs_num); -+ if (err) -+ return err; -+ -+ /* Update I2C devices feeding by main power. */ -+ main_dev = mlxreg_lc->main_devs; -+ for (i = 0; i < mlxreg_lc->main_devs_num; i++, main_dev++) { -+ main_dev->adapter = adapters[main_dev->nr]; -+ main_dev->nr = adapters[main_dev->nr]->nr; -+ } -+ -+ /* Verify if line card is powered. */ -+ err = regmap_read(mlxreg_lc->par_regmap, mlxreg_lc->data->reg_pwr, ®val); -+ if (err) -+ goto mlxreg_lc_regmap_read_power_fail; -+ -+ if (regval & mlxreg_lc->data->mask) { -+ err = mlxreg_lc_create_static_devices(mlxreg_lc, mlxreg_lc->main_devs, -+ mlxreg_lc->main_devs_num); -+ if (err) -+ goto mlxreg_lc_create_static_devices_failed; -+ -+ mlxreg_lc_state_update(mlxreg_lc, MLXREG_LC_POWERED, 1); -+ } -+ -+ /* Verify if line card is synchronized. */ -+ err = regmap_read(mlxreg_lc->par_regmap, mlxreg_lc->data->reg_sync, ®val); -+ if (err) -+ goto mlxreg_lc_regmap_read_sync_fail; -+ -+ /* Power on line card if necessary. */ -+ if (regval & mlxreg_lc->data->mask) { -+ mlxreg_lc->state |= MLXREG_LC_SYNCED; -+ mlxreg_lc_state_update(mlxreg_lc, MLXREG_LC_SYNCED, 1); -+ if (mlxreg_lc->state & ~MLXREG_LC_POWERED) { -+ err = mlxreg_lc_power_on_off(mlxreg_lc, 1); -+ if (err) -+ goto mlxreg_lc_regmap_power_on_off_fail; -+ } -+ } -+ -+ mlxreg_lc_state_update(mlxreg_lc, MLXREG_LC_INITIALIZED, 1); -+ -+ return 0; -+ -+mlxreg_lc_regmap_power_on_off_fail: -+mlxreg_lc_regmap_read_sync_fail: -+ if (mlxreg_lc->state & MLXREG_LC_POWERED) -+ mlxreg_lc_destroy_static_devices(mlxreg_lc, mlxreg_lc->main_devs, -+ mlxreg_lc->main_devs_num); -+mlxreg_lc_create_static_devices_failed: -+ mlxreg_lc_destroy_static_devices(mlxreg_lc, mlxreg_lc->aux_devs, mlxreg_lc->aux_devs_num); -+mlxreg_lc_regmap_read_power_fail: -+ return err; -+} -+ -+static int -+mlxreg_lc_config_init(struct mlxreg_lc *mlxreg_lc, void *regmap, -+ struct mlxreg_core_data *data) -+{ -+ struct device *dev = &data->hpdev.client->dev; -+ int lsb, err; -+ u32 regval; -+ -+ /* Validate line card type. */ -+ err = regmap_read(regmap, MLXREG_LC_REG_CONFIG_OFFSET, &lsb); -+ err = (!err) ? regmap_read(regmap, MLXREG_LC_REG_CONFIG_OFFSET, ®val) : err; -+ if (err) -+ return err; -+ regval = (regval & GENMASK(7, 0)) << 8 | (lsb & GENMASK(7, 0)); -+ switch (regval) { -+ case MLXREG_LC_SN4800_C16: -+ err = mlxreg_lc_sn4800_c16_config_init(mlxreg_lc, regmap, data); -+ if (err) -+ return err; -+ break; -+ default: -+ return -ENODEV; -+ } -+ -+ /* Create mux infrastructure. */ -+ mlxreg_lc->mux_data->handle = mlxreg_lc; -+ mlxreg_lc->mux_data->completion_notify = mlxreg_lc_completion_notify; -+ mlxreg_lc->mux_brdinfo->platform_data = mlxreg_lc->mux_data; -+ mlxreg_lc->mux = platform_device_register_resndata(dev, "i2c-mux-mlxcpld", data->hpdev.nr, -+ NULL, 0, mlxreg_lc->mux_data, -+ sizeof(*mlxreg_lc->mux_data)); -+ if (IS_ERR(mlxreg_lc->mux)) -+ return PTR_ERR(mlxreg_lc->mux); -+ -+ /* Register IO access driver. */ -+ if (mlxreg_lc->io_data) { -+ mlxreg_lc->io_data->regmap = regmap; -+ mlxreg_lc->io_regs = -+ platform_device_register_resndata(dev, "mlxreg-io", data->hpdev.nr, NULL, 0, -+ mlxreg_lc->io_data, sizeof(*mlxreg_lc->io_data)); -+ if (IS_ERR(mlxreg_lc->io_regs)) { -+ err = PTR_ERR(mlxreg_lc->io_regs); -+ goto fail_register_io; -+ } -+ } -+ -+ /* Register LED driver. */ -+ if (mlxreg_lc->led_data) { -+ mlxreg_lc->led_data->regmap = regmap; -+ mlxreg_lc->led = -+ platform_device_register_resndata(dev, "leds-mlxreg", data->hpdev.nr, NULL, 0, -+ mlxreg_lc->led_data, -+ sizeof(*mlxreg_lc->led_data)); -+ if (IS_ERR(mlxreg_lc->led)) { -+ err = PTR_ERR(mlxreg_lc->led); -+ goto fail_register_led; -+ } -+ } -+ -+ return 0; -+ -+fail_register_led: -+ if (mlxreg_lc->io_regs) -+ platform_device_unregister(mlxreg_lc->io_regs); -+fail_register_io: -+ if (mlxreg_lc->mux) -+ platform_device_unregister(mlxreg_lc->mux); -+ -+ return err; -+} -+ -+static void mlxreg_lc_config_exit(struct mlxreg_lc *mlxreg_lc) -+{ -+ /* Unregister LED driver. */ -+ if (mlxreg_lc->led) -+ platform_device_unregister(mlxreg_lc->led); -+ /* Unregister IO access driver. */ -+ if (mlxreg_lc->io_regs) -+ platform_device_unregister(mlxreg_lc->io_regs); -+ /* Remove mux infrastructure. */ -+ if (mlxreg_lc->mux) -+ platform_device_unregister(mlxreg_lc->mux); -+} -+ -+static int mlxreg_lc_probe(struct platform_device *pdev) -+{ -+ struct mlxreg_core_hotplug_platform_data *par_pdata; -+ struct mlxreg_core_data *data; -+ struct mlxreg_lc *mlxreg_lc; -+ void *regmap; -+ int i, err; -+ -+ data = dev_get_platdata(&pdev->dev); -+ if (!data) -+ return -EINVAL; -+ -+ mlxreg_lc = devm_kzalloc(&pdev->dev, sizeof(*mlxreg_lc), GFP_KERNEL); -+ if (!mlxreg_lc) -+ return -ENOMEM; -+ -+ mutex_init(&mlxreg_lc->lock); -+ /* Set event notification callback. */ -+ if (data->notifier) { -+ data->notifier->user_handler = mlxreg_lc_event_handler; -+ data->notifier->handle = mlxreg_lc; -+ } -+ data->hpdev.adapter = i2c_get_adapter(data->hpdev.nr); -+ if (!data->hpdev.adapter) { -+ dev_err(&pdev->dev, "Failed to get adapter for bus %d\n", -+ data->hpdev.nr); -+ return -EFAULT; -+ } -+ -+ /* Create device at the top of line card I2C tree.*/ -+ data->hpdev.client = i2c_new_client_device(data->hpdev.adapter, -+ data->hpdev.brdinfo); -+ if (IS_ERR(data->hpdev.client)) { -+ dev_err(&pdev->dev, "Failed to create client %s at bus %d at addr 0x%02x\n", -+ data->hpdev.brdinfo->type, data->hpdev.nr, data->hpdev.brdinfo->addr); -+ -+ i2c_put_adapter(data->hpdev.adapter); -+ data->hpdev.adapter = NULL; -+ return PTR_ERR(data->hpdev.client); -+ } -+ -+ regmap = devm_regmap_init_i2c(data->hpdev.client, -+ &mlxreg_lc_regmap_conf); -+ if (IS_ERR(regmap)) { -+ err = PTR_ERR(regmap); -+ goto mlxreg_lc_probe_fail; -+ } -+ -+ /* Set default registers. */ -+ for (i = 0; i < mlxreg_lc_regmap_conf.num_reg_defaults; i++) { -+ err = regmap_write(regmap, mlxreg_lc_regmap_default[i].reg, -+ mlxreg_lc_regmap_default[i].def); -+ if (err) -+ goto mlxreg_lc_probe_fail; -+ } -+ -+ /* Sync registers with hardware. */ -+ regcache_mark_dirty(regmap); -+ err = regcache_sync(regmap); -+ if (err) -+ goto mlxreg_lc_probe_fail; -+ -+ par_pdata = data->hpdev.brdinfo->platform_data; -+ mlxreg_lc->par_regmap = par_pdata->regmap; -+ mlxreg_lc->data = data; -+ mlxreg_lc->dev = &pdev->dev; -+ platform_set_drvdata(pdev, mlxreg_lc); -+ -+ /* Configure line card. */ -+ err = mlxreg_lc_config_init(mlxreg_lc, regmap, data); -+ if (err) -+ goto mlxreg_lc_probe_fail; -+ -+ return err; -+ -+mlxreg_lc_probe_fail: -+ i2c_put_adapter(data->hpdev.adapter); -+ return err; -+} -+ -+static int mlxreg_lc_remove(struct platform_device *pdev) -+{ -+ struct mlxreg_core_data *data = dev_get_platdata(&pdev->dev); -+ struct mlxreg_lc *mlxreg_lc = platform_get_drvdata(pdev); -+ -+ /* Clear event notification callback. */ -+ if (data->notifier) { -+ data->notifier->user_handler = NULL; -+ data->notifier->handle = NULL; -+ } -+ -+ /* Destroy static I2C device feeding by main power. */ -+ mlxreg_lc_destroy_static_devices(mlxreg_lc, mlxreg_lc->main_devs, -+ mlxreg_lc->main_devs_num); -+ /* Destroy static I2C device feeding by auxiliary power. */ -+ mlxreg_lc_destroy_static_devices(mlxreg_lc, mlxreg_lc->aux_devs, mlxreg_lc->aux_devs_num); -+ /* Unregister underlying drivers. */ -+ mlxreg_lc_config_exit(mlxreg_lc); -+ if (data->hpdev.client) { -+ i2c_unregister_device(data->hpdev.client); -+ data->hpdev.client = NULL; -+ i2c_put_adapter(data->hpdev.adapter); -+ data->hpdev.adapter = NULL; -+ } -+ -+ return 0; -+} -+ -+static struct platform_driver mlxreg_lc_driver = { -+ .probe = mlxreg_lc_probe, -+ .remove = mlxreg_lc_remove, -+ .driver = { -+ .name = "mlxreg-lc", -+ }, -+}; -+ -+module_platform_driver(mlxreg_lc_driver); -+ -+MODULE_AUTHOR("Vadim Pasternak "); -+MODULE_DESCRIPTION("Nvidia line card platform driver"); -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_ALIAS("platform:mlxreg-lc"); --- -2.20.1 - diff --git a/patch/0062-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch b/patch/0062-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch deleted file mode 100644 index e611b499b9d3..000000000000 --- a/patch/0062-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch +++ /dev/null @@ -1,173 +0,0 @@ -From a47f1f27b1d6393a5a47d5de211ba36e5905b8c7 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 25 Mar 2021 20:12:05 +0200 -Subject: [PATCH backport 5.10 062/182] Documentation/ABI: Add new attributes - for mlxreg-io sysfs interfaces - -Add documentation for the new attributes: -- "bios_active_image"; "bios_auth_fail"; "bios_upgrade_fail"; - "bios_safe_mode" to represent various BIOS statuses. -- "lc{n}_enable" - for put/release the line card to/from enable state. -- "lc{n}_pwr" - for power on/off the line card. -- "lc{n}_rst_mask" - for line card reset state enforced by ASIC, when - it sets it due to some abnormal ASIC behavior. -- "psu3_on"; "psu4_on" - for connection/disconnection power supply unit - to/from the power source. -- "os_ready" - for indication that OS is taking control over systems - programmable devices. -- "pm_mgmt_en" - for setting power management control ownership. When - power management control is provided by hardware, it means that - hardware will automatically power off one or more line cards in case - system power budget is under power required for feeding all powered - on line cards. It could be a case, when some of power units lost - power good state. -- "shutdown_unlock" - for unlocking system after hardware or firmware - thermal shutdown, which causes locking of the all interfaces to ASIC. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Jiri Pirko ---- - .../ABI/stable/sysfs-driver-mlxreg-io | 130 ++++++++++++++++++ - 1 file changed, 130 insertions(+) - -diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -index fd9a8045bb0c..65d87f43e618 100644 ---- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io -+++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -@@ -223,3 +223,133 @@ Description: These files show with which CPLD part numbers and minor - system. - - The files are read only. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/bios_active_image -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/bios_auth_fail -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/bios_upgrade_fail -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/bios_safe_mode -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: The files represent BIOS statuses: -+ - bios_active_image: location of current active BIOS image: -+ 0: Top, 1: Bottom. -+ The reported value should correspond to value expected by OS -+ in case of BIOS safe mode is 0. This bit is related to Intel -+ top-swap feature of DualBios on the same flash. -+ - bios_auth_fail: BIOS upgrade is failed because provided BIOS -+ image is not signed correctly. -+ - bios_upgrade_fail: BIOS upgrade is failed by some other -+ reason not because authentication. For example due to -+ physical SPI flash problem. -+ - bios_safe_mode: -+ 0 : BIOS is booted from a supposed active image; -+ 1 : BIOS safe mechanism was enforced by hardware -+ (CPLD), thus BIOS is booted from supposed inactive -+ image and it indicates that there is a problem with -+ other image and it should be recovered. -+ -+ The files are read only. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc1_enable -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc2_enable -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc3_enable -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc4_enable -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc5_enable -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc6_enable -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc7_enable -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc8_enable -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files allow line cards enable state control. -+ Expected behavior: -+ When lc{n}_enable is written 1, related line card is released -+ from the reset state, when 0 - is hold in reset state. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc1_pwr -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc2_pwr -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc3_pwr -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc4_pwr -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc5_pwr -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc6_pwr -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc7_pwr -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc8_pwr -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files switching line cards power on and off. -+ Expected behavior: -+ When lc{n}_pwr is written 1, related line card is powered -+ on, when written 0 - powered off. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc1_rst_mask -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc2_rst_mask -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc3_rst_mask -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc4_rst_mask -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc5_rst_mask -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc6_rst_mask -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc7_rst_mask -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/lc8_rst_mask -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files clear line card reset bit enforced by ASIC, when it -+ sets it due to some abnormal ASIC behavior. -+ Expected behavior: -+ When lc{n}_rst_mask is written 1, related line card reset bit -+ is cleared, when written 0 - no effect. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/os_ready -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: This file, when written 1, indicates that OS is taking control -+ over systems programmable devices. -+ -+ The file is read only. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pm_mgmt_en -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: This file assigns power management control ownership. -+ When power management control is provided by hardware, it means -+ that hardware will automatically power off one or more line -+ cards in case system power budget is under power required for -+ feeding all powered on line cards. It could be a case, when -+ some of power units lost power good state. -+ When pm_mgmt_en is written 1, power management control by -+ software is enabled, 0 - power management control by hardware. -+ Default is 0. -+ -+ The file is read/write. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu3_on -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu4_on -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files switching power supply units on and off. -+ Expected behavior: -+ When psu3_on or psu4_on is written 1, related unit will be -+ disconnected from the power source, when written 0 - connected. -+ -+ The files are write only. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/shutdown_unlock -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: This file unlocks system after hardware or firmware thermal -+ shutdown, which causes locking of the all interfaces to ASIC. -+ When shutdown_unlock is written 1 and after that 0, it removes -+ locking. -+ -+ The file is read/write. --- -2.20.1 - diff --git a/patch/0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch b/patch/0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch new file mode 100644 index 000000000000..4836bc49aa14 --- /dev/null +++ b/patch/0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch @@ -0,0 +1,393 @@ +From 1f79825ac209a5aac6e13c87903a6506a5b78565 Mon Sep 17 00:00:00 2001 +From: Asmaa Mnebhi +Date: Wed, 15 Mar 2023 17:50:27 -0400 +Subject: [PATCH backport 6.1.42 62/85] pinctrl: mlxbf3: Add pinctrl driver + support + +BugLink: https://bugs.launchpad.net/bugs/2012743 + +NVIDIA BlueField-3 SoC has a few pins that can be used as GPIOs +or take the default hardware functionality. Add a driver for +the pin muxing. + +Signed-off-by: Asmaa Mnebhi +Reviewed-by: Andy Shevchenko +Link: https://lore.kernel.org/r/20230315215027.30685-3-asmaa@nvidia.com +Signed-off-by: Linus Walleij +(cherry picked from commit d11f932808dc689717e409bbc81b5093e7902fc9 linux-next) +Signed-off-by: Asmaa Mnebhi +Acked-by: Tim Gardner +Acked-by: Bartlomiej Zolnierkiewicz +Signed-off-by: Bartlomiej Zolnierkiewicz +--- + drivers/pinctrl/Kconfig | 13 ++ + drivers/pinctrl/Makefile | 1 + + drivers/pinctrl/pinctrl-mlxbf3.c | 320 +++++++++++++++++++++++++++++++ + 3 files changed, 334 insertions(+) + create mode 100644 drivers/pinctrl/pinctrl-mlxbf3.c + +diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig +index f71fefff400f..92e97d5bf91f 100644 +--- a/drivers/pinctrl/Kconfig ++++ b/drivers/pinctrl/Kconfig +@@ -512,6 +512,19 @@ config PINCTRL_ZYNQMP + This driver can also be built as a module. If so, the module + will be called pinctrl-zynqmp. + ++config PINCTRL_MLXBF3 ++ tristate "NVIDIA BlueField-3 SoC Pinctrl driver" ++ depends on (MELLANOX_PLATFORM && ARM64) || COMPILE_TEST ++ select PINMUX ++ select GPIOLIB ++ select GPIOLIB_IRQCHIP ++ select GPIO_MLXBF3 ++ help ++ Say Y to select the pinctrl driver for BlueField-3 SoCs. ++ This pin controller allows selecting the mux function for ++ each pin. This driver can also be built as a module called ++ pinctrl-mlxbf3. ++ + source "drivers/pinctrl/actions/Kconfig" + source "drivers/pinctrl/aspeed/Kconfig" + source "drivers/pinctrl/bcm/Kconfig" +diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile +index 89bfa01b5231..89fda1b780b7 100644 +--- a/drivers/pinctrl/Makefile ++++ b/drivers/pinctrl/Makefile +@@ -36,6 +36,7 @@ obj-$(CONFIG_PINCTRL_MCP23S08_SPI) += pinctrl-mcp23s08_spi.o + obj-$(CONFIG_PINCTRL_MCP23S08) += pinctrl-mcp23s08.o + obj-$(CONFIG_PINCTRL_MICROCHIP_SGPIO) += pinctrl-microchip-sgpio.o + obj-$(CONFIG_PINCTRL_OCELOT) += pinctrl-ocelot.o ++obj-$(CONFIG_PINCTRL_MLXBF3) += pinctrl-mlxbf3.o + obj-$(CONFIG_PINCTRL_OXNAS) += pinctrl-oxnas.o + obj-$(CONFIG_PINCTRL_PALMAS) += pinctrl-palmas.o + obj-$(CONFIG_PINCTRL_PIC32) += pinctrl-pic32.o +diff --git a/drivers/pinctrl/pinctrl-mlxbf3.c b/drivers/pinctrl/pinctrl-mlxbf3.c +new file mode 100644 +index 000000000000..3698f7bbd88d +--- /dev/null ++++ b/drivers/pinctrl/pinctrl-mlxbf3.c +@@ -0,0 +1,320 @@ ++// SPDX-License-Identifier: GPL-2.0-only or BSD-3-Clause ++/* Copyright (C) 2022 NVIDIA CORPORATION & AFFILIATES */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#define MLXBF3_NGPIOS_GPIO0 32 ++#define MLXBF3_MAX_GPIO_PINS 56 ++ ++enum { ++ MLXBF3_GPIO_HW_MODE, ++ MLXBF3_GPIO_SW_MODE, ++}; ++ ++struct mlxbf3_pinctrl { ++ void __iomem *fw_ctrl_set0; ++ void __iomem *fw_ctrl_clr0; ++ void __iomem *fw_ctrl_set1; ++ void __iomem *fw_ctrl_clr1; ++ struct device *dev; ++ struct pinctrl_dev *pctl; ++ struct pinctrl_gpio_range gpio_range; ++}; ++ ++#define MLXBF3_GPIO_RANGE(_id, _pinbase, _gpiobase, _npins) \ ++ { \ ++ .name = "mlxbf3_gpio_range", \ ++ .id = _id, \ ++ .base = _gpiobase, \ ++ .pin_base = _pinbase, \ ++ .npins = _npins, \ ++ } ++ ++static struct pinctrl_gpio_range mlxbf3_pinctrl_gpio_ranges[] = { ++ MLXBF3_GPIO_RANGE(0, 0, 480, 32), ++ MLXBF3_GPIO_RANGE(1, 32, 456, 24), ++}; ++ ++static const struct pinctrl_pin_desc mlxbf3_pins[] = { ++ PINCTRL_PIN(0, "gpio0"), ++ PINCTRL_PIN(1, "gpio1"), ++ PINCTRL_PIN(2, "gpio2"), ++ PINCTRL_PIN(3, "gpio3"), ++ PINCTRL_PIN(4, "gpio4"), ++ PINCTRL_PIN(5, "gpio5"), ++ PINCTRL_PIN(6, "gpio6"), ++ PINCTRL_PIN(7, "gpio7"), ++ PINCTRL_PIN(8, "gpio8"), ++ PINCTRL_PIN(9, "gpio9"), ++ PINCTRL_PIN(10, "gpio10"), ++ PINCTRL_PIN(11, "gpio11"), ++ PINCTRL_PIN(12, "gpio12"), ++ PINCTRL_PIN(13, "gpio13"), ++ PINCTRL_PIN(14, "gpio14"), ++ PINCTRL_PIN(15, "gpio15"), ++ PINCTRL_PIN(16, "gpio16"), ++ PINCTRL_PIN(17, "gpio17"), ++ PINCTRL_PIN(18, "gpio18"), ++ PINCTRL_PIN(19, "gpio19"), ++ PINCTRL_PIN(20, "gpio20"), ++ PINCTRL_PIN(21, "gpio21"), ++ PINCTRL_PIN(22, "gpio22"), ++ PINCTRL_PIN(23, "gpio23"), ++ PINCTRL_PIN(24, "gpio24"), ++ PINCTRL_PIN(25, "gpio25"), ++ PINCTRL_PIN(26, "gpio26"), ++ PINCTRL_PIN(27, "gpio27"), ++ PINCTRL_PIN(28, "gpio28"), ++ PINCTRL_PIN(29, "gpio29"), ++ PINCTRL_PIN(30, "gpio30"), ++ PINCTRL_PIN(31, "gpio31"), ++ PINCTRL_PIN(32, "gpio32"), ++ PINCTRL_PIN(33, "gpio33"), ++ PINCTRL_PIN(34, "gpio34"), ++ PINCTRL_PIN(35, "gpio35"), ++ PINCTRL_PIN(36, "gpio36"), ++ PINCTRL_PIN(37, "gpio37"), ++ PINCTRL_PIN(38, "gpio38"), ++ PINCTRL_PIN(39, "gpio39"), ++ PINCTRL_PIN(40, "gpio40"), ++ PINCTRL_PIN(41, "gpio41"), ++ PINCTRL_PIN(42, "gpio42"), ++ PINCTRL_PIN(43, "gpio43"), ++ PINCTRL_PIN(44, "gpio44"), ++ PINCTRL_PIN(45, "gpio45"), ++ PINCTRL_PIN(46, "gpio46"), ++ PINCTRL_PIN(47, "gpio47"), ++ PINCTRL_PIN(48, "gpio48"), ++ PINCTRL_PIN(49, "gpio49"), ++ PINCTRL_PIN(50, "gpio50"), ++ PINCTRL_PIN(51, "gpio51"), ++ PINCTRL_PIN(52, "gpio52"), ++ PINCTRL_PIN(53, "gpio53"), ++ PINCTRL_PIN(54, "gpio54"), ++ PINCTRL_PIN(55, "gpio55"), ++}; ++ ++/* ++ * All single-pin functions can be mapped to any GPIO, however pinmux applies ++ * functions to pin groups and only those groups declared as supporting that ++ * function. To make this work we must put each pin in its own dummy group so ++ * that the functions can be described as applying to all pins. ++ * We use the same name as in the datasheet. ++ */ ++static const char * const mlxbf3_pinctrl_single_group_names[] = { ++ "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", ++ "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", "gpio15", ++ "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", "gpio22", "gpio23", ++ "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", ++ "gpio32", "gpio33", "gpio34", "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", ++ "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47", ++ "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", "gpio54", "gpio55", ++}; ++ ++static int mlxbf3_get_groups_count(struct pinctrl_dev *pctldev) ++{ ++ /* Number single-pin groups */ ++ return MLXBF3_MAX_GPIO_PINS; ++} ++ ++static const char *mlxbf3_get_group_name(struct pinctrl_dev *pctldev, ++ unsigned int selector) ++{ ++ return mlxbf3_pinctrl_single_group_names[selector]; ++} ++ ++static int mlxbf3_get_group_pins(struct pinctrl_dev *pctldev, ++ unsigned int selector, ++ const unsigned int **pins, ++ unsigned int *num_pins) ++{ ++ /* return the dummy group for a single pin */ ++ *pins = &selector; ++ *num_pins = 1; ++ ++ return 0; ++} ++ ++static const struct pinctrl_ops mlxbf3_pinctrl_group_ops = { ++ .get_groups_count = mlxbf3_get_groups_count, ++ .get_group_name = mlxbf3_get_group_name, ++ .get_group_pins = mlxbf3_get_group_pins, ++}; ++ ++/* ++ * Only 2 functions are supported and they apply to all pins: ++ * 1) Default hardware functionality ++ * 2) Software controlled GPIO ++ */ ++static const char * const mlxbf3_gpiofunc_group_names[] = { "swctrl" }; ++static const char * const mlxbf3_hwfunc_group_names[] = { "hwctrl" }; ++ ++struct pinfunction mlxbf3_pmx_funcs[] = { ++ PINCTRL_PINFUNCTION("hwfunc", mlxbf3_hwfunc_group_names, 1), ++ PINCTRL_PINFUNCTION("gpiofunc", mlxbf3_gpiofunc_group_names, 1), ++}; ++ ++static int mlxbf3_pmx_get_funcs_count(struct pinctrl_dev *pctldev) ++{ ++ return ARRAY_SIZE(mlxbf3_pmx_funcs); ++} ++ ++static const char *mlxbf3_pmx_get_func_name(struct pinctrl_dev *pctldev, ++ unsigned int selector) ++{ ++ return mlxbf3_pmx_funcs[selector].name; ++} ++ ++static int mlxbf3_pmx_get_groups(struct pinctrl_dev *pctldev, ++ unsigned int selector, ++ const char * const **groups, ++ unsigned int * const num_groups) ++{ ++ *groups = mlxbf3_pmx_funcs[selector].groups; ++ *num_groups = MLXBF3_MAX_GPIO_PINS; ++ ++ return 0; ++} ++ ++static int mlxbf3_pmx_set(struct pinctrl_dev *pctldev, ++ unsigned int selector, ++ unsigned int group) ++{ ++ struct mlxbf3_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); ++ ++ if (selector == MLXBF3_GPIO_HW_MODE) { ++ if (group < MLXBF3_NGPIOS_GPIO0) ++ writel(BIT(group), priv->fw_ctrl_clr0); ++ else ++ writel(BIT(group % MLXBF3_NGPIOS_GPIO0), priv->fw_ctrl_clr1); ++ } ++ ++ if (selector == MLXBF3_GPIO_SW_MODE) { ++ if (group < MLXBF3_NGPIOS_GPIO0) ++ writel(BIT(group), priv->fw_ctrl_set0); ++ else ++ writel(BIT(group % MLXBF3_NGPIOS_GPIO0), priv->fw_ctrl_set1); ++ } ++ ++ return 0; ++} ++ ++static int mlxbf3_gpio_request_enable(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned int offset) ++{ ++ struct mlxbf3_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); ++ ++ if (offset < MLXBF3_NGPIOS_GPIO0) ++ writel(BIT(offset), priv->fw_ctrl_set0); ++ else ++ writel(BIT(offset % MLXBF3_NGPIOS_GPIO0), priv->fw_ctrl_set1); ++ ++ return 0; ++} ++ ++static void mlxbf3_gpio_disable_free(struct pinctrl_dev *pctldev, ++ struct pinctrl_gpio_range *range, ++ unsigned int offset) ++{ ++ struct mlxbf3_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev); ++ ++ /* disable GPIO functionality by giving control back to hardware */ ++ if (offset < MLXBF3_NGPIOS_GPIO0) ++ writel(BIT(offset), priv->fw_ctrl_clr0); ++ else ++ writel(BIT(offset % MLXBF3_NGPIOS_GPIO0), priv->fw_ctrl_clr1); ++} ++ ++static const struct pinmux_ops mlxbf3_pmx_ops = { ++ .get_functions_count = mlxbf3_pmx_get_funcs_count, ++ .get_function_name = mlxbf3_pmx_get_func_name, ++ .get_function_groups = mlxbf3_pmx_get_groups, ++ .set_mux = mlxbf3_pmx_set, ++ .gpio_request_enable = mlxbf3_gpio_request_enable, ++ .gpio_disable_free = mlxbf3_gpio_disable_free, ++}; ++ ++static struct pinctrl_desc mlxbf3_pin_desc = { ++ .name = "pinctrl-mlxbf3", ++ .pins = mlxbf3_pins, ++ .npins = ARRAY_SIZE(mlxbf3_pins), ++ .pctlops = &mlxbf3_pinctrl_group_ops, ++ .pmxops = &mlxbf3_pmx_ops, ++ .owner = THIS_MODULE, ++}; ++ ++static_assert(ARRAY_SIZE(mlxbf3_pinctrl_single_group_names) == MLXBF3_MAX_GPIO_PINS); ++ ++static int mlxbf3_pinctrl_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct mlxbf3_pinctrl *priv; ++ int ret; ++ ++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->dev = &pdev->dev; ++ ++ priv->fw_ctrl_set0 = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(priv->fw_ctrl_set0)) ++ return PTR_ERR(priv->fw_ctrl_set0); ++ ++ priv->fw_ctrl_clr0 = devm_platform_ioremap_resource(pdev, 1); ++ if (IS_ERR(priv->fw_ctrl_set0)) ++ return PTR_ERR(priv->fw_ctrl_set0); ++ ++ priv->fw_ctrl_set1 = devm_platform_ioremap_resource(pdev, 2); ++ if (IS_ERR(priv->fw_ctrl_set0)) ++ return PTR_ERR(priv->fw_ctrl_set0); ++ ++ priv->fw_ctrl_clr1 = devm_platform_ioremap_resource(pdev, 3); ++ if (IS_ERR(priv->fw_ctrl_set0)) ++ return PTR_ERR(priv->fw_ctrl_set0); ++ ++ ret = devm_pinctrl_register_and_init(dev, ++ &mlxbf3_pin_desc, ++ priv, ++ &priv->pctl); ++ if (ret) ++ return dev_err_probe(dev, ret, "Failed to register pinctrl\n"); ++ ++ ret = pinctrl_enable(priv->pctl); ++ if (ret) ++ return dev_err_probe(dev, ret, "Failed to enable pinctrl\n"); ++ ++ pinctrl_add_gpio_ranges(priv->pctl, mlxbf3_pinctrl_gpio_ranges, 2); ++ ++ return 0; ++} ++ ++static const struct acpi_device_id mlxbf3_pinctrl_acpi_ids[] = { ++ { "MLNXBF34", 0 }, ++ {} ++}; ++MODULE_DEVICE_TABLE(acpi, mlxbf3_pinctrl_acpi_ids); ++ ++static struct platform_driver mlxbf3_pinctrl_driver = { ++ .driver = { ++ .name = "pinctrl-mlxbf3", ++ .acpi_match_table = mlxbf3_pinctrl_acpi_ids, ++ }, ++ .probe = mlxbf3_pinctrl_probe, ++}; ++module_platform_driver(mlxbf3_pinctrl_driver); ++ ++MODULE_DESCRIPTION("NVIDIA pinctrl driver"); ++MODULE_AUTHOR("Asmaa Mnebhi "); ++MODULE_LICENSE("Dual BSD/GPL"); +-- +2.20.1 + diff --git a/patch/0063-Documentation-ABI-Add-new-line-card-attributes-for-m.patch b/patch/0063-Documentation-ABI-Add-new-line-card-attributes-for-m.patch deleted file mode 100644 index 902687365ce2..000000000000 --- a/patch/0063-Documentation-ABI-Add-new-line-card-attributes-for-m.patch +++ /dev/null @@ -1,132 +0,0 @@ -From 999214e1026baf68ff05a734a92e4cbb4cd8a073 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 25 Mar 2021 20:12:11 +0200 -Subject: [PATCH backport 5.10 063/182] Documentation/ABI: Add new line card - attributes for mlxreg-io sysfs interfaces - -Add documentation for the new attributes for line cards: -- CPLDs versioning. -- Write protection control for 'nvram' devices. -- Line card reset reasons. -- Enabling burning of FPGA and CPLDs. -- Enabling burning of FPGA and gearbox SPI flashes, -- Enabling power of whole line card. -- Enabling power of QSFP ports equipped on line card. -- The maximum powered required for line card feeding. -- Line card configuration Id. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Jiri Pirko ---- - .../ABI/stable/sysfs-driver-mlxreg-io | 98 +++++++++++++++++++ - 1 file changed, 98 insertions(+) - -diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -index 65d87f43e618..e2f938499473 100644 ---- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io -+++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -@@ -353,3 +353,101 @@ Description: This file unlocks system after hardware or firmware thermal - locking. - - The file is read/write. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld1_pn -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld1_version -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld1_version_min -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files show with which CPLD major and minor versions -+ and part number has been burned CPLD device on line card. -+ -+ The files are read only. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga1_pn -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga1_version -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga1_version_min -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files show with which FPGA major and minor versions -+ and part number has been burned FPGA device on line card. -+ -+ The files are read only. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/ini_wp -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/vpd_wp -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files allow to overwrite line card VPD and firmware blob -+ hardware write protection mode. When attribute is set 1 - write -+ protection is disabled, when 0 - enabled. By default both are -+ write protected. -+ If the system is in locked-down mode writing these files will -+ not be allowed. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_aux_pwr_or_ref -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_dc_dc_pwr_fail -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_fpga_not_done -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_from_chassis -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_line_card -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/reset_pwr_off_from_chassis -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files show the line reset cause, as following: power -+ auxiliary outage or power refresh, DC-to-DC power failure, FPGA reset -+ failed, line card reset failed, power off from chassis. -+ Value 1 in file means this is reset cause, 0 - otherwise. Only one of -+ the above causes could be 1 at the same time, representing only last -+ reset cause. -+ -+ The files are read only. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/cpld_upgrade_en -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga_upgrade_en -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files allow CPLD and FPGA burning. Value 1 in file means burning -+ is enabled, 0 - otherwise. -+ If the system is in locked-down mode writing these files will -+ not be allowed. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/qsfp_pwr_en -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/pwr_en -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files allow to power on/off all QSFP ports and whole line card. -+ The attributes are set 1 for power on, 0 - for power off. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/agb_spi_burn_en -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/fpga_spi_burn_en -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files allow gearboxes and FPGA SPI flash burning. -+ The attributes are set 1 to enable burning, 0 - to disable. -+ If the system is in locked-down mode writing these files will -+ not be allowed. -+ -+ The file is read/write. -+ -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/max_power -+What: /sys/devices/platform/mlxplat/i2c_mlxcpld.*/i2c-*/i2c-*/i2c-*/*-0032/mlxreg-io.*/hwmon/hwmon*/config -+Date: April 2021 -+KernelVersion: 5.13 -+Contact: Vadim Pasternak -+Description: These files provide the maximum powered required for line card -+ feeding and line card configuration Id. -+ -+ The files are read only. --- -2.20.1 - diff --git a/patch/0063-gpio-mlxbf3-Add-gpio-driver-support.patch b/patch/0063-gpio-mlxbf3-Add-gpio-driver-support.patch new file mode 100644 index 000000000000..e9b14960a169 --- /dev/null +++ b/patch/0063-gpio-mlxbf3-Add-gpio-driver-support.patch @@ -0,0 +1,314 @@ +From 8623b9727f7dc08fef553dbdc2be96641929b7cc Mon Sep 17 00:00:00 2001 +From: Asmaa Mnebhi +Date: Wed, 15 Mar 2023 17:50:26 -0400 +Subject: [PATCH backport 6.1.42 1/1] gpio: mlxbf3: Add gpio driver support + +Add support for the BlueField-3 SoC GPIO driver. +This driver configures and handles GPIO interrupts. It also enables a user +to manipulate certain GPIO pins via libgpiod tools or other kernel drivers. +The usables pins are defined via the "gpio-reserved-ranges" property. + +Signed-off-by: Asmaa Mnebhi +Reviewed-by: Andy Shevchenko +Reviewed-by: Linus Walleij +Signed-off-by: Bartosz Golaszewski +--- + drivers/gpio/Kconfig | 13 ++ + drivers/gpio/Makefile | 1 + + drivers/gpio/gpio-mlxbf3.c | 248 +++++++++++++++++++++++++++++++++++++ + 3 files changed, 262 insertions(+) + create mode 100644 drivers/gpio/gpio-mlxbf3.c + +diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig +index 3e8e5f4ffa59..aef128b3a1c2 100644 +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -1532,6 +1532,19 @@ config GPIO_MLXBF2 + help + Say Y here if you want GPIO support on Mellanox BlueField 2 SoC. + ++config GPIO_MLXBF3 ++ tristate "Mellanox BlueField 3 SoC GPIO" ++ depends on (MELLANOX_PLATFORM && ARM64) || COMPILE_TEST ++ select GPIO_GENERIC ++ select GPIOLIB_IRQCHIP ++ help ++ Say Y if you want GPIO support on Mellanox BlueField 3 SoC. ++ This GPIO controller supports interrupt handling and enables the ++ manipulation of certain GPIO pins. ++ This controller should be used in parallel with pinctrl-mlxbf3 to ++ control the desired GPIOs. ++ This driver can also be built as a module called mlxbf3-gpio. ++ + config GPIO_ML_IOH + tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support" + depends on X86 || COMPILE_TEST +diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile +index 29e3beb6548c..c5e86fd24d2c 100644 +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -98,6 +98,7 @@ obj-$(CONFIG_GPIO_MERRIFIELD) += gpio-merrifield.o + obj-$(CONFIG_GPIO_ML_IOH) += gpio-ml-ioh.o + obj-$(CONFIG_GPIO_MLXBF) += gpio-mlxbf.o + obj-$(CONFIG_GPIO_MLXBF2) += gpio-mlxbf2.o ++obj-$(CONFIG_GPIO_MLXBF3) += gpio-mlxbf3.o + obj-$(CONFIG_GPIO_MM_LANTIQ) += gpio-mm-lantiq.o + obj-$(CONFIG_GPIO_MOCKUP) += gpio-mockup.o + obj-$(CONFIG_GPIO_MOXTET) += gpio-moxtet.o +diff --git a/drivers/gpio/gpio-mlxbf3.c b/drivers/gpio/gpio-mlxbf3.c +new file mode 100644 +index 000000000000..e30cee108986 +--- /dev/null ++++ b/drivers/gpio/gpio-mlxbf3.c +@@ -0,0 +1,248 @@ ++// SPDX-License-Identifier: GPL-2.0-only or BSD-3-Clause ++/* Copyright (C) 2022 NVIDIA CORPORATION & AFFILIATES */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* ++ * There are 2 YU GPIO blocks: ++ * gpio[0]: HOST_GPIO0->HOST_GPIO31 ++ * gpio[1]: HOST_GPIO32->HOST_GPIO55 ++ */ ++#define MLXBF3_GPIO_MAX_PINS_PER_BLOCK 32 ++ ++/* ++ * fw_gpio[x] block registers and their offset ++ */ ++#define MLXBF_GPIO_FW_OUTPUT_ENABLE_SET 0x00 ++#define MLXBF_GPIO_FW_DATA_OUT_SET 0x04 ++ ++#define MLXBF_GPIO_FW_OUTPUT_ENABLE_CLEAR 0x00 ++#define MLXBF_GPIO_FW_DATA_OUT_CLEAR 0x04 ++ ++#define MLXBF_GPIO_CAUSE_RISE_EN 0x00 ++#define MLXBF_GPIO_CAUSE_FALL_EN 0x04 ++#define MLXBF_GPIO_READ_DATA_IN 0x08 ++ ++#define MLXBF_GPIO_CAUSE_OR_CAUSE_EVTEN0 0x00 ++#define MLXBF_GPIO_CAUSE_OR_EVTEN0 0x14 ++#define MLXBF_GPIO_CAUSE_OR_CLRCAUSE 0x18 ++ ++struct mlxbf3_gpio_context { ++ struct gpio_chip gc; ++ ++ /* YU GPIO block address */ ++ void __iomem *gpio_set_io; ++ void __iomem *gpio_clr_io; ++ void __iomem *gpio_io; ++ ++ /* YU GPIO cause block address */ ++ void __iomem *gpio_cause_io; ++}; ++ ++static void mlxbf3_gpio_irq_enable(struct irq_data *irqd) ++{ ++ struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); ++ struct mlxbf3_gpio_context *gs = gpiochip_get_data(gc); ++ irq_hw_number_t offset = irqd_to_hwirq(irqd); ++ unsigned long flags; ++ u32 val; ++ ++ gpiochip_enable_irq(gc, offset); ++ ++ raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); ++ writel(BIT(offset), gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CLRCAUSE); ++ ++ val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); ++ val |= BIT(offset); ++ writel(val, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); ++ raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); ++} ++ ++static void mlxbf3_gpio_irq_disable(struct irq_data *irqd) ++{ ++ struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); ++ struct mlxbf3_gpio_context *gs = gpiochip_get_data(gc); ++ irq_hw_number_t offset = irqd_to_hwirq(irqd); ++ unsigned long flags; ++ u32 val; ++ ++ raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); ++ val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); ++ val &= ~BIT(offset); ++ writel(val, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0); ++ raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); ++ ++ gpiochip_disable_irq(gc, offset); ++} ++ ++static irqreturn_t mlxbf3_gpio_irq_handler(int irq, void *ptr) ++{ ++ struct mlxbf3_gpio_context *gs = ptr; ++ struct gpio_chip *gc = &gs->gc; ++ unsigned long pending; ++ u32 level; ++ ++ pending = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CAUSE_EVTEN0); ++ writel(pending, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CLRCAUSE); ++ ++ for_each_set_bit(level, &pending, gc->ngpio) ++ generic_handle_domain_irq(gc->irq.domain, level); ++ ++ return IRQ_RETVAL(pending); ++} ++ ++static int ++mlxbf3_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) ++{ ++ struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd); ++ struct mlxbf3_gpio_context *gs = gpiochip_get_data(gc); ++ irq_hw_number_t offset = irqd_to_hwirq(irqd); ++ unsigned long flags; ++ u32 val; ++ ++ raw_spin_lock_irqsave(&gs->gc.bgpio_lock, flags); ++ ++ switch (type & IRQ_TYPE_SENSE_MASK) { ++ case IRQ_TYPE_EDGE_BOTH: ++ val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_FALL_EN); ++ val |= BIT(offset); ++ writel(val, gs->gpio_io + MLXBF_GPIO_CAUSE_FALL_EN); ++ val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_RISE_EN); ++ val |= BIT(offset); ++ writel(val, gs->gpio_io + MLXBF_GPIO_CAUSE_RISE_EN); ++ break; ++ case IRQ_TYPE_EDGE_RISING: ++ val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_RISE_EN); ++ val |= BIT(offset); ++ writel(val, gs->gpio_io + MLXBF_GPIO_CAUSE_RISE_EN); ++ break; ++ case IRQ_TYPE_EDGE_FALLING: ++ val = readl(gs->gpio_io + MLXBF_GPIO_CAUSE_FALL_EN); ++ val |= BIT(offset); ++ writel(val, gs->gpio_io + MLXBF_GPIO_CAUSE_FALL_EN); ++ break; ++ default: ++ raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); ++ return -EINVAL; ++ } ++ ++ raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags); ++ ++ irq_set_handler_locked(irqd, handle_edge_irq); ++ ++ return 0; ++} ++ ++/* This function needs to be defined for handle_edge_irq() */ ++static void mlxbf3_gpio_irq_ack(struct irq_data *data) ++{ ++} ++ ++static const struct irq_chip gpio_mlxbf3_irqchip = { ++ .name = "MLNXBF33", ++ .irq_ack = mlxbf3_gpio_irq_ack, ++ .irq_set_type = mlxbf3_gpio_irq_set_type, ++ .irq_enable = mlxbf3_gpio_irq_enable, ++ .irq_disable = mlxbf3_gpio_irq_disable, ++ .flags = IRQCHIP_IMMUTABLE, ++ GPIOCHIP_IRQ_RESOURCE_HELPERS, ++}; ++ ++static int mlxbf3_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct mlxbf3_gpio_context *gs; ++ struct gpio_irq_chip *girq; ++ struct gpio_chip *gc; ++ int ret, irq; ++ ++ gs = devm_kzalloc(dev, sizeof(*gs), GFP_KERNEL); ++ if (!gs) ++ return -ENOMEM; ++ ++ gs->gpio_io = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(gs->gpio_io)) ++ return PTR_ERR(gs->gpio_io); ++ ++ gs->gpio_cause_io = devm_platform_ioremap_resource(pdev, 1); ++ if (IS_ERR(gs->gpio_cause_io)) ++ return PTR_ERR(gs->gpio_cause_io); ++ ++ gs->gpio_set_io = devm_platform_ioremap_resource(pdev, 2); ++ if (IS_ERR(gs->gpio_set_io)) ++ return PTR_ERR(gs->gpio_set_io); ++ ++ gs->gpio_clr_io = devm_platform_ioremap_resource(pdev, 3); ++ if (IS_ERR(gs->gpio_clr_io)) ++ return PTR_ERR(gs->gpio_clr_io); ++ gc = &gs->gc; ++ ++ ret = bgpio_init(gc, dev, 4, ++ gs->gpio_io + MLXBF_GPIO_READ_DATA_IN, ++ gs->gpio_set_io + MLXBF_GPIO_FW_DATA_OUT_SET, ++ gs->gpio_clr_io + MLXBF_GPIO_FW_DATA_OUT_CLEAR, ++ gs->gpio_set_io + MLXBF_GPIO_FW_OUTPUT_ENABLE_SET, ++ gs->gpio_clr_io + MLXBF_GPIO_FW_OUTPUT_ENABLE_CLEAR, 0); ++ ++ gc->request = gpiochip_generic_request; ++ gc->free = gpiochip_generic_free; ++ gc->owner = THIS_MODULE; ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq >= 0) { ++ girq = &gs->gc.irq; ++ gpio_irq_chip_set_chip(girq, &gpio_mlxbf3_irqchip); ++ girq->default_type = IRQ_TYPE_NONE; ++ /* This will let us handle the parent IRQ in the driver */ ++ girq->num_parents = 0; ++ girq->parents = NULL; ++ girq->parent_handler = NULL; ++ girq->handler = handle_bad_irq; ++ ++ /* ++ * Directly request the irq here instead of passing ++ * a flow-handler because the irq is shared. ++ */ ++ ret = devm_request_irq(dev, irq, mlxbf3_gpio_irq_handler, ++ IRQF_SHARED, dev_name(dev), gs); ++ if (ret) ++ return dev_err_probe(dev, ret, "failed to request IRQ"); ++ } ++ ++ platform_set_drvdata(pdev, gs); ++ ++ ret = devm_gpiochip_add_data(dev, &gs->gc, gs); ++ if (ret) ++ dev_err_probe(dev, ret, "Failed adding memory mapped gpiochip\n"); ++ ++ return 0; ++} ++ ++static const struct acpi_device_id mlxbf3_gpio_acpi_match[] = { ++ { "MLNXBF33", 0 }, ++ {} ++}; ++MODULE_DEVICE_TABLE(acpi, mlxbf3_gpio_acpi_match); ++ ++static struct platform_driver mlxbf3_gpio_driver = { ++ .driver = { ++ .name = "mlxbf3_gpio", ++ .acpi_match_table = mlxbf3_gpio_acpi_match, ++ }, ++ .probe = mlxbf3_gpio_probe, ++}; ++module_platform_driver(mlxbf3_gpio_driver); ++ ++MODULE_DESCRIPTION("NVIDIA BlueField-3 GPIO Driver"); ++MODULE_AUTHOR("Asmaa Mnebhi "); ++MODULE_LICENSE("Dual BSD/GPL"); +-- +2.25.1 + diff --git a/patch/0064-hwmon-mlxreg-fan-Extend-the-maximum-number-of-tachom.patch b/patch/0064-hwmon-mlxreg-fan-Extend-the-maximum-number-of-tachom.patch deleted file mode 100644 index 77d977c670cd..000000000000 --- a/patch/0064-hwmon-mlxreg-fan-Extend-the-maximum-number-of-tachom.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 0e6b16e3aefc494a1e0a4b1a2c731f8a2fb6ec33 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 22:04:25 +0000 -Subject: [PATCH backport 5.10 064/182] hwmon: (mlxreg-fan) Extend the maximum - number of tachometers - -Extend support of maximum tachometers from 12 to 14 in order to support -new systems, equipped with more fans. - -Signed-off-by: Vadim Pasternak ---- - drivers/hwmon/mlxreg-fan.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index 89fe7b9fe26b..0f5b109817a7 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -12,7 +12,7 @@ - #include - #include - --#define MLXREG_FAN_MAX_TACHO 12 -+#define MLXREG_FAN_MAX_TACHO 14 - #define MLXREG_FAN_MAX_STATE 10 - #define MLXREG_FAN_MIN_DUTY 51 /* 20% */ - #define MLXREG_FAN_MAX_DUTY 255 /* 100% */ -@@ -266,6 +266,8 @@ static const struct hwmon_channel_info *mlxreg_fan_hwmon_info[] = { - HWMON_F_INPUT | HWMON_F_FAULT, - HWMON_F_INPUT | HWMON_F_FAULT, - HWMON_F_INPUT | HWMON_F_FAULT, -+ HWMON_F_INPUT | HWMON_F_FAULT, -+ HWMON_F_INPUT | HWMON_F_FAULT, - HWMON_F_INPUT | HWMON_F_FAULT), - HWMON_CHANNEL_INFO(pwm, - HWMON_PWM_INPUT), --- -2.20.1 - diff --git a/patch/0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch b/patch/0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch new file mode 100644 index 000000000000..388279b96a18 --- /dev/null +++ b/patch/0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch @@ -0,0 +1,35 @@ +From 00cba650c86f494b4a5905d89d304fef2380b0b7 Mon Sep 17 00:00:00 2001 +From: Tom Rix +Date: Mon, 3 Apr 2023 20:45:01 -0400 +Subject: [PATCH backport 6.1.42 2/2] pinctrl: mlxbf3: set varaiable + mlxbf3_pmx_funcs storage-class-specifier to static + +smatch reports +drivers/pinctrl/pinctrl-mlxbf3.c:162:20: warning: symbol + 'mlxbf3_pmx_funcs' was not declared. Should it be static? + +This variable is only used in one file so it should be static. + +Signed-off-by: Tom Rix +Link: https://lore.kernel.org/r/20230404004501.1913144-1-trix@redhat.com +Signed-off-by: Linus Walleij +--- + drivers/pinctrl/pinctrl-mlxbf3.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/pinctrl/pinctrl-mlxbf3.c b/drivers/pinctrl/pinctrl-mlxbf3.c +index 3698f7bbd88d..d9944e6a0af9 100644 +--- a/drivers/pinctrl/pinctrl-mlxbf3.c ++++ b/drivers/pinctrl/pinctrl-mlxbf3.c +@@ -159,7 +159,7 @@ static const struct pinctrl_ops mlxbf3_pinctrl_group_ops = { + static const char * const mlxbf3_gpiofunc_group_names[] = { "swctrl" }; + static const char * const mlxbf3_hwfunc_group_names[] = { "hwctrl" }; + +-struct pinfunction mlxbf3_pmx_funcs[] = { ++static struct pinfunction mlxbf3_pmx_funcs[] = { + PINCTRL_PINFUNCTION("hwfunc", mlxbf3_hwfunc_group_names, 1), + PINCTRL_PINFUNCTION("gpiofunc", mlxbf3_gpiofunc_group_names, 1), + }; +-- +2.25.1 + diff --git a/patch/0065-platform-x86-mlx-platform-Extend-FAN-and-LED-config-.patch b/patch/0065-platform-x86-mlx-platform-Extend-FAN-and-LED-config-.patch deleted file mode 100644 index fd317717397f..000000000000 --- a/patch/0065-platform-x86-mlx-platform-Extend-FAN-and-LED-config-.patch +++ /dev/null @@ -1,131 +0,0 @@ -From 907562d549fefb326456b5c8c9f4e881d6379431 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 12 Jul 2021 22:20:35 +0000 -Subject: [PATCH backport 5.10 065/182] platform/x86: mlx-platform: Extend FAN - and LED config to support new MQM97xx systems - -Add support for new system types "MQM97xx", which is based on Mellanox -Quantum-2 ASIC. It provides up to 64x400GB/s (IB) full bidirectional -bandwidth per port using PAM-4 modulation. The system support 32 OSFP -cages that can provide 64x400GB/s per port (two ports/cage). The system -fits standard 1U racks. - -System is equipped with 7 fan drawers and with per fan drawer LED on -backport panel. - -System is recognized by "DMI_BOARD_NAME" match, when it equal -to system class "VMOD0010". - -Extend structures: -- 'mlxplat_mlxcpld_default_ng_fan_items_data', -- 'mlxplat_mlxcpld_default_ng_led_data' -- 'mlxplat_mlxcpld_default_fan_data' -in order to support seven fan drawers. All previous systems of this -class supported only up to six fan drawers. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Oleksandr Shamray ---- - drivers/platform/x86/mlx-platform.c | 44 ++++++++++++++++++++++++++++- - 1 file changed, 43 insertions(+), 1 deletion(-) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 8e1e298cf18b..681b49fe4176 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -131,6 +131,8 @@ - #define MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET 0xee - #define MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET 0xef - #define MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET 0xf0 -+#define MLXPLAT_CPLD_LPC_REG_TACHO13_OFFSET 0xf1 -+#define MLXPLAT_CPLD_LPC_REG_TACHO14_OFFSET 0xf2 - #define MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET 0xf3 - #define MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET 0xf4 - #define MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET 0xf5 -@@ -198,7 +200,7 @@ - #define MLXPLAT_CPLD_PWR_EXT_MASK GENMASK(3, 0) - #define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0) - #define MLXPLAT_CPLD_ASIC_MASK GENMASK(1, 0) --#define MLXPLAT_CPLD_FAN_NG_MASK GENMASK(5, 0) -+#define MLXPLAT_CPLD_FAN_NG_MASK GENMASK(6, 0) - #define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4) - #define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0) - #define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4) -@@ -937,6 +939,14 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_fan_items_data[] = { - .bit = BIT(5), - .hpdev.nr = MLXPLAT_CPLD_NR_NONE, - }, -+ { -+ .label = "fan7", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = BIT(6), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(6), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, - }; - - static struct mlxreg_core_item mlxplat_mlxcpld_default_ng_items[] = { -@@ -2168,6 +2178,20 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_led_data[] = { - .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, - .bit = BIT(5), - }, -+ { -+ .label = "fan7:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED6_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(6), -+ }, -+ { -+ .label = "fan7:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED6_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(6), -+ }, - { - .label = "uid:blue", - .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -@@ -3518,6 +3542,20 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_data[] = { - .bit = BIT(3), - .reg_prsnt = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, - }, -+ { -+ .label = "tacho13", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO13_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "tacho14", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO14_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET, -+ .bit = BIT(5), -+ }, - { - .label = "conf", - .capability = MLXPLAT_CPLD_LPC_REG_TACHO_SPEED_OFFSET, -@@ -3931,6 +3969,8 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_TACHO13_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_TACHO14_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET: -@@ -4050,6 +4090,8 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET: - case MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_TACHO13_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_TACHO14_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET: --- -2.20.1 - diff --git a/patch/0066-platform-x86-mlx-platform-Add-new-attributes-for-Cof.patch b/patch/0066-platform-x86-mlx-platform-Add-new-attributes-for-Cof.patch deleted file mode 100644 index a9568da4d5f0..000000000000 --- a/patch/0066-platform-x86-mlx-platform-Add-new-attributes-for-Cof.patch +++ /dev/null @@ -1,64 +0,0 @@ -From 74e69c1a32afbd2496dc0597de2610e4488d7810 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Tue, 13 Jul 2021 15:20:13 +0000 -Subject: [PATCH backport 5.10 066/182] platform/x86: mlx-platform: Add new - attributes for CoffeeLake COMEx based systems - -Add new attributes for systems equipped with CoffeeLake COMEx module to -represent various BIOS statuses: "bios_active_image", "bios_auth_fail", -"bios_upgrade_fail", "bios_safe_mode". -- "bios_active_image" - location of current active BIOS image (0: Top, - 1: Bottom. The reported value should correspond to value expected by - OS in case of BIOS safe mode is 0. This bit is related to Intel - top-swap feature of DualBios on the same flash. -- "bios_auth_fail": BIOS upgrade is failed because provided BIOS image - is not signed correctly. -- "bios_upgrade_fail" BIOS upgrade is failed by some reason not related - to authentication. For example due to physical SPI flash problem. -"bios_safe_mod": - 0 : if BIOS is booted from a supposed active image; - 1 : BIOS safe mechanism was enforced by hardware (CPLD). - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael ---- - drivers/platform/x86/mlx-platform.c | 24 ++++++++++++++++++++++++ - 1 file changed, 24 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 681b49fe4176..950d90e6412a 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -2917,6 +2917,30 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "bios_safe_mode", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_active_image", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_auth_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_upgrade_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, -+ }, - { - .label = "voltreg_update_status", - .reg = MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET, --- -2.20.1 - diff --git a/patch/0067-platform-mellanox-Add-dedicated-match-for-system-typ.patch b/patch/0067-platform-mellanox-Add-dedicated-match-for-system-typ.patch deleted file mode 100644 index 97f0bbd1c912..000000000000 --- a/patch/0067-platform-mellanox-Add-dedicated-match-for-system-typ.patch +++ /dev/null @@ -1,450 +0,0 @@ -From 8e3d1dbfd9cf686f9282d9b36f4ccc5ef3949ef5 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sun, 7 Feb 2021 22:59:53 +0200 -Subject: [PATCH backport 5.10 067/182] platform/mellanox: Add dedicated match - for system type QMB8700 (downstream) - -Use dedicated match function for QMB8700 system in order to work around -wrong CPLD register map. - -Note this is downstream kernel patch, no intention to upstream this -code. - -Additional notes: -System QMB8700 is not used by Sonic and not used by our up-stream -customers. -It has some hardware bug in CPLD and this was the reason to add -dedicated patch to WA this bug. - -The problem that after this patch many other patches have been added -to 'mlx-platform' driver and removing this patch will create conflicts -of applying later patches. -Thus, this patch is held to avoid such conflicts. - -In kernel v6.1 this patch is to be placed on top of all other patches -to avoid such sort of conflicts. -However in v5.10 it is very hard now to rebase all the patches for -moving this one to the top. - -Signed-off-by: Oleksandr Shamray -Reviewed-by: Vadim Pasternak ---- - drivers/platform/x86/mlx-platform.c | 353 ++++++++++++++++++++++++++++ - 1 file changed, 353 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 950d90e6412a..614b9f5c673f 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -201,6 +201,7 @@ - #define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0) - #define MLXPLAT_CPLD_ASIC_MASK GENMASK(1, 0) - #define MLXPLAT_CPLD_FAN_NG_MASK GENMASK(6, 0) -+#define MLXPLAT_CPLD_FAN_QMB8700_MASK GENMASK(5, 0) - #define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4) - #define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0) - #define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4) -@@ -949,6 +950,57 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_fan_items_data[] = { - }, - }; - -+static struct mlxreg_core_data mlxplat_mlxcpld_qmb8700_fan_items_data[] = { -+ { -+ .label = "fan1", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = BIT(0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(0), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+ { -+ .label = "fan2", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = BIT(1), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(1), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+ { -+ .label = "fan3", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = BIT(2), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(2), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+ { -+ .label = "fan4", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = BIT(3), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(3), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+ { -+ .label = "fan5", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = BIT(4), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(4), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+ { -+ .label = "fan6", -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = BIT(5), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(5), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+}; -+ - static struct mlxreg_core_item mlxplat_mlxcpld_default_ng_items[] = { - { - .data = mlxplat_mlxcpld_default_ng_psu_items_data, -@@ -988,6 +1040,45 @@ static struct mlxreg_core_item mlxplat_mlxcpld_default_ng_items[] = { - }, - }; - -+static struct mlxreg_core_item mlxplat_mlxcpld_qmb8700_items[] = { -+ { -+ .data = mlxplat_mlxcpld_default_ng_psu_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET, -+ .mask = MLXPLAT_CPLD_PSU_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_psu_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_default_ng_pwr_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = MLXPLAT_CPLD_PWR_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_pwr_items_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_qmb8700_fan_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET, -+ .mask = MLXPLAT_CPLD_FAN_QMB8700_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_qmb8700_fan_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_default_asic_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data), -+ .inversed = 0, -+ .health = true, -+ }, -+}; -+ - static - struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_ng_data = { - .items = mlxplat_mlxcpld_default_ng_items, -@@ -998,6 +1089,16 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_ng_data = { - .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, - }; - -+static -+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_qmb8700_data = { -+ .items = mlxplat_mlxcpld_qmb8700_items, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_qmb8700_items), -+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, -+ .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, -+ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, -+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, -+}; -+ - /* Platform hotplug extended system family data */ - static struct mlxreg_core_data mlxplat_mlxcpld_ext_psu_items_data[] = { - { -@@ -2430,6 +2531,124 @@ static struct mlxreg_core_platform_data mlxplat_modular_led_data = { - .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_led_data), - }; - -+/* Platform led data for QMB8700 system */ -+static struct mlxreg_core_data mlxplat_mlxcpld_qmb8700_led_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "status:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ }, -+ { -+ .label = "psu:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "fan1:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "fan1:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "fan2:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "fan2:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "fan3:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "fan3:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "fan4:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "fan4:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "fan5:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "fan5:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "fan6:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(5), -+ }, -+ { -+ .label = "fan6:orange", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, -+ .bit = BIT(5), -+ }, -+ { -+ .label = "uid:blue", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_qmb8700_led_data = { -+ .data = mlxplat_mlxcpld_qmb8700_led_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_qmb8700_led_data), -+}; -+ - /* Platform register access default */ - static struct mlxreg_core_data mlxplat_mlxcpld_default_regs_io_data[] = { - { -@@ -3592,6 +3811,107 @@ static struct mlxreg_core_platform_data mlxplat_default_fan_data = { - .capability = MLXPLAT_CPLD_LPC_REG_FAN_DRW_CAP_OFFSET, - }; - -+/* Platform FAN default */ -+static struct mlxreg_core_data mlxplat_mlxcpld_qmb8700_fan_data[] = { -+ { -+ .label = "pwm1", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET, -+ }, -+ { -+ .label = "tacho1", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO1_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "tacho2", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO2_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "tacho3", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO3_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "tacho4", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO4_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "tacho5", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO5_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(4), -+ }, -+ { -+ .label = "tacho6", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO6_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(5), -+ }, -+ { -+ .label = "tacho7", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO7_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(6), -+ }, -+ { -+ .label = "tacho8", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO8_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP1_OFFSET, -+ .bit = BIT(7), -+ }, -+ { -+ .label = "tacho9", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO9_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET, -+ .bit = BIT(0), -+ }, -+ { -+ .label = "tacho10", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO10_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET, -+ .bit = BIT(1), -+ }, -+ { -+ .label = "tacho11", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO11_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET, -+ .bit = BIT(2), -+ }, -+ { -+ .label = "tacho12", -+ .reg = MLXPLAT_CPLD_LPC_REG_TACHO12_OFFSET, -+ .mask = GENMASK(7, 0), -+ .capability = MLXPLAT_CPLD_LPC_REG_FAN_CAP2_OFFSET, -+ .bit = BIT(3), -+ }, -+ { -+ .label = "conf", -+ .capability = MLXPLAT_CPLD_LPC_REG_TACHO_SPEED_OFFSET, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_qmb8700_fan_data = { -+ .data = mlxplat_mlxcpld_qmb8700_fan_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_qmb8700_fan_data), -+}; -+ - /* Watchdog type1: hardware implementation version1 - * (MSN2700, MSN2410, MSN2740, MSN2100 and MSN2140 systems). - */ -@@ -4461,6 +4781,32 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi) - return 1; - } - -+static int __init mlxplat_dmi_qmb8700_matched(const struct dmi_system_id *dmi) -+{ -+ int i; -+ -+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; -+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data); -+ mlxplat_mux_data = mlxplat_default_mux_data; -+ for (i = 0; i < mlxplat_mux_num; i++) { -+ mlxplat_mux_data[i].values = mlxplat_msn21xx_channels; -+ mlxplat_mux_data[i].n_values = -+ ARRAY_SIZE(mlxplat_msn21xx_channels); -+ } -+ mlxplat_hotplug = &mlxplat_mlxcpld_qmb8700_data; -+ mlxplat_hotplug->deferred_nr = -+ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; -+ mlxplat_led = &mlxplat_qmb8700_led_data; -+ mlxplat_regs_io = &mlxplat_default_ng_regs_io_data; -+ mlxplat_fan = &mlxplat_qmb8700_fan_data; -+ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) -+ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; -+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; -+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng; -+ -+ return 1; -+} -+ - static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - { - .callback = mlxplat_dmi_default_matched, -@@ -4486,6 +4832,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - DMI_MATCH(DMI_BOARD_NAME, "VMOD0004"), - }, - }, -+ { -+ .callback = mlxplat_dmi_qmb8700_matched, -+ .matches = { -+ DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "MQM8700"), -+ }, -+ }, - { - .callback = mlxplat_dmi_qmb7xx_matched, - .matches = { --- -2.20.1 - diff --git a/patch/0068-mlxsw-core-Initialize-switch-driver-last.patch b/patch/0068-mlxsw-core-Initialize-switch-driver-last.patch deleted file mode 100644 index 7384e5da24a1..000000000000 --- a/patch/0068-mlxsw-core-Initialize-switch-driver-last.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 1d25ce2427827b1c61924b0ed8e937118aaa0258 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Sun, 15 Aug 2021 14:09:51 +0300 -Subject: [PATCH backport 5.10 068/182] mlxsw: core: Initialize switch driver - last - -Commit 961cf99a074f ("mlxsw: core: Re-order initialization sequence") -changed the initialization sequence so that the switch driver (e.g., -mlxsw_spectrum) is initialized before registration with the hwmon and -thermal subsystems. - -This was done in order to avoid situations where hwmon/thermal code uses -features not supported by current firmware version, which is only -validated as part of switch driver initialization. - -Later, commit b79cb787ac70 ("mlxsw: Move fw flashing code into core.c") -moved firmware validation and flashing code from the switch driver to -mlxsw_core so that it is performed before driver initialization. - -Therefore, change the initialization sequence back to its original form. - -In addition to being more straightforward, it will allow us to simplify -parts of the code in subsequent patches and future patchsets. - -Signed-off-by: Ido Schimmel ---- - drivers/net/ethernet/mellanox/mlxsw/core.c | 21 ++++++++++----------- - 1 file changed, 10 insertions(+), 11 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c -index 1a86535c4968..b52bbd6b2fe4 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c -@@ -1946,12 +1946,6 @@ __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, - if (err) - goto err_health_init; - -- if (mlxsw_driver->init) { -- err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack); -- if (err) -- goto err_driver_init; -- } -- - err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); - if (err) - goto err_hwmon_init; -@@ -1965,6 +1959,12 @@ __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, - if (err) - goto err_env_init; - -+ if (mlxsw_driver->init) { -+ err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack); -+ if (err) -+ goto err_driver_init; -+ } -+ - mlxsw_core->is_initialized = true; - devlink_params_publish(devlink); - -@@ -1973,14 +1973,13 @@ __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, - - return 0; - -+err_driver_init: -+ mlxsw_env_fini(mlxsw_core->env); - err_env_init: - mlxsw_thermal_fini(mlxsw_core->thermal); - err_thermal_init: - mlxsw_hwmon_fini(mlxsw_core->hwmon); - err_hwmon_init: -- if (mlxsw_core->driver->fini) -- mlxsw_core->driver->fini(mlxsw_core); --err_driver_init: - mlxsw_core_health_fini(mlxsw_core); - err_health_init: - err_fw_rev_validate: -@@ -2052,11 +2051,11 @@ void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, - - devlink_params_unpublish(devlink); - mlxsw_core->is_initialized = false; -+ if (mlxsw_core->driver->fini) -+ mlxsw_core->driver->fini(mlxsw_core); - mlxsw_env_fini(mlxsw_core->env); - mlxsw_thermal_fini(mlxsw_core->thermal); - mlxsw_hwmon_fini(mlxsw_core->hwmon); -- if (mlxsw_core->driver->fini) -- mlxsw_core->driver->fini(mlxsw_core); - mlxsw_core_health_fini(mlxsw_core); - if (!reload) - mlxsw_core_params_unregister(mlxsw_core); --- -2.20.1 - diff --git a/patch/0069-mlxsw-core-Remove-mlxsw_core_is_initialized.patch b/patch/0069-mlxsw-core-Remove-mlxsw_core_is_initialized.patch deleted file mode 100644 index a13416e66d6e..000000000000 --- a/patch/0069-mlxsw-core-Remove-mlxsw_core_is_initialized.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 4c2b8360a04b6462f180b9b6793d9f511c08a808 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Sun, 15 Aug 2021 14:30:14 +0300 -Subject: [PATCH backport 5.10 069/182] mlxsw: core: Remove - mlxsw_core_is_initialized() - -After the previous patch, the switch driver is always initialized last, -making this function redundant. - -Remove it. - -Signed-off-by: Ido Schimmel ---- - drivers/net/ethernet/mellanox/mlxsw/core.c | 8 -------- - drivers/net/ethernet/mellanox/mlxsw/core.h | 1 - - drivers/net/ethernet/mellanox/mlxsw/core_env.c | 6 ------ - 3 files changed, 15 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c -index b52bbd6b2fe4..7938bad70e37 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c -@@ -89,7 +89,6 @@ struct mlxsw_core { - struct devlink_health_reporter *fw_fatal; - } health; - struct mlxsw_env *env; -- bool is_initialized; /* Denotes if core was already initialized. */ - unsigned long driver_priv[]; - /* driver_priv has to be always the last item */ - }; -@@ -1965,7 +1964,6 @@ __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, - goto err_driver_init; - } - -- mlxsw_core->is_initialized = true; - devlink_params_publish(devlink); - - if (!reload) -@@ -2050,7 +2048,6 @@ void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, - } - - devlink_params_unpublish(devlink); -- mlxsw_core->is_initialized = false; - if (mlxsw_core->driver->fini) - mlxsw_core->driver->fini(mlxsw_core); - mlxsw_env_fini(mlxsw_core->env); -@@ -2862,11 +2859,6 @@ struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core) - return mlxsw_core->env; - } - --bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core) --{ -- return mlxsw_core->is_initialized; --} -- - int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module) - { - enum mlxsw_reg_pmtm_module_type module_type; -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h -index 92f7398287be..56efb8e48022 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h -@@ -224,7 +224,6 @@ struct devlink_port * - mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, - u8 local_port); - struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core); --bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core); - int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module); - - int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay); -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index 3713c45cfa1e..27e721f96b3b 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -667,12 +667,6 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module, - { - struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); - -- /* Prevent switch driver from accessing uninitialized data. */ -- if (!mlxsw_core_is_initialized(mlxsw_core)) { -- *p_counter = 0; -- return 0; -- } -- - if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) - return -EINVAL; - --- -2.20.1 - diff --git a/patch/0070-mlxsw-core_env-Defer-handling-of-module-temperature-.patch b/patch/0070-mlxsw-core_env-Defer-handling-of-module-temperature-.patch deleted file mode 100644 index 6483a57ca7a5..000000000000 --- a/patch/0070-mlxsw-core_env-Defer-handling-of-module-temperature-.patch +++ /dev/null @@ -1,91 +0,0 @@ -From a450d59b7be00520e8a2ab390b2bc1642cea34c8 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Sun, 15 Aug 2021 14:50:26 +0300 -Subject: [PATCH backport 5.10 070/182] mlxsw: core_env: Defer handling of - module temperature warning events - -Module temperature events are currently handled in softIRQ context, -requiring the 'module_info_lock' to be a spin lock. In future patchsets -we will need to be able to hold the lock while sleeping. - -Therefore, defer handling of these events using a work queue so that the -next patch will be able to convert the lock to a mutex. - -Signed-off-by: Ido Schimmel ---- - .../net/ethernet/mellanox/mlxsw/core_env.c | 39 ++++++++++++++++--- - 1 file changed, 34 insertions(+), 5 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index 27e721f96b3b..27eba0a0c91c 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -482,20 +482,30 @@ static int mlxsw_env_module_temp_event_enable(struct mlxsw_core *mlxsw_core, - return 0; - } - --static void mlxsw_env_mtwe_event_func(const struct mlxsw_reg_info *reg, -- char *mtwe_pl, void *priv) -+struct mlxsw_env_module_temp_warn_event { -+ struct mlxsw_env *mlxsw_env; -+ char mtwe_pl[MLXSW_REG_MTWE_LEN]; -+ struct work_struct work; -+}; -+ -+static void mlxsw_env_mtwe_event_work(struct work_struct *work) - { -- struct mlxsw_env *mlxsw_env = priv; -+ struct mlxsw_env_module_temp_warn_event *event; -+ struct mlxsw_env *mlxsw_env; - int i, sensor_warning; - bool is_overheat; - -+ event = container_of(work, struct mlxsw_env_module_temp_warn_event, -+ work); -+ mlxsw_env = event->mlxsw_env; -+ - for (i = 0; i < mlxsw_env->module_count; i++) { - /* 64-127 of sensor_index are mapped to the port modules - * sequentially (module 0 is mapped to sensor_index 64, - * module 1 to sensor_index 65 and so on) - */ - sensor_warning = -- mlxsw_reg_mtwe_sensor_warning_get(mtwe_pl, -+ mlxsw_reg_mtwe_sensor_warning_get(event->mtwe_pl, - i + MLXSW_REG_MTMP_MODULE_INDEX_MIN); - spin_lock(&mlxsw_env->module_info_lock); - is_overheat = -@@ -524,10 +534,29 @@ static void mlxsw_env_mtwe_event_func(const struct mlxsw_reg_info *reg, - spin_unlock(&mlxsw_env->module_info_lock); - } - } -+ -+ kfree(event); -+} -+ -+static void -+mlxsw_env_mtwe_listener_func(const struct mlxsw_reg_info *reg, char *mtwe_pl, -+ void *priv) -+{ -+ struct mlxsw_env_module_temp_warn_event *event; -+ struct mlxsw_env *mlxsw_env = priv; -+ -+ event = kmalloc(sizeof(*event), GFP_ATOMIC); -+ if (!event) -+ return; -+ -+ event->mlxsw_env = mlxsw_env; -+ memcpy(event->mtwe_pl, mtwe_pl, MLXSW_REG_MTWE_LEN); -+ INIT_WORK(&event->work, mlxsw_env_mtwe_event_work); -+ mlxsw_core_schedule_work(&event->work); - } - - static const struct mlxsw_listener mlxsw_env_temp_warn_listener = -- MLXSW_EVENTL(mlxsw_env_mtwe_event_func, MTWE, MTWE); -+ MLXSW_EVENTL(mlxsw_env_mtwe_listener_func, MTWE, MTWE); - - static int mlxsw_env_temp_warn_event_register(struct mlxsw_core *mlxsw_core) - { --- -2.20.1 - diff --git a/patch/0071-mlxsw-core_env-Convert-module_info_lock-to-a-mutex.patch b/patch/0071-mlxsw-core_env-Convert-module_info_lock-to-a-mutex.patch deleted file mode 100644 index 1dfeb00b44f1..000000000000 --- a/patch/0071-mlxsw-core_env-Convert-module_info_lock-to-a-mutex.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 0de1374694bd39c9d3e0a185c5da34506fd4aab9 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Sun, 15 Aug 2021 15:08:18 +0300 -Subject: [PATCH backport 5.10 071/182] mlxsw: core_env: Convert - 'module_info_lock' to a mutex - -After the previous patch, the lock is always taken in process context so -it can be converted to a mutex. It is needed for future changes where we -will need to be able to sleep when holding the lock. - -Convert the lock to a mutex. - -Signed-off-by: Ido Schimmel ---- - .../net/ethernet/mellanox/mlxsw/core_env.c | 23 +++++++++++-------- - 1 file changed, 13 insertions(+), 10 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index 27eba0a0c91c..543f401cb5c6 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -5,6 +5,7 @@ - #include - #include - #include -+#include - - #include "core.h" - #include "core_env.h" -@@ -19,7 +20,7 @@ struct mlxsw_env_module_info { - struct mlxsw_env { - struct mlxsw_core *core; - u8 module_count; -- spinlock_t module_info_lock; /* Protects 'module_info'. */ -+ struct mutex module_info_lock; /* Protects 'module_info'. */ - struct mlxsw_env_module_info module_info[]; - }; - -@@ -507,7 +508,7 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work) - sensor_warning = - mlxsw_reg_mtwe_sensor_warning_get(event->mtwe_pl, - i + MLXSW_REG_MTMP_MODULE_INDEX_MIN); -- spin_lock(&mlxsw_env->module_info_lock); -+ mutex_lock(&mlxsw_env->module_info_lock); - is_overheat = - mlxsw_env->module_info[i].is_overheat; - -@@ -517,13 +518,13 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work) - * warning OR current state in "no warning" and MTWE - * does not report warning. - */ -- spin_unlock(&mlxsw_env->module_info_lock); -+ mutex_unlock(&mlxsw_env->module_info_lock); - continue; - } else if (is_overheat && !sensor_warning) { - /* MTWE reports "no warning", turn is_overheat off. - */ - mlxsw_env->module_info[i].is_overheat = false; -- spin_unlock(&mlxsw_env->module_info_lock); -+ mutex_unlock(&mlxsw_env->module_info_lock); - } else { - /* Current state is "no warning" and MTWE reports - * "warning", increase the counter and turn is_overheat -@@ -531,7 +532,7 @@ static void mlxsw_env_mtwe_event_work(struct work_struct *work) - */ - mlxsw_env->module_info[i].is_overheat = true; - mlxsw_env->module_info[i].module_overheat_counter++; -- spin_unlock(&mlxsw_env->module_info_lock); -+ mutex_unlock(&mlxsw_env->module_info_lock); - } - } - -@@ -597,9 +598,9 @@ static void mlxsw_env_pmpe_event_work(struct work_struct *work) - work); - mlxsw_env = event->mlxsw_env; - -- spin_lock_bh(&mlxsw_env->module_info_lock); -+ mutex_lock(&mlxsw_env->module_info_lock); - mlxsw_env->module_info[event->module].is_overheat = false; -- spin_unlock_bh(&mlxsw_env->module_info_lock); -+ mutex_unlock(&mlxsw_env->module_info_lock); - - err = mlxsw_env_module_has_temp_sensor(mlxsw_env->core, event->module, - &has_temp_sensor); -@@ -699,9 +700,9 @@ mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module, - if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) - return -EINVAL; - -- spin_lock_bh(&mlxsw_env->module_info_lock); -+ mutex_lock(&mlxsw_env->module_info_lock); - *p_counter = mlxsw_env->module_info[module].module_overheat_counter; -- spin_unlock_bh(&mlxsw_env->module_info_lock); -+ mutex_unlock(&mlxsw_env->module_info_lock); - - return 0; - } -@@ -725,7 +726,7 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env) - if (!env) - return -ENOMEM; - -- spin_lock_init(&env->module_info_lock); -+ mutex_init(&env->module_info_lock); - env->core = mlxsw_core; - env->module_count = module_count; - *p_env = env; -@@ -755,6 +756,7 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env) - err_module_plug_event_register: - mlxsw_env_temp_warn_event_unregister(env); - err_temp_warn_event_register: -+ mutex_destroy(&env->module_info_lock); - kfree(env); - return err; - } -@@ -765,5 +767,6 @@ void mlxsw_env_fini(struct mlxsw_env *env) - /* Make sure there is no more event work scheduled. */ - mlxsw_core_flush_owq(); - mlxsw_env_temp_warn_event_unregister(env); -+ mutex_destroy(&env->module_info_lock); - kfree(env); - } --- -2.20.1 - diff --git a/patch/0072-mlxsw-Track-per-module-port-status.patch b/patch/0072-mlxsw-Track-per-module-port-status.patch deleted file mode 100644 index efc1f9891e28..000000000000 --- a/patch/0072-mlxsw-Track-per-module-port-status.patch +++ /dev/null @@ -1,154 +0,0 @@ -From da6632aa3ca0d019a091e3fcb772c9eacf4127e9 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 2 Sep 2021 06:40:22 +0000 -Subject: [PATCH backport 5.10 072/182] mlxsw: Track per-module port status - -In the common port module core, track the number of logical ports that -are mapped to the port module and the number of logical ports using it -that are administratively up. - -This will be used by later patches to potentially veto and control -certain operations on the module, such as reset and setting its power -mode. - -Signed-off-by: Ido Schimmel = mlxsw_env->module_count)) -+ return; -+ -+ mutex_lock(&mlxsw_env->module_info_lock); -+ mlxsw_env->module_info[module].num_ports_mapped++; -+ mutex_unlock(&mlxsw_env->module_info_lock); -+} -+EXPORT_SYMBOL(mlxsw_env_module_port_map); -+ -+void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 module) -+{ -+ struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); -+ -+ if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) -+ return; -+ -+ mutex_lock(&mlxsw_env->module_info_lock); -+ mlxsw_env->module_info[module].num_ports_mapped--; -+ mutex_unlock(&mlxsw_env->module_info_lock); -+} -+EXPORT_SYMBOL(mlxsw_env_module_port_unmap); -+ -+int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module) -+{ -+ struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); -+ -+ if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) -+ return -EINVAL; -+ -+ mutex_lock(&mlxsw_env->module_info_lock); -+ mlxsw_env->module_info[module].num_ports_up++; -+ mutex_unlock(&mlxsw_env->module_info_lock); -+ -+ return 0; -+} -+EXPORT_SYMBOL(mlxsw_env_module_port_up); -+ -+void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 module) -+{ -+ struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); -+ -+ if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) -+ return; -+ -+ mutex_lock(&mlxsw_env->module_info_lock); -+ mlxsw_env->module_info[module].num_ports_up--; -+ mutex_unlock(&mlxsw_env->module_info_lock); -+} -+EXPORT_SYMBOL(mlxsw_env_module_port_down); -+ - int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env) - { - char mgpir_pl[MLXSW_REG_MGPIR_LEN]; -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -index 0bf5bd0f8a7e..ba9269f12cb8 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -@@ -27,6 +27,15 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module, - int - mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module, - u64 *p_counter); -+ -+void mlxsw_env_module_port_map(struct mlxsw_core *mlxsw_core, u8 module); -+ -+void mlxsw_env_module_port_unmap(struct mlxsw_core *mlxsw_core, u8 module); -+ -+int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module); -+ -+void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 module); -+ - int mlxsw_env_init(struct mlxsw_core *core, struct mlxsw_env **p_env); - void mlxsw_env_fini(struct mlxsw_env *env); - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -index a8c67b763c8b..e75b702aeb36 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -@@ -54,8 +54,20 @@ static int mlxsw_m_base_mac_get(struct mlxsw_m *mlxsw_m) - return 0; - } - --static int mlxsw_m_port_dummy_open_stop(struct net_device *dev) -+static int mlxsw_m_port_open(struct net_device *dev) - { -+ struct mlxsw_m_port *mlxsw_m_port = netdev_priv(dev); -+ struct mlxsw_m *mlxsw_m = mlxsw_m_port->mlxsw_m; -+ -+ return mlxsw_env_module_port_up(mlxsw_m->core, mlxsw_m_port->module); -+} -+ -+static int mlxsw_m_port_stop(struct net_device *dev) -+{ -+ struct mlxsw_m_port *mlxsw_m_port = netdev_priv(dev); -+ struct mlxsw_m *mlxsw_m = mlxsw_m_port->mlxsw_m; -+ -+ mlxsw_env_module_port_down(mlxsw_m->core, mlxsw_m_port->module); - return 0; - } - -@@ -70,8 +82,8 @@ mlxsw_m_port_get_devlink_port(struct net_device *dev) - } - - static const struct net_device_ops mlxsw_m_port_netdev_ops = { -- .ndo_open = mlxsw_m_port_dummy_open_stop, -- .ndo_stop = mlxsw_m_port_dummy_open_stop, -+ .ndo_open = mlxsw_m_port_open, -+ .ndo_stop = mlxsw_m_port_stop, - .ndo_get_devlink_port = mlxsw_m_port_get_devlink_port, - }; - --- -2.20.1 - diff --git a/patch/0073-mlxsw-reg-Add-fields-to-PMAOS-register.patch b/patch/0073-mlxsw-reg-Add-fields-to-PMAOS-register.patch deleted file mode 100644 index 2102a1903abf..000000000000 --- a/patch/0073-mlxsw-reg-Add-fields-to-PMAOS-register.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 1af02ef69c43c4ed19fee10181957fae8b3b3bd2 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Thu, 29 Jul 2021 15:15:23 +0300 -Subject: [PATCH backport 5.10 073/182] mlxsw: reg: Add fields to PMAOS - register - -The Ports Module Administrative and Operational Status (PMAOS) register -configures and retrieves the per-module status. Extend it with fields -required to support various module settings such as reset and power -mode. - -Signed-off-by: Ido Schimmel ---- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 28 ++++++++++++++++++++++- - 1 file changed, 27 insertions(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index 04f0c96c8068..dd72443c295f 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -5415,7 +5415,15 @@ static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u8 local_port) - - MLXSW_REG_DEFINE(pmaos, MLXSW_REG_PMAOS_ID, MLXSW_REG_PMAOS_LEN); - --/* reg_slot_index -+/* reg_pmaos_rst -+ * Module reset toggle. -+ * Note: Setting reset while module is plugged-in will result in transition to -+ * "initializing" operational state. -+ * Access: OP -+ */ -+MLXSW_ITEM32(reg, pmaos, rst, 0x00, 31, 1); -+ -+/* reg_pmaos_slot_index - * Slot index. - * Access: Index - */ -@@ -5427,6 +5435,24 @@ MLXSW_ITEM32(reg, pmaos, slot_index, 0x00, 24, 4); - */ - MLXSW_ITEM32(reg, pmaos, module, 0x00, 16, 8); - -+enum mlxsw_reg_pmaos_admin_status { -+ MLXSW_REG_PMAOS_ADMIN_STATUS_ENABLED = 1, -+ MLXSW_REG_PMAOS_ADMIN_STATUS_DISABLED = 2, -+ /* If the module is active and then unplugged, or experienced an error -+ * event, the operational status should go to "disabled" and can only -+ * be enabled upon explicit enable command. -+ */ -+ MLXSW_REG_PMAOS_ADMIN_STATUS_ENABLED_ONCE = 3, -+}; -+ -+/* reg_pmaos_admin_status -+ * Module administrative state (the desired state of the module). -+ * Note: To disable a module, all ports associated with the port must be -+ * administatively down first. -+ * Access: RW -+ */ -+MLXSW_ITEM32(reg, pmaos, admin_status, 0x00, 8, 4); -+ - /* reg_pmaos_ase - * Admin state update enable. - * If this bit is set, admin state will be updated based on admin_state field. --- -2.20.1 - diff --git a/patch/0074-mlxsw-Make-PMAOS-pack-function-more-generic.patch b/patch/0074-mlxsw-Make-PMAOS-pack-function-more-generic.patch deleted file mode 100644 index b0763ff2b2d3..000000000000 --- a/patch/0074-mlxsw-Make-PMAOS-pack-function-more-generic.patch +++ /dev/null @@ -1,59 +0,0 @@ -From a09c5705bfca34abe259f3ed4d7ae262700c44f3 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Mon, 2 Aug 2021 10:12:31 +0300 -Subject: [PATCH backport 5.10 074/182] mlxsw: Make PMAOS pack function more - generic - -The PMAOS register has enable bits (e.g., PMAOS.ee) that allow changing -only a subset of the fields, which is exactly what subsequent patches -will need to do. Instead of passing multiple arguments to its pack -function, only pass the module index and let the rest be set by the -different callers. - -No functional changes intended. - -Signed-off-by: Ido Schimmel ---- - drivers/net/ethernet/mellanox/mlxsw/core_env.c | 6 ++++-- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 5 +---- - 2 files changed, 5 insertions(+), 6 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index c7b7254061ee..a474629643aa 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -684,8 +684,10 @@ mlxsw_env_module_oper_state_event_enable(struct mlxsw_core *mlxsw_core, - for (i = 0; i < module_count; i++) { - char pmaos_pl[MLXSW_REG_PMAOS_LEN]; - -- mlxsw_reg_pmaos_pack(pmaos_pl, i, -- MLXSW_REG_PMAOS_E_GENERATE_EVENT); -+ mlxsw_reg_pmaos_pack(pmaos_pl, i); -+ mlxsw_reg_pmaos_e_set(pmaos_pl, -+ MLXSW_REG_PMAOS_E_GENERATE_EVENT); -+ mlxsw_reg_pmaos_ee_set(pmaos_pl, true); - err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); - if (err) - return err; -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index dd72443c295f..0e18806b5834 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -5481,13 +5481,10 @@ enum mlxsw_reg_pmaos_e { - */ - MLXSW_ITEM32(reg, pmaos, e, 0x04, 0, 2); - --static inline void mlxsw_reg_pmaos_pack(char *payload, u8 module, -- enum mlxsw_reg_pmaos_e e) -+static inline void mlxsw_reg_pmaos_pack(char *payload, u8 module) - { - MLXSW_REG_ZERO(pmaos, payload); - mlxsw_reg_pmaos_module_set(payload, module); -- mlxsw_reg_pmaos_e_set(payload, e); -- mlxsw_reg_pmaos_ee_set(payload, true); - } - - /* PPLR - Port Physical Loopback Register --- -2.20.1 - diff --git a/patch/0075-mlxsw-Add-support-for-transceiver-modules-reset.patch b/patch/0075-mlxsw-Add-support-for-transceiver-modules-reset.patch deleted file mode 100644 index 1aaf833914d4..000000000000 --- a/patch/0075-mlxsw-Add-support-for-transceiver-modules-reset.patch +++ /dev/null @@ -1,193 +0,0 @@ -From 8d47608fe8545714121b1e9067c2431eefdb13fe Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Sun, 15 Aug 2021 18:12:37 +0300 -Subject: [PATCH backport 5.10 075/182] mlxsw: Add support for transceiver - modules reset - -Implement support for ethtool_ops::reset in order to reset transceiver -modules. The module backing the netdev is reset when the 'ETH_RESET_PHY' -flag is set. After a successful reset, the flag is cleared by the driver -and other flags are ignored. This is in accordance with the interface -documentation: - -"The reset() operation must clear the flags for the components which -were actually reset. On successful return, the flags indicate the -components which were not reset, either because they do not exist in the -hardware or because they cannot be reset independently. The driver must -never reset any components that were not requested." - -Reset is useful in order to allow a module to transition out of a fault -state. From section 6.3.2.12 in CMIS 5.0: "Except for a power cycle, the -only exit path from the ModuleFault state is to perform a module reset -by taking an action that causes the ResetS transition signal to become -TRUE (see Table 6-11)". - -An error is returned when the netdev is administratively up: - - # ip link set dev swp11 up - - # ethtool --reset swp11 phy - ETHTOOL_RESET 0x40 - Cannot issue ETHTOOL_RESET: Invalid argument - - # ip link set dev swp11 down - - # ethtool --reset swp11 phy - ETHTOOL_RESET 0x40 - Components reset: 0x40 - -An error is returned when the module is shared by multiple ports (split -ports) and the "phy-shared" flag is not set: - - # devlink port split swp11 count 4 - - # ethtool --reset swp11s0 phy - ETHTOOL_RESET 0x40 - Cannot issue ETHTOOL_RESET: Invalid argument - - # ethtool --reset swp11s0 phy-shared - ETHTOOL_RESET 0x400000 - Components reset: 0x400000 - - # devlink port unsplit swp11s0 - - # ethtool --reset swp11 phy - ETHTOOL_RESET 0x40 - Components reset: 0x40 - -An error is also returned when one of the ports using the module is -administratively up: - - # devlink port split swp11 count 4 - - # ip link set dev swp11s1 up - - # ethtool --reset swp11s0 phy-shared - ETHTOOL_RESET 0x400000 - Cannot issue ETHTOOL_RESET: Invalid argument - - # ip link set dev swp11s1 down - - # ethtool --reset swp11s0 phy-shared - ETHTOOL_RESET 0x400000 - Components reset: 0x400000 - -Reset is performed by writing to the "rst" bit of the PMAOS register, -which instructs the firmware to assert the reset signal connected to the -module for a fixed amount of time. - -Signed-off-by: Ido Schimmel ---- - .../net/ethernet/mellanox/mlxsw/core_env.c | 53 +++++++++++++++++++ - .../net/ethernet/mellanox/mlxsw/core_env.h | 4 ++ - drivers/net/ethernet/mellanox/mlxsw/minimal.c | 10 ++++ - 3 files changed, 67 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index a474629643aa..9e367174743d 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -392,6 +392,59 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module, - } - EXPORT_SYMBOL(mlxsw_env_get_module_eeprom_by_page); - -+static int mlxsw_env_module_reset(struct mlxsw_core *mlxsw_core, u8 module) -+{ -+ char pmaos_pl[MLXSW_REG_PMAOS_LEN]; -+ -+ mlxsw_reg_pmaos_pack(pmaos_pl, module); -+ mlxsw_reg_pmaos_rst_set(pmaos_pl, true); -+ -+ return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); -+} -+ -+int mlxsw_env_reset_module(struct net_device *netdev, -+ struct mlxsw_core *mlxsw_core, u8 module, u32 *flags) -+{ -+ struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); -+ u32 req = *flags; -+ int err; -+ -+ if (!(req & ETH_RESET_PHY) && -+ !(req & (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT))) -+ return 0; -+ -+ if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) -+ return -EINVAL; -+ -+ mutex_lock(&mlxsw_env->module_info_lock); -+ -+ if (mlxsw_env->module_info[module].num_ports_up) { -+ netdev_err(netdev, "Cannot reset module when ports using it are administratively up\n"); -+ err = -EINVAL; -+ goto out; -+ } -+ -+ if (mlxsw_env->module_info[module].num_ports_mapped > 1 && -+ !(req & (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT))) { -+ netdev_err(netdev, "Cannot reset module without \"phy-shared\" flag when shared by multiple ports\n"); -+ err = -EINVAL; -+ goto out; -+ } -+ -+ err = mlxsw_env_module_reset(mlxsw_core, module); -+ if (err) { -+ netdev_err(netdev, "Failed to reset module\n"); -+ goto out; -+ } -+ -+ *flags &= ~(ETH_RESET_PHY | (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT)); -+ -+out: -+ mutex_unlock(&mlxsw_env->module_info_lock); -+ return err; -+} -+EXPORT_SYMBOL(mlxsw_env_reset_module); -+ - static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core, - u8 module, - bool *p_has_temp_sensor) -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -index ba9269f12cb8..c486397f5dfe 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -@@ -24,6 +24,10 @@ mlxsw_env_get_module_eeprom_by_page(struct mlxsw_core *mlxsw_core, u8 module, - const struct ethtool_module_eeprom *page, - struct netlink_ext_ack *extack); - -+int mlxsw_env_reset_module(struct net_device *netdev, -+ struct mlxsw_core *mlxsw_core, u8 module, -+ u32 *flags); -+ - int - mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module, - u64 *p_counter); -diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -index e75b702aeb36..d8659ff68ffe 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -@@ -136,11 +136,21 @@ mlxsw_m_get_module_eeprom_by_page(struct net_device *netdev, - page, extack); - } - -+static int mlxsw_m_reset(struct net_device *netdev, u32 *flags) -+{ -+ struct mlxsw_m_port *mlxsw_m_port = netdev_priv(netdev); -+ struct mlxsw_core *core = mlxsw_m_port->mlxsw_m->core; -+ -+ return mlxsw_env_reset_module(netdev, core, mlxsw_m_port->module, -+ flags); -+} -+ - static const struct ethtool_ops mlxsw_m_port_ethtool_ops = { - .get_drvinfo = mlxsw_m_module_get_drvinfo, - .get_module_info = mlxsw_m_get_module_info, - .get_module_eeprom = mlxsw_m_get_module_eeprom, - .get_module_eeprom_by_page = mlxsw_m_get_module_eeprom_by_page, -+ .reset = mlxsw_m_reset, - }; - - static int --- -2.20.1 - diff --git a/patch/0076-ethtool-Add-ability-to-control-transceiver-modules-p.patch b/patch/0076-ethtool-Add-ability-to-control-transceiver-modules-p.patch deleted file mode 100644 index 37b649899f7e..000000000000 --- a/patch/0076-ethtool-Add-ability-to-control-transceiver-modules-p.patch +++ /dev/null @@ -1,802 +0,0 @@ -From a0de9809b2d039b36f39dab066777233ce2844db Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Wed, 21 Jul 2021 17:05:31 +0300 -Subject: [PATCH backport 5.10 076/182] ethtool: Add ability to control - transceiver modules' power mode - -Add a pair of new ethtool messages, 'ETHTOOL_MSG_MODULE_SET' and -'ETHTOOL_MSG_MODULE_GET', that can be used to control transceiver -modules parameters and retrieve their status. - -The first parameter to control is the power mode of the module. It is -only relevant for paged memory modules, as flat memory modules always -operate in low power mode. - -When a paged memory module is in low power mode, its power consumption -is reduced to the minimum, the management interface towards the host is -available and the data path is deactivated. - -User space can choose to put modules that are not currently in use in -low power mode and transition them to high power mode before putting the -associated ports administratively up. This is useful for user space that -favors reduced power consumption and lower temperatures over reduced -link up times. In QSFP-DD modules the transition from low power mode to -high power mode can take a few seconds and this transition is only -expected to get longer with future / more complex modules. - -User space can control the power mode of the module via the power mode -policy attribute ('ETHTOOL_A_MODULE_POWER_MODE_POLICY'). Possible -values: - -* high: Module is always in high power mode. - -* auto: Module is transitioned by the host to high power mode when the - first port using it is put administratively up and to low power mode - when the last port using it is put administratively down. - -The operational power mode of the module is available to user space via -the 'ETHTOOL_A_MODULE_POWER_MODE' attribute. The attribute is not -reported to user space when a module is not plugged-in. - -The user API is designed to be generic enough so that it could be used -for modules with different memory maps (e.g., SFF-8636, CMIS). - -The only implementation of the device driver API in this series is for a -MAC driver (mlxsw) where the module is controlled by the device's -firmware, but it is designed to be generic enough so that it could also -be used by implementations where the module is controlled by the CPU. - -CMIS testing -============ - - # ethtool -m swp11 - Identifier : 0x18 (QSFP-DD Double Density 8X Pluggable Transceiver (INF-8628)) - ... - Module State : 0x03 (ModuleReady) - LowPwrAllowRequestHW : Off - LowPwrRequestSW : Off - -The module is not in low power mode, as it is not forced by hardware -(LowPwrAllowRequestHW is off) or by software (LowPwrRequestSW is off). - -The power mode can be queried from the kernel. In case -LowPwrAllowRequestHW was on, the kernel would need to take into account -the state of the LowPwrRequestHW signal, which is not visible to user -space. - - $ ethtool --show-module swp11 - Module parameters for swp11: - power-mode-policy high - power-mode high - -Change the power mode policy to 'auto': - - # ethtool --set-module swp11 power-mode-policy auto - -Query the power mode again: - - $ ethtool --show-module swp11 - Module parameters for swp11: - power-mode-policy auto - power-mode low - -Verify with the data read from the EEPROM: - - # ethtool -m swp11 - Identifier : 0x18 (QSFP-DD Double Density 8X Pluggable Transceiver (INF-8628)) - ... - Module State : 0x01 (ModuleLowPwr) - LowPwrAllowRequestHW : Off - LowPwrRequestSW : On - -Put the associated port administratively up which will instruct the host -to transition the module to high power mode: - - # ip link set dev swp11 up - -Query the power mode again: - - $ ethtool --show-module swp11 - Module parameters for swp11: - power-mode-policy auto - power-mode high - -Verify with the data read from the EEPROM: - - # ethtool -m swp11 - Identifier : 0x18 (QSFP-DD Double Density 8X Pluggable Transceiver (INF-8628)) - ... - Module State : 0x03 (ModuleReady) - LowPwrAllowRequestHW : Off - LowPwrRequestSW : Off - -Put the associated port administratively down which will instruct the -host to transition the module to low power mode: - - # ip link set dev swp11 down - -Query the power mode again: - - $ ethtool --show-module swp11 - Module parameters for swp11: - power-mode-policy auto - power-mode low - -Verify with the data read from the EEPROM: - - # ethtool -m swp11 - Identifier : 0x18 (QSFP-DD Double Density 8X Pluggable Transceiver (INF-8628)) - ... - Module State : 0x01 (ModuleLowPwr) - LowPwrAllowRequestHW : Off - LowPwrRequestSW : On - -SFF-8636 testing -================ - - # ethtool -m swp13 - Identifier : 0x11 (QSFP28) - ... - Extended identifier description : 5.0W max. Power consumption, High Power Class (> 3.5 W) enabled - Power set : Off - Power override : On - ... - Transmit avg optical power (Channel 1) : 0.7733 mW / -1.12 dBm - Transmit avg optical power (Channel 2) : 0.7649 mW / -1.16 dBm - Transmit avg optical power (Channel 3) : 0.7790 mW / -1.08 dBm - Transmit avg optical power (Channel 4) : 0.7837 mW / -1.06 dBm - Rcvr signal avg optical power(Channel 1) : 0.9302 mW / -0.31 dBm - Rcvr signal avg optical power(Channel 2) : 0.9079 mW / -0.42 dBm - Rcvr signal avg optical power(Channel 3) : 0.8993 mW / -0.46 dBm - Rcvr signal avg optical power(Channel 4) : 0.8778 mW / -0.57 dBm - -The module is not in low power mode, as it is not forced by hardware -(Power override is on) or by software (Power set is off). - -The power mode can be queried from the kernel. In case Power override -was off, the kernel would need to take into account the state of the -LPMode signal, which is not visible to user space. - - $ ethtool --show-module swp13 - Module parameters for swp13: - power-mode-policy high - power-mode high - -Change the power mode policy to 'auto': - - # ethtool --set-module swp13 power-mode-policy auto - -Query the power mode again: - - $ ethtool --show-module swp13 - Module parameters for swp13: - power-mode-policy auto - power-mode low - -Verify with the data read from the EEPROM: - - # ethtool -m swp13 - Identifier : 0x11 (QSFP28) - Extended identifier description : 5.0W max. Power consumption, High Power Class (> 3.5 W) not enabled - Power set : On - Power override : On - ... - Transmit avg optical power (Channel 1) : 0.0000 mW / -inf dBm - Transmit avg optical power (Channel 2) : 0.0000 mW / -inf dBm - Transmit avg optical power (Channel 3) : 0.0000 mW / -inf dBm - Transmit avg optical power (Channel 4) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 1) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 2) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 3) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 4) : 0.0000 mW / -inf dBm - -Put the associated port administratively up which will instruct the host -to transition the module to high power mode: - - # ip link set dev swp13 up - -Query the power mode again: - - $ ethtool --show-module swp13 - Module parameters for swp13: - power-mode-policy auto - power-mode high - -Verify with the data read from the EEPROM: - - # ethtool -m swp13 - Identifier : 0x11 (QSFP28) - ... - Extended identifier description : 5.0W max. Power consumption, High Power Class (> 3.5 W) enabled - Power set : Off - Power override : On - ... - Transmit avg optical power (Channel 1) : 0.7934 mW / -1.01 dBm - Transmit avg optical power (Channel 2) : 0.7859 mW / -1.05 dBm - Transmit avg optical power (Channel 3) : 0.7885 mW / -1.03 dBm - Transmit avg optical power (Channel 4) : 0.7985 mW / -0.98 dBm - Rcvr signal avg optical power(Channel 1) : 0.9325 mW / -0.30 dBm - Rcvr signal avg optical power(Channel 2) : 0.9034 mW / -0.44 dBm - Rcvr signal avg optical power(Channel 3) : 0.9086 mW / -0.42 dBm - Rcvr signal avg optical power(Channel 4) : 0.8885 mW / -0.51 dBm - -Put the associated port administratively down which will instruct the -host to transition the module to low power mode: - - # ip link set dev swp13 down - -Query the power mode again: - - $ ethtool --show-module swp13 - Module parameters for swp13: - power-mode-policy auto - power-mode low - -Verify with the data read from the EEPROM: - - # ethtool -m swp13 - Identifier : 0x11 (QSFP28) - ... - Extended identifier description : 5.0W max. Power consumption, High Power Class (> 3.5 W) not enabled - Power set : On - Power override : On - ... - Transmit avg optical power (Channel 1) : 0.0000 mW / -inf dBm - Transmit avg optical power (Channel 2) : 0.0000 mW / -inf dBm - Transmit avg optical power (Channel 3) : 0.0000 mW / -inf dBm - Transmit avg optical power (Channel 4) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 1) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 2) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 3) : 0.0000 mW / -inf dBm - Rcvr signal avg optical power(Channel 4) : 0.0000 mW / -inf dBm - -Signed-off-by: Ido Schimmel ---- - Documentation/networking/ethtool-netlink.rst | 71 ++++++- - include/linux/ethtool.h | 22 +++ - include/uapi/linux/ethtool.h | 28 +++ - include/uapi/linux/ethtool_netlink.h | 22 +++ - net/ethtool/Makefile | 2 +- - net/ethtool/module.c | 184 +++++++++++++++++++ - net/ethtool/netlink.c | 19 ++ - net/ethtool/netlink.h | 4 + - 8 files changed, 349 insertions(+), 3 deletions(-) - create mode 100644 net/ethtool/module.c - -diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst -index 4fa59accec79..9de7c5a4baef 100644 ---- a/Documentation/networking/ethtool-netlink.rst -+++ b/Documentation/networking/ethtool-netlink.rst -@@ -41,6 +41,11 @@ In the message structure descriptions below, if an attribute name is suffixed - with "+", parent nest can contain multiple attributes of the same type. This - implements an array of entries. - -+Attributes that need to be filled-in by device drivers and that are dumped to -+user space based on whether they are valid or not should not use zero as a -+valid value. This avoids the need to explicitly signal the validity of the -+attribute in the device driver API. -+ - - Request header - ============== -@@ -179,7 +184,7 @@ according to message purpose: - - Userspace to kernel: - -- ===================================== ================================ -+ ===================================== ================================= - ``ETHTOOL_MSG_STRSET_GET`` get string set - ``ETHTOOL_MSG_LINKINFO_GET`` get link settings - ``ETHTOOL_MSG_LINKINFO_SET`` set link settings -@@ -209,6 +214,8 @@ Userspace to kernel: - ``ETHTOOL_MSG_CABLE_TEST_TDR_ACT`` action start raw TDR cable test - ``ETHTOOL_MSG_TUNNEL_INFO_GET`` get tunnel offload info - ``ETHTOOL_MSG_MODULE_EEPROM_GET`` read SFP module EEPROM -+ ``ETHTOOL_MSG_MODULE_SET`` set transceiver module parameters -+ ``ETHTOOL_MSG_MODULE_GET`` get transceiver module parameters - ===================================== ================================ - - Kernel to userspace: -@@ -244,7 +251,8 @@ Kernel to userspace: - ``ETHTOOL_MSG_CABLE_TEST_TDR_NTF`` Cable test TDR results - ``ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY`` tunnel offload info - ``ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY`` read SFP module EEPROM -- ===================================== ================================= -+ ``ETHTOOL_MSG_MODULE_GET_REPLY`` transceiver module parameters -+ ======================================== ================================= - - ``GET`` requests are sent by userspace applications to retrieve device - information. They usually do not contain any message specific attributes. -@@ -1316,6 +1324,63 @@ Kernel response contents: - ``ETHTOOL_A_MODULE_EEPROM_DATA`` has an attribute length equal to the amount of - bytes driver actually read. - -+MODULE_GET -+========== -+ -+Gets transceiver module parameters. -+ -+Request contents: -+ -+ ===================================== ====== ========================== -+ ``ETHTOOL_A_MODULE_HEADER`` nested request header -+ ===================================== ====== ========================== -+ -+Kernel response contents: -+ -+ ====================================== ====== ========================== -+ ``ETHTOOL_A_MODULE_HEADER`` nested reply header -+ ``ETHTOOL_A_MODULE_POWER_MODE_POLICY`` u8 power mode policy -+ ``ETHTOOL_A_MODULE_POWER_MODE`` u8 operational power mode -+ ====================================== ====== ========================== -+ -+The optional ``ETHTOOL_A_MODULE_POWER_MODE_POLICY`` attribute encodes the -+transceiver module power mode policy enforced by the host. The default policy -+is driver-dependent, but "auto" is the recommended default and it should be -+implemented by new drivers and drivers where conformance to a legacy behavior -+is not critical. -+ -+The optional ``ETHTHOOL_A_MODULE_POWER_MODE`` attribute encodes the operational -+power mode policy of the transceiver module. It is only reported when a module -+is plugged-in. Possible values are: -+ -+.. kernel-doc:: include/uapi/linux/ethtool.h -+ :identifiers: ethtool_module_power_mode -+ -+MODULE_SET -+========== -+ -+Sets transceiver module parameters. -+ -+Request contents: -+ -+ ====================================== ====== ========================== -+ ``ETHTOOL_A_MODULE_HEADER`` nested request header -+ ``ETHTOOL_A_MODULE_POWER_MODE_POLICY`` u8 power mode policy -+ ====================================== ====== ========================== -+ -+When set, the optional ``ETHTOOL_A_MODULE_POWER_MODE_POLICY`` attribute is used -+to set the transceiver module power policy enforced by the host. Possible -+values are: -+ -+.. kernel-doc:: include/uapi/linux/ethtool.h -+ :identifiers: ethtool_module_power_mode_policy -+ -+For SFF-8636 modules, low power mode is forced by the host according to table -+6-10 in revision 2.10a of the specification. -+ -+For CMIS modules, low power mode is forced by the host according to table 6-12 -+in revision 5.0 of the specification. -+ - Request translation - =================== - -@@ -1414,4 +1479,6 @@ are netlink only. - n/a ''ETHTOOL_MSG_CABLE_TEST_ACT'' - n/a ''ETHTOOL_MSG_CABLE_TEST_TDR_ACT'' - n/a ``ETHTOOL_MSG_TUNNEL_INFO_GET`` -+ n/a ``ETHTOOL_MSG_MODULE_GET`` -+ n/a ``ETHTOOL_MSG_MODULE_SET`` - =================================== ===================================== -diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h -index dbabd804b2cb..c7d232c27cdd 100644 ---- a/include/linux/ethtool.h -+++ b/include/linux/ethtool.h -@@ -284,6 +284,17 @@ struct ethtool_module_eeprom { - u8 *data; - }; - -+/** -+ * struct ethtool_module_power_mode_params - module power mode parameters -+ * @policy: The power mode policy enforced by the host for the plug-in module. -+ * @mode: The operational power mode of the plug-in module. Should be filled by -+ * device drivers on get operations. -+ */ -+struct ethtool_module_power_mode_params { -+ enum ethtool_module_power_mode_policy policy; -+ enum ethtool_module_power_mode mode; -+}; -+ - /** - * struct ethtool_ops - optional netdev operations - * @supported_coalesce_params: supported types of interrupt coalescing. -@@ -430,6 +441,11 @@ struct ethtool_module_eeprom { - * @get_module_eeprom_by_page: Get a region of plug-in module EEPROM data from - * specified page. Returns a negative error code or the amount of bytes - * read. -+ * @get_module_power_mode: Get the power mode policy for the plug-in module -+ * used by the network device and its operational power mode, if -+ * plugged-in. -+ * @set_module_power_mode: Set the power mode policy for the plug-in module -+ * used by the network device. - * - * All operations are optional (i.e. the function pointer may be set - * to %NULL) and callers must take this into account. Callers must -@@ -537,6 +553,12 @@ struct ethtool_ops { - int (*get_module_eeprom_by_page)(struct net_device *dev, - const struct ethtool_module_eeprom *page, - struct netlink_ext_ack *extack); -+ int (*get_module_power_mode)(struct net_device *dev, -+ struct ethtool_module_power_mode_params *params, -+ struct netlink_ext_ack *extack); -+ int (*set_module_power_mode)(struct net_device *dev, -+ const struct ethtool_module_power_mode_params *params, -+ struct netlink_ext_ack *extack); - }; - - int ethtool_check_ops(const struct ethtool_ops *ops); -diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h -index 13772f039c8d..d49bad6446f9 100644 ---- a/include/uapi/linux/ethtool.h -+++ b/include/uapi/linux/ethtool.h -@@ -649,6 +649,11 @@ enum ethtool_link_ext_substate_cable_issue { - ETHTOOL_LINK_EXT_SUBSTATE_CI_CABLE_TEST_FAILURE, - }; - -+/* More information in addition to ETHTOOL_LINK_EXT_STATE_MODULE. */ -+enum ethtool_link_ext_substate_module { -+ ETHTOOL_LINK_EXT_SUBSTATE_MODULE_CMIS_NOT_READY = 1, -+}; -+ - #define ETH_GSTRING_LEN 32 - - /** -@@ -693,6 +698,29 @@ enum ethtool_stringset { - ETH_SS_COUNT - }; - -+/** -+ * enum ethtool_module_power_mode_policy - plug-in module power mode policy -+ * @ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH: Module is always in high power mode. -+ * @ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO: Module is transitioned by the host -+ * to high power mode when the first port using it is put administratively -+ * up and to low power mode when the last port using it is put -+ * administratively down. -+ */ -+enum ethtool_module_power_mode_policy { -+ ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH = 1, -+ ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO, -+}; -+ -+/** -+ * enum ethtool_module_power_mode - plug-in module power mode -+ * @ETHTOOL_MODULE_POWER_MODE_LOW: Module is in low power mode. -+ * @ETHTOOL_MODULE_POWER_MODE_HIGH: Module is in high power mode. -+ */ -+enum ethtool_module_power_mode { -+ ETHTOOL_MODULE_POWER_MODE_LOW = 1, -+ ETHTOOL_MODULE_POWER_MODE_HIGH, -+}; -+ - /** - * struct ethtool_gstrings - string set for data tagging - * @cmd: Command number = %ETHTOOL_GSTRINGS -diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h -index 8ac5c7e64314..9333f669feb7 100644 ---- a/include/uapi/linux/ethtool_netlink.h -+++ b/include/uapi/linux/ethtool_netlink.h -@@ -45,6 +45,10 @@ enum { - ETHTOOL_MSG_FEC_GET, - ETHTOOL_MSG_FEC_SET, - ETHTOOL_MSG_MODULE_EEPROM_GET, -+ ETHTOOL_MSG_STATS_GET, -+ ETHTOOL_MSG_PHC_VCLOCKS_GET, -+ ETHTOOL_MSG_MODULE_GET, -+ ETHTOOL_MSG_MODULE_SET, - - /* add new constants above here */ - __ETHTOOL_MSG_USER_CNT, -@@ -86,6 +90,10 @@ enum { - ETHTOOL_MSG_FEC_GET_REPLY, - ETHTOOL_MSG_FEC_NTF, - ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY, -+ ETHTOOL_MSG_STATS_GET_REPLY, -+ ETHTOOL_MSG_PHC_VCLOCKS_GET_REPLY, -+ ETHTOOL_MSG_MODULE_GET_REPLY, -+ ETHTOOL_MSG_MODULE_NTF, - - /* add new constants above here */ - __ETHTOOL_MSG_KERNEL_CNT, -@@ -653,6 +661,20 @@ enum { - ETHTOOL_A_MODULE_EEPROM_MAX = (__ETHTOOL_A_MODULE_EEPROM_CNT - 1) - }; - -+ -+/* MODULE */ -+ -+enum { -+ ETHTOOL_A_MODULE_UNSPEC, -+ ETHTOOL_A_MODULE_HEADER, /* nest - _A_HEADER_* */ -+ ETHTOOL_A_MODULE_POWER_MODE_POLICY, /* u8 */ -+ ETHTOOL_A_MODULE_POWER_MODE, /* u8 */ -+ -+ /* add new constants above here */ -+ __ETHTOOL_A_MODULE_CNT, -+ ETHTOOL_A_MODULE_MAX = (__ETHTOOL_A_MODULE_CNT - 1) -+}; -+ - /* generic netlink info */ - #define ETHTOOL_GENL_NAME "ethtool" - #define ETHTOOL_GENL_VERSION 1 -diff --git a/net/ethtool/Makefile b/net/ethtool/Makefile -index d604346bc074..702abc2c75f8 100644 ---- a/net/ethtool/Makefile -+++ b/net/ethtool/Makefile -@@ -7,4 +7,4 @@ obj-$(CONFIG_ETHTOOL_NETLINK) += ethtool_nl.o - ethtool_nl-y := netlink.o bitset.o strset.o linkinfo.o linkmodes.o \ - linkstate.o debug.o wol.o features.o privflags.o rings.o \ - channels.o coalesce.o pause.o eee.o tsinfo.o cabletest.o \ -- tunnels.o eeprom.o -+ tunnels.o eeprom.o module.o -diff --git a/net/ethtool/module.c b/net/ethtool/module.c -new file mode 100644 -index 000000000000..254ac84f9728 ---- /dev/null -+++ b/net/ethtool/module.c -@@ -0,0 +1,184 @@ -+// SPDX-License-Identifier: GPL-2.0-only -+ -+#include -+ -+#include "netlink.h" -+#include "common.h" -+#include "bitset.h" -+ -+struct module_req_info { -+ struct ethnl_req_info base; -+}; -+ -+struct module_reply_data { -+ struct ethnl_reply_data base; -+ struct ethtool_module_power_mode_params power; -+ u8 power_valid:1; -+}; -+ -+#define MODULE_REPDATA(__reply_base) \ -+ container_of(__reply_base, struct module_reply_data, base) -+ -+/* MODULE_GET */ -+ -+const struct nla_policy ethnl_module_get_policy[ETHTOOL_A_MODULE_HEADER + 1] = { -+ [ETHTOOL_A_MODULE_HEADER] = NLA_POLICY_NESTED(ethnl_header_policy), -+}; -+ -+static int module_get_power_mode(struct net_device *dev, -+ struct module_reply_data *data, -+ struct netlink_ext_ack *extack) -+{ -+ const struct ethtool_ops *ops = dev->ethtool_ops; -+ int ret; -+ -+ if (!ops->get_module_power_mode) -+ return 0; -+ -+ ret = ops->get_module_power_mode(dev, &data->power, extack); -+ if (ret < 0) -+ return ret; -+ -+ data->power_valid = true; -+ -+ return 0; -+} -+ -+static int module_prepare_data(const struct ethnl_req_info *req_base, -+ struct ethnl_reply_data *reply_base, -+ struct genl_info *info) -+{ -+ struct module_reply_data *data = MODULE_REPDATA(reply_base); -+ struct netlink_ext_ack *extack = info ? info->extack : NULL; -+ struct net_device *dev = reply_base->dev; -+ int ret; -+ -+ ret = ethnl_ops_begin(dev); -+ if (ret < 0) -+ return ret; -+ -+ ret = module_get_power_mode(dev, data, extack); -+ if (ret < 0) -+ goto out_complete; -+ -+out_complete: -+ ethnl_ops_complete(dev); -+ return ret; -+} -+ -+static int module_reply_size(const struct ethnl_req_info *req_base, -+ const struct ethnl_reply_data *reply_base) -+{ -+ struct module_reply_data *data = MODULE_REPDATA(reply_base); -+ int len = 0; -+ -+ if (data->power_valid) -+ len += nla_total_size(sizeof(u8)); /* _MODULE_POWER_MODE_POLICY */ -+ -+ if (data->power_valid && data->power.mode) -+ len += nla_total_size(sizeof(u8)); /* _MODULE_POWER_MODE */ -+ -+ return len; -+} -+ -+static int module_fill_reply(struct sk_buff *skb, -+ const struct ethnl_req_info *req_base, -+ const struct ethnl_reply_data *reply_base) -+{ -+ const struct module_reply_data *data = MODULE_REPDATA(reply_base); -+ -+ if (data->power_valid && -+ nla_put_u8(skb, ETHTOOL_A_MODULE_POWER_MODE_POLICY, -+ data->power.policy)) -+ return -EMSGSIZE; -+ -+ if (data->power_valid && data->power.mode && -+ nla_put_u8(skb, ETHTOOL_A_MODULE_POWER_MODE, data->power.mode)) -+ return -EMSGSIZE; -+ -+ return 0; -+} -+ -+const struct ethnl_request_ops ethnl_module_request_ops = { -+ .request_cmd = ETHTOOL_MSG_MODULE_GET, -+ .reply_cmd = ETHTOOL_MSG_MODULE_GET_REPLY, -+ .hdr_attr = ETHTOOL_A_MODULE_HEADER, -+ .req_info_size = sizeof(struct module_req_info), -+ .reply_data_size = sizeof(struct module_reply_data), -+ -+ .prepare_data = module_prepare_data, -+ .reply_size = module_reply_size, -+ .fill_reply = module_fill_reply, -+}; -+ -+/* MODULE_SET */ -+ -+const struct nla_policy ethnl_module_set_policy[ETHTOOL_A_MODULE_POWER_MODE_POLICY + 1] = { -+ [ETHTOOL_A_MODULE_HEADER] = NLA_POLICY_NESTED(ethnl_header_policy), -+ [ETHTOOL_A_MODULE_POWER_MODE_POLICY] = -+ NLA_POLICY_MAX(NLA_U8, ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO), -+}; -+ -+static int module_set_power_mode(struct net_device *dev, struct nlattr **tb, -+ bool *p_mod, struct netlink_ext_ack *extack) -+{ -+ struct ethtool_module_power_mode_params power = {}; -+ struct ethtool_module_power_mode_params power_new; -+ const struct ethtool_ops *ops = dev->ethtool_ops; -+ int ret; -+ -+ if (!tb[ETHTOOL_A_MODULE_POWER_MODE_POLICY]) -+ return 0; -+ -+ if (!ops->get_module_power_mode || !ops->set_module_power_mode) { -+ NL_SET_ERR_MSG_ATTR(extack, -+ tb[ETHTOOL_A_MODULE_POWER_MODE_POLICY], -+ "Setting power mode policy is not supported by this device"); -+ return -EOPNOTSUPP; -+ } -+ -+ power_new.policy = nla_get_u8(tb[ETHTOOL_A_MODULE_POWER_MODE_POLICY]); -+ ret = ops->get_module_power_mode(dev, &power, extack); -+ if (ret < 0) -+ return ret; -+ *p_mod = power_new.policy != power.policy; -+ -+ return ops->set_module_power_mode(dev, &power_new, extack); -+} -+ -+int ethnl_set_module(struct sk_buff *skb, struct genl_info *info) -+{ -+ struct ethnl_req_info req_info = {}; -+ struct nlattr **tb = info->attrs; -+ struct net_device *dev; -+ bool mod = false; -+ int ret; -+ -+ ret = ethnl_parse_header_dev_get(&req_info, tb[ETHTOOL_A_MODULE_HEADER], -+ genl_info_net(info), info->extack, -+ true); -+ if (ret < 0) -+ return ret; -+ dev = req_info.dev; -+ -+ rtnl_lock(); -+ ret = ethnl_ops_begin(dev); -+ if (ret < 0) -+ goto out_rtnl; -+ -+ ret = module_set_power_mode(dev, tb, &mod, info->extack); -+ if (ret < 0) -+ goto out_ops; -+ -+ if (!mod) -+ goto out_ops; -+ -+ ethtool_notify(dev, ETHTOOL_MSG_MODULE_NTF, NULL); -+ -+out_ops: -+ ethnl_ops_complete(dev); -+out_rtnl: -+ rtnl_unlock(); -+ dev_put(dev); -+ return ret; -+} -diff --git a/net/ethtool/netlink.c b/net/ethtool/netlink.c -index 5ae95f423780..32c9638300c9 100644 ---- a/net/ethtool/netlink.c -+++ b/net/ethtool/netlink.c -@@ -246,6 +246,7 @@ ethnl_default_requests[__ETHTOOL_MSG_USER_CNT] = { - [ETHTOOL_MSG_EEE_GET] = ðnl_eee_request_ops, - [ETHTOOL_MSG_TSINFO_GET] = ðnl_tsinfo_request_ops, - [ETHTOOL_MSG_MODULE_EEPROM_GET] = ðnl_module_eeprom_request_ops, -+ [ETHTOOL_MSG_MODULE_GET] = ðnl_module_request_ops, - }; - - static struct ethnl_dump_ctx *ethnl_dump_context(struct netlink_callback *cb) -@@ -553,6 +554,7 @@ ethnl_default_notify_ops[ETHTOOL_MSG_KERNEL_MAX + 1] = { - [ETHTOOL_MSG_COALESCE_NTF] = ðnl_coalesce_request_ops, - [ETHTOOL_MSG_PAUSE_NTF] = ðnl_pause_request_ops, - [ETHTOOL_MSG_EEE_NTF] = ðnl_eee_request_ops, -+ [ETHTOOL_MSG_MODULE_NTF] = ðnl_module_request_ops, - }; - - /* default notification handler */ -@@ -645,6 +647,7 @@ static const ethnl_notify_handler_t ethnl_notify_handlers[] = { - [ETHTOOL_MSG_COALESCE_NTF] = ethnl_default_notify, - [ETHTOOL_MSG_PAUSE_NTF] = ethnl_default_notify, - [ETHTOOL_MSG_EEE_NTF] = ethnl_default_notify, -+ [ETHTOOL_MSG_MODULE_NTF] = ethnl_default_notify, - }; - - void ethtool_notify(struct net_device *dev, unsigned int cmd, const void *data) -@@ -924,6 +927,22 @@ static const struct genl_ops ethtool_genl_ops[] = { - .policy = ethnl_module_eeprom_get_policy, - .maxattr = ARRAY_SIZE(ethnl_module_eeprom_get_policy) - 1, - }, -+ { -+ .cmd = ETHTOOL_MSG_MODULE_GET, -+ .doit = ethnl_default_doit, -+ .start = ethnl_default_start, -+ .dumpit = ethnl_default_dumpit, -+ .done = ethnl_default_done, -+ .policy = ethnl_module_get_policy, -+ .maxattr = ARRAY_SIZE(ethnl_module_get_policy) - 1, -+ }, -+ { -+ .cmd = ETHTOOL_MSG_MODULE_SET, -+ .flags = GENL_UNS_ADMIN_PERM, -+ .doit = ethnl_set_module, -+ .policy = ethnl_module_set_policy, -+ .maxattr = ARRAY_SIZE(ethnl_module_set_policy) - 1, -+ }, - }; - - static const struct genl_multicast_group ethtool_nl_mcgrps[] = { -diff --git a/net/ethtool/netlink.h b/net/ethtool/netlink.h -index 28dbd582c860..6c4a5b39d807 100644 ---- a/net/ethtool/netlink.h -+++ b/net/ethtool/netlink.h -@@ -348,6 +348,7 @@ extern const struct ethnl_request_ops ethnl_pause_request_ops; - extern const struct ethnl_request_ops ethnl_eee_request_ops; - extern const struct ethnl_request_ops ethnl_tsinfo_request_ops; - extern const struct ethnl_request_ops ethnl_module_eeprom_request_ops; -+extern const struct ethnl_request_ops ethnl_module_request_ops; - - extern const struct nla_policy ethnl_header_policy[ETHTOOL_A_HEADER_FLAGS + 1]; - extern const struct nla_policy ethnl_header_policy_stats[ETHTOOL_A_HEADER_FLAGS + 1]; -@@ -380,6 +381,8 @@ extern const struct nla_policy ethnl_cable_test_act_policy[ETHTOOL_A_CABLE_TEST_ - extern const struct nla_policy ethnl_cable_test_tdr_act_policy[ETHTOOL_A_CABLE_TEST_TDR_CFG + 1]; - extern const struct nla_policy ethnl_tunnel_info_get_policy[ETHTOOL_A_TUNNEL_INFO_HEADER + 1]; - extern const struct nla_policy ethnl_module_eeprom_get_policy[ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS + 1]; -+extern const struct nla_policy ethnl_module_get_policy[ETHTOOL_A_MODULE_HEADER + 1]; -+extern const struct nla_policy ethnl_module_set_policy[ETHTOOL_A_MODULE_POWER_MODE_POLICY + 1]; - - int ethnl_set_linkinfo(struct sk_buff *skb, struct genl_info *info); - int ethnl_set_linkmodes(struct sk_buff *skb, struct genl_info *info); -@@ -397,5 +400,6 @@ int ethnl_act_cable_test_tdr(struct sk_buff *skb, struct genl_info *info); - int ethnl_tunnel_info_doit(struct sk_buff *skb, struct genl_info *info); - int ethnl_tunnel_info_start(struct netlink_callback *cb); - int ethnl_tunnel_info_dumpit(struct sk_buff *skb, struct netlink_callback *cb); -+int ethnl_set_module(struct sk_buff *skb, struct genl_info *info); - - #endif /* _NET_ETHTOOL_NETLINK_H */ --- -2.20.1 - diff --git a/patch/0077-mlxsw-reg-Add-Port-Module-Memory-Map-Properties-regi.patch b/patch/0077-mlxsw-reg-Add-Port-Module-Memory-Map-Properties-regi.patch deleted file mode 100644 index 75c965524f8d..000000000000 --- a/patch/0077-mlxsw-reg-Add-Port-Module-Memory-Map-Properties-regi.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 8fdacd80f26d3ad6de5b1279981f17752e33c915 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Thu, 29 Jul 2021 15:58:12 +0300 -Subject: [PATCH backport 5.10 077/182] mlxsw: reg: Add Port Module Memory Map - Properties register - -Add the Port Module Memory Map Properties register. It will be used to -set the power mode of a module in subsequent patches. - -Signed-off-by: Ido Schimmel ---- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 50 +++++++++++++++++++++++ - 1 file changed, 50 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index 0e18806b5834..0cc2fdaa459e 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -5617,6 +5617,55 @@ static inline void mlxsw_reg_pddr_pack(char *payload, u8 local_port, - mlxsw_reg_pddr_page_select_set(payload, page_select); - } - -+/* PMMP - Port Module Memory Map Properties Register -+ * ------------------------------------------------- -+ * The PMMP register allows to override the module memory map advertisement. -+ * The register can only be set when the module is disabled by PMAOS register. -+ */ -+#define MLXSW_REG_PMMP_ID 0x5044 -+#define MLXSW_REG_PMMP_LEN 0x2C -+ -+MLXSW_REG_DEFINE(pmmp, MLXSW_REG_PMMP_ID, MLXSW_REG_PMMP_LEN); -+ -+/* reg_pmmp_module -+ * Module number. -+ * Access: Index -+ */ -+MLXSW_ITEM32(reg, pmmp, module, 0x00, 16, 8); -+ -+/* reg_pmmp_sticky -+ * When set, will keep eeprom_override values after plug-out event. -+ * Access: OP -+ */ -+MLXSW_ITEM32(reg, pmmp, sticky, 0x00, 0, 1); -+ -+/* reg_pmmp_eeprom_override_mask -+ * Write mask bit (negative polarity). -+ * 0 - Allow write -+ * 1 - Ignore write -+ * On write, indicates which of the bits from eeprom_override field are -+ * updated. -+ * Access: WO -+ */ -+MLXSW_ITEM32(reg, pmmp, eeprom_override_mask, 0x04, 16, 16); -+ -+enum { -+ /* Set module to low power mode */ -+ MLXSW_REG_PMMP_EEPROM_OVERRIDE_LOW_POWER_MASK = BIT(8), -+}; -+ -+/* reg_pmmp_eeprom_override -+ * Override / ignore EEPROM advertisement properties bitmask -+ * Access: RW -+ */ -+MLXSW_ITEM32(reg, pmmp, eeprom_override, 0x04, 0, 16); -+ -+static inline void mlxsw_reg_pmmp_pack(char *payload, u8 module) -+{ -+ MLXSW_REG_ZERO(pmmp, payload); -+ mlxsw_reg_pmmp_module_set(payload, module); -+} -+ - /* PMTM - Port Module Type Mapping Register - * ---------------------------------------- - * The PMTM allows query or configuration of module types. -@@ -11237,6 +11286,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { - MLXSW_REG(pmpe), - MLXSW_REG(pddr), - MLXSW_REG(pmtm), -+ MLXSW_REG(pmmp), - MLXSW_REG(htgt), - MLXSW_REG(hpkt), - MLXSW_REG(rgcr), --- -2.20.1 - diff --git a/patch/0078-mlxsw-reg-Add-Management-Cable-IO-and-Notifications-.patch b/patch/0078-mlxsw-reg-Add-Management-Cable-IO-and-Notifications-.patch deleted file mode 100644 index 1846df10d19f..000000000000 --- a/patch/0078-mlxsw-reg-Add-Management-Cable-IO-and-Notifications-.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 19ba46cee9e3610173c050667eefa3ef6609f4fc Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Fri, 30 Jul 2021 17:46:31 +0300 -Subject: [PATCH backport 5.10 078/182] mlxsw: reg: Add Management Cable IO and - Notifications register - -Add the Management Cable IO and Notifications register. It will be used -to retrieve the power mode status of a module in subsequent patches and -whether a module is present in a cage or not. - -Signed-off-by: Ido Schimmel ---- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 34 +++++++++++++++++++++++ - 1 file changed, 34 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index 0cc2fdaa459e..7f9b902049db 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -9289,6 +9289,39 @@ static inline void mlxsw_reg_mlcr_pack(char *payload, u8 local_port, - MLXSW_REG_MLCR_DURATION_MAX : 0); - } - -+/* MCION - Management Cable IO and Notifications Register -+ * ------------------------------------------------------ -+ * The MCION register is used to query transceiver modules' IO pins and other -+ * notifications. -+ */ -+#define MLXSW_REG_MCION_ID 0x9052 -+#define MLXSW_REG_MCION_LEN 0x18 -+ -+MLXSW_REG_DEFINE(mcion, MLXSW_REG_MCION_ID, MLXSW_REG_MCION_LEN); -+ -+/* reg_mcion_module -+ * Module number. -+ * Access: Index -+ */ -+MLXSW_ITEM32(reg, mcion, module, 0x00, 16, 8); -+ -+enum { -+ MLXSW_REG_MCION_MODULE_STATUS_BITS_PRESENT_MASK = BIT(0), -+ MLXSW_REG_MCION_MODULE_STATUS_BITS_LOW_POWER_MASK = BIT(8), -+}; -+ -+/* reg_mcion_module_status_bits -+ * Module IO status as defined by SFF. -+ * Access: RO -+ */ -+MLXSW_ITEM32(reg, mcion, module_status_bits, 0x04, 0, 16); -+ -+static inline void mlxsw_reg_mcion_pack(char *payload, u8 module) -+{ -+ MLXSW_REG_ZERO(mcion, payload); -+ mlxsw_reg_mcion_module_set(payload, module); -+} -+ - /* MTPPS - Management Pulse Per Second Register - * -------------------------------------------- - * This register provides the device PPS capabilities, configure the PPS in and -@@ -11322,6 +11355,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = { - MLXSW_REG(mgir), - MLXSW_REG(mrsr), - MLXSW_REG(mlcr), -+ MLXSW_REG(mcion), - MLXSW_REG(mtpps), - MLXSW_REG(mtutc), - MLXSW_REG(mpsc), --- -2.20.1 - diff --git a/patch/0079-mlxsw-Add-ability-to-control-transceiver-modules-pow.patch b/patch/0079-mlxsw-Add-ability-to-control-transceiver-modules-pow.patch deleted file mode 100644 index 96af1a6dd0c1..000000000000 --- a/patch/0079-mlxsw-Add-ability-to-control-transceiver-modules-pow.patch +++ /dev/null @@ -1,378 +0,0 @@ -From 7c7e9508c2bdc91c3c1cbc345b0ce816388690e6 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Mon, 16 Aug 2021 16:58:34 +0300 -Subject: [PATCH backport 5.10 079/182] mlxsw: Add ability to control - transceiver modules' power mode - -Implement support for ethtool_ops::.get_module_power_mode and -ethtool_ops::set_module_power_mode. - -The get operation is implemented using the Management Cable IO and -Notifications (MCION) register that reports the operational power mode -of the module and its presence. In case a module is not present, its -operational power mode is not reported to ethtool and user space. If not -set before, the power mode policy is reported as "high", which is the -default on Mellanox systems. - -The set operation is implemented using the Port Module Memory Map -Properties (PMMP) register. The register instructs the device's firmware -to transition a plugged-in module to / out of low power mode by writing -to its memory map. - -When the power mode policy is set to 'auto', a module will not -transition to low power mode as long as any ports using it are -administratively up. Example: - - # devlink port split swp11 count 4 - - # ethtool --set-module swp11s0 power-mode-policy auto - - $ ethtool --show-module swp11s0 - Module parameters for swp11s0: - power-mode-policy auto - power-mode low - - # ip link set dev swp11s0 up - - # ip link set dev swp11s1 up - - $ ethtool --show-module swp11s0 - Module parameters for swp11s0: - power-mode-policy auto - power-mode high - - # ip link set dev swp11s1 down - - $ ethtool --show-module swp11s0 - Module parameters for swp11s0: - power-mode-policy auto - power-mode high - - # ip link set dev swp11s0 down - - $ ethtool --show-module swp11s0 - Module parameters for swp11s0: - power-mode-policy auto - power-mode low - -Signed-off-by: Ido Schimmel ---- - .../net/ethernet/mellanox/mlxsw/core_env.c | 193 +++++++++++++++++- - .../net/ethernet/mellanox/mlxsw/core_env.h | 10 + - drivers/net/ethernet/mellanox/mlxsw/minimal.c | 26 +++ - 3 files changed, 226 insertions(+), 3 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index 9e367174743d..6dd4ae2f45f4 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -17,6 +17,7 @@ struct mlxsw_env_module_info { - bool is_overheat; - int num_ports_mapped; - int num_ports_up; -+ enum ethtool_module_power_mode_policy power_mode_policy; - }; - - struct mlxsw_env { -@@ -445,6 +446,152 @@ int mlxsw_env_reset_module(struct net_device *netdev, - } - EXPORT_SYMBOL(mlxsw_env_reset_module); - -+int -+mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module, -+ struct ethtool_module_power_mode_params *params, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); -+ char mcion_pl[MLXSW_REG_MCION_LEN]; -+ u32 status_bits; -+ int err; -+ -+ if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) -+ return -EINVAL; -+ -+ mutex_lock(&mlxsw_env->module_info_lock); -+ -+ params->policy = mlxsw_env->module_info[module].power_mode_policy; -+ -+ mlxsw_reg_mcion_pack(mcion_pl, module); -+ err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcion), mcion_pl); -+ if (err) { -+ NL_SET_ERR_MSG_MOD(extack, "Failed to retrieve module's power mode"); -+ goto out; -+ } -+ -+ status_bits = mlxsw_reg_mcion_module_status_bits_get(mcion_pl); -+ if (!(status_bits & MLXSW_REG_MCION_MODULE_STATUS_BITS_PRESENT_MASK)) -+ goto out; -+ -+ if (status_bits & MLXSW_REG_MCION_MODULE_STATUS_BITS_LOW_POWER_MASK) -+ params->mode = ETHTOOL_MODULE_POWER_MODE_LOW; -+ else -+ params->mode = ETHTOOL_MODULE_POWER_MODE_HIGH; -+ -+out: -+ mutex_unlock(&mlxsw_env->module_info_lock); -+ return err; -+} -+EXPORT_SYMBOL(mlxsw_env_get_module_power_mode); -+ -+static int mlxsw_env_module_enable_set(struct mlxsw_core *mlxsw_core, -+ u8 module, bool enable) -+{ -+ enum mlxsw_reg_pmaos_admin_status admin_status; -+ char pmaos_pl[MLXSW_REG_PMAOS_LEN]; -+ -+ mlxsw_reg_pmaos_pack(pmaos_pl, module); -+ admin_status = enable ? MLXSW_REG_PMAOS_ADMIN_STATUS_ENABLED : -+ MLXSW_REG_PMAOS_ADMIN_STATUS_DISABLED; -+ mlxsw_reg_pmaos_admin_status_set(pmaos_pl, admin_status); -+ mlxsw_reg_pmaos_ase_set(pmaos_pl, true); -+ -+ return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmaos), pmaos_pl); -+} -+ -+static int mlxsw_env_module_low_power_set(struct mlxsw_core *mlxsw_core, -+ u8 module, bool low_power) -+{ -+ u16 eeprom_override_mask, eeprom_override; -+ char pmmp_pl[MLXSW_REG_PMMP_LEN]; -+ -+ mlxsw_reg_pmmp_pack(pmmp_pl, module); -+ mlxsw_reg_pmmp_sticky_set(pmmp_pl, true); -+ /* Mask all the bits except low power mode. */ -+ eeprom_override_mask = ~MLXSW_REG_PMMP_EEPROM_OVERRIDE_LOW_POWER_MASK; -+ mlxsw_reg_pmmp_eeprom_override_mask_set(pmmp_pl, eeprom_override_mask); -+ eeprom_override = low_power ? MLXSW_REG_PMMP_EEPROM_OVERRIDE_LOW_POWER_MASK : -+ 0; -+ mlxsw_reg_pmmp_eeprom_override_set(pmmp_pl, eeprom_override); -+ -+ return mlxsw_reg_write(mlxsw_core, MLXSW_REG(pmmp), pmmp_pl); -+} -+ -+static int __mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, -+ u8 module, bool low_power, -+ struct netlink_ext_ack *extack) -+{ -+ int err; -+ -+ err = mlxsw_env_module_enable_set(mlxsw_core, module, false); -+ if (err) { -+ NL_SET_ERR_MSG_MOD(extack, "Failed to disable module"); -+ return err; -+ } -+ -+ err = mlxsw_env_module_low_power_set(mlxsw_core, module, low_power); -+ if (err) { -+ NL_SET_ERR_MSG_MOD(extack, "Failed to set module's power mode"); -+ goto err_module_low_power_set; -+ } -+ -+ err = mlxsw_env_module_enable_set(mlxsw_core, module, true); -+ if (err) { -+ NL_SET_ERR_MSG_MOD(extack, "Failed to enable module"); -+ goto err_module_enable_set; -+ } -+ -+ return 0; -+ -+err_module_enable_set: -+ mlxsw_env_module_low_power_set(mlxsw_core, module, !low_power); -+err_module_low_power_set: -+ mlxsw_env_module_enable_set(mlxsw_core, module, true); -+ return err; -+} -+ -+int -+mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module, -+ enum ethtool_module_power_mode_policy policy, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); -+ bool low_power; -+ int err = 0; -+ -+ if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) -+ return -EINVAL; -+ -+ if (policy != ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH && -+ policy != ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO) { -+ NL_SET_ERR_MSG_MOD(extack, "Unsupported power mode policy"); -+ return -EOPNOTSUPP; -+ } -+ -+ mutex_lock(&mlxsw_env->module_info_lock); -+ -+ if (mlxsw_env->module_info[module].power_mode_policy == policy) -+ goto out; -+ -+ /* If any ports are up, we are already in high power mode. */ -+ if (mlxsw_env->module_info[module].num_ports_up) -+ goto out_set_policy; -+ -+ low_power = policy == ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO; -+ err = __mlxsw_env_set_module_power_mode(mlxsw_core, module, low_power, -+ extack); -+ if (err) -+ goto out; -+ -+out_set_policy: -+ mlxsw_env->module_info[module].power_mode_policy = policy; -+out: -+ mutex_unlock(&mlxsw_env->module_info_lock); -+ return err; -+} -+EXPORT_SYMBOL(mlxsw_env_set_module_power_mode); -+ - static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core, - u8 module, - bool *p_has_temp_sensor) -@@ -794,15 +941,33 @@ EXPORT_SYMBOL(mlxsw_env_module_port_unmap); - int mlxsw_env_module_port_up(struct mlxsw_core *mlxsw_core, u8 module) - { - struct mlxsw_env *mlxsw_env = mlxsw_core_env(mlxsw_core); -+ int err = 0; - - if (WARN_ON_ONCE(module >= mlxsw_env->module_count)) - return -EINVAL; - - mutex_lock(&mlxsw_env->module_info_lock); -+ -+ if (mlxsw_env->module_info[module].power_mode_policy != -+ ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO) -+ goto out_inc; -+ -+ if (mlxsw_env->module_info[module].num_ports_up != 0) -+ goto out_inc; -+ -+ /* Transition to high power mode following first port using the module -+ * being put administratively up. -+ */ -+ err = __mlxsw_env_set_module_power_mode(mlxsw_core, module, false, -+ NULL); -+ if (err) -+ goto out_unlock; -+ -+out_inc: - mlxsw_env->module_info[module].num_ports_up++; -+out_unlock: - mutex_unlock(&mlxsw_env->module_info_lock); -- -- return 0; -+ return err; - } - EXPORT_SYMBOL(mlxsw_env_module_port_up); - -@@ -814,7 +979,22 @@ void mlxsw_env_module_port_down(struct mlxsw_core *mlxsw_core, u8 module) - return; - - mutex_lock(&mlxsw_env->module_info_lock); -+ - mlxsw_env->module_info[module].num_ports_up--; -+ -+ if (mlxsw_env->module_info[module].power_mode_policy != -+ ETHTOOL_MODULE_POWER_MODE_POLICY_AUTO) -+ goto out_unlock; -+ -+ if (mlxsw_env->module_info[module].num_ports_up != 0) -+ goto out_unlock; -+ -+ /* Transition to low power mode following last port using the module -+ * being put administratively down. -+ */ -+ __mlxsw_env_set_module_power_mode(mlxsw_core, module, true, NULL); -+ -+out_unlock: - mutex_unlock(&mlxsw_env->module_info_lock); - } - EXPORT_SYMBOL(mlxsw_env_module_port_down); -@@ -824,7 +1004,7 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env) - char mgpir_pl[MLXSW_REG_MGPIR_LEN]; - struct mlxsw_env *env; - u8 module_count; -- int err; -+ int i, err; - - mlxsw_reg_mgpir_pack(mgpir_pl); - err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgpir), mgpir_pl); -@@ -837,6 +1017,13 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, struct mlxsw_env **p_env) - if (!env) - return -ENOMEM; - -+ /* Firmware defaults to high power mode policy where modules are -+ * transitioned to high power mode following plug-in. -+ */ -+ for (i = 0; i < module_count; i++) -+ env->module_info[i].power_mode_policy = -+ ETHTOOL_MODULE_POWER_MODE_POLICY_HIGH; -+ - mutex_init(&env->module_info_lock); - env->core = mlxsw_core; - env->module_count = module_count; -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.h b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -index c486397f5dfe..da121b1a84b4 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.h -@@ -28,6 +28,16 @@ int mlxsw_env_reset_module(struct net_device *netdev, - struct mlxsw_core *mlxsw_core, u8 module, - u32 *flags); - -+int -+mlxsw_env_get_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module, -+ struct ethtool_module_power_mode_params *params, -+ struct netlink_ext_ack *extack); -+ -+int -+mlxsw_env_set_module_power_mode(struct mlxsw_core *mlxsw_core, u8 module, -+ enum ethtool_module_power_mode_policy policy, -+ struct netlink_ext_ack *extack); -+ - int - mlxsw_env_module_overheat_counter_get(struct mlxsw_core *mlxsw_core, u8 module, - u64 *p_counter); -diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -index d8659ff68ffe..3d07c2dcf08d 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -@@ -145,12 +145,38 @@ static int mlxsw_m_reset(struct net_device *netdev, u32 *flags) - flags); - } - -+static int -+mlxsw_m_get_module_power_mode(struct net_device *netdev, -+ struct ethtool_module_power_mode_params *params, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlxsw_m_port *mlxsw_m_port = netdev_priv(netdev); -+ struct mlxsw_core *core = mlxsw_m_port->mlxsw_m->core; -+ -+ return mlxsw_env_get_module_power_mode(core, mlxsw_m_port->module, -+ params, extack); -+} -+ -+static int -+mlxsw_m_set_module_power_mode(struct net_device *netdev, -+ const struct ethtool_module_power_mode_params *params, -+ struct netlink_ext_ack *extack) -+{ -+ struct mlxsw_m_port *mlxsw_m_port = netdev_priv(netdev); -+ struct mlxsw_core *core = mlxsw_m_port->mlxsw_m->core; -+ -+ return mlxsw_env_set_module_power_mode(core, mlxsw_m_port->module, -+ params->policy, extack); -+} -+ - static const struct ethtool_ops mlxsw_m_port_ethtool_ops = { - .get_drvinfo = mlxsw_m_module_get_drvinfo, - .get_module_info = mlxsw_m_get_module_info, - .get_module_eeprom = mlxsw_m_get_module_eeprom, - .get_module_eeprom_by_page = mlxsw_m_get_module_eeprom_by_page, - .reset = mlxsw_m_reset, -+ .get_module_power_mode = mlxsw_m_get_module_power_mode, -+ .set_module_power_mode = mlxsw_m_set_module_power_mode, - }; - - static int --- -2.20.1 - diff --git a/patch/0080-ethtool-Add-transceiver-module-extended-states.patch b/patch/0080-ethtool-Add-transceiver-module-extended-states.patch deleted file mode 100644 index 7a128c4b9dcd..000000000000 --- a/patch/0080-ethtool-Add-transceiver-module-extended-states.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 3c154bac56bbf44419a17a431e931706550082a2 Mon Sep 17 00:00:00 2001 -From: Ido Schimmel -Date: Wed, 18 Aug 2021 10:13:47 +0300 -Subject: [PATCH backport 5.10 080/182] ethtool: Add transceiver module - extended states - -Add an extended state and two extended sub-states to describe link -issues related to transceiver modules. - -The first, 'ETHTOOL_LINK_EXT_SUBSTATE_MODULE_LOW_POWER_MODE', tells user -space that port is unable to gain a carrier because the associated -transceiver module is in low power mode where the data path is -deactivated. This is applicable to both SFF-8636 and CMIS modules. -Currently, user space cannot force a module to stay in low power mode -while putting the associated port administratively up, so the extended -sub-state is indicative of a problem in the module/driver. - -The second, 'ETHTOOL_LINK_EXT_SUBSTATE_MODULE_CMIS_NOT_READY', tells -user space that port is unable to gain a carrier because the CMIS Module -State Machine did not reach the ModuleReady (Fully Operational) state. -For example, if the module is stuck at ModuleFault state. In which case, -user space can read the fault reason from the module's EEPROM and -potentially reset it. - -For CMIS modules, the first extended sub-state is contained in the -second, but has the added advantage of being applicable to more module -types and being more specific about the nature of the problem. - -Signed-off-by: Ido Schimmel ---- - Documentation/networking/ethtool-netlink.rst | 12 ++++++++++++ - include/linux/ethtool.h | 1 + - include/uapi/linux/ethtool.h | 1 + - 3 files changed, 14 insertions(+) - -diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst -index 9de7c5a4baef..9403a0f7e52a 100644 ---- a/Documentation/networking/ethtool-netlink.rst -+++ b/Documentation/networking/ethtool-netlink.rst -@@ -519,6 +519,8 @@ Link extended states: - power required from cable or module - - ``ETHTOOL_LINK_EXT_STATE_OVERHEAT`` The module is overheated -+ -+ ``ETHTOOL_LINK_EXT_STATE_MODULE`` Transceiver module issue - ================================================ ============================================ - - Link extended substates: -@@ -604,6 +606,16 @@ Link extended substates: - ``ETHTOOL_LINK_EXT_SUBSTATE_CI_CABLE_TEST_FAILURE`` Cable test failure - =================================================== ============================================ - -+ Transceiver module issue substates: -+ -+ =================================================== ============================================ -+ ``ETHTOOL_LINK_EXT_SUBSTATE_MODULE_LOW_POWER_MODE`` The transceiver module is in low power mode -+ -+ ``ETHTOOL_LINK_EXT_SUBSTATE_MODULE_CMIS_NOT_READY`` The CMIS Module State Machine did not reach -+ the ModuleReady state. For example, if the -+ module is stuck at ModuleFault state -+ =================================================== ============================================ -+ - DEBUG_GET - ========= - -diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h -index c7d232c27cdd..3ea8e319cb3d 100644 ---- a/include/linux/ethtool.h -+++ b/include/linux/ethtool.h -@@ -95,6 +95,7 @@ struct ethtool_link_ext_state_info { - enum ethtool_link_ext_substate_link_logical_mismatch link_logical_mismatch; - enum ethtool_link_ext_substate_bad_signal_integrity bad_signal_integrity; - enum ethtool_link_ext_substate_cable_issue cable_issue; -+ enum ethtool_link_ext_substate_module module; - u8 __link_ext_substate; - }; - }; -diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h -index d49bad6446f9..970f1446eaf7 100644 ---- a/include/uapi/linux/ethtool.h -+++ b/include/uapi/linux/ethtool.h -@@ -593,6 +593,7 @@ enum ethtool_link_ext_state { - ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE, - ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED, - ETHTOOL_LINK_EXT_STATE_OVERHEAT, -+ ETHTOOL_LINK_EXT_STATE_MODULE, - }; - - /** --- -2.20.1 - diff --git a/patch/0081-platform-x86-mlx-platform-Add-support-for-multiply-c.patch b/patch/0081-platform-x86-mlx-platform-Add-support-for-multiply-c.patch deleted file mode 100644 index 8f4162310b76..000000000000 --- a/patch/0081-platform-x86-mlx-platform-Add-support-for-multiply-c.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 7de97d7e381e768ea11ad1f3520261d5e77c1ab4 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 19 Aug 2021 14:23:39 +0000 -Subject: [PATCH backport 5.10 081/182] platform/x86: mlx-platform: Add support - for multiply cooling devices - -Add new registers to support systems with multiply cooling devices. -Modular systems support up-to four cooling devices. This capability -is detected according to the registers initial setting. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Michael ---- - drivers/platform/x86/mlx-platform.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 614b9f5c673f..5c91410a649b 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -3688,6 +3688,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_data[] = { - .label = "pwm1", - .reg = MLXPLAT_CPLD_LPC_REG_PWM1_OFFSET, - }, -+ { -+ .label = "pwm2", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWM2_OFFSET, -+ }, -+ { -+ .label = "pwm3", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET, -+ }, -+ { -+ .label = "pwm4", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET, -+ }, - { - .label = "tacho1", - .reg = MLXPLAT_CPLD_LPC_REG_TACHO1_OFFSET, --- -2.20.1 - diff --git a/patch/0082-mlxsw-core-Extend-external-cooling-device-whitelist-.patch b/patch/0082-mlxsw-core-Extend-external-cooling-device-whitelist-.patch deleted file mode 100644 index 0c752860c622..000000000000 --- a/patch/0082-mlxsw-core-Extend-external-cooling-device-whitelist-.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 7fbd7c25c4010e8e5fbbc0d8741cff9c69bcea05 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 7 Oct 2021 19:30:05 +0000 -Subject: [PATCH backport 5.10 082/182] mlxsw: core: Extend external cooling - device whitelist for thermal zone binding - -Allow thermal zone binding to an external cooling device of type -"emc2305". -Motivation to support new system SN2021 equipped with ASIC Spectrum-1 -supporting 48x Gbps RJ45 + 4x100G QSFP28 ports. -System airflow control is provided by EMC2305 RPM-based PWM Fan Speed -Controller as colling device. - -Signed-off-by: Vadim Pasternak ---- - drivers/net/ethernet/mellanox/mlxsw/core_thermal.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -index e1a760519097..91abc7a3f7ea 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c -@@ -30,6 +30,7 @@ - /* External cooling devices, allowed for binding to mlxsw thermal zones. */ - static char * const mlxsw_thermal_external_allowed_cdev[] = { - "mlxreg_fan", -+ "emc2305", - }; - - enum mlxsw_thermal_trips { --- -2.20.1 - diff --git a/patch/0083-platform_data-mlxreg-Add-field-for-notification-call.patch b/patch/0083-platform_data-mlxreg-Add-field-for-notification-call.patch deleted file mode 100644 index 14f636f17ecc..000000000000 --- a/patch/0083-platform_data-mlxreg-Add-field-for-notification-call.patch +++ /dev/null @@ -1,43 +0,0 @@ -From 2290cad212a30a34b3007c6cba5fa615d4c50a0e Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Sat, 30 Apr 2022 14:58:07 +0300 -Subject: [PATCH backport 5.10 083/182] platform_data/mlxreg: Add field for - notification callback - -Add notification callback to inform caller that platform driver probing -has been completed. It allows to caller to perform some initialization -flow steps depending on specific driver probing completion. - -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20220430115809.54565-2-michaelsh@nvidia.com -Signed-off-by: Hans de Goede ---- - include/linux/platform_data/mlxreg.h | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/include/linux/platform_data/mlxreg.h b/include/linux/platform_data/mlxreg.h -index 40185f9d7c14..a6bd74e29b6b 100644 ---- a/include/linux/platform_data/mlxreg.h -+++ b/include/linux/platform_data/mlxreg.h -@@ -216,6 +216,8 @@ struct mlxreg_core_platform_data { - * @mask_low: low aggregation interrupt common mask; - * @deferred_nr: I2C adapter number must be exist prior probing execution; - * @shift_nr: I2C adapter numbers must be incremented by this value; -+ * @handle: handle to be passed by callback; -+ * @completion_notify: callback to notify when platform driver probing is done; - */ - struct mlxreg_core_hotplug_platform_data { - struct mlxreg_core_item *items; -@@ -228,6 +230,8 @@ struct mlxreg_core_hotplug_platform_data { - u32 mask_low; - int deferred_nr; - int shift_nr; -+ void *handle; -+ int (*completion_notify)(void *handle, int id); - }; - - #endif /* __LINUX_PLATFORM_DATA_MLXREG_H */ --- -2.20.1 - diff --git a/patch/0084-i2c-mlxcpld-Add-callback-to-notify-probing-completio.patch b/patch/0084-i2c-mlxcpld-Add-callback-to-notify-probing-completio.patch deleted file mode 100644 index d21bda998928..000000000000 --- a/patch/0084-i2c-mlxcpld-Add-callback-to-notify-probing-completio.patch +++ /dev/null @@ -1,34 +0,0 @@ -From eea982a68f01f3e5e63e88d147f581b5c751dc81 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 7 Oct 2021 19:04:25 +0000 -Subject: [PATCH backport 5.10 084/182] i2c: mlxcpld: Add callback to notify - probing completion - -Add notification to inform caller that driver probing has been -completed. It allows to user, invoked platform device registration for -"i2c-mlxcpld" driver, to be notified that bus adapter is available, and -thus some devices could be connected to this bus. - -Signed-off-by: Vadim Pasternak ---- - drivers/i2c/busses/i2c-mlxcpld.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index 56aa424fd71d..363ea9fd66c4 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -560,6 +560,10 @@ static int mlxcpld_i2c_probe(struct platform_device *pdev) - if (err) - goto mlxcpld_i2_probe_failed; - -+ /* Notify caller when adapter is added. */ -+ if (pdata && pdata->completion_notify) -+ pdata->completion_notify(pdata->handle, mlxcpld_i2c_adapter.nr); -+ - return 0; - - mlxcpld_i2_probe_failed: --- -2.20.1 - diff --git a/patch/0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch b/patch/0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch new file mode 100644 index 000000000000..dad93b6cf799 --- /dev/null +++ b/patch/0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch @@ -0,0 +1,95 @@ +From 2ed90978c8b91ffe717c3e2164921a79dd757c1c Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Fri, 1 Sep 2023 07:16:20 +0000 +Subject: [PATCH hwmon 1/1] hwmon: (mlxreg-fan) Separate methods of fan setting + coming from different subsystems + +Distinct between fan speed setting request coming for hwmon and +thermal subsystems. + +There are fields 'last_hwmon_state' and 'last_thermal_state' in the +structure 'mlxreg_fan_pwm', which respectively store the cooling state +set by the 'hwmon' and 'thermal' subsystem. +The purpose is to make arbitration of fan speed setting. For example, if +fan speed required to be not lower than some limit, such setting is to +be performed through 'hwmon' subsystem, thus 'thermal' subsystem will +not set fan below this limit. + +Currently, the 'last_thermal_state' is also be updated by 'hwmon' causing +cooling state to never be set to a lower value. + +Eliminate update of 'last_thermal_state', when request is coming from +'hwmon' subsystem. + +Fixes: da74944d3a46 ("hwmon: (mlxreg-fan) Use pwm attribute for setting fan speed low limit") +Signed-off-by: Vadim Pasternak +--- + drivers/hwmon/mlxreg-fan.c | 24 ++++++++++++++++-------- + 1 file changed, 16 insertions(+), 8 deletions(-) + +diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c +index c515e1d2fe4e..01c1baa3d06d 100644 +--- a/drivers/hwmon/mlxreg-fan.c ++++ b/drivers/hwmon/mlxreg-fan.c +@@ -113,8 +113,8 @@ struct mlxreg_fan { + int divider; + }; + +-static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, +- unsigned long state); ++static int _mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, ++ unsigned long state, bool thermal); + + static int + mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, +@@ -224,8 +224,9 @@ mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, + * last thermal state. + */ + if (pwm->last_hwmon_state >= pwm->last_thermal_state) +- return mlxreg_fan_set_cur_state(pwm->cdev, +- pwm->last_hwmon_state); ++ return _mlxreg_fan_set_cur_state(pwm->cdev, ++ pwm->last_hwmon_state, ++ false); + return 0; + } + return regmap_write(fan->regmap, pwm->reg, val); +@@ -357,9 +358,8 @@ static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev, + return 0; + } + +-static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, +- unsigned long state) +- ++static int _mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, ++ unsigned long state, bool thermal) + { + struct mlxreg_fan_pwm *pwm = cdev->devdata; + struct mlxreg_fan *fan = pwm->fan; +@@ -369,7 +369,8 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, + return -EINVAL; + + /* Save thermal state. */ +- pwm->last_thermal_state = state; ++ if (thermal) ++ pwm->last_thermal_state = state; + + state = max_t(unsigned long, state, pwm->last_hwmon_state); + err = regmap_write(fan->regmap, pwm->reg, +@@ -381,6 +382,13 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, + return 0; + } + ++static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, ++ unsigned long state) ++ ++{ ++ return _mlxreg_fan_set_cur_state(cdev, state, true); ++} ++ + static const struct thermal_cooling_device_ops mlxreg_fan_cooling_ops = { + .get_max_state = mlxreg_fan_get_max_state, + .get_cur_state = mlxreg_fan_get_cur_state, +-- +2.20.1 + diff --git a/patch/0085-hwmon-powr1220-Upgrade-driver-to-support-hwmon-info-.patch b/patch/0085-hwmon-powr1220-Upgrade-driver-to-support-hwmon-info-.patch deleted file mode 100644 index 499379a2896a..000000000000 --- a/patch/0085-hwmon-powr1220-Upgrade-driver-to-support-hwmon-info-.patch +++ /dev/null @@ -1,287 +0,0 @@ -From 8a3f701439798d55a93bba1f56d2a2aab4921293 Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Tue, 18 Jan 2022 09:56:10 +0200 -Subject: [PATCH backport 5.10 085/182] hwmon: (powr1220) Upgrade driver to - support hwmon info infrastructure - -Reduce code by using devm_hwmon_device_register_with_groups() API by -devm_hwmon_device_register_with_info() API. -The motivation is to reduce code and to allow easy support for similar -devices by the same driver. - -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20220118075611.10665-3-michaelsh@nvidia.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/powr1220.c | 213 +++++++++++++++++---------------------- - 1 file changed, 95 insertions(+), 118 deletions(-) - -diff --git a/drivers/hwmon/powr1220.c b/drivers/hwmon/powr1220.c -index 9e086338dcba..0fa1a136eec8 100644 ---- a/drivers/hwmon/powr1220.c -+++ b/drivers/hwmon/powr1220.c -@@ -111,7 +111,7 @@ static int powr1220_read_adc(struct device *dev, int ch_num) - mutex_lock(&data->update_lock); - - if (time_after(jiffies, data->adc_last_updated[ch_num] + HZ) || -- !data->adc_valid[ch_num]) { -+ !data->adc_valid[ch_num]) { - /* - * figure out if we need to use the attenuator for - * high inputs or inputs that we don't yet have a measurement -@@ -119,12 +119,12 @@ static int powr1220_read_adc(struct device *dev, int ch_num) - * max reading. - */ - if (data->adc_maxes[ch_num] > ADC_MAX_LOW_MEASUREMENT_MV || -- data->adc_maxes[ch_num] == 0) -+ data->adc_maxes[ch_num] == 0) - adc_range = 1 << 4; - - /* set the attenuator and mux */ - result = i2c_smbus_write_byte_data(data->client, ADC_MUX, -- adc_range | ch_num); -+ adc_range | ch_num); - if (result) - goto exit; - -@@ -167,135 +167,109 @@ static int powr1220_read_adc(struct device *dev, int ch_num) - return result; - } - --/* Shows the voltage associated with the specified ADC channel */ --static ssize_t powr1220_voltage_show(struct device *dev, -- struct device_attribute *dev_attr, -- char *buf) -+static umode_t -+powr1220_is_visible(const void *data, enum hwmon_sensor_types type, u32 -+ attr, int channel) - { -- struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); -- int adc_val = powr1220_read_adc(dev, attr->index); -- -- if (adc_val < 0) -- return adc_val; -+ switch (type) { -+ case hwmon_in: -+ switch (attr) { -+ case hwmon_in_input: -+ case hwmon_in_highest: -+ case hwmon_in_label: -+ return 0444; -+ default: -+ break; -+ } -+ break; -+ default: -+ break; -+ } - -- return sprintf(buf, "%d\n", adc_val); -+ return 0; - } - --/* Shows the maximum setting associated with the specified ADC channel */ --static ssize_t powr1220_max_show(struct device *dev, -- struct device_attribute *dev_attr, char *buf) -+static int -+powr1220_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, -+ int channel, const char **str) - { -- struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); -- struct powr1220_data *data = dev_get_drvdata(dev); -+ switch (type) { -+ case hwmon_in: -+ switch (attr) { -+ case hwmon_in_label: -+ *str = input_names[channel]; -+ return 0; -+ default: -+ return -EOPNOTSUPP; -+ } -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } - -- return sprintf(buf, "%d\n", data->adc_maxes[attr->index]); -+ return -EOPNOTSUPP; - } - --/* Shows the label associated with the specified ADC channel */ --static ssize_t powr1220_label_show(struct device *dev, -- struct device_attribute *dev_attr, -- char *buf) -+static int -+powr1220_read(struct device *dev, enum hwmon_sensor_types type, u32 -+ attr, int channel, long *val) - { -- struct sensor_device_attribute *attr = to_sensor_dev_attr(dev_attr); -+ struct powr1220_data *data = dev_get_drvdata(dev); -+ int ret; -+ -+ switch (type) { -+ case hwmon_in: -+ switch (attr) { -+ case hwmon_in_input: -+ ret = powr1220_read_adc(dev, channel); -+ if (ret < 0) -+ return ret; -+ *val = ret; -+ break; -+ case hwmon_in_highest: -+ *val = data->adc_maxes[channel]; -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ break; -+ default: -+ return -EOPNOTSUPP; -+} - -- return sprintf(buf, "%s\n", input_names[attr->index]); -+ return 0; - } - --static SENSOR_DEVICE_ATTR_RO(in0_input, powr1220_voltage, VMON1); --static SENSOR_DEVICE_ATTR_RO(in1_input, powr1220_voltage, VMON2); --static SENSOR_DEVICE_ATTR_RO(in2_input, powr1220_voltage, VMON3); --static SENSOR_DEVICE_ATTR_RO(in3_input, powr1220_voltage, VMON4); --static SENSOR_DEVICE_ATTR_RO(in4_input, powr1220_voltage, VMON5); --static SENSOR_DEVICE_ATTR_RO(in5_input, powr1220_voltage, VMON6); --static SENSOR_DEVICE_ATTR_RO(in6_input, powr1220_voltage, VMON7); --static SENSOR_DEVICE_ATTR_RO(in7_input, powr1220_voltage, VMON8); --static SENSOR_DEVICE_ATTR_RO(in8_input, powr1220_voltage, VMON9); --static SENSOR_DEVICE_ATTR_RO(in9_input, powr1220_voltage, VMON10); --static SENSOR_DEVICE_ATTR_RO(in10_input, powr1220_voltage, VMON11); --static SENSOR_DEVICE_ATTR_RO(in11_input, powr1220_voltage, VMON12); --static SENSOR_DEVICE_ATTR_RO(in12_input, powr1220_voltage, VCCA); --static SENSOR_DEVICE_ATTR_RO(in13_input, powr1220_voltage, VCCINP); -- --static SENSOR_DEVICE_ATTR_RO(in0_highest, powr1220_max, VMON1); --static SENSOR_DEVICE_ATTR_RO(in1_highest, powr1220_max, VMON2); --static SENSOR_DEVICE_ATTR_RO(in2_highest, powr1220_max, VMON3); --static SENSOR_DEVICE_ATTR_RO(in3_highest, powr1220_max, VMON4); --static SENSOR_DEVICE_ATTR_RO(in4_highest, powr1220_max, VMON5); --static SENSOR_DEVICE_ATTR_RO(in5_highest, powr1220_max, VMON6); --static SENSOR_DEVICE_ATTR_RO(in6_highest, powr1220_max, VMON7); --static SENSOR_DEVICE_ATTR_RO(in7_highest, powr1220_max, VMON8); --static SENSOR_DEVICE_ATTR_RO(in8_highest, powr1220_max, VMON9); --static SENSOR_DEVICE_ATTR_RO(in9_highest, powr1220_max, VMON10); --static SENSOR_DEVICE_ATTR_RO(in10_highest, powr1220_max, VMON11); --static SENSOR_DEVICE_ATTR_RO(in11_highest, powr1220_max, VMON12); --static SENSOR_DEVICE_ATTR_RO(in12_highest, powr1220_max, VCCA); --static SENSOR_DEVICE_ATTR_RO(in13_highest, powr1220_max, VCCINP); -- --static SENSOR_DEVICE_ATTR_RO(in0_label, powr1220_label, VMON1); --static SENSOR_DEVICE_ATTR_RO(in1_label, powr1220_label, VMON2); --static SENSOR_DEVICE_ATTR_RO(in2_label, powr1220_label, VMON3); --static SENSOR_DEVICE_ATTR_RO(in3_label, powr1220_label, VMON4); --static SENSOR_DEVICE_ATTR_RO(in4_label, powr1220_label, VMON5); --static SENSOR_DEVICE_ATTR_RO(in5_label, powr1220_label, VMON6); --static SENSOR_DEVICE_ATTR_RO(in6_label, powr1220_label, VMON7); --static SENSOR_DEVICE_ATTR_RO(in7_label, powr1220_label, VMON8); --static SENSOR_DEVICE_ATTR_RO(in8_label, powr1220_label, VMON9); --static SENSOR_DEVICE_ATTR_RO(in9_label, powr1220_label, VMON10); --static SENSOR_DEVICE_ATTR_RO(in10_label, powr1220_label, VMON11); --static SENSOR_DEVICE_ATTR_RO(in11_label, powr1220_label, VMON12); --static SENSOR_DEVICE_ATTR_RO(in12_label, powr1220_label, VCCA); --static SENSOR_DEVICE_ATTR_RO(in13_label, powr1220_label, VCCINP); -- --static struct attribute *powr1220_attrs[] = { -- &sensor_dev_attr_in0_input.dev_attr.attr, -- &sensor_dev_attr_in1_input.dev_attr.attr, -- &sensor_dev_attr_in2_input.dev_attr.attr, -- &sensor_dev_attr_in3_input.dev_attr.attr, -- &sensor_dev_attr_in4_input.dev_attr.attr, -- &sensor_dev_attr_in5_input.dev_attr.attr, -- &sensor_dev_attr_in6_input.dev_attr.attr, -- &sensor_dev_attr_in7_input.dev_attr.attr, -- &sensor_dev_attr_in8_input.dev_attr.attr, -- &sensor_dev_attr_in9_input.dev_attr.attr, -- &sensor_dev_attr_in10_input.dev_attr.attr, -- &sensor_dev_attr_in11_input.dev_attr.attr, -- &sensor_dev_attr_in12_input.dev_attr.attr, -- &sensor_dev_attr_in13_input.dev_attr.attr, -- -- &sensor_dev_attr_in0_highest.dev_attr.attr, -- &sensor_dev_attr_in1_highest.dev_attr.attr, -- &sensor_dev_attr_in2_highest.dev_attr.attr, -- &sensor_dev_attr_in3_highest.dev_attr.attr, -- &sensor_dev_attr_in4_highest.dev_attr.attr, -- &sensor_dev_attr_in5_highest.dev_attr.attr, -- &sensor_dev_attr_in6_highest.dev_attr.attr, -- &sensor_dev_attr_in7_highest.dev_attr.attr, -- &sensor_dev_attr_in8_highest.dev_attr.attr, -- &sensor_dev_attr_in9_highest.dev_attr.attr, -- &sensor_dev_attr_in10_highest.dev_attr.attr, -- &sensor_dev_attr_in11_highest.dev_attr.attr, -- &sensor_dev_attr_in12_highest.dev_attr.attr, -- &sensor_dev_attr_in13_highest.dev_attr.attr, -- -- &sensor_dev_attr_in0_label.dev_attr.attr, -- &sensor_dev_attr_in1_label.dev_attr.attr, -- &sensor_dev_attr_in2_label.dev_attr.attr, -- &sensor_dev_attr_in3_label.dev_attr.attr, -- &sensor_dev_attr_in4_label.dev_attr.attr, -- &sensor_dev_attr_in5_label.dev_attr.attr, -- &sensor_dev_attr_in6_label.dev_attr.attr, -- &sensor_dev_attr_in7_label.dev_attr.attr, -- &sensor_dev_attr_in8_label.dev_attr.attr, -- &sensor_dev_attr_in9_label.dev_attr.attr, -- &sensor_dev_attr_in10_label.dev_attr.attr, -- &sensor_dev_attr_in11_label.dev_attr.attr, -- &sensor_dev_attr_in12_label.dev_attr.attr, -- &sensor_dev_attr_in13_label.dev_attr.attr, -+static const struct hwmon_channel_info *powr1220_info[] = { -+ HWMON_CHANNEL_INFO(in, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL, -+ HWMON_I_INPUT | HWMON_I_HIGHEST | HWMON_I_LABEL), - - NULL - }; - --ATTRIBUTE_GROUPS(powr1220); -+static const struct hwmon_ops powr1220_hwmon_ops = { -+ .read = powr1220_read, -+ .read_string = powr1220_read_string, -+ .is_visible = powr1220_is_visible, -+}; -+ -+static const struct hwmon_chip_info powr1220_chip_info = { -+ .ops = &powr1220_hwmon_ops, -+ .info = powr1220_info, -+}; - - static int powr1220_probe(struct i2c_client *client) - { -@@ -312,8 +286,11 @@ static int powr1220_probe(struct i2c_client *client) - mutex_init(&data->update_lock); - data->client = client; - -- hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev, -- client->name, data, powr1220_groups); -+ hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, -+ client->name, -+ data, -+ &powr1220_chip_info, -+ NULL); - - return PTR_ERR_OR_ZERO(hwmon_dev); - } --- -2.20.1 - diff --git a/patch/0086-hwmon-powr1220-Add-support-for-Lattice-s-POWR1014-po.patch b/patch/0086-hwmon-powr1220-Add-support-for-Lattice-s-POWR1014-po.patch deleted file mode 100644 index 949fcae0dd22..000000000000 --- a/patch/0086-hwmon-powr1220-Add-support-for-Lattice-s-POWR1014-po.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 6e39043862ce94cedaeabbb501feab34f7060ef5 Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Tue, 18 Jan 2022 09:56:11 +0200 -Subject: [PATCH backport 5.10 086/182] hwmon: (powr1220) Add support for - Lattice's POWR1014 power manager IC - -This patch adds support for Lattice's POWR1014 power manager IC. -Read access to all the ADCs on the chip are supported through -the "hwmon" "sysfs" files. - -The main differences of POWR1014 compared to POWR1220 are -amount of VMON input lines: 10 on POWR1014 and 12 lines on POWR1220 and -number of output control signals: 14 on POWR1014 and 20 on POWR1220. - -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20220118075611.10665-4-michaelsh@nvidia.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/powr1220.c | 22 +++++++++++++++++++++- - 1 file changed, 21 insertions(+), 1 deletion(-) - -diff --git a/drivers/hwmon/powr1220.c b/drivers/hwmon/powr1220.c -index 0fa1a136eec8..f77dc6db31ac 100644 ---- a/drivers/hwmon/powr1220.c -+++ b/drivers/hwmon/powr1220.c -@@ -22,6 +22,8 @@ - #define ADC_STEP_MV 2 - #define ADC_MAX_LOW_MEASUREMENT_MV 2000 - -+enum powr1xxx_chips { powr1014, powr1220 }; -+ - enum powr1220_regs { - VMON_STATUS0, - VMON_STATUS1, -@@ -74,6 +76,7 @@ enum powr1220_adc_values { - struct powr1220_data { - struct i2c_client *client; - struct mutex update_lock; -+ u8 max_channels; - bool adc_valid[MAX_POWR1220_ADC_VALUES]; - /* the next value is in jiffies */ - unsigned long adc_last_updated[MAX_POWR1220_ADC_VALUES]; -@@ -171,6 +174,11 @@ static umode_t - powr1220_is_visible(const void *data, enum hwmon_sensor_types type, u32 - attr, int channel) - { -+ struct powr1220_data *chip_data = (struct powr1220_data *)data; -+ -+ if (channel >= chip_data->max_channels) -+ return 0; -+ - switch (type) { - case hwmon_in: - switch (attr) { -@@ -271,6 +279,8 @@ static const struct hwmon_chip_info powr1220_chip_info = { - .info = powr1220_info, - }; - -+static const struct i2c_device_id powr1220_ids[]; -+ - static int powr1220_probe(struct i2c_client *client) - { - struct powr1220_data *data; -@@ -283,6 +293,15 @@ static int powr1220_probe(struct i2c_client *client) - if (!data) - return -ENOMEM; - -+ switch (i2c_match_id(powr1220_ids, client)->driver_data) { -+ case powr1014: -+ data->max_channels = 10; -+ break; -+ default: -+ data->max_channels = 12; -+ break; -+ } -+ - mutex_init(&data->update_lock); - data->client = client; - -@@ -296,7 +315,8 @@ static int powr1220_probe(struct i2c_client *client) - } - - static const struct i2c_device_id powr1220_ids[] = { -- { "powr1220", 0, }, -+ { "powr1014", powr1014, }, -+ { "powr1220", powr1220, }, - { } - }; - --- -2.20.1 - diff --git a/patch/0087-hwmon-Add-support-for-EMC2305-RPM-based-PWM-Fan-Spee.patch b/patch/0087-hwmon-Add-support-for-EMC2305-RPM-based-PWM-Fan-Spee.patch deleted file mode 100644 index ddcf2b4d91c7..000000000000 --- a/patch/0087-hwmon-Add-support-for-EMC2305-RPM-based-PWM-Fan-Spee.patch +++ /dev/null @@ -1,594 +0,0 @@ -From d439a8e75600c9919c8f1380c18a5141d271412a Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sat, 9 Oct 2021 08:49:14 +0000 -Subject: [PATCH backport 5.10 087/182] hwmon: Add support for EMC2305 - RPM-based PWM Fan Speed Controller - -Introduce EMC2305 RPM-based PWM Fan Speed Controller -The EMC2305 is an SMBus compliant fan controller with up to five -controlled PWM fan drivers. All fan drivers are controlled by a -programmable frequency PWM driver and Fan Speed Control algorithm that -operates as a directly PWM-controlled device. - -The closed loop Fan Speed Control algorithm (FSC) has the capability to -detect aging fans and alert the system. It will likewise detect stalled -or locked fans and trigger an interrupt. - -EMC2305 offers a clock output so that multiple devices may be chained -and slaved to the same clock source for optimal performance in large -distributed systems. - -Signed-off-by: Michael Shych ---- - drivers/hwmon/Kconfig | 12 + - drivers/hwmon/Makefile | 1 + - drivers/hwmon/emc2305.c | 522 ++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 535 insertions(+) - create mode 100644 drivers/hwmon/emc2305.c - -diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig -index f741c7492ee4..93d0313aa210 100644 ---- a/drivers/hwmon/Kconfig -+++ b/drivers/hwmon/Kconfig -@@ -1601,6 +1601,18 @@ config SENSORS_EMC2103 - This driver can also be built as a module. If so, the module - will be called emc2103. - -+config SENSORS_EMC2305 -+ tristate "SMSC EMC2305" -+ depends on I2C && OF -+ help -+ If you say yes here you get support for the SMSC EMC2305 -+ fan controller chips. -+ The SMSC EMC2305 is a fan controller for up to 5 fans. -+ Fan rotation speeds are reported in RPM. -+ -+ This driver can also be built as a module. If so, the module -+ will be called emc2305. -+ - config SENSORS_EMC6W201 - tristate "SMSC EMC6W201" - depends on I2C -diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile -index 9db2903b61e5..644a7e6eeae6 100644 ---- a/drivers/hwmon/Makefile -+++ b/drivers/hwmon/Makefile -@@ -66,6 +66,7 @@ obj-$(CONFIG_SENSORS_DS620) += ds620.o - obj-$(CONFIG_SENSORS_DS1621) += ds1621.o - obj-$(CONFIG_SENSORS_EMC1403) += emc1403.o - obj-$(CONFIG_SENSORS_EMC2103) += emc2103.o -+obj-$(CONFIG_SENSORS_EMC2305) += emc2305.o - obj-$(CONFIG_SENSORS_EMC6W201) += emc6w201.o - obj-$(CONFIG_SENSORS_F71805F) += f71805f.o - obj-$(CONFIG_SENSORS_F71882FG) += f71882fg.o -diff --git a/drivers/hwmon/emc2305.c b/drivers/hwmon/emc2305.c -new file mode 100644 -index 000000000000..04bc9f658d85 ---- /dev/null -+++ b/drivers/hwmon/emc2305.c -@@ -0,0 +1,522 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Hardware monitoring driver for EMC2305 fan controller -+ * -+ * Copyright (C) 2021 Nvidia Technologies Ltd and Delta Networks, Inc. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static const unsigned short -+emc2305_normal_i2c[] = { 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d, I2C_CLIENT_END }; -+ -+#define EMC2305_REG_DRIVE_FAIL_STATUS 0x27 -+#define EMC2305_REG_DEVICE 0xfd -+#define EMC2305_REG_VENDOR 0xfe -+#define EMC2305_FAN_MAX_NUM 5 -+#define EMC2305_FAN_MAX 0xff /*100%*/ -+#define EMC2305_FAN_MIN 0x00 /*0%*/ -+#define EMC2305_FAN_MAX_STATE 10 -+#define EMC2305_DEVICE 0x34 -+#define EMC2305_VENDOR 0x5d -+#define EMC2305_REG_PRODUCT_ID 0xfd -+#define EMC2305_TACH_REGS_UNUSE_BITS 3 -+#define EMC2305_TACH_CNT_MULTIPLIER 0x02 -+#define EMC2305_TACH_RANGE_MIN 480 -+ -+/* -+ * Factor by equations [2] and [3] from data sheet; valid for fans where the number of edges -+ * equal (poles * 2 + 1). -+ */ -+#define EMC2305_RPM_FACTOR 3932160 -+ -+#define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * (n)) -+#define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * (n)) -+#define EMC2305_REG_FAN_TACH(n) (0x3e + 0x10 * (n)) -+ -+enum emc230x_product_id { -+ EMC2305 = 0x34, -+ EMC2303 = 0x35, -+ EMC2302 = 0x36, -+ EMC2301 = 0x37, -+}; -+ -+static const struct i2c_device_id emc2305_ids[] = { -+ { "emc2305", 0 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, emc2305_ids); -+ -+static const struct of_device_id emc2305_dt_ids[] = { -+ { .compatible = "smsc,emc2305" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, emc2305_dt_ids); -+ -+struct emc2305_data { -+ struct thermal_cooling_device *cdev; -+ struct i2c_client *client; -+ struct device *hwmon_dev; -+ u8 max_state; -+ u8 max_pwm; -+ u8 min_pwm; -+ unsigned int cur_state; -+ unsigned int pwm_num; -+ unsigned int max_cfg_state; -+ unsigned int min_cfg_state; -+ u8 cooling_levels[]; -+}; -+ -+static int emc2305_get_cur_state(struct thermal_cooling_device *cdev, unsigned long *state) -+{ -+ struct emc2305_data *data = cdev->devdata; -+ *state = data->cur_state; -+ return 0; -+} -+ -+static int emc2305_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state) -+{ -+ struct emc2305_data *data = cdev->devdata; -+ *state = data->max_state; -+ return 0; -+} -+ -+static int emc2305_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state) -+{ -+ struct emc2305_data *data = cdev->devdata; -+ struct i2c_client *client = data->client; -+ unsigned long cur_state; -+ bool config = false; -+ unsigned long val; -+ int i; -+ -+ /* -+ * Verify if this request is for changing allowed FAN dynamical -+ * minimum. If it is - update cooling levels accordingly and update -+ * state, if current state is below the newly requested minimum state. -+ * For example, if current state is 5, and minimal state is to be -+ * changed from 4 to 6, fan->cooling_levels[0 to 5] will be changed all -+ * from 4 to 6. And state 5 (fan->cooling_levels[4]) should be -+ * overwritten. -+ */ -+ if (state > (data->max_state + data->min_cfg_state) && -+ state <= (data->max_state * 2)) { -+ config = true; -+ -+ state -= data->max_state; -+ for (i = 0; i < state; i++) -+ data->cooling_levels[i] = state; -+ for (i = state; i <= data->max_state; i++) -+ data->cooling_levels[i] = i; -+ -+ cur_state = data->cur_state; -+ if (state < cur_state) -+ return 0; -+ -+ state = cur_state; -+ } -+ -+ if (state > data->max_state) -+ return -EINVAL; -+ -+ val = data->cooling_levels[state] * EMC2305_FAN_MAX / data->max_state; -+ if (val > EMC2305_FAN_MAX) -+ return -EINVAL; -+ -+ for (i = 0; i < data->pwm_num; i++) -+ i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(i), val); -+ data->cur_state = data->cooling_levels[state]; -+ return (config) ? 1 : 0; -+} -+ -+static const struct thermal_cooling_device_ops fan_cooling_ops = { -+ .get_max_state = emc2305_get_max_state, -+ .get_cur_state = emc2305_get_cur_state, -+ .set_cur_state = emc2305_set_cur_state, -+}; -+ -+static int emc2305_show_fault(struct device *dev, int channel) -+{ -+ struct emc2305_data *data = dev_get_drvdata(dev); -+ struct i2c_client *client = data->client; -+ int status_reg; -+ -+ status_reg = i2c_smbus_read_byte_data(client, EMC2305_REG_DRIVE_FAIL_STATUS); -+ -+ return status_reg & (1 << channel) ? 1 : 0; -+} -+ -+static int emc2305_show_fan(struct device *dev, int channel) -+{ -+ struct emc2305_data *data = dev_get_drvdata(dev); -+ struct i2c_client *client = data->client; -+ int ret; -+ -+ ret = i2c_smbus_read_word_swapped(client, EMC2305_REG_FAN_TACH(channel)); -+ if (ret <= 0) -+ return ret; -+ -+ ret = ret >> EMC2305_TACH_REGS_UNUSE_BITS; -+ ret = EMC2305_RPM_FACTOR / ret; -+ if (ret <= EMC2305_TACH_RANGE_MIN) -+ return 0; -+ -+ return ret * EMC2305_TACH_CNT_MULTIPLIER; -+} -+ -+static int emc2305_show_pwm(struct device *dev, int channel) -+{ -+ struct emc2305_data *data = dev_get_drvdata(dev); -+ struct i2c_client *client = data->client; -+ int val_max = 0; -+ int ret, i; -+ -+ for (i = 0; i < data->pwm_num; i++) { -+ ret = i2c_smbus_read_byte_data(client, EMC2305_REG_FAN_DRIVE(i)); -+ if (ret < 0) -+ return ret; -+ val_max = val_max > ret ? val_max : ret; -+ } -+ return val_max; -+} -+ -+static int emc2305_set_pwm(struct device *dev, long val) -+{ -+ struct emc2305_data *data = dev_get_drvdata(dev); -+ struct i2c_client *client = data->client; -+ int i; -+ -+ if (val < data->min_pwm || val > data->max_pwm) -+ return -EINVAL; -+ -+ for (i = 0; i < data->pwm_num; i++) -+ i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(i), val); -+ data->cur_state = val * data->max_state / data->max_pwm; -+ return 0; -+} -+ -+static int _emc2305_set_pwm(struct device *dev, u8 max_pwm) -+{ -+ long val = max_pwm; -+ -+ return emc2305_set_pwm(dev, val); -+} -+ -+static int emc2305_get_tz_of(struct device *dev, u8 *min_pwm, u8 *max_pwm, u8 *max_state) -+{ -+ struct device_node *np = dev->of_node; -+ const char *int_str; -+ int ret; -+ -+ ret = of_property_read_string(np, "emc2305,cooling-levels", &int_str); -+ if (ret == 0) -+ ret = ret < 0 ? ret : kstrtou8(int_str, 0, max_state); -+ ret = of_property_read_string(np, "emc2305,max-pwm", &int_str); -+ if (ret == 0) -+ ret = ret < 0 ? ret : kstrtou8(int_str, 0, max_pwm); -+ ret = of_property_read_string(np, "emc2305,min-pwm", &int_str); -+ if (ret == 0) -+ ret = ret < 0 ? ret : kstrtou8(int_str, 0, min_pwm); -+ return ret; -+} -+ -+static int emc2305_set_tz(struct device *dev) -+{ -+ struct emc2305_data *data = dev_get_drvdata(dev); -+ int i, ret; -+ -+ _emc2305_set_pwm(dev, data->max_pwm); -+ data->cur_state = data->max_state; -+ data->max_cfg_state = data->max_pwm * data->max_state / data->max_pwm; -+ data->min_cfg_state = data->min_pwm * data->max_state / data->max_pwm; -+ /* Init cooling levels per PWM state. */ -+ for (i = 0; i < data->min_cfg_state; i++) -+ data->cooling_levels[i] = data->min_cfg_state; -+ for (i = data->min_cfg_state; i <= data->max_state; i++) -+ data->cooling_levels[i] = i; -+ -+ if (dev->of_node) -+ data->cdev = devm_thermal_of_cooling_device_register(dev, dev->of_node, "emc2305", -+ data, &fan_cooling_ops); -+ else -+ data->cdev = thermal_cooling_device_register("emc2305", data, &fan_cooling_ops); -+ if (IS_ERR(data->cdev)) { -+ dev_err(dev, "Failed to register cooling device\n"); -+ ret = PTR_ERR(data->cdev); -+ goto thermal_cooling_device_register_fail; -+ } -+ return 0; -+ -+thermal_cooling_device_register_fail: -+ return ret; -+} -+ -+static void emc2305_unset_tz(struct device *dev) -+{ -+ struct emc2305_data *data = dev_get_drvdata(dev); -+ -+ if (!dev->of_node) -+ thermal_cooling_device_unregister(data->cdev); -+} -+ -+static umode_t -+emc2305_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) -+{ -+ /* Skip channels which are not physically connected. */ -+ if (((struct emc2305_data *)data)->pwm_num < channel + 1) -+ return 0; -+ switch (type) { -+ case hwmon_fan: -+ switch (attr) { -+ case hwmon_fan_input: -+ return 0444; -+ case hwmon_fan_fault: -+ return 0444; -+ default: -+ break; -+ } -+ break; -+ case hwmon_pwm: -+ switch (attr) { -+ case hwmon_pwm_input: -+ return 0644; -+ default: -+ break; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+}; -+ -+static int -+emc2305_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) -+{ -+ switch (type) { -+ case hwmon_pwm: -+ switch (attr) { -+ case hwmon_pwm_input: -+ return emc2305_set_pwm(dev, val); -+ default: -+ break; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ return -EOPNOTSUPP; -+}; -+ -+static int -+emc2305_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) -+{ -+ int ret; -+ -+ switch (type) { -+ case hwmon_fan: -+ switch (attr) { -+ case hwmon_fan_input: -+ ret = emc2305_show_fan(dev, channel); -+ if (ret < 0) -+ return ret; -+ *val = ret; -+ return 0; -+ case hwmon_fan_fault: -+ ret = emc2305_show_fault(dev, channel); -+ if (ret < 0) -+ return ret; -+ *val = ret; -+ return 0; -+ default: -+ break; -+ } -+ break; -+ case hwmon_pwm: -+ switch (attr) { -+ case hwmon_pwm_input: -+ ret = emc2305_show_pwm(dev, channel); -+ if (ret < 0) -+ return ret; -+ *val = ret; -+ return 0; -+ default: -+ break; -+ } -+ break; -+ default: -+ break; -+ } -+ -+ return -EOPNOTSUPP; -+}; -+ -+static const struct hwmon_ops emc2305_ops = { -+ .is_visible = emc2305_is_visible, -+ .read = emc2305_read, -+ .write = emc2305_write, -+}; -+ -+static const struct hwmon_channel_info *emc2305_info[] = { -+ HWMON_CHANNEL_INFO(fan, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT, -+ HWMON_F_INPUT -+ ), -+ HWMON_CHANNEL_INFO(fan, -+ HWMON_F_FAULT, -+ HWMON_F_FAULT, -+ HWMON_F_FAULT, -+ HWMON_F_FAULT, -+ HWMON_F_FAULT -+ ), -+ HWMON_CHANNEL_INFO(pwm, -+ HWMON_PWM_INPUT, -+ HWMON_PWM_INPUT, -+ HWMON_PWM_INPUT, -+ HWMON_PWM_INPUT, -+ HWMON_PWM_INPUT -+ ), -+ NULL -+}; -+ -+static const struct hwmon_chip_info emc2305_chip_info = { -+ .ops = &emc2305_ops, -+ .info = emc2305_info, -+}; -+ -+static int emc2305_identify(struct device *dev) -+{ -+ struct i2c_client *client = to_i2c_client(dev); -+ struct emc2305_data *data = i2c_get_clientdata(client); -+ int ret; -+ -+ ret = i2c_smbus_read_byte_data(client, EMC2305_REG_PRODUCT_ID); -+ if (ret < 0) -+ return ret; -+ -+ switch (ret) { -+ case EMC2305: -+ data->pwm_num = 5; -+ break; -+ case EMC2303: -+ data->pwm_num = 5; -+ break; -+ case EMC2302: -+ data->pwm_num = 2; -+ break; -+ case EMC2301: -+ data->pwm_num = 1; -+ break; -+ default: -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int emc2305_probe(struct i2c_client *client, const struct i2c_device_id *id) -+{ -+ struct i2c_adapter *adapter = client->adapter; -+ struct device *dev = &client->dev; -+ u8 min_pwm, max_pwm, max_state; -+ struct emc2305_data *data; -+ int vendor, device; -+ int ret; -+ int i; -+ -+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) -+ return -ENODEV; -+ -+ vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR); -+ if (vendor != EMC2305_VENDOR) -+ return -ENODEV; -+ -+ device = i2c_smbus_read_byte_data(client, EMC2305_REG_DEVICE); -+ if (device != EMC2305_DEVICE) -+ return -ENODEV; -+ -+ max_state = EMC2305_FAN_MAX_STATE; -+ max_pwm = EMC2305_FAN_MAX; -+ min_pwm = EMC2305_FAN_MIN; -+ if (dev->of_node) { -+ ret = emc2305_get_tz_of(dev, &min_pwm, &max_pwm, &max_state); -+ if (ret < 0) -+ return ret; -+ } -+ -+ data = devm_kzalloc(dev, struct_size(data, cooling_levels, max_state + 1), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; -+ -+ i2c_set_clientdata(client, data); -+ -+ ret = emc2305_identify(dev); -+ if (ret) -+ return ret; -+ -+ data->client = client; -+ data->max_state = max_state; -+ data->min_pwm = min_pwm; -+ data->max_pwm = max_pwm; -+ -+ data->hwmon_dev = devm_hwmon_device_register_with_info(dev, "emc2305", data, -+ &emc2305_chip_info, NULL); -+ if (IS_ERR(data->hwmon_dev)) { -+ ret = PTR_ERR(data->hwmon_dev); -+ goto hwmon_device_register_with_info_fail; -+ } -+ -+ if (IS_REACHABLE(CONFIG_THERMAL)) { -+ ret = emc2305_set_tz(dev); -+ if (ret != 0) -+ goto emc2305_set_tz_fail; -+ } -+ -+ for (i = 0; i < EMC2305_FAN_MAX_NUM; i++) -+ i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i), data->min_pwm); -+ -+ return 0; -+ -+emc2305_set_tz_fail: -+hwmon_device_register_with_info_fail: -+ return ret; -+} -+ -+static int emc2305_remove(struct i2c_client *client) -+{ -+ struct device *dev = &client->dev; -+ -+ if (IS_REACHABLE(CONFIG_THERMAL)) -+ emc2305_unset_tz(dev); -+ return 0; -+} -+ -+static struct i2c_driver emc2305_driver = { -+ .class = I2C_CLASS_HWMON, -+ .driver = { -+ .name = "emc2305", -+ .of_match_table = emc2305_dt_ids, -+ }, -+ .probe = emc2305_probe, -+ .remove = emc2305_remove, -+ .id_table = emc2305_ids, -+ .address_list = emc2305_normal_i2c, -+}; -+ -+module_i2c_driver(emc2305_driver); -+ -+MODULE_AUTHOR("Claud Chang "); -+MODULE_DESCRIPTION("SMSC EMC2305 fan controller driver"); -+MODULE_LICENSE("GPL"); --- -2.20.1 - diff --git a/patch/0089-platform-mellanox-Add-support-for-new-SN2201-system.patch b/patch/0089-platform-mellanox-Add-support-for-new-SN2201-system.patch deleted file mode 100644 index 389047ea78e2..000000000000 --- a/patch/0089-platform-mellanox-Add-support-for-new-SN2201-system.patch +++ /dev/null @@ -1,1352 +0,0 @@ -From dac063a274f4553f3ea0cf17a37dece1d9ea1207 Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Sat, 30 Apr 2022 14:58:08 +0300 -Subject: [PATCH backport 5.10 089/182] platform/mellanox: Add support for new - SN2201 system -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -The SN2201 is a highly integrated for one rack unit system with -L3 management switches. It has 48 x 1Gbps RJ45 + 4 x 100G QSFP28 -ports in a compact 1RU form factor. The system also including a -serial port (RS-232 interface), an OOB port (1G/100M MDI interface) -and USB ports for management functions. - -The processor used on SN2201 is Intel Atom®Processor C Series, -C3338R which is one of the Denverton product families. - -System equipped with Nvidia®Spectrum-1 32x100GbE Ethernet switch. - -Features: -- 48 ports RJ45 support 10/100/1000M speed. -- Support 4 QSFP28 ports with 10/25/40/50/100G. -- A USB port is available on SN2201. This port is used for image and File - Management purposes - backing up and restoring images and config files -- Provides flow control mechanism to ensure zero packet loss. - Uses backpressure for half-duplex operation and IEEE802.3x - for full duplex operation. -- Cut-through and Store-and-Forward free switching mechanism. - By default the mode is cut-through. -- Standard 1U chassis height. -- 19" rack mountable. -- Extensive system LED and per port LEDs. -- Redundant power supply. -- 2 x AC Power Supply (one PSU is default, second PSU is optional). - -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20220430115809.54565-3-michaelsh@nvidia.com -Signed-off-by: Hans de Goede ---- - drivers/platform/mellanox/Kconfig | 17 + - drivers/platform/mellanox/Makefile | 1 + - drivers/platform/mellanox/nvsw-sn2201.c | 1261 +++++++++++++++++++++++ - 3 files changed, 1279 insertions(+) - create mode 100644 drivers/platform/mellanox/nvsw-sn2201.c - -diff --git a/drivers/platform/mellanox/Kconfig b/drivers/platform/mellanox/Kconfig -index 8f6c89f0b4ff..75e2bee17606 100644 ---- a/drivers/platform/mellanox/Kconfig -+++ b/drivers/platform/mellanox/Kconfig -@@ -68,4 +68,21 @@ config MLXBF_BOOTCTL - to the userspace tools, to be used in conjunction with the eMMC - device driver to do necessary initial swap of the boot partition. - -+config NVSW_SN2201 -+ tristate "Nvidia SN2201 platform driver support" -+ depends on REGMAP -+ depends on HWMON -+ depends on I2C -+ depends on REGMAP_I2C -+ help -+ This driver provides support for the Nvidia SN2201 platform. -+ The SN2201 is a highly integrated for one rack unit system with -+ L3 management switches. It has 48 x 1Gbps RJ45 + 4 x 100G QSFP28 -+ ports in a compact 1RU form factor. The system also including a -+ serial port (RS-232 interface), an OOB port (1G/100M MDI interface) -+ and USB ports for management functions. -+ The processor used on SN2201 is Intel Atom®Processor C Series, -+ C3338R which is one of the Denverton product families. -+ System equipped with Nvidia®Spectrum-1 32x100GbE Ethernet switch. -+ - endif # MELLANOX_PLATFORM -diff --git a/drivers/platform/mellanox/Makefile b/drivers/platform/mellanox/Makefile -index e47b6b064881..6af37ee88861 100644 ---- a/drivers/platform/mellanox/Makefile -+++ b/drivers/platform/mellanox/Makefile -@@ -8,3 +8,4 @@ obj-$(CONFIG_MLXBF_TMFIFO) += mlxbf-tmfifo.o - obj-$(CONFIG_MLXREG_HOTPLUG) += mlxreg-hotplug.o - obj-$(CONFIG_MLXREG_IO) += mlxreg-io.o - obj-$(CONFIG_MLXREG_LC) += mlxreg-lc.o -+obj-$(CONFIG_NVSW_SN2201) += nvsw-sn2201.o -diff --git a/drivers/platform/mellanox/nvsw-sn2201.c b/drivers/platform/mellanox/nvsw-sn2201.c -new file mode 100644 -index 000000000000..51da240ce4f9 ---- /dev/null -+++ b/drivers/platform/mellanox/nvsw-sn2201.c -@@ -0,0 +1,1261 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Nvidia sn2201 driver -+ * -+ * Copyright (C) 2022 Nvidia Technologies Ltd. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* SN2201 CPLD register offset. */ -+#define NVSW_SN2201_CPLD_LPC_I2C_BASE_ADRR 0x2000 -+#define NVSW_SN2201_CPLD_LPC_IO_RANGE 0x100 -+#define NVSW_SN2201_HW_VER_ID_OFFSET 0x00 -+#define NVSW_SN2201_BOARD_ID_OFFSET 0x01 -+#define NVSW_SN2201_CPLD_VER_OFFSET 0x02 -+#define NVSW_SN2201_CPLD_MVER_OFFSET 0x03 -+#define NVSW_SN2201_CPLD_ID_OFFSET 0x04 -+#define NVSW_SN2201_CPLD_PN_OFFSET 0x05 -+#define NVSW_SN2201_CPLD_PN1_OFFSET 0x06 -+#define NVSW_SN2201_PSU_CTRL_OFFSET 0x0a -+#define NVSW_SN2201_QSFP28_STATUS_OFFSET 0x0b -+#define NVSW_SN2201_QSFP28_INT_STATUS_OFFSET 0x0c -+#define NVSW_SN2201_QSFP28_LP_STATUS_OFFSET 0x0d -+#define NVSW_SN2201_QSFP28_RST_STATUS_OFFSET 0x0e -+#define NVSW_SN2201_SYS_STATUS_OFFSET 0x0f -+#define NVSW_SN2201_FRONT_SYS_LED_CTRL_OFFSET 0x10 -+#define NVSW_SN2201_FRONT_PSU_LED_CTRL_OFFSET 0x12 -+#define NVSW_SN2201_FRONT_UID_LED_CTRL_OFFSET 0x13 -+#define NVSW_SN2201_QSFP28_LED_TEST_STATUS_OFFSET 0x14 -+#define NVSW_SN2201_SYS_RST_STATUS_OFFSET 0x15 -+#define NVSW_SN2201_SYS_INT_STATUS_OFFSET 0x21 -+#define NVSW_SN2201_SYS_INT_MASK_OFFSET 0x22 -+#define NVSW_SN2201_ASIC_STATUS_OFFSET 0x24 -+#define NVSW_SN2201_ASIC_EVENT_OFFSET 0x25 -+#define NVSW_SN2201_ASIC_MAKS_OFFSET 0x26 -+#define NVSW_SN2201_THML_STATUS_OFFSET 0x27 -+#define NVSW_SN2201_THML_EVENT_OFFSET 0x28 -+#define NVSW_SN2201_THML_MASK_OFFSET 0x29 -+#define NVSW_SN2201_PS_ALT_STATUS_OFFSET 0x2a -+#define NVSW_SN2201_PS_ALT_EVENT_OFFSET 0x2b -+#define NVSW_SN2201_PS_ALT_MASK_OFFSET 0x2c -+#define NVSW_SN2201_PS_PRSNT_STATUS_OFFSET 0x30 -+#define NVSW_SN2201_PS_PRSNT_EVENT_OFFSET 0x31 -+#define NVSW_SN2201_PS_PRSNT_MASK_OFFSET 0x32 -+#define NVSW_SN2201_PS_DC_OK_STATUS_OFFSET 0x33 -+#define NVSW_SN2201_PS_DC_OK_EVENT_OFFSET 0x34 -+#define NVSW_SN2201_PS_DC_OK_MASK_OFFSET 0x35 -+#define NVSW_SN2201_RST_CAUSE1_OFFSET 0x36 -+#define NVSW_SN2201_RST_CAUSE2_OFFSET 0x37 -+#define NVSW_SN2201_RST_SW_CTRL_OFFSET 0x38 -+#define NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET 0x3a -+#define NVSW_SN2201_FAN_PRSNT_EVENT_OFFSET 0x3b -+#define NVSW_SN2201_FAN_PRSNT_MASK_OFFSET 0x3c -+#define NVSW_SN2201_WD_TMR_OFFSET_LSB 0x40 -+#define NVSW_SN2201_WD_TMR_OFFSET_MSB 0x41 -+#define NVSW_SN2201_WD_ACT_OFFSET 0x42 -+#define NVSW_SN2201_FAN_LED1_CTRL_OFFSET 0x50 -+#define NVSW_SN2201_FAN_LED2_CTRL_OFFSET 0x51 -+#define NVSW_SN2201_REG_MAX 0x52 -+ -+/* Number of physical I2C busses. */ -+#define NVSW_SN2201_PHY_I2C_BUS_NUM 2 -+/* Number of main mux channels. */ -+#define NVSW_SN2201_MAIN_MUX_CHNL_NUM 8 -+ -+#define NVSW_SN2201_MAIN_NR 0 -+#define NVSW_SN2201_MAIN_MUX_NR 1 -+#define NVSW_SN2201_MAIN_MUX_DEFER_NR (NVSW_SN2201_PHY_I2C_BUS_NUM + \ -+ NVSW_SN2201_MAIN_MUX_CHNL_NUM - 1) -+ -+#define NVSW_SN2201_MAIN_MUX_CH0_NR NVSW_SN2201_PHY_I2C_BUS_NUM -+#define NVSW_SN2201_MAIN_MUX_CH1_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 1) -+#define NVSW_SN2201_MAIN_MUX_CH2_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 2) -+#define NVSW_SN2201_MAIN_MUX_CH3_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 3) -+#define NVSW_SN2201_MAIN_MUX_CH5_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 5) -+#define NVSW_SN2201_MAIN_MUX_CH6_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 6) -+#define NVSW_SN2201_MAIN_MUX_CH7_NR (NVSW_SN2201_MAIN_MUX_CH0_NR + 7) -+ -+#define NVSW_SN2201_CPLD_NR NVSW_SN2201_MAIN_MUX_CH0_NR -+#define NVSW_SN2201_NR_NONE -1 -+ -+/* Masks for aggregation, PSU presence and power, ASIC events -+ * in CPLD related registers. -+ */ -+#define NVSW_SN2201_CPLD_AGGR_ASIC_MASK_DEF 0xe0 -+#define NVSW_SN2201_CPLD_AGGR_PSU_MASK_DEF 0x04 -+#define NVSW_SN2201_CPLD_AGGR_PWR_MASK_DEF 0x02 -+#define NVSW_SN2201_CPLD_AGGR_FAN_MASK_DEF 0x10 -+#define NVSW_SN2201_CPLD_AGGR_MASK_DEF \ -+ (NVSW_SN2201_CPLD_AGGR_ASIC_MASK_DEF \ -+ | NVSW_SN2201_CPLD_AGGR_PSU_MASK_DEF \ -+ | NVSW_SN2201_CPLD_AGGR_PWR_MASK_DEF \ -+ | NVSW_SN2201_CPLD_AGGR_FAN_MASK_DEF) -+ -+#define NVSW_SN2201_CPLD_ASIC_MASK GENMASK(3, 1) -+#define NVSW_SN2201_CPLD_PSU_MASK GENMASK(1, 0) -+#define NVSW_SN2201_CPLD_PWR_MASK GENMASK(1, 0) -+#define NVSW_SN2201_CPLD_FAN_MASK GENMASK(3, 0) -+ -+#define NVSW_SN2201_CPLD_SYSIRQ 26 -+#define NVSW_SN2201_LPC_SYSIRQ 28 -+#define NVSW_SN2201_CPLD_I2CADDR 0x41 -+ -+#define NVSW_SN2201_WD_DFLT_TIMEOUT 600 -+ -+/* nvsw_sn2201 - device private data -+ * @dev: platform device; -+ * @io_data: register access platform data; -+ * @led_data: LED platform data; -+ * @hotplug_data: hotplug platform data; -+ * @i2c_data: I2C controller platform data; -+ * @led: LED device; -+ * @io_regs: register access device; -+ * @pdev_hotplug: hotplug device; -+ * @sn2201_devs: I2C devices for sn2201 devices; -+ * @sn2201_devs_num: number of I2C devices for sn2201 device; -+ * @main_mux_devs: I2C devices for main mux; -+ * @main_mux_devs_num: number of I2C devices for main mux; -+ * @cpld_devs: I2C devices for cpld; -+ * @cpld_devs_num: number of I2C devices for cpld; -+ * @main_mux_deferred_nr: I2C adapter number must be exist prior creating devices execution; -+ */ -+struct nvsw_sn2201 { -+ struct device *dev; -+ struct mlxreg_core_platform_data *io_data; -+ struct mlxreg_core_platform_data *led_data; -+ struct mlxreg_core_platform_data *wd_data; -+ struct mlxreg_core_hotplug_platform_data *hotplug_data; -+ struct mlxreg_core_hotplug_platform_data *i2c_data; -+ struct platform_device *led; -+ struct platform_device *wd; -+ struct platform_device *io_regs; -+ struct platform_device *pdev_hotplug; -+ struct platform_device *pdev_i2c; -+ struct mlxreg_hotplug_device *sn2201_devs; -+ int sn2201_devs_num; -+ struct mlxreg_hotplug_device *main_mux_devs; -+ int main_mux_devs_num; -+ struct mlxreg_hotplug_device *cpld_devs; -+ int cpld_devs_num; -+ int main_mux_deferred_nr; -+}; -+ -+static bool nvsw_sn2201_writeable_reg(struct device *dev, unsigned int reg) -+{ -+ switch (reg) { -+ case NVSW_SN2201_PSU_CTRL_OFFSET: -+ case NVSW_SN2201_QSFP28_LP_STATUS_OFFSET: -+ case NVSW_SN2201_QSFP28_RST_STATUS_OFFSET: -+ case NVSW_SN2201_FRONT_SYS_LED_CTRL_OFFSET: -+ case NVSW_SN2201_FRONT_PSU_LED_CTRL_OFFSET: -+ case NVSW_SN2201_FRONT_UID_LED_CTRL_OFFSET: -+ case NVSW_SN2201_QSFP28_LED_TEST_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_RST_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_INT_MASK_OFFSET: -+ case NVSW_SN2201_ASIC_EVENT_OFFSET: -+ case NVSW_SN2201_ASIC_MAKS_OFFSET: -+ case NVSW_SN2201_THML_EVENT_OFFSET: -+ case NVSW_SN2201_THML_MASK_OFFSET: -+ case NVSW_SN2201_PS_ALT_EVENT_OFFSET: -+ case NVSW_SN2201_PS_ALT_MASK_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_EVENT_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_MASK_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_EVENT_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_MASK_OFFSET: -+ case NVSW_SN2201_RST_SW_CTRL_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_EVENT_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_MASK_OFFSET: -+ case NVSW_SN2201_WD_TMR_OFFSET_LSB: -+ case NVSW_SN2201_WD_TMR_OFFSET_MSB: -+ case NVSW_SN2201_WD_ACT_OFFSET: -+ case NVSW_SN2201_FAN_LED1_CTRL_OFFSET: -+ case NVSW_SN2201_FAN_LED2_CTRL_OFFSET: -+ return true; -+ } -+ return false; -+} -+ -+static bool nvsw_sn2201_readable_reg(struct device *dev, unsigned int reg) -+{ -+ switch (reg) { -+ case NVSW_SN2201_HW_VER_ID_OFFSET: -+ case NVSW_SN2201_BOARD_ID_OFFSET: -+ case NVSW_SN2201_CPLD_VER_OFFSET: -+ case NVSW_SN2201_CPLD_MVER_OFFSET: -+ case NVSW_SN2201_CPLD_ID_OFFSET: -+ case NVSW_SN2201_CPLD_PN_OFFSET: -+ case NVSW_SN2201_CPLD_PN1_OFFSET: -+ case NVSW_SN2201_PSU_CTRL_OFFSET: -+ case NVSW_SN2201_QSFP28_STATUS_OFFSET: -+ case NVSW_SN2201_QSFP28_INT_STATUS_OFFSET: -+ case NVSW_SN2201_QSFP28_LP_STATUS_OFFSET: -+ case NVSW_SN2201_QSFP28_RST_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_STATUS_OFFSET: -+ case NVSW_SN2201_FRONT_SYS_LED_CTRL_OFFSET: -+ case NVSW_SN2201_FRONT_PSU_LED_CTRL_OFFSET: -+ case NVSW_SN2201_FRONT_UID_LED_CTRL_OFFSET: -+ case NVSW_SN2201_QSFP28_LED_TEST_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_RST_STATUS_OFFSET: -+ case NVSW_SN2201_RST_CAUSE1_OFFSET: -+ case NVSW_SN2201_RST_CAUSE2_OFFSET: -+ case NVSW_SN2201_SYS_INT_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_INT_MASK_OFFSET: -+ case NVSW_SN2201_ASIC_STATUS_OFFSET: -+ case NVSW_SN2201_ASIC_EVENT_OFFSET: -+ case NVSW_SN2201_ASIC_MAKS_OFFSET: -+ case NVSW_SN2201_THML_STATUS_OFFSET: -+ case NVSW_SN2201_THML_EVENT_OFFSET: -+ case NVSW_SN2201_THML_MASK_OFFSET: -+ case NVSW_SN2201_PS_ALT_STATUS_OFFSET: -+ case NVSW_SN2201_PS_ALT_EVENT_OFFSET: -+ case NVSW_SN2201_PS_ALT_MASK_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_STATUS_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_EVENT_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_MASK_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_STATUS_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_EVENT_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_MASK_OFFSET: -+ case NVSW_SN2201_RST_SW_CTRL_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_EVENT_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_MASK_OFFSET: -+ case NVSW_SN2201_WD_TMR_OFFSET_LSB: -+ case NVSW_SN2201_WD_TMR_OFFSET_MSB: -+ case NVSW_SN2201_WD_ACT_OFFSET: -+ case NVSW_SN2201_FAN_LED1_CTRL_OFFSET: -+ case NVSW_SN2201_FAN_LED2_CTRL_OFFSET: -+ return true; -+ } -+ return false; -+} -+ -+static bool nvsw_sn2201_volatile_reg(struct device *dev, unsigned int reg) -+{ -+ switch (reg) { -+ case NVSW_SN2201_HW_VER_ID_OFFSET: -+ case NVSW_SN2201_BOARD_ID_OFFSET: -+ case NVSW_SN2201_CPLD_VER_OFFSET: -+ case NVSW_SN2201_CPLD_MVER_OFFSET: -+ case NVSW_SN2201_CPLD_ID_OFFSET: -+ case NVSW_SN2201_CPLD_PN_OFFSET: -+ case NVSW_SN2201_CPLD_PN1_OFFSET: -+ case NVSW_SN2201_PSU_CTRL_OFFSET: -+ case NVSW_SN2201_QSFP28_STATUS_OFFSET: -+ case NVSW_SN2201_QSFP28_INT_STATUS_OFFSET: -+ case NVSW_SN2201_QSFP28_LP_STATUS_OFFSET: -+ case NVSW_SN2201_QSFP28_RST_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_STATUS_OFFSET: -+ case NVSW_SN2201_FRONT_SYS_LED_CTRL_OFFSET: -+ case NVSW_SN2201_FRONT_PSU_LED_CTRL_OFFSET: -+ case NVSW_SN2201_FRONT_UID_LED_CTRL_OFFSET: -+ case NVSW_SN2201_QSFP28_LED_TEST_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_RST_STATUS_OFFSET: -+ case NVSW_SN2201_RST_CAUSE1_OFFSET: -+ case NVSW_SN2201_RST_CAUSE2_OFFSET: -+ case NVSW_SN2201_SYS_INT_STATUS_OFFSET: -+ case NVSW_SN2201_SYS_INT_MASK_OFFSET: -+ case NVSW_SN2201_ASIC_STATUS_OFFSET: -+ case NVSW_SN2201_ASIC_EVENT_OFFSET: -+ case NVSW_SN2201_ASIC_MAKS_OFFSET: -+ case NVSW_SN2201_THML_STATUS_OFFSET: -+ case NVSW_SN2201_THML_EVENT_OFFSET: -+ case NVSW_SN2201_THML_MASK_OFFSET: -+ case NVSW_SN2201_PS_ALT_STATUS_OFFSET: -+ case NVSW_SN2201_PS_ALT_EVENT_OFFSET: -+ case NVSW_SN2201_PS_ALT_MASK_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_STATUS_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_EVENT_OFFSET: -+ case NVSW_SN2201_PS_PRSNT_MASK_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_STATUS_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_EVENT_OFFSET: -+ case NVSW_SN2201_PS_DC_OK_MASK_OFFSET: -+ case NVSW_SN2201_RST_SW_CTRL_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_EVENT_OFFSET: -+ case NVSW_SN2201_FAN_PRSNT_MASK_OFFSET: -+ case NVSW_SN2201_WD_TMR_OFFSET_LSB: -+ case NVSW_SN2201_WD_TMR_OFFSET_MSB: -+ case NVSW_SN2201_FAN_LED1_CTRL_OFFSET: -+ case NVSW_SN2201_FAN_LED2_CTRL_OFFSET: -+ return true; -+ } -+ return false; -+} -+ -+static const struct reg_default nvsw_sn2201_regmap_default[] = { -+ { NVSW_SN2201_QSFP28_LED_TEST_STATUS_OFFSET, 0x00 }, -+ { NVSW_SN2201_WD_ACT_OFFSET, 0x00 }, -+}; -+ -+/* Configuration for the register map of a device with 1 bytes address space. */ -+static const struct regmap_config nvsw_sn2201_regmap_conf = { -+ .reg_bits = 8, -+ .val_bits = 8, -+ .max_register = NVSW_SN2201_REG_MAX, -+ .cache_type = REGCACHE_FLAT, -+ .writeable_reg = nvsw_sn2201_writeable_reg, -+ .readable_reg = nvsw_sn2201_readable_reg, -+ .volatile_reg = nvsw_sn2201_volatile_reg, -+ .reg_defaults = nvsw_sn2201_regmap_default, -+ .num_reg_defaults = ARRAY_SIZE(nvsw_sn2201_regmap_default), -+}; -+ -+/* Regions for LPC I2C controller and LPC base register space. */ -+static const struct resource nvsw_sn2201_lpc_io_resources[] = { -+ [0] = DEFINE_RES_NAMED(NVSW_SN2201_CPLD_LPC_I2C_BASE_ADRR, -+ NVSW_SN2201_CPLD_LPC_IO_RANGE, -+ "mlxplat_cpld_lpc_i2c_ctrl", IORESOURCE_IO), -+}; -+ -+static struct resource nvsw_sn2201_cpld_res[] = { -+ [0] = DEFINE_RES_IRQ_NAMED(NVSW_SN2201_CPLD_SYSIRQ, "mlxreg-hotplug"), -+}; -+ -+static struct resource nvsw_sn2201_lpc_res[] = { -+ [0] = DEFINE_RES_IRQ_NAMED(NVSW_SN2201_LPC_SYSIRQ, "i2c-mlxcpld"), -+}; -+ -+/* SN2201 I2C platform data. */ -+struct mlxreg_core_hotplug_platform_data nvsw_sn2201_i2c_data = { -+ .irq = NVSW_SN2201_CPLD_SYSIRQ, -+}; -+ -+/* SN2201 CPLD device. */ -+static struct i2c_board_info nvsw_sn2201_cpld_devices[] = { -+ { -+ I2C_BOARD_INFO("nvsw-sn2201", 0x41), -+ }, -+}; -+ -+/* SN2201 CPLD board info. */ -+static struct mlxreg_hotplug_device nvsw_sn2201_cpld_brdinfo[] = { -+ { -+ .brdinfo = &nvsw_sn2201_cpld_devices[0], -+ .nr = NVSW_SN2201_CPLD_NR, -+ }, -+}; -+ -+/* SN2201 main mux device. */ -+static struct i2c_board_info nvsw_sn2201_main_mux_devices[] = { -+ { -+ I2C_BOARD_INFO("pca9548", 0x70), -+ }, -+}; -+ -+/* SN2201 main mux board info. */ -+static struct mlxreg_hotplug_device nvsw_sn2201_main_mux_brdinfo[] = { -+ { -+ .brdinfo = &nvsw_sn2201_main_mux_devices[0], -+ .nr = NVSW_SN2201_MAIN_MUX_NR, -+ }, -+}; -+ -+/* SN2201 power devices. */ -+static struct i2c_board_info nvsw_sn2201_pwr_devices[] = { -+ { -+ I2C_BOARD_INFO("pmbus", 0x58), -+ }, -+ { -+ I2C_BOARD_INFO("pmbus", 0x58), -+ }, -+}; -+ -+/* SN2201 fan devices. */ -+static struct i2c_board_info nvsw_sn2201_fan_devices[] = { -+ { -+ I2C_BOARD_INFO("24c02", 0x50), -+ }, -+ { -+ I2C_BOARD_INFO("24c02", 0x51), -+ }, -+ { -+ I2C_BOARD_INFO("24c02", 0x52), -+ }, -+ { -+ I2C_BOARD_INFO("24c02", 0x53), -+ }, -+}; -+ -+/* SN2201 hotplug default data. */ -+static struct mlxreg_core_data nvsw_sn2201_psu_items_data[] = { -+ { -+ .label = "psu1", -+ .reg = NVSW_SN2201_PS_PRSNT_STATUS_OFFSET, -+ .mask = BIT(0), -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+ { -+ .label = "psu2", -+ .reg = NVSW_SN2201_PS_PRSNT_STATUS_OFFSET, -+ .mask = BIT(1), -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+}; -+ -+static struct mlxreg_core_data nvsw_sn2201_pwr_items_data[] = { -+ { -+ .label = "pwr1", -+ .reg = NVSW_SN2201_PS_DC_OK_STATUS_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &nvsw_sn2201_pwr_devices[0], -+ .hpdev.nr = NVSW_SN2201_MAIN_MUX_CH1_NR, -+ }, -+ { -+ .label = "pwr2", -+ .reg = NVSW_SN2201_PS_DC_OK_STATUS_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &nvsw_sn2201_pwr_devices[1], -+ .hpdev.nr = NVSW_SN2201_MAIN_MUX_CH2_NR, -+ }, -+}; -+ -+static struct mlxreg_core_data nvsw_sn2201_fan_items_data[] = { -+ { -+ .label = "fan1", -+ .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, -+ .mask = BIT(0), -+ .hpdev.brdinfo = &nvsw_sn2201_fan_devices[0], -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+ { -+ .label = "fan2", -+ .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, -+ .mask = BIT(1), -+ .hpdev.brdinfo = &nvsw_sn2201_fan_devices[1], -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+ { -+ .label = "fan3", -+ .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, -+ .mask = BIT(2), -+ .hpdev.brdinfo = &nvsw_sn2201_fan_devices[2], -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+ { -+ .label = "fan4", -+ .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, -+ .mask = BIT(3), -+ .hpdev.brdinfo = &nvsw_sn2201_fan_devices[3], -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+}; -+ -+static struct mlxreg_core_data nvsw_sn2201_sys_items_data[] = { -+ { -+ .label = "nic_smb_alert", -+ .reg = NVSW_SN2201_ASIC_STATUS_OFFSET, -+ .mask = BIT(1), -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+ { -+ .label = "cpu_sd", -+ .reg = NVSW_SN2201_ASIC_STATUS_OFFSET, -+ .mask = BIT(2), -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+ { -+ .label = "mac_health", -+ .reg = NVSW_SN2201_ASIC_STATUS_OFFSET, -+ .mask = BIT(3), -+ .hpdev.nr = NVSW_SN2201_NR_NONE, -+ }, -+}; -+ -+static struct mlxreg_core_item nvsw_sn2201_items[] = { -+ { -+ .data = nvsw_sn2201_psu_items_data, -+ .aggr_mask = NVSW_SN2201_CPLD_AGGR_PSU_MASK_DEF, -+ .reg = NVSW_SN2201_PS_PRSNT_STATUS_OFFSET, -+ .mask = NVSW_SN2201_CPLD_PSU_MASK, -+ .count = ARRAY_SIZE(nvsw_sn2201_psu_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = nvsw_sn2201_pwr_items_data, -+ .aggr_mask = NVSW_SN2201_CPLD_AGGR_PWR_MASK_DEF, -+ .reg = NVSW_SN2201_PS_DC_OK_STATUS_OFFSET, -+ .mask = NVSW_SN2201_CPLD_PWR_MASK, -+ .count = ARRAY_SIZE(nvsw_sn2201_pwr_items_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = nvsw_sn2201_fan_items_data, -+ .aggr_mask = NVSW_SN2201_CPLD_AGGR_FAN_MASK_DEF, -+ .reg = NVSW_SN2201_FAN_PRSNT_STATUS_OFFSET, -+ .mask = NVSW_SN2201_CPLD_FAN_MASK, -+ .count = ARRAY_SIZE(nvsw_sn2201_fan_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = nvsw_sn2201_sys_items_data, -+ .aggr_mask = NVSW_SN2201_CPLD_AGGR_ASIC_MASK_DEF, -+ .reg = NVSW_SN2201_ASIC_STATUS_OFFSET, -+ .mask = NVSW_SN2201_CPLD_ASIC_MASK, -+ .count = ARRAY_SIZE(nvsw_sn2201_sys_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+}; -+ -+static -+struct mlxreg_core_hotplug_platform_data nvsw_sn2201_hotplug = { -+ .items = nvsw_sn2201_items, -+ .counter = ARRAY_SIZE(nvsw_sn2201_items), -+ .cell = NVSW_SN2201_SYS_INT_STATUS_OFFSET, -+ .mask = NVSW_SN2201_CPLD_AGGR_MASK_DEF, -+}; -+ -+/* SN2201 static devices. */ -+static struct i2c_board_info nvsw_sn2201_static_devices[] = { -+ { -+ I2C_BOARD_INFO("24c02", 0x57), -+ }, -+ { -+ I2C_BOARD_INFO("lm75", 0x4b), -+ }, -+ { -+ I2C_BOARD_INFO("24c64", 0x56), -+ }, -+ { -+ I2C_BOARD_INFO("ads1015", 0x49), -+ }, -+ { -+ I2C_BOARD_INFO("pca9546", 0x71), -+ }, -+ { -+ I2C_BOARD_INFO("emc2305", 0x4d), -+ }, -+ { -+ I2C_BOARD_INFO("lm75", 0x49), -+ }, -+ { -+ I2C_BOARD_INFO("pca9555", 0x27), -+ }, -+ { -+ I2C_BOARD_INFO("powr1014", 0x37), -+ }, -+ { -+ I2C_BOARD_INFO("lm75", 0x4f), -+ }, -+ { -+ I2C_BOARD_INFO("pmbus", 0x40), -+ }, -+}; -+ -+/* SN2201 default static board info. */ -+static struct mlxreg_hotplug_device nvsw_sn2201_static_brdinfo[] = { -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[0], -+ .nr = NVSW_SN2201_MAIN_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[1], -+ .nr = NVSW_SN2201_MAIN_MUX_CH0_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[2], -+ .nr = NVSW_SN2201_MAIN_MUX_CH0_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[3], -+ .nr = NVSW_SN2201_MAIN_MUX_CH0_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[4], -+ .nr = NVSW_SN2201_MAIN_MUX_CH3_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[5], -+ .nr = NVSW_SN2201_MAIN_MUX_CH5_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[6], -+ .nr = NVSW_SN2201_MAIN_MUX_CH5_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[7], -+ .nr = NVSW_SN2201_MAIN_MUX_CH5_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[8], -+ .nr = NVSW_SN2201_MAIN_MUX_CH6_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[9], -+ .nr = NVSW_SN2201_MAIN_MUX_CH6_NR, -+ }, -+ { -+ .brdinfo = &nvsw_sn2201_static_devices[10], -+ .nr = NVSW_SN2201_MAIN_MUX_CH7_NR, -+ }, -+}; -+ -+/* LED default data. */ -+static struct mlxreg_core_data nvsw_sn2201_led_data[] = { -+ { -+ .label = "status:green", -+ .reg = NVSW_SN2201_FRONT_SYS_LED_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "status:orange", -+ .reg = NVSW_SN2201_FRONT_SYS_LED_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "psu:green", -+ .reg = NVSW_SN2201_FRONT_PSU_LED_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "psu:orange", -+ .reg = NVSW_SN2201_FRONT_PSU_LED_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "uid:blue", -+ .reg = NVSW_SN2201_FRONT_UID_LED_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "fan1:green", -+ .reg = NVSW_SN2201_FAN_LED1_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "fan1:orange", -+ .reg = NVSW_SN2201_FAN_LED1_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "fan2:green", -+ .reg = NVSW_SN2201_FAN_LED1_CTRL_OFFSET, -+ .mask = GENMASK(3, 0), -+ }, -+ { -+ .label = "fan2:orange", -+ .reg = NVSW_SN2201_FAN_LED1_CTRL_OFFSET, -+ .mask = GENMASK(3, 0), -+ }, -+ { -+ .label = "fan3:green", -+ .reg = NVSW_SN2201_FAN_LED2_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "fan3:orange", -+ .reg = NVSW_SN2201_FAN_LED2_CTRL_OFFSET, -+ .mask = GENMASK(7, 4), -+ }, -+ { -+ .label = "fan4:green", -+ .reg = NVSW_SN2201_FAN_LED2_CTRL_OFFSET, -+ .mask = GENMASK(3, 0), -+ }, -+ { -+ .label = "fan4:orange", -+ .reg = NVSW_SN2201_FAN_LED2_CTRL_OFFSET, -+ .mask = GENMASK(3, 0), -+ }, -+}; -+ -+static struct mlxreg_core_platform_data nvsw_sn2201_led = { -+ .data = nvsw_sn2201_led_data, -+ .counter = ARRAY_SIZE(nvsw_sn2201_led_data), -+}; -+ -+/* Default register access data. */ -+static struct mlxreg_core_data nvsw_sn2201_io_data[] = { -+ { -+ .label = "cpld1_version", -+ .reg = NVSW_SN2201_CPLD_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld1_version_min", -+ .reg = NVSW_SN2201_CPLD_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld1_pn", -+ .reg = NVSW_SN2201_CPLD_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "psu1_on", -+ .reg = NVSW_SN2201_PSU_CTRL_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0644, -+ }, -+ { -+ .label = "psu2_on", -+ .reg = NVSW_SN2201_PSU_CTRL_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0644, -+ }, -+ { -+ .label = "pwr_cycle", -+ .reg = NVSW_SN2201_PSU_CTRL_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0644, -+ }, -+ { -+ .label = "asic_health", -+ .reg = NVSW_SN2201_SYS_STATUS_OFFSET, -+ .mask = GENMASK(4, 3), -+ .bit = 4, -+ .mode = 0444, -+ }, -+ { -+ .label = "qsfp_pwr_good", -+ .reg = NVSW_SN2201_SYS_STATUS_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0444, -+ }, -+ { -+ .label = "phy_reset", -+ .reg = NVSW_SN2201_SYS_RST_STATUS_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0644, -+ }, -+ { -+ .label = "mac_reset", -+ .reg = NVSW_SN2201_SYS_RST_STATUS_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0644, -+ }, -+ { -+ .label = "pwr_down", -+ .reg = NVSW_SN2201_RST_SW_CTRL_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0644, -+ }, -+ { -+ .label = "reset_long_pb", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_short_pb", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_aux_pwr_or_ref", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_swb_dc_dc_pwr_fail", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_sw_reset", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_fw_reset", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_swb_wd", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_asic_thermal", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_system", -+ .reg = NVSW_SN2201_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_sw_pwr_off", -+ .reg = NVSW_SN2201_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_cpu_pwr_fail_thermal", -+ .reg = NVSW_SN2201_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_reload_bios", -+ .reg = NVSW_SN2201_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_ac_pwr_fail", -+ .reg = NVSW_SN2201_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, -+ }, -+ { -+ .label = "psu1", -+ .reg = NVSW_SN2201_PS_PRSNT_STATUS_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0444, -+ }, -+ { -+ .label = "psu2", -+ .reg = NVSW_SN2201_PS_PRSNT_STATUS_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0444, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data nvsw_sn2201_regs_io = { -+ .data = nvsw_sn2201_io_data, -+ .counter = ARRAY_SIZE(nvsw_sn2201_io_data), -+}; -+ -+/* Default watchdog data. */ -+static struct mlxreg_core_data nvsw_sn2201_wd_data[] = { -+ { -+ .label = "action", -+ .reg = NVSW_SN2201_WD_ACT_OFFSET, -+ .mask = GENMASK(7, 1), -+ .bit = 0, -+ }, -+ { -+ .label = "timeout", -+ .reg = NVSW_SN2201_WD_TMR_OFFSET_LSB, -+ .mask = 0, -+ .health_cntr = NVSW_SN2201_WD_DFLT_TIMEOUT, -+ }, -+ { -+ .label = "timeleft", -+ .reg = NVSW_SN2201_WD_TMR_OFFSET_LSB, -+ .mask = 0, -+ }, -+ { -+ .label = "ping", -+ .reg = NVSW_SN2201_WD_ACT_OFFSET, -+ .mask = GENMASK(7, 1), -+ .bit = 0, -+ }, -+ { -+ .label = "reset", -+ .reg = NVSW_SN2201_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .bit = 6, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data nvsw_sn2201_wd = { -+ .data = nvsw_sn2201_wd_data, -+ .counter = ARRAY_SIZE(nvsw_sn2201_wd_data), -+ .version = MLX_WDT_TYPE3, -+ .identity = "mlx-wdt-main", -+}; -+ -+static int -+nvsw_sn2201_create_static_devices(struct nvsw_sn2201 *nvsw_sn2201, -+ struct mlxreg_hotplug_device *devs, -+ int size) -+{ -+ struct mlxreg_hotplug_device *dev = devs; -+ int i; -+ -+ /* Create I2C static devices. */ -+ for (i = 0; i < size; i++, dev++) { -+ dev->client = i2c_new_client_device(dev->adapter, dev->brdinfo); -+ if (IS_ERR(dev->client)) { -+ dev_err(nvsw_sn2201->dev, "Failed to create client %s at bus %d at addr 0x%02x\n", -+ dev->brdinfo->type, -+ dev->nr, dev->brdinfo->addr); -+ -+ dev->adapter = NULL; -+ goto fail_create_static_devices; -+ } -+ } -+ -+ return 0; -+ -+fail_create_static_devices: -+ while (--i >= 0) { -+ dev = devs + i; -+ i2c_unregister_device(dev->client); -+ dev->client = NULL; -+ dev->adapter = NULL; -+ } -+ return IS_ERR(dev->client); -+} -+ -+static void nvsw_sn2201_destroy_static_devices(struct nvsw_sn2201 *nvsw_sn2201, -+ struct mlxreg_hotplug_device *devs, int size) -+{ -+ struct mlxreg_hotplug_device *dev = devs; -+ int i; -+ -+ /* Destroy static I2C device for SN2201 static devices. */ -+ for (i = 0; i < size; i++, dev++) { -+ if (dev->client) { -+ i2c_unregister_device(dev->client); -+ dev->client = NULL; -+ i2c_put_adapter(dev->adapter); -+ dev->adapter = NULL; -+ } -+ } -+} -+ -+static int nvsw_sn2201_config_post_init(struct nvsw_sn2201 *nvsw_sn2201) -+{ -+ struct mlxreg_hotplug_device *sn2201_dev; -+ struct i2c_adapter *adap; -+ struct device *dev; -+ int i, err; -+ -+ dev = nvsw_sn2201->dev; -+ adap = i2c_get_adapter(nvsw_sn2201->main_mux_deferred_nr); -+ if (!adap) { -+ dev_err(dev, "Failed to get adapter for bus %d\n", -+ nvsw_sn2201->main_mux_deferred_nr); -+ return -ENODEV; -+ } -+ i2c_put_adapter(adap); -+ -+ /* Update board info. */ -+ sn2201_dev = nvsw_sn2201->sn2201_devs; -+ for (i = 0; i < nvsw_sn2201->sn2201_devs_num; i++, sn2201_dev++) { -+ sn2201_dev->adapter = i2c_get_adapter(sn2201_dev->nr); -+ if (!sn2201_dev->adapter) -+ return -ENODEV; -+ i2c_put_adapter(sn2201_dev->adapter); -+ } -+ -+ err = nvsw_sn2201_create_static_devices(nvsw_sn2201, nvsw_sn2201->sn2201_devs, -+ nvsw_sn2201->sn2201_devs_num); -+ if (err) -+ dev_err(dev, "Failed to create static devices\n"); -+ -+ return err; -+} -+ -+static int nvsw_sn2201_config_init(struct nvsw_sn2201 *nvsw_sn2201, void *regmap) -+{ -+ struct device *dev = nvsw_sn2201->dev; -+ int err; -+ -+ nvsw_sn2201->io_data = &nvsw_sn2201_regs_io; -+ nvsw_sn2201->led_data = &nvsw_sn2201_led; -+ nvsw_sn2201->wd_data = &nvsw_sn2201_wd; -+ nvsw_sn2201->hotplug_data = &nvsw_sn2201_hotplug; -+ -+ /* Register IO access driver. */ -+ if (nvsw_sn2201->io_data) { -+ nvsw_sn2201->io_data->regmap = regmap; -+ nvsw_sn2201->io_regs = -+ platform_device_register_resndata(dev, "mlxreg-io", PLATFORM_DEVID_NONE, NULL, 0, -+ nvsw_sn2201->io_data, -+ sizeof(*nvsw_sn2201->io_data)); -+ if (IS_ERR(nvsw_sn2201->io_regs)) { -+ err = PTR_ERR(nvsw_sn2201->io_regs); -+ goto fail_register_io; -+ } -+ } -+ -+ /* Register LED driver. */ -+ if (nvsw_sn2201->led_data) { -+ nvsw_sn2201->led_data->regmap = regmap; -+ nvsw_sn2201->led = -+ platform_device_register_resndata(dev, "leds-mlxreg", PLATFORM_DEVID_NONE, NULL, 0, -+ nvsw_sn2201->led_data, -+ sizeof(*nvsw_sn2201->led_data)); -+ if (IS_ERR(nvsw_sn2201->led)) { -+ err = PTR_ERR(nvsw_sn2201->led); -+ goto fail_register_led; -+ } -+ } -+ -+ /* Register WD driver. */ -+ if (nvsw_sn2201->wd_data) { -+ nvsw_sn2201->wd_data->regmap = regmap; -+ nvsw_sn2201->wd = -+ platform_device_register_resndata(dev, "mlx-wdt", PLATFORM_DEVID_NONE, NULL, 0, -+ nvsw_sn2201->wd_data, -+ sizeof(*nvsw_sn2201->wd_data)); -+ if (IS_ERR(nvsw_sn2201->wd)) { -+ err = PTR_ERR(nvsw_sn2201->wd); -+ goto fail_register_wd; -+ } -+ } -+ -+ /* Register hotplug driver. */ -+ if (nvsw_sn2201->hotplug_data) { -+ nvsw_sn2201->hotplug_data->regmap = regmap; -+ nvsw_sn2201->pdev_hotplug = -+ platform_device_register_resndata(dev, "mlxreg-hotplug", PLATFORM_DEVID_NONE, -+ nvsw_sn2201_cpld_res, -+ ARRAY_SIZE(nvsw_sn2201_cpld_res), -+ nvsw_sn2201->hotplug_data, -+ sizeof(*nvsw_sn2201->hotplug_data)); -+ if (IS_ERR(nvsw_sn2201->pdev_hotplug)) { -+ err = PTR_ERR(nvsw_sn2201->pdev_hotplug); -+ goto fail_register_hotplug; -+ } -+ } -+ -+ return nvsw_sn2201_config_post_init(nvsw_sn2201); -+ -+fail_register_hotplug: -+ if (nvsw_sn2201->wd) -+ platform_device_unregister(nvsw_sn2201->wd); -+fail_register_wd: -+ if (nvsw_sn2201->led) -+ platform_device_unregister(nvsw_sn2201->led); -+fail_register_led: -+ if (nvsw_sn2201->io_regs) -+ platform_device_unregister(nvsw_sn2201->io_regs); -+fail_register_io: -+ -+ return err; -+} -+ -+static void nvsw_sn2201_config_exit(struct nvsw_sn2201 *nvsw_sn2201) -+{ -+ /* Unregister hotplug driver. */ -+ if (nvsw_sn2201->pdev_hotplug) -+ platform_device_unregister(nvsw_sn2201->pdev_hotplug); -+ /* Unregister WD driver. */ -+ if (nvsw_sn2201->wd) -+ platform_device_unregister(nvsw_sn2201->wd); -+ /* Unregister LED driver. */ -+ if (nvsw_sn2201->led) -+ platform_device_unregister(nvsw_sn2201->led); -+ /* Unregister IO access driver. */ -+ if (nvsw_sn2201->io_regs) -+ platform_device_unregister(nvsw_sn2201->io_regs); -+} -+ -+/* -+ * Initialization is divided into two parts: -+ * - I2C main bus init. -+ * - Mux creation and attaching devices to the mux, -+ * which assumes that the main bus is already created. -+ * This separation is required for synchronization between these two parts. -+ * Completion notify callback is used to make this flow synchronized. -+ */ -+static int nvsw_sn2201_i2c_completion_notify(void *handle, int id) -+{ -+ struct nvsw_sn2201 *nvsw_sn2201 = handle; -+ void *regmap; -+ int i, err; -+ -+ /* Create main mux. */ -+ nvsw_sn2201->main_mux_devs->adapter = i2c_get_adapter(nvsw_sn2201->main_mux_devs->nr); -+ if (!nvsw_sn2201->main_mux_devs->adapter) { -+ err = -ENODEV; -+ dev_err(nvsw_sn2201->dev, "Failed to get adapter for bus %d\n", -+ nvsw_sn2201->cpld_devs->nr); -+ goto i2c_get_adapter_main_fail; -+ } -+ -+ nvsw_sn2201->main_mux_devs_num = ARRAY_SIZE(nvsw_sn2201_main_mux_brdinfo); -+ err = nvsw_sn2201_create_static_devices(nvsw_sn2201, nvsw_sn2201->main_mux_devs, -+ nvsw_sn2201->main_mux_devs_num); -+ if (err) { -+ dev_err(nvsw_sn2201->dev, "Failed to create main mux devices\n"); -+ goto nvsw_sn2201_create_static_devices_fail; -+ } -+ -+ nvsw_sn2201->cpld_devs->adapter = i2c_get_adapter(nvsw_sn2201->cpld_devs->nr); -+ if (!nvsw_sn2201->cpld_devs->adapter) { -+ err = -ENODEV; -+ dev_err(nvsw_sn2201->dev, "Failed to get adapter for bus %d\n", -+ nvsw_sn2201->cpld_devs->nr); -+ goto i2c_get_adapter_fail; -+ } -+ -+ /* Create CPLD device. */ -+ nvsw_sn2201->cpld_devs->client = i2c_new_dummy_device(nvsw_sn2201->cpld_devs->adapter, -+ NVSW_SN2201_CPLD_I2CADDR); -+ if (IS_ERR(nvsw_sn2201->cpld_devs->client)) { -+ err = PTR_ERR(nvsw_sn2201->cpld_devs->client); -+ dev_err(nvsw_sn2201->dev, "Failed to create %s cpld device at bus %d at addr 0x%02x\n", -+ nvsw_sn2201->cpld_devs->brdinfo->type, nvsw_sn2201->cpld_devs->nr, -+ nvsw_sn2201->cpld_devs->brdinfo->addr); -+ goto i2c_new_dummy_fail; -+ } -+ -+ regmap = devm_regmap_init_i2c(nvsw_sn2201->cpld_devs->client, &nvsw_sn2201_regmap_conf); -+ if (IS_ERR(regmap)) { -+ err = PTR_ERR(regmap); -+ dev_err(nvsw_sn2201->dev, "Failed to initialise managed register map\n"); -+ goto devm_regmap_init_i2c_fail; -+ } -+ -+ /* Set default registers. */ -+ for (i = 0; i < nvsw_sn2201_regmap_conf.num_reg_defaults; i++) { -+ err = regmap_write(regmap, nvsw_sn2201_regmap_default[i].reg, -+ nvsw_sn2201_regmap_default[i].def); -+ if (err) { -+ dev_err(nvsw_sn2201->dev, "Failed to set register at offset 0x%02x to default value: 0x%02x\n", -+ nvsw_sn2201_regmap_default[i].reg, -+ nvsw_sn2201_regmap_default[i].def); -+ goto regmap_write_fail; -+ } -+ } -+ -+ /* Sync registers with hardware. */ -+ regcache_mark_dirty(regmap); -+ err = regcache_sync(regmap); -+ if (err) { -+ dev_err(nvsw_sn2201->dev, "Failed to Sync registers with hardware\n"); -+ goto regcache_sync_fail; -+ } -+ -+ /* Configure SN2201 board. */ -+ err = nvsw_sn2201_config_init(nvsw_sn2201, regmap); -+ if (err) { -+ dev_err(nvsw_sn2201->dev, "Failed to configure board\n"); -+ goto nvsw_sn2201_config_init_fail; -+ } -+ -+ return 0; -+ -+nvsw_sn2201_config_init_fail: -+ nvsw_sn2201_config_exit(nvsw_sn2201); -+regcache_sync_fail: -+regmap_write_fail: -+devm_regmap_init_i2c_fail: -+i2c_new_dummy_fail: -+ i2c_put_adapter(nvsw_sn2201->cpld_devs->adapter); -+ nvsw_sn2201->cpld_devs->adapter = NULL; -+i2c_get_adapter_fail: -+ /* Destroy SN2201 static I2C devices. */ -+ nvsw_sn2201_destroy_static_devices(nvsw_sn2201, nvsw_sn2201->sn2201_devs, -+ nvsw_sn2201->sn2201_devs_num); -+ /* Destroy main mux device. */ -+ nvsw_sn2201_destroy_static_devices(nvsw_sn2201, nvsw_sn2201->main_mux_devs, -+ nvsw_sn2201->main_mux_devs_num); -+nvsw_sn2201_create_static_devices_fail: -+ i2c_put_adapter(nvsw_sn2201->main_mux_devs->adapter); -+i2c_get_adapter_main_fail: -+ return err; -+} -+ -+static int nvsw_sn2201_config_pre_init(struct nvsw_sn2201 *nvsw_sn2201) -+{ -+ nvsw_sn2201->i2c_data = &nvsw_sn2201_i2c_data; -+ -+ /* Register I2C controller. */ -+ nvsw_sn2201->i2c_data->handle = nvsw_sn2201; -+ nvsw_sn2201->i2c_data->completion_notify = nvsw_sn2201_i2c_completion_notify; -+ nvsw_sn2201->pdev_i2c = platform_device_register_resndata(nvsw_sn2201->dev, "i2c_mlxcpld", -+ NVSW_SN2201_MAIN_MUX_NR, -+ nvsw_sn2201_lpc_res, -+ ARRAY_SIZE(nvsw_sn2201_lpc_res), -+ nvsw_sn2201->i2c_data, -+ sizeof(*nvsw_sn2201->i2c_data)); -+ if (IS_ERR(nvsw_sn2201->pdev_i2c)) -+ return PTR_ERR(nvsw_sn2201->pdev_i2c); -+ -+ return 0; -+} -+ -+static int nvsw_sn2201_probe(struct platform_device *pdev) -+{ -+ struct nvsw_sn2201 *nvsw_sn2201; -+ -+ nvsw_sn2201 = devm_kzalloc(&pdev->dev, sizeof(*nvsw_sn2201), GFP_KERNEL); -+ if (!nvsw_sn2201) -+ return -ENOMEM; -+ -+ nvsw_sn2201->dev = &pdev->dev; -+ platform_set_drvdata(pdev, nvsw_sn2201); -+ platform_device_add_resources(pdev, nvsw_sn2201_lpc_io_resources, -+ ARRAY_SIZE(nvsw_sn2201_lpc_io_resources)); -+ -+ nvsw_sn2201->main_mux_deferred_nr = NVSW_SN2201_MAIN_MUX_DEFER_NR; -+ nvsw_sn2201->main_mux_devs = nvsw_sn2201_main_mux_brdinfo; -+ nvsw_sn2201->cpld_devs = nvsw_sn2201_cpld_brdinfo; -+ nvsw_sn2201->sn2201_devs = nvsw_sn2201_static_brdinfo; -+ nvsw_sn2201->sn2201_devs_num = ARRAY_SIZE(nvsw_sn2201_static_brdinfo); -+ -+ return nvsw_sn2201_config_pre_init(nvsw_sn2201); -+} -+ -+static int nvsw_sn2201_remove(struct platform_device *pdev) -+{ -+ struct nvsw_sn2201 *nvsw_sn2201 = platform_get_drvdata(pdev); -+ -+ /* Unregister underlying drivers. */ -+ nvsw_sn2201_config_exit(nvsw_sn2201); -+ -+ /* Destroy SN2201 static I2C devices. */ -+ nvsw_sn2201_destroy_static_devices(nvsw_sn2201, -+ nvsw_sn2201->sn2201_devs, -+ nvsw_sn2201->sn2201_devs_num); -+ -+ i2c_put_adapter(nvsw_sn2201->cpld_devs->adapter); -+ nvsw_sn2201->cpld_devs->adapter = NULL; -+ /* Destroy main mux device. */ -+ nvsw_sn2201_destroy_static_devices(nvsw_sn2201, -+ nvsw_sn2201->main_mux_devs, -+ nvsw_sn2201->main_mux_devs_num); -+ -+ /* Unregister I2C controller. */ -+ if (nvsw_sn2201->pdev_i2c) -+ platform_device_unregister(nvsw_sn2201->pdev_i2c); -+ -+ return 0; -+} -+ -+static const struct acpi_device_id nvsw_sn2201_acpi_ids[] = { -+ {"NVSN2201", 0}, -+ {} -+}; -+ -+MODULE_DEVICE_TABLE(acpi, nvsw_sn2201_acpi_ids); -+ -+static struct platform_driver nvsw_sn2201_driver = { -+ .probe = nvsw_sn2201_probe, -+ .remove = nvsw_sn2201_remove, -+ .driver = { -+ .name = "nvsw-sn2201", -+ .acpi_match_table = nvsw_sn2201_acpi_ids, -+ }, -+}; -+ -+module_platform_driver(nvsw_sn2201_driver); -+ -+MODULE_AUTHOR("Nvidia"); -+MODULE_DESCRIPTION("Nvidia sn2201 platform driver"); -+MODULE_LICENSE("Dual BSD/GPL"); -+MODULE_ALIAS("platform:nvsw-sn2201"); --- -2.20.1 - diff --git a/patch/0090-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch b/patch/0090-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch deleted file mode 100644 index 4e5fdc7582ae..000000000000 --- a/patch/0090-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch +++ /dev/null @@ -1,66 +0,0 @@ -From d563b6d291495af320cbbd5733933bc09855080c Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Sat, 30 Apr 2022 14:58:09 +0300 -Subject: [PATCH backport 5.10 090/182] Documentation/ABI: Add new attributes - for mlxreg-io sysfs interfaces - -Add documentation for the new attributes: -- "phy_reset" - Reset PHY. -- "mac_reset" - Reset MAC. -- "qsfp_pwr_good" - The power status of QSFP ports. - -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20220430115809.54565-4-michaelsh@nvidia.com -Signed-off-by: Hans de Goede ---- - .../ABI/stable/sysfs-driver-mlxreg-io | 36 +++++++++++++++++++ - 1 file changed, 36 insertions(+) - -diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -index e2f938499473..0913a8daf767 100644 ---- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io -+++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -@@ -451,3 +451,39 @@ Description: These files provide the maximum powered required for line card - feeding and line card configuration Id. - - The files are read only. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/phy_reset -+Date: May 2022 -+KernelVersion: 5.19 -+Contact: Vadim Pasternak -+Description: This file allows to reset PHY 88E1548 when attribute is set 0 -+ due to some abnormal PHY behavior. -+ Expected behavior: -+ When phy_reset is written 1, all PHY 88E1548 are released -+ from the reset state, when 0 - are hold in reset state. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/mac_reset -+Date: May 2022 -+KernelVersion: 5.19 -+Contact: Vadim Pasternak -+Description: This file allows to reset ASIC MT52132 when attribute is set 0 -+ due to some abnormal ASIC behavior. -+ Expected behavior: -+ When mac_reset is written 1, the ASIC MT52132 is released -+ from the reset state, when 0 - is hold in reset state. -+ -+ The files are read/write. -+ -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/qsfp_pwr_good -+Date: May 2022 -+KernelVersion: 5.19 -+Contact: Vadim Pasternak -+Description: This file shows QSFP ports power status. The value is set to 0 -+ when one of any QSFP ports is plugged. The value is set to 1 when -+ there are no any QSFP ports are plugged. -+ The possible values are: -+ 0 - Power good, 1 - Not power good. -+ -+ The files are read only. --- -2.20.1 - diff --git a/patch/0091-platform-x86-mlx-platform-Add-support-for-new-system.patch b/patch/0091-platform-x86-mlx-platform-Add-support-for-new-system.patch deleted file mode 100644 index 043f348c524e..000000000000 --- a/patch/0091-platform-x86-mlx-platform-Add-support-for-new-system.patch +++ /dev/null @@ -1,177 +0,0 @@ -From ececae8bc325e3b01f36fd694e45a4cbbad334e4 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sat, 23 Oct 2021 12:40:22 +0300 -Subject: [PATCH backport 5.10 091/182] platform/x86: mlx-platform: Add support - for new system SGN2410 - -Add support for new system type, which is a water-cooling flavor -of the VMOD001 system class, equipped with 48xSFP28 and 8xQSFP28 -100G Ethernet ports. - -System is recognized by "DMI_BOARD_NAME" and " DMI_PRODUCT_SKU" -matches, when these fields are set respectively to "VMOD001" and -"HI138". - -Signed-off-by: Vadim Pasternak -Reviewed-by: Oleksandr Shamray -Link: https://lore.kernel.org/r/20211023094022.4193813-4-vadimp@nvidia.com -Signed-off-by: Hans de Goede ---- - drivers/platform/x86/mlx-platform.c | 113 ++++++++++++++++++++++++++++ - 1 file changed, 113 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 5c91410a649b..fac4b6dcfdc7 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -534,6 +534,21 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_items_data[] = { - }, - }; - -+static struct mlxreg_core_data mlxplat_mlxcpld_default_pwr_wc_items_data[] = { -+ { -+ .label = "pwr1", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = BIT(0), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+ { -+ .label = "pwr2", -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = BIT(1), -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+}; -+ - static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_items_data[] = { - { - .label = "fan1", -@@ -662,6 +677,46 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_data = { - .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, - }; - -+static struct mlxreg_core_item mlxplat_mlxcpld_default_wc_items[] = { -+ { -+ .data = mlxplat_mlxcpld_comex_psu_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_CARRIER, -+ .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET, -+ .mask = MLXPLAT_CPLD_PSU_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_psu_items_data), -+ .inversed = 1, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_default_pwr_wc_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_CARRIER, -+ .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET, -+ .mask = MLXPLAT_CPLD_PWR_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_pwr_items_data), -+ .inversed = 0, -+ .health = false, -+ }, -+ { -+ .data = mlxplat_mlxcpld_default_asic_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_ASIC_MASK_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic_items_data), -+ .inversed = 0, -+ .health = true, -+ }, -+}; -+ -+static -+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_wc_data = { -+ .items = mlxplat_mlxcpld_default_wc_items, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_wc_items), -+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, -+ .mask = MLXPLAT_CPLD_AGGR_MASK_DEF, -+ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, -+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, -+}; -+ - static - struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_comex_data = { - .items = mlxplat_mlxcpld_comex_items, -@@ -2119,6 +2174,35 @@ static struct mlxreg_core_platform_data mlxplat_default_led_data = { - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_data), - }; - -+/* Platform led default data for water cooling */ -+static struct mlxreg_core_data mlxplat_mlxcpld_default_led_wc_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "status:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ }, -+ { -+ .label = "psu:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+ { -+ .label = "psu:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_default_led_wc_data = { -+ .data = mlxplat_mlxcpld_default_led_wc_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_wc_data), -+}; -+ - /* Platform led MSN21xx system family data */ - static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data[] = { - { -@@ -4631,6 +4715,28 @@ static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) - return 1; - } - -+static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi) -+{ -+ int i; -+ -+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; -+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data); -+ mlxplat_mux_data = mlxplat_default_mux_data; -+ for (i = 0; i < mlxplat_mux_num; i++) { -+ mlxplat_mux_data[i].values = mlxplat_default_channels[i]; -+ mlxplat_mux_data[i].n_values = -+ ARRAY_SIZE(mlxplat_default_channels[i]); -+ } -+ mlxplat_hotplug = &mlxplat_mlxcpld_default_wc_data; -+ mlxplat_hotplug->deferred_nr = -+ mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; -+ mlxplat_led = &mlxplat_default_led_wc_data; -+ mlxplat_regs_io = &mlxplat_default_regs_io_data; -+ mlxplat_wd_data[0] = &mlxplat_mlxcpld_wd_set_type1[0]; -+ -+ return 1; -+} -+ - static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi) - { - int i; -@@ -4820,6 +4926,13 @@ static int __init mlxplat_dmi_qmb8700_matched(const struct dmi_system_id *dmi) - } - - static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { -+ { -+ .callback = mlxplat_dmi_default_wc_matched, -+ .matches = { -+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0001"), -+ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "HI138"), -+ }, -+ }, - { - .callback = mlxplat_dmi_default_matched, - .matches = { --- -2.20.1 - diff --git a/patch/0092-platform-mellanox-mlxreg-lc-fix-error-code-in-mlxreg.patch b/patch/0092-platform-mellanox-mlxreg-lc-fix-error-code-in-mlxreg.patch deleted file mode 100644 index 963dae598b6f..000000000000 --- a/patch/0092-platform-mellanox-mlxreg-lc-fix-error-code-in-mlxreg.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 925c0bdeb184d3ec04cc6dd46f9e9b0c2f27ac7c Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Wed, 10 Nov 2021 10:43:46 +0300 -Subject: [PATCH backport 5.10 092/182] platform/mellanox: mlxreg-lc: fix error - code in mlxreg_lc_create_static_devices() - -This code should be using PTR_ERR() instead of IS_ERR(). And because -it's using the wrong "dev->client" pointer, the IS_ERR() check will be -false, meaning the function returns success. - -Fixes: 62f9529b8d5c ("platform/mellanox: mlxreg-lc: Add initial support for Nvidia line card devices") -Signed-off-by: Dan Carpenter -Acked-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20211110074346.GB5176@kili -Reviewed-by: Hans de Goede -Signed-off-by: Hans de Goede ---- - drivers/platform/mellanox/mlxreg-lc.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/drivers/platform/mellanox/mlxreg-lc.c b/drivers/platform/mellanox/mlxreg-lc.c -index 2ddad96b154a..75c28179dd07 100644 ---- a/drivers/platform/mellanox/mlxreg-lc.c -+++ b/drivers/platform/mellanox/mlxreg-lc.c -@@ -420,7 +420,7 @@ mlxreg_lc_create_static_devices(struct mlxreg_lc *mlxreg_lc, struct mlxreg_hotpl - int size) - { - struct mlxreg_hotplug_device *dev = devs; -- int i; -+ int i, ret; - - /* Create static I2C device feeding by auxiliary or main power. */ - for (i = 0; i < size; i++, dev++) { -@@ -430,6 +430,7 @@ mlxreg_lc_create_static_devices(struct mlxreg_lc *mlxreg_lc, struct mlxreg_hotpl - dev->brdinfo->type, dev->nr, dev->brdinfo->addr); - - dev->adapter = NULL; -+ ret = PTR_ERR(dev->client); - goto fail_create_static_devices; - } - } -@@ -442,7 +443,7 @@ mlxreg_lc_create_static_devices(struct mlxreg_lc *mlxreg_lc, struct mlxreg_hotpl - i2c_unregister_device(dev->client); - dev->client = NULL; - } -- return IS_ERR(dev->client); -+ return ret; - } - - static void --- -2.20.1 - diff --git a/patch/0093-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-P.patch b/patch/0093-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-P.patch deleted file mode 100644 index 611af1d0c939..000000000000 --- a/patch/0093-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-P.patch +++ /dev/null @@ -1,184 +0,0 @@ -From fc25f37b0269b04b9853c2d62a80e0542f47506d Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Thu, 16 Sep 2021 22:47:18 +0300 -Subject: [PATCH backport 5.10 093/182] hwmon: (mlxreg-fan) Extend driver to - support multiply PWM - -Add additional PWM attributes in order to support the systems, which -can be equipped with up-to four PWM controllers. System capability of -additional PWM support is validated through the reading of relevant -registers. - -Signed-off-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20210916194719.871413-3-vadimp@nvidia.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/mlxreg-fan.c | 55 +++++++++++++++++++++++++++++--------- - 1 file changed, 43 insertions(+), 12 deletions(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index 0f5b109817a7..1a146cc4b0fd 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -13,6 +13,8 @@ - #include - - #define MLXREG_FAN_MAX_TACHO 14 -+#define MLXREG_FAN_MAX_PWM 4 -+#define MLXREG_FAN_PWM_NOT_CONNECTED 0xff - #define MLXREG_FAN_MAX_STATE 10 - #define MLXREG_FAN_MIN_DUTY 51 /* 20% */ - #define MLXREG_FAN_MAX_DUTY 255 /* 100% */ -@@ -105,7 +107,7 @@ struct mlxreg_fan { - void *regmap; - struct mlxreg_core_platform_data *pdata; - struct mlxreg_fan_tacho tacho[MLXREG_FAN_MAX_TACHO]; -- struct mlxreg_fan_pwm pwm; -+ struct mlxreg_fan_pwm pwm[MLXREG_FAN_MAX_PWM]; - int tachos_per_drwr; - int samples; - int divider; -@@ -119,6 +121,7 @@ mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, - { - struct mlxreg_fan *fan = dev_get_drvdata(dev); - struct mlxreg_fan_tacho *tacho; -+ struct mlxreg_fan_pwm *pwm; - u32 regval; - int err; - -@@ -169,9 +172,10 @@ mlxreg_fan_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, - break; - - case hwmon_pwm: -+ pwm = &fan->pwm[channel]; - switch (attr) { - case hwmon_pwm_input: -- err = regmap_read(fan->regmap, fan->pwm.reg, ®val); -+ err = regmap_read(fan->regmap, pwm->reg, ®val); - if (err) - return err; - -@@ -195,6 +199,7 @@ mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, - int channel, long val) - { - struct mlxreg_fan *fan = dev_get_drvdata(dev); -+ struct mlxreg_fan_pwm *pwm; - - switch (type) { - case hwmon_pwm: -@@ -203,7 +208,8 @@ mlxreg_fan_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, - if (val < MLXREG_FAN_MIN_DUTY || - val > MLXREG_FAN_MAX_DUTY) - return -EINVAL; -- return regmap_write(fan->regmap, fan->pwm.reg, val); -+ pwm = &fan->pwm[channel]; -+ return regmap_write(fan->regmap, pwm->reg, val); - default: - return -EOPNOTSUPP; - } -@@ -235,7 +241,7 @@ mlxreg_fan_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, - break; - - case hwmon_pwm: -- if (!(((struct mlxreg_fan *)data)->pwm.connected)) -+ if (!(((struct mlxreg_fan *)data)->pwm[channel].connected)) - return 0; - - switch (attr) { -@@ -270,6 +276,9 @@ static const struct hwmon_channel_info *mlxreg_fan_hwmon_info[] = { - HWMON_F_INPUT | HWMON_F_FAULT, - HWMON_F_INPUT | HWMON_F_FAULT), - HWMON_CHANNEL_INFO(pwm, -+ HWMON_PWM_INPUT, -+ HWMON_PWM_INPUT, -+ HWMON_PWM_INPUT, - HWMON_PWM_INPUT), - NULL - }; -@@ -300,7 +309,7 @@ static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev, - u32 regval; - int err; - -- err = regmap_read(fan->regmap, fan->pwm.reg, ®val); -+ err = regmap_read(fan->regmap, fan->pwm[0].reg, ®val); - if (err) { - dev_err(fan->dev, "Failed to query PWM duty\n"); - return err; -@@ -343,7 +352,7 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, - for (i = state; i <= MLXREG_FAN_MAX_STATE; i++) - fan->cooling_levels[i] = i; - -- err = regmap_read(fan->regmap, fan->pwm.reg, ®val); -+ err = regmap_read(fan->regmap, fan->pwm[0].reg, ®val); - if (err) { - dev_err(fan->dev, "Failed to query PWM duty\n"); - return err; -@@ -361,7 +370,7 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, - - /* Normalize the state to the valid speed range. */ - state = fan->cooling_levels[state]; -- err = regmap_write(fan->regmap, fan->pwm.reg, -+ err = regmap_write(fan->regmap, fan->pwm[0].reg, - MLXREG_FAN_PWM_STATE2DUTY(state)); - if (err) { - dev_err(fan->dev, "Failed to write PWM duty\n"); -@@ -392,6 +401,22 @@ static int mlxreg_fan_connect_verify(struct mlxreg_fan *fan, - return !!(regval & data->bit); - } - -+static int mlxreg_pwm_connect_verify(struct mlxreg_fan *fan, -+ struct mlxreg_core_data *data) -+{ -+ u32 regval; -+ int err; -+ -+ err = regmap_read(fan->regmap, data->reg, ®val); -+ if (err) { -+ dev_err(fan->dev, "Failed to query pwm register 0x%08x\n", -+ data->reg); -+ return err; -+ } -+ -+ return regval != MLXREG_FAN_PWM_NOT_CONNECTED; -+} -+ - static int mlxreg_fan_speed_divider_get(struct mlxreg_fan *fan, - struct mlxreg_core_data *data) - { -@@ -420,8 +445,8 @@ static int mlxreg_fan_speed_divider_get(struct mlxreg_fan *fan, - static int mlxreg_fan_config(struct mlxreg_fan *fan, - struct mlxreg_core_platform_data *pdata) - { -+ int tacho_num = 0, tacho_avail = 0, pwm_num = 0, i; - struct mlxreg_core_data *data = pdata->data; -- int tacho_num = 0, tacho_avail = 0, i; - bool configured = false; - int err; - -@@ -451,13 +476,19 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan, - fan->tacho[tacho_num++].connected = true; - tacho_avail++; - } else if (strnstr(data->label, "pwm", sizeof(data->label))) { -- if (fan->pwm.connected) { -- dev_err(fan->dev, "duplicate pwm entry: %s\n", -+ if (pwm_num == MLXREG_FAN_MAX_TACHO) { -+ dev_err(fan->dev, "too many pwm entries: %s\n", - data->label); - return -EINVAL; - } -- fan->pwm.reg = data->reg; -- fan->pwm.connected = true; -+ -+ err = mlxreg_pwm_connect_verify(fan, data); -+ if (err) -+ return err; -+ -+ fan->pwm[pwm_num].reg = data->reg; -+ fan->pwm[pwm_num].connected = true; -+ pwm_num++; - } else if (strnstr(data->label, "conf", sizeof(data->label))) { - if (configured) { - dev_err(fan->dev, "duplicate conf entry: %s\n", --- -2.20.1 - diff --git a/patch/0094-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-c.patch b/patch/0094-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-c.patch deleted file mode 100644 index 2b5c5b6cf8d5..000000000000 --- a/patch/0094-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-c.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 6518f8a96184e989d93b17700ac110da30ec8b53 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Fri, 17 Sep 2021 00:31:28 +0300 -Subject: [PATCH backport 5.10 094/182] hwmon: (mlxreg-fan) Extend driver to - support multiply cooling devices - -Add support for additional cooling devices in order to support the -systems, which can be equipped with up-to four PWM controllers. - -Signed-off-by: Vadim Pasternak -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/mlxreg-fan.c | 73 ++++++++++++++++++++++++-------------- - 1 file changed, 47 insertions(+), 26 deletions(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index 1a146cc4b0fd..35228ed112d7 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -63,6 +63,8 @@ - MLXREG_FAN_MAX_DUTY, \ - MLXREG_FAN_MAX_STATE)) - -+struct mlxreg_fan; -+ - /* - * struct mlxreg_fan_tacho - tachometer data (internal use): - * -@@ -81,12 +83,18 @@ struct mlxreg_fan_tacho { - /* - * struct mlxreg_fan_pwm - PWM data (internal use): - * -+ * @fan: private data; - * @connected: indicates if PWM is connected; - * @reg: register offset; -+ * @cooling: cooling device levels; -+ * @cdev: cooling device; - */ - struct mlxreg_fan_pwm { -+ struct mlxreg_fan *fan; - bool connected; - u32 reg; -+ u8 cooling_levels[MLXREG_FAN_MAX_STATE + 1]; -+ struct thermal_cooling_device *cdev; - }; - - /* -@@ -99,8 +107,6 @@ struct mlxreg_fan_pwm { - * @tachos_per_drwr - number of tachometers per drawer; - * @samples: minimum allowed samples per pulse; - * @divider: divider value for tachometer RPM calculation; -- * @cooling: cooling device levels; -- * @cdev: cooling device; - */ - struct mlxreg_fan { - struct device *dev; -@@ -111,8 +117,6 @@ struct mlxreg_fan { - int tachos_per_drwr; - int samples; - int divider; -- u8 cooling_levels[MLXREG_FAN_MAX_STATE + 1]; -- struct thermal_cooling_device *cdev; - }; - - static int -@@ -305,11 +309,12 @@ static int mlxreg_fan_get_cur_state(struct thermal_cooling_device *cdev, - unsigned long *state) - - { -- struct mlxreg_fan *fan = cdev->devdata; -+ struct mlxreg_fan_pwm *pwm = cdev->devdata; -+ struct mlxreg_fan *fan = pwm->fan; - u32 regval; - int err; - -- err = regmap_read(fan->regmap, fan->pwm[0].reg, ®val); -+ err = regmap_read(fan->regmap, pwm->reg, ®val); - if (err) { - dev_err(fan->dev, "Failed to query PWM duty\n"); - return err; -@@ -324,7 +329,8 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, - unsigned long state) - - { -- struct mlxreg_fan *fan = cdev->devdata; -+ struct mlxreg_fan_pwm *pwm = cdev->devdata; -+ struct mlxreg_fan *fan = pwm->fan; - unsigned long cur_state; - int i, config = 0; - u32 regval; -@@ -348,11 +354,11 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, - config = 1; - state -= MLXREG_FAN_MAX_STATE; - for (i = 0; i < state; i++) -- fan->cooling_levels[i] = state; -+ pwm->cooling_levels[i] = state; - for (i = state; i <= MLXREG_FAN_MAX_STATE; i++) -- fan->cooling_levels[i] = i; -+ pwm->cooling_levels[i] = i; - -- err = regmap_read(fan->regmap, fan->pwm[0].reg, ®val); -+ err = regmap_read(fan->regmap, pwm->reg, ®val); - if (err) { - dev_err(fan->dev, "Failed to query PWM duty\n"); - return err; -@@ -369,8 +375,8 @@ static int mlxreg_fan_set_cur_state(struct thermal_cooling_device *cdev, - return -EINVAL; - - /* Normalize the state to the valid speed range. */ -- state = fan->cooling_levels[state]; -- err = regmap_write(fan->regmap, fan->pwm[0].reg, -+ state = pwm->cooling_levels[state]; -+ err = regmap_write(fan->regmap, pwm->reg, - MLXREG_FAN_PWM_STATE2DUTY(state)); - if (err) { - dev_err(fan->dev, "Failed to write PWM duty\n"); -@@ -541,11 +547,32 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan, - fan->tachos_per_drwr = tacho_avail / drwr_avail; - } - -- /* Init cooling levels per PWM state. */ -- for (i = 0; i < MLXREG_FAN_SPEED_MIN_LEVEL; i++) -- fan->cooling_levels[i] = MLXREG_FAN_SPEED_MIN_LEVEL; -- for (i = MLXREG_FAN_SPEED_MIN_LEVEL; i <= MLXREG_FAN_MAX_STATE; i++) -- fan->cooling_levels[i] = i; -+ return 0; -+} -+ -+static int mlxreg_fan_cooling_config(struct device *dev, struct mlxreg_fan *fan) -+{ -+ int i, j; -+ -+ for (i = 0; i <= MLXREG_FAN_MAX_PWM; i++) { -+ struct mlxreg_fan_pwm *pwm = &fan->pwm[i]; -+ -+ if (!pwm->connected) -+ continue; -+ pwm->fan = fan; -+ pwm->cdev = devm_thermal_of_cooling_device_register(dev, NULL, "mlxreg_fan", pwm, -+ &mlxreg_fan_cooling_ops); -+ if (IS_ERR(pwm->cdev)) { -+ dev_err(dev, "Failed to register cooling device\n"); -+ return PTR_ERR(pwm->cdev); -+ } -+ -+ /* Init cooling levels per PWM state. */ -+ for (j = 0; j < MLXREG_FAN_SPEED_MIN_LEVEL; j++) -+ pwm->cooling_levels[j] = MLXREG_FAN_SPEED_MIN_LEVEL; -+ for (j = MLXREG_FAN_SPEED_MIN_LEVEL; j <= MLXREG_FAN_MAX_STATE; j++) -+ pwm->cooling_levels[j] = j; -+ } - - return 0; - } -@@ -584,16 +611,10 @@ static int mlxreg_fan_probe(struct platform_device *pdev) - return PTR_ERR(hwm); - } - -- if (IS_REACHABLE(CONFIG_THERMAL)) { -- fan->cdev = devm_thermal_of_cooling_device_register(dev, -- NULL, "mlxreg_fan", fan, &mlxreg_fan_cooling_ops); -- if (IS_ERR(fan->cdev)) { -- dev_err(dev, "Failed to register cooling device\n"); -- return PTR_ERR(fan->cdev); -- } -- } -+ if (IS_REACHABLE(CONFIG_THERMAL)) -+ err = mlxreg_fan_cooling_config(dev, fan); - -- return 0; -+ return err; - } - - static struct platform_driver mlxreg_fan_driver = { --- -2.20.1 - diff --git a/patch/0095-hwmon-mlxreg-fan-Fix-out-of-bounds-read-on-array-fan.patch b/patch/0095-hwmon-mlxreg-fan-Fix-out-of-bounds-read-on-array-fan.patch deleted file mode 100644 index a1e16a23f4f2..000000000000 --- a/patch/0095-hwmon-mlxreg-fan-Fix-out-of-bounds-read-on-array-fan.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 3e3dcc8a418d6901578e20b081bbf75f2c7a7316 Mon Sep 17 00:00:00 2001 -From: Colin Ian King -Date: Mon, 20 Sep 2021 19:09:21 +0100 -Subject: [PATCH backport 5.10 095/182] hwmon: (mlxreg-fan) Fix out of bounds - read on array fan->pwm - -Array fan->pwm[] is MLXREG_FAN_MAX_PWM elements in size, however the -for-loop has a off-by-one error causing index i to be out of range -causing an out of bounds read on the array. Fix this by replacing -the <= operator with < in the for-loop. - -Addresses-Coverity: ("Out-of-bounds read") -Reported-by: Vadim Pasternak -Fixes: 35edbaab3bbf ("hwmon: (mlxreg-fan) Extend driver to support multiply cooling devices") -Signed-off-by: Colin Ian King -Link: https://lore.kernel.org/r/20210920180921.16246-1-colin.king@canonical.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/mlxreg-fan.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index 35228ed112d7..feab9ec6a6ca 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -554,7 +554,7 @@ static int mlxreg_fan_cooling_config(struct device *dev, struct mlxreg_fan *fan) - { - int i, j; - -- for (i = 0; i <= MLXREG_FAN_MAX_PWM; i++) { -+ for (i = 0; i < MLXREG_FAN_MAX_PWM; i++) { - struct mlxreg_fan_pwm *pwm = &fan->pwm[i]; - - if (!pwm->connected) --- -2.20.1 - diff --git a/patch/0096-hwmon-mlxreg-fan-Modify-PWM-connectivity-validation.patch b/patch/0096-hwmon-mlxreg-fan-Modify-PWM-connectivity-validation.patch deleted file mode 100644 index 1cc2fe948df3..000000000000 --- a/patch/0096-hwmon-mlxreg-fan-Modify-PWM-connectivity-validation.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 66cfe84c9fd69ec5f98e1ff2888898ea24d4f7ae Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sun, 26 Sep 2021 08:35:40 +0300 -Subject: [PATCH backport 5.10 096/182] hwmon: (mlxreg-fan) Modify PWM - connectivity validation - -Validate PWM connectivity only for additional PWM - "pwm1" is connected -on all systems, while "pwm2" - "pwm4" are optional. Validate -connectivity only for optional attributes by reading of related "pwm{n}" -registers - in case "pwm{n}" is not connected, register value is -supposed to be 0xff. - -Signed-off-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20210926053541.1806937-2-vadimp@nvidia.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/mlxreg-fan.c | 11 ++++++++--- - 1 file changed, 8 insertions(+), 3 deletions(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index feab9ec6a6ca..8e5cd6991929 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -488,9 +488,14 @@ static int mlxreg_fan_config(struct mlxreg_fan *fan, - return -EINVAL; - } - -- err = mlxreg_pwm_connect_verify(fan, data); -- if (err) -- return err; -+ /* Validate if more then one PWM is connected. */ -+ if (pwm_num) { -+ err = mlxreg_pwm_connect_verify(fan, data); -+ if (err < 0) -+ return err; -+ else if (!err) -+ continue; -+ } - - fan->pwm[pwm_num].reg = data->reg; - fan->pwm[pwm_num].connected = true; --- -2.20.1 - diff --git a/patch/0097-1-mlxsw-Use-u16-for-local_port-field.patch b/patch/0097-1-mlxsw-Use-u16-for-local_port-field.patch deleted file mode 100644 index 02a6b38197ca..000000000000 --- a/patch/0097-1-mlxsw-Use-u16-for-local_port-field.patch +++ /dev/null @@ -1,784 +0,0 @@ -From 0639995c2017338c563db36f631e94d19ae45c74 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Tue, 15 Aug 2023 07:52:25 +0000 -Subject: mlxsw: Use u16 for local_port field instead of u8 - -Upstream commit c934757d90000a9d3779d2b436a70e3d060ef693 - -Currently, local_port field is saved as u8, which means that maximum 256 -ports can be used. - -As preparation for Spectrum-4, which will support more than 256 ports, -local_port field should be extended. - -Save local_port as u16 to allow use of additional ports. - -Signed-off-by: Amit Cohen -Reviewed-by: Petr Machata -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mellanox/mlxsw/core.c | 32 ++++---- - drivers/net/ethernet/mellanox/mlxsw/core.h | 34 ++++----- - drivers/net/ethernet/mellanox/mlxsw/minimal.c | 6 +- - drivers/net/ethernet/mellanox/mlxsw/reg.h | 106 +++++++++++++------------- - 4 files changed, 89 insertions(+), 89 deletions(-) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c -index 7938bad70e37..631c19222fc4 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c -@@ -47,7 +47,7 @@ static struct workqueue_struct *mlxsw_owq; - struct mlxsw_core_port { - struct devlink_port devlink_port; - void *port_driver_priv; -- u8 local_port; -+ u16 local_port; - }; - - void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) -@@ -669,7 +669,7 @@ static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, - } - - /* called with rcu read lock held */ --static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port, -+static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u16 local_port, - void *priv) - { - struct mlxsw_core *mlxsw_core = priv; -@@ -2094,7 +2094,7 @@ int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, - EXPORT_SYMBOL(mlxsw_core_skb_transmit); - - void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core, -- struct sk_buff *skb, u8 local_port) -+ struct sk_buff *skb, u16 local_port) - { - if (mlxsw_core->driver->ptp_transmitted) - mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb, -@@ -2172,7 +2172,7 @@ mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core, - rxl_item->enabled = enabled; - } - --static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port, -+static void mlxsw_core_event_listener_func(struct sk_buff *skb, u16 local_port, - void *priv) - { - struct mlxsw_event_listener_item *event_listener_item = priv; -@@ -2599,7 +2599,7 @@ void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, - { - struct mlxsw_rx_listener_item *rxl_item; - const struct mlxsw_rx_listener *rxl; -- u8 local_port; -+ u16 local_port; - bool found = false; - - if (rx_info->is_lag) { -@@ -2657,7 +2657,7 @@ static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, - } - - void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, -- u16 lag_id, u8 port_index, u8 local_port) -+ u16 lag_id, u8 port_index, u16 local_port) - { - int index = mlxsw_core_lag_mapping_index(mlxsw_core, - lag_id, port_index); -@@ -2677,7 +2677,7 @@ u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, - EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); - - void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, -- u16 lag_id, u8 local_port) -+ u16 lag_id, u16 local_port) - { - int i; - -@@ -2705,7 +2705,7 @@ u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, - } - EXPORT_SYMBOL(mlxsw_core_res_get); - --static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, -+static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, - enum devlink_port_flavour flavour, - u32 port_number, bool split, - u32 split_port_subnumber, -@@ -2736,7 +2736,7 @@ static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, - return err; - } - --static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) -+static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port) - { - struct mlxsw_core_port *mlxsw_core_port = - &mlxsw_core->ports[local_port]; -@@ -2746,7 +2746,7 @@ static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) - memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); - } - --int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, -+int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, - u32 port_number, bool split, - u32 split_port_subnumber, - bool splittable, u32 lanes, -@@ -2761,7 +2761,7 @@ int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, - } - EXPORT_SYMBOL(mlxsw_core_port_init); - --void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) -+void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port) - { - __mlxsw_core_port_fini(mlxsw_core, local_port); - } -@@ -2794,7 +2794,7 @@ void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core) - } - EXPORT_SYMBOL(mlxsw_core_cpu_port_fini); - --void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, -+void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port, - void *port_driver_priv, struct net_device *dev) - { - struct mlxsw_core_port *mlxsw_core_port = -@@ -2806,7 +2806,7 @@ void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, - } - EXPORT_SYMBOL(mlxsw_core_port_eth_set); - --void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, -+void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u16 local_port, - void *port_driver_priv) - { - struct mlxsw_core_port *mlxsw_core_port = -@@ -2818,7 +2818,7 @@ void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, - } - EXPORT_SYMBOL(mlxsw_core_port_ib_set); - --void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, -+void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port, - void *port_driver_priv) - { - struct mlxsw_core_port *mlxsw_core_port = -@@ -2831,7 +2831,7 @@ void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, - EXPORT_SYMBOL(mlxsw_core_port_clear); - - enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, -- u8 local_port) -+ u16 local_port) - { - struct mlxsw_core_port *mlxsw_core_port = - &mlxsw_core->ports[local_port]; -@@ -2844,7 +2844,7 @@ EXPORT_SYMBOL(mlxsw_core_port_type_get); - - struct devlink_port * - mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, -- u8 local_port) -+ u16 local_port) - { - struct mlxsw_core_port *mlxsw_core_port = - &mlxsw_core->ports[local_port]; -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h -index 56efb8e48022..1fc783174292 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h -@@ -49,7 +49,7 @@ int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, - void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload); - - struct mlxsw_tx_info { -- u8 local_port; -+ u16 local_port; - bool is_emad; - }; - -@@ -58,11 +58,11 @@ bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, - int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, - const struct mlxsw_tx_info *tx_info); - void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core, -- struct sk_buff *skb, u8 local_port); -+ struct sk_buff *skb, u16 local_port); - - struct mlxsw_rx_listener { -- void (*func)(struct sk_buff *skb, u8 local_port, void *priv); -- u8 local_port; -+ void (*func)(struct sk_buff *skb, u16 local_port, void *priv); -+ u16 local_port; - u8 mirror_reason; - u16 trap_id; - }; -@@ -194,35 +194,35 @@ void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, - struct mlxsw_rx_info *rx_info); - - void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, -- u16 lag_id, u8 port_index, u8 local_port); -+ u16 lag_id, u8 port_index, u16 local_port); - u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, - u16 lag_id, u8 port_index); - void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, -- u16 lag_id, u8 local_port); -+ u16 lag_id, u16 local_port); - - void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port); --int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, -+int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, - u32 port_number, bool split, u32 split_port_subnumber, - bool splittable, u32 lanes, - const unsigned char *switch_id, - unsigned char switch_id_len); --void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port); -+void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port); - int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core, - void *port_driver_priv, - const unsigned char *switch_id, - unsigned char switch_id_len); - void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core); --void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, -+void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port, - void *port_driver_priv, struct net_device *dev); --void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, -+void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u16 local_port, - void *port_driver_priv); --void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, -+void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port, - void *port_driver_priv); - enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, -- u8 local_port); -+ u16 local_port); - struct devlink_port * - mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, -- u8 local_port); -+ u16 local_port); - struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core); - int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module); - -@@ -290,11 +290,11 @@ struct mlxsw_driver { - struct netlink_ext_ack *extack); - void (*fini)(struct mlxsw_core *mlxsw_core); - int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core); -- int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port, -+ int (*port_type_set)(struct mlxsw_core *mlxsw_core, u16 local_port, - enum devlink_port_type new_type); -- int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port, -+ int (*port_split)(struct mlxsw_core *mlxsw_core, u16 local_port, - unsigned int count, struct netlink_ext_ack *extack); -- int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port, -+ int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u16 local_port, - struct netlink_ext_ack *extack); - int (*sb_pool_get)(struct mlxsw_core *mlxsw_core, - unsigned int sb_index, u16 pool_index, -@@ -368,7 +368,7 @@ struct mlxsw_driver { - * is responsible for freeing the passed-in SKB. - */ - void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core, -- struct sk_buff *skb, u8 local_port); -+ struct sk_buff *skb, u16 local_port); - - u8 txhdr_len; - const struct mlxsw_config_profile *profile; -diff --git a/drivers/net/ethernet/mellanox/mlxsw/minimal.c b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -index 3d07c2dcf08d..1ddd11320b99 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/minimal.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/minimal.c -@@ -38,7 +38,7 @@ struct mlxsw_m { - struct mlxsw_m_port { - struct net_device *dev; - struct mlxsw_m *mlxsw_m; -- u8 local_port; -+ u16 local_port; - u8 module; - }; - -@@ -201,7 +201,7 @@ mlxsw_m_port_dev_addr_get(struct mlxsw_m_port *mlxsw_m_port) - } - - static int --mlxsw_m_port_create(struct mlxsw_m *mlxsw_m, u8 local_port, u8 module) -+mlxsw_m_port_create(struct mlxsw_m *mlxsw_m, u16 local_port, u8 module) - { - struct mlxsw_m_port *mlxsw_m_port; - struct net_device *dev; -@@ -264,7 +264,7 @@ mlxsw_m_port_create(struct mlxsw_m *mlxsw_m, u8 local_port, u8 module) - return err; - } - --static void mlxsw_m_port_remove(struct mlxsw_m *mlxsw_m, u8 local_port) -+static void mlxsw_m_port_remove(struct mlxsw_m *mlxsw_m, u16 local_port) - { - struct mlxsw_m_port *mlxsw_m_port = mlxsw_m->ports[local_port]; - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index a9119451d999..2ec9ec6078e2 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -161,7 +161,7 @@ MLXSW_ITEM32(reg, sspr, sub_port, 0x00, 8, 8); - */ - MLXSW_ITEM32(reg, sspr, system_port, 0x04, 0, 16); - --static inline void mlxsw_reg_sspr_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_sspr_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(sspr, payload); - mlxsw_reg_sspr_m_set(payload, 1); -@@ -407,7 +407,7 @@ static inline void mlxsw_reg_sfd_uc_pack(char *payload, int rec_index, - enum mlxsw_reg_sfd_rec_policy policy, - const char *mac, u16 fid_vid, - enum mlxsw_reg_sfd_rec_action action, -- u8 local_port) -+ u16 local_port) - { - mlxsw_reg_sfd_rec_pack(payload, rec_index, - MLXSW_REG_SFD_REC_TYPE_UNICAST, mac, action); -@@ -419,7 +419,7 @@ static inline void mlxsw_reg_sfd_uc_pack(char *payload, int rec_index, - - static inline void mlxsw_reg_sfd_uc_unpack(char *payload, int rec_index, - char *mac, u16 *p_fid_vid, -- u8 *p_local_port) -+ u16 *p_local_port) - { - mlxsw_reg_sfd_rec_mac_memcpy_from(payload, rec_index, mac); - *p_fid_vid = mlxsw_reg_sfd_uc_fid_vid_get(payload, rec_index); -@@ -685,7 +685,7 @@ MLXSW_ITEM32_INDEXED(reg, sfn, mac_system_port, MLXSW_REG_SFN_BASE_LEN, 0, 16, - - static inline void mlxsw_reg_sfn_mac_unpack(char *payload, int rec_index, - char *mac, u16 *p_vid, -- u8 *p_local_port) -+ u16 *p_local_port) - { - mlxsw_reg_sfn_rec_mac_memcpy_from(payload, rec_index, mac); - *p_vid = mlxsw_reg_sfn_mac_fid_get(payload, rec_index); -@@ -800,7 +800,7 @@ enum mlxsw_reg_spms_state { - */ - MLXSW_ITEM_BIT_ARRAY(reg, spms, state, 0x04, 0x400, 2); - --static inline void mlxsw_reg_spms_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_spms_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(spms, payload); - mlxsw_reg_spms_local_port_set(payload, local_port); -@@ -840,7 +840,7 @@ MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8); - */ - MLXSW_ITEM32(reg, spvid, pvid, 0x04, 0, 12); - --static inline void mlxsw_reg_spvid_pack(char *payload, u8 local_port, u16 pvid) -+static inline void mlxsw_reg_spvid_pack(char *payload, u16 local_port, u16 pvid) - { - MLXSW_REG_ZERO(spvid, payload); - mlxsw_reg_spvid_local_port_set(payload, local_port); -@@ -929,7 +929,7 @@ MLXSW_ITEM32_INDEXED(reg, spvm, rec_vid, - MLXSW_REG_SPVM_BASE_LEN, 0, 12, - MLXSW_REG_SPVM_REC_LEN, 0, false); - --static inline void mlxsw_reg_spvm_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_spvm_pack(char *payload, u16 local_port, - u16 vid_begin, u16 vid_end, - bool is_member, bool untagged) - { -@@ -991,7 +991,7 @@ MLXSW_ITEM32(reg, spaft, allow_prio_tagged, 0x04, 30, 1); - */ - MLXSW_ITEM32(reg, spaft, allow_tagged, 0x04, 29, 1); - --static inline void mlxsw_reg_spaft_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_spaft_pack(char *payload, u16 local_port, - bool allow_untagged) - { - MLXSW_REG_ZERO(spaft, payload); -@@ -1317,7 +1317,7 @@ MLXSW_ITEM32(reg, sldr, num_ports, 0x04, 24, 8); - MLXSW_ITEM32_INDEXED(reg, sldr, system_port, 0x08, 0, 16, 4, 0, false); - - static inline void mlxsw_reg_sldr_lag_add_port_pack(char *payload, u8 lag_id, -- u8 local_port) -+ u16 local_port) - { - MLXSW_REG_ZERO(sldr, payload); - mlxsw_reg_sldr_op_set(payload, MLXSW_REG_SLDR_OP_LAG_ADD_PORT_LIST); -@@ -1327,7 +1327,7 @@ static inline void mlxsw_reg_sldr_lag_add_port_pack(char *payload, u8 lag_id, - } - - static inline void mlxsw_reg_sldr_lag_remove_port_pack(char *payload, u8 lag_id, -- u8 local_port) -+ u16 local_port) - { - MLXSW_REG_ZERO(sldr, payload); - mlxsw_reg_sldr_op_set(payload, MLXSW_REG_SLDR_OP_LAG_REMOVE_PORT_LIST); -@@ -1501,7 +1501,7 @@ MLXSW_ITEM32(reg, slcor, lag_id, 0x00, 0, 10); - MLXSW_ITEM32(reg, slcor, port_index, 0x04, 0, 10); - - static inline void mlxsw_reg_slcor_pack(char *payload, -- u8 local_port, u16 lag_id, -+ u16 local_port, u16 lag_id, - enum mlxsw_reg_slcor_col col) - { - MLXSW_REG_ZERO(slcor, payload); -@@ -1511,7 +1511,7 @@ static inline void mlxsw_reg_slcor_pack(char *payload, - } - - static inline void mlxsw_reg_slcor_port_add_pack(char *payload, -- u8 local_port, u16 lag_id, -+ u16 local_port, u16 lag_id, - u8 port_index) - { - mlxsw_reg_slcor_pack(payload, local_port, lag_id, -@@ -1520,21 +1520,21 @@ static inline void mlxsw_reg_slcor_port_add_pack(char *payload, - } - - static inline void mlxsw_reg_slcor_port_remove_pack(char *payload, -- u8 local_port, u16 lag_id) -+ u16 local_port, u16 lag_id) - { - mlxsw_reg_slcor_pack(payload, local_port, lag_id, - MLXSW_REG_SLCOR_COL_LAG_REMOVE_PORT); - } - - static inline void mlxsw_reg_slcor_col_enable_pack(char *payload, -- u8 local_port, u16 lag_id) -+ u16 local_port, u16 lag_id) - { - mlxsw_reg_slcor_pack(payload, local_port, lag_id, - MLXSW_REG_SLCOR_COL_LAG_COLLECTOR_ENABLED); - } - - static inline void mlxsw_reg_slcor_col_disable_pack(char *payload, -- u8 local_port, u16 lag_id) -+ u16 local_port, u16 lag_id) - { - mlxsw_reg_slcor_pack(payload, local_port, lag_id, - MLXSW_REG_SLCOR_COL_LAG_COLLECTOR_ENABLED); -@@ -1581,7 +1581,7 @@ enum mlxsw_reg_spmlr_learn_mode { - */ - MLXSW_ITEM32(reg, spmlr, learn_mode, 0x04, 30, 2); - --static inline void mlxsw_reg_spmlr_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_spmlr_pack(char *payload, u16 local_port, - enum mlxsw_reg_spmlr_learn_mode mode) - { - MLXSW_REG_ZERO(spmlr, payload); -@@ -1666,7 +1666,7 @@ MLXSW_ITEM32(reg, svfa, counter_set_type, 0x08, 24, 8); - */ - MLXSW_ITEM32(reg, svfa, counter_index, 0x08, 0, 24); - --static inline void mlxsw_reg_svfa_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_svfa_pack(char *payload, u16 local_port, - enum mlxsw_reg_svfa_mt mt, bool valid, - u16 fid, u16 vid) - { -@@ -1705,7 +1705,7 @@ MLXSW_ITEM32(reg, svpe, local_port, 0x00, 16, 8); - */ - MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1); - --static inline void mlxsw_reg_svpe_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_svpe_pack(char *payload, u16 local_port, - bool enable) - { - MLXSW_REG_ZERO(svpe, payload); -@@ -1838,7 +1838,7 @@ MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_learn_enable, MLXSW_REG_SPVMLR_BASE_LEN, - MLXSW_ITEM32_INDEXED(reg, spvmlr, rec_vid, MLXSW_REG_SPVMLR_BASE_LEN, 0, 12, - MLXSW_REG_SPVMLR_REC_LEN, 0x00, false); - --static inline void mlxsw_reg_spvmlr_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_spvmlr_pack(char *payload, u16 local_port, - u16 vid_begin, u16 vid_end, - bool learn_enable) - { -@@ -1907,7 +1907,7 @@ MLXSW_ITEM32_INDEXED(reg, cwtp, profile_max, MLXSW_REG_CWTP_BASE_LEN, - #define MLXSW_REG_CWTP_MAX_PROFILE 2 - #define MLXSW_REG_CWTP_DEFAULT_PROFILE 1 - --static inline void mlxsw_reg_cwtp_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_cwtp_pack(char *payload, u16 local_port, - u8 traffic_class) - { - int i; -@@ -2025,7 +2025,7 @@ MLXSW_ITEM32(reg, cwtpm, ntcp_r, 64, 0, 2); - - #define MLXSW_REG_CWTPM_RESET_PROFILE 0 - --static inline void mlxsw_reg_cwtpm_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_cwtpm_pack(char *payload, u16 local_port, - u8 traffic_class, u8 profile, - bool wred, bool ecn) - { -@@ -2116,7 +2116,7 @@ MLXSW_ITEM32(reg, ppbt, acl_info, 0x10, 0, 16); - - static inline void mlxsw_reg_ppbt_pack(char *payload, enum mlxsw_reg_pxbt_e e, - enum mlxsw_reg_pxbt_op op, -- u8 local_port, u16 acl_info) -+ u16 local_port, u16 acl_info) - { - MLXSW_REG_ZERO(ppbt, payload); - mlxsw_reg_ppbt_e_set(payload, e); -@@ -3260,7 +3260,7 @@ enum mlxsw_reg_qpts_trust_state { - */ - MLXSW_ITEM32(reg, qpts, trust_state, 0x04, 0, 3); - --static inline void mlxsw_reg_qpts_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_qpts_pack(char *payload, u16 local_port, - enum mlxsw_reg_qpts_trust_state ts) - { - MLXSW_REG_ZERO(qpts, payload); -@@ -3476,7 +3476,7 @@ MLXSW_ITEM32(reg, qtct, switch_prio, 0x00, 0, 4); - */ - MLXSW_ITEM32(reg, qtct, tclass, 0x04, 0, 4); - --static inline void mlxsw_reg_qtct_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_qtct_pack(char *payload, u16 local_port, - u8 switch_prio, u8 tclass) - { - MLXSW_REG_ZERO(qtct, payload); -@@ -3643,7 +3643,7 @@ MLXSW_ITEM32(reg, qeec, max_shaper_bs, 0x1C, 0, 6); - #define MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP2 11 - #define MLXSW_REG_QEEC_LOWEST_SHAPER_BS_SP3 11 - --static inline void mlxsw_reg_qeec_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_qeec_pack(char *payload, u16 local_port, - enum mlxsw_reg_qeec_hr hr, u8 index, - u8 next_index) - { -@@ -3654,7 +3654,7 @@ static inline void mlxsw_reg_qeec_pack(char *payload, u8 local_port, - mlxsw_reg_qeec_next_element_index_set(payload, next_index); - } - --static inline void mlxsw_reg_qeec_ptps_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_qeec_ptps_pack(char *payload, u16 local_port, - bool ptps) - { - MLXSW_REG_ZERO(qeec, payload); -@@ -3692,7 +3692,7 @@ MLXSW_ITEM32(reg, qrwe, dscp, 0x04, 1, 1); - */ - MLXSW_ITEM32(reg, qrwe, pcp, 0x04, 0, 1); - --static inline void mlxsw_reg_qrwe_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_qrwe_pack(char *payload, u16 local_port, - bool rewrite_pcp, bool rewrite_dscp) - { - MLXSW_REG_ZERO(qrwe, payload); -@@ -3772,7 +3772,7 @@ MLXSW_ITEM32_INDEXED(reg, qpdsm, prio_entry_color2_dscp, - MLXSW_REG_QPDSM_BASE_LEN, 8, 6, - MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false); - --static inline void mlxsw_reg_qpdsm_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_qpdsm_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(qpdsm, payload); - mlxsw_reg_qpdsm_local_port_set(payload, local_port); -@@ -3813,7 +3813,7 @@ MLXSW_ITEM32(reg, qpdp, local_port, 0x00, 16, 8); - */ - MLXSW_ITEM32(reg, qpdp, switch_prio, 0x04, 0, 4); - --static inline void mlxsw_reg_qpdp_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_qpdp_pack(char *payload, u16 local_port, - u8 switch_prio) - { - MLXSW_REG_ZERO(qpdp, payload); -@@ -3859,7 +3859,7 @@ MLXSW_ITEM16_INDEXED(reg, qpdpm, dscp_entry_prio, - MLXSW_REG_QPDPM_BASE_LEN, 0, 4, - MLXSW_REG_QPDPM_DSCP_ENTRY_REC_LEN, 0x00, false); - --static inline void mlxsw_reg_qpdpm_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_qpdpm_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(qpdpm, payload); - mlxsw_reg_qpdpm_local_port_set(payload, local_port); -@@ -3901,7 +3901,7 @@ MLXSW_ITEM32(reg, qtctm, local_port, 0x00, 16, 8); - MLXSW_ITEM32(reg, qtctm, mc, 0x04, 0, 1); - - static inline void --mlxsw_reg_qtctm_pack(char *payload, u8 local_port, bool mc) -+mlxsw_reg_qtctm_pack(char *payload, u16 local_port, bool mc) - { - MLXSW_REG_ZERO(qtctm, payload); - mlxsw_reg_qtctm_local_port_set(payload, local_port); -@@ -4065,7 +4065,7 @@ MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 4, 0x04, 0x00, false); - */ - MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 4, 0x04, 0x00, false); - --static inline void mlxsw_reg_pmlp_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_pmlp_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(pmlp, payload); - mlxsw_reg_pmlp_local_port_set(payload, local_port); -@@ -4112,7 +4112,7 @@ MLXSW_ITEM32(reg, pmtu, admin_mtu, 0x08, 16, 16); - */ - MLXSW_ITEM32(reg, pmtu, oper_mtu, 0x0C, 16, 16); - --static inline void mlxsw_reg_pmtu_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_pmtu_pack(char *payload, u16 local_port, - u16 new_mtu) - { - MLXSW_REG_ZERO(pmtu, payload); -@@ -4306,7 +4306,7 @@ enum mlxsw_reg_ptys_connector_type { - */ - MLXSW_ITEM32(reg, ptys, connector_type, 0x2C, 0, 4); - --static inline void mlxsw_reg_ptys_eth_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_ptys_eth_pack(char *payload, u16 local_port, - u32 proto_admin, bool autoneg) - { - MLXSW_REG_ZERO(ptys, payload); -@@ -4316,7 +4316,7 @@ static inline void mlxsw_reg_ptys_eth_pack(char *payload, u8 local_port, - mlxsw_reg_ptys_an_disable_admin_set(payload, !autoneg); - } - --static inline void mlxsw_reg_ptys_ext_eth_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_ptys_ext_eth_pack(char *payload, u16 local_port, - u32 proto_admin, bool autoneg) - { - MLXSW_REG_ZERO(ptys, payload); -@@ -4358,7 +4358,7 @@ static inline void mlxsw_reg_ptys_ext_eth_unpack(char *payload, - mlxsw_reg_ptys_ext_eth_proto_oper_get(payload); - } - --static inline void mlxsw_reg_ptys_ib_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_ptys_ib_pack(char *payload, u16 local_port, - u16 proto_admin, u16 link_width) - { - MLXSW_REG_ZERO(ptys, payload); -@@ -4416,7 +4416,7 @@ MLXSW_ITEM32(reg, ppad, local_port, 0x00, 16, 8); - MLXSW_ITEM_BUF(reg, ppad, mac, 0x02, 6); - - static inline void mlxsw_reg_ppad_pack(char *payload, bool single_base_mac, -- u8 local_port) -+ u16 local_port) - { - MLXSW_REG_ZERO(ppad, payload); - mlxsw_reg_ppad_single_base_mac_set(payload, !!single_base_mac); -@@ -4490,7 +4490,7 @@ MLXSW_ITEM32(reg, paos, ee, 0x04, 30, 1); - */ - MLXSW_ITEM32(reg, paos, e, 0x04, 0, 2); - --static inline void mlxsw_reg_paos_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_paos_pack(char *payload, u16 local_port, - enum mlxsw_port_admin_status status) - { - MLXSW_REG_ZERO(paos, payload); -@@ -4633,7 +4633,7 @@ static inline void mlxsw_reg_pfcc_prio_pack(char *payload, u8 pfc_en) - mlxsw_reg_pfcc_pfcrx_set(payload, pfc_en); - } - --static inline void mlxsw_reg_pfcc_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_pfcc_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(pfcc, payload); - mlxsw_reg_pfcc_local_port_set(payload, local_port); -@@ -5132,7 +5132,7 @@ MLXSW_ITEM64(reg, ppcnt, tc_no_buffer_discard_uc, - MLXSW_ITEM64(reg, ppcnt, wred_discard, - MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64); - --static inline void mlxsw_reg_ppcnt_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_ppcnt_pack(char *payload, u16 local_port, - enum mlxsw_reg_ppcnt_grp grp, - u8 prio_tc) - { -@@ -5243,7 +5243,7 @@ MLXSW_ITEM_BIT_ARRAY(reg, pptb, prio_to_buff_msb, 0x0C, 0x04, 4); - - #define MLXSW_REG_PPTB_ALL_PRIO 0xFF - --static inline void mlxsw_reg_pptb_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_pptb_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(pptb, payload); - mlxsw_reg_pptb_mm_set(payload, MLXSW_REG_PPTB_MM_UM); -@@ -5340,7 +5340,7 @@ MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xoff_threshold, 0x0C, 16, 16, - MLXSW_ITEM32_INDEXED(reg, pbmc, buf_xon_threshold, 0x0C, 0, 16, - 0x08, 0x04, false); - --static inline void mlxsw_reg_pbmc_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_pbmc_pack(char *payload, u16 local_port, - u16 xoff_timer_value, u16 xoff_refresh) - { - MLXSW_REG_ZERO(pbmc, payload); -@@ -5398,7 +5398,7 @@ MLXSW_ITEM32(reg, pspa, local_port, 0x00, 16, 8); - */ - MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8); - --static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u8 local_port) -+static inline void mlxsw_reg_pspa_pack(char *payload, u8 swid, u16 local_port) - { - MLXSW_REG_ZERO(pspa, payload); - mlxsw_reg_pspa_swid_set(payload, swid); -@@ -5513,7 +5513,7 @@ MLXSW_ITEM32(reg, pplr, local_port, 0x00, 16, 8); - */ - MLXSW_ITEM32(reg, pplr, lb_en, 0x04, 0, 8); - --static inline void mlxsw_reg_pplr_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_pplr_pack(char *payload, u16 local_port, - bool phy_local) - { - MLXSW_REG_ZERO(pplr, payload); -@@ -5609,7 +5609,7 @@ MLXSW_ITEM32(reg, pddr, trblsh_group_opcode, 0x08, 0, 16); - */ - MLXSW_ITEM32(reg, pddr, trblsh_status_opcode, 0x0C, 0, 16); - --static inline void mlxsw_reg_pddr_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_pddr_pack(char *payload, u16 local_port, - u8 page_select) - { - MLXSW_REG_ZERO(pddr, payload); -@@ -9160,7 +9160,7 @@ MLXSW_ITEM32(reg, mpar, enable, 0x04, 31, 1); - */ - MLXSW_ITEM32(reg, mpar, pa_id, 0x04, 0, 4); - --static inline void mlxsw_reg_mpar_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_mpar_pack(char *payload, u16 local_port, - enum mlxsw_reg_mpar_i_e i_e, - bool enable, u8 pa_id) - { -@@ -9281,7 +9281,7 @@ MLXSW_ITEM32(reg, mlcr, beacon_duration, 0x04, 0, 16); - */ - MLXSW_ITEM32(reg, mlcr, beacon_remain, 0x08, 0, 16); - --static inline void mlxsw_reg_mlcr_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_mlcr_pack(char *payload, u16 local_port, - bool active) - { - MLXSW_REG_ZERO(mlcr, payload); -@@ -9671,7 +9671,7 @@ MLXSW_ITEM32(reg, mpsc, e, 0x04, 30, 1); - */ - MLXSW_ITEM32(reg, mpsc, rate, 0x08, 0, 32); - --static inline void mlxsw_reg_mpsc_pack(char *payload, u8 local_port, bool e, -+static inline void mlxsw_reg_mpsc_pack(char *payload, u16 local_port, bool e, - u32 rate) - { - MLXSW_REG_ZERO(mpsc, payload); -@@ -9904,7 +9904,7 @@ MLXSW_ITEM32(reg, momte, type, 0x04, 0, 8); - */ - MLXSW_ITEM_BIT_ARRAY(reg, momte, tclass_en, 0x08, 0x08, 1); - --static inline void mlxsw_reg_momte_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_momte_pack(char *payload, u16 local_port, - enum mlxsw_reg_momte_type type) - { - MLXSW_REG_ZERO(momte, payload); -@@ -10574,7 +10574,7 @@ MLXSW_ITEM32(reg, tnqdr, local_port, 0x00, 16, 8); - */ - MLXSW_ITEM32(reg, tnqdr, dscp, 0x04, 0, 6); - --static inline void mlxsw_reg_tnqdr_pack(char *payload, u8 local_port) -+static inline void mlxsw_reg_tnqdr_pack(char *payload, u16 local_port) - { - MLXSW_REG_ZERO(tnqdr, payload); - mlxsw_reg_tnqdr_local_port_set(payload, local_port); -@@ -10963,7 +10963,7 @@ MLXSW_ITEM32(reg, sbcm, max_buff, 0x1C, 0, 24); - */ - MLXSW_ITEM32(reg, sbcm, pool, 0x24, 0, 4); - --static inline void mlxsw_reg_sbcm_pack(char *payload, u8 local_port, u8 pg_buff, -+static inline void mlxsw_reg_sbcm_pack(char *payload, u16 local_port, u8 pg_buff, - enum mlxsw_reg_sbxx_dir dir, - u32 min_buff, u32 max_buff, - bool infi_max, u8 pool) -@@ -11049,7 +11049,7 @@ MLXSW_ITEM32(reg, sbpm, min_buff, 0x18, 0, 24); - */ - MLXSW_ITEM32(reg, sbpm, max_buff, 0x1C, 0, 24); - --static inline void mlxsw_reg_sbpm_pack(char *payload, u8 local_port, u8 pool, -+static inline void mlxsw_reg_sbpm_pack(char *payload, u16 local_port, u8 pool, - enum mlxsw_reg_sbxx_dir dir, bool clr, - u32 min_buff, u32 max_buff) - { -@@ -11244,7 +11244,7 @@ MLXSW_ITEM32(reg, sbib, local_port, 0x00, 16, 8); - */ - MLXSW_ITEM32(reg, sbib, buff_size, 0x08, 0, 24); - --static inline void mlxsw_reg_sbib_pack(char *payload, u8 local_port, -+static inline void mlxsw_reg_sbib_pack(char *payload, u16 local_port, - u32 buff_size) - { - MLXSW_REG_ZERO(sbib, payload); --- -2.14.1 - diff --git a/patch/0097-hwmon-mlxreg-fan-Support-distinctive-names-per-diffe.patch b/patch/0097-hwmon-mlxreg-fan-Support-distinctive-names-per-diffe.patch deleted file mode 100644 index 444cf32987dc..000000000000 --- a/patch/0097-hwmon-mlxreg-fan-Support-distinctive-names-per-diffe.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 9e274525918eab0b820a88cf44238aae5d1a5b75 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Sun, 26 Sep 2021 08:35:41 +0300 -Subject: [PATCH backport 5.10 097/182] hwmon: (mlxreg-fan) Support distinctive - names per different cooling devices - -Provide different names for cooling devices registration to allow -binding each cooling devices to relevant thermal zone. Thus, specific -cooling device can be associated with related thermal sensor by setting -thermal cooling device type for example to "mlxreg_fan2" and passing -this type to thermal_zone_bind_cooling_device() through 'cdev->type'. - -Signed-off-by: Vadim Pasternak -Link: https://lore.kernel.org/r/20210926053541.1806937-3-vadimp@nvidia.com -Signed-off-by: Guenter Roeck ---- - drivers/hwmon/mlxreg-fan.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - -diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c -index 8e5cd6991929..4a8becdb0d58 100644 ---- a/drivers/hwmon/mlxreg-fan.c -+++ b/drivers/hwmon/mlxreg-fan.c -@@ -263,6 +263,13 @@ mlxreg_fan_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, - return 0; - } - -+static char *mlxreg_fan_name[] = { -+ "mlxreg_fan", -+ "mlxreg_fan1", -+ "mlxreg_fan2", -+ "mlxreg_fan3", -+}; -+ - static const struct hwmon_channel_info *mlxreg_fan_hwmon_info[] = { - HWMON_CHANNEL_INFO(fan, - HWMON_F_INPUT | HWMON_F_FAULT, -@@ -565,8 +572,8 @@ static int mlxreg_fan_cooling_config(struct device *dev, struct mlxreg_fan *fan) - if (!pwm->connected) - continue; - pwm->fan = fan; -- pwm->cdev = devm_thermal_of_cooling_device_register(dev, NULL, "mlxreg_fan", pwm, -- &mlxreg_fan_cooling_ops); -+ pwm->cdev = devm_thermal_of_cooling_device_register(dev, NULL, mlxreg_fan_name[i], -+ pwm, &mlxreg_fan_cooling_ops); - if (IS_ERR(pwm->cdev)) { - dev_err(dev, "Failed to register cooling device\n"); - return PTR_ERR(pwm->cdev); --- -2.20.1 - diff --git a/patch/0157-platform-x86-mlx-platform-Make-activation-of-some-dr.patch b/patch/0157-platform-x86-mlx-platform-Make-activation-of-some-dr.patch deleted file mode 100644 index 287146719caf..000000000000 --- a/patch/0157-platform-x86-mlx-platform-Make-activation-of-some-dr.patch +++ /dev/null @@ -1,120 +0,0 @@ -From 3124aea618244c17aee9b523f55c500ca3badf15 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 14 Feb 2022 09:46:16 +0200 -Subject: [PATCH backport 5.10 157/182] platform/x86: mlx-platform: Make - activation of some drivers conditional - -Current assumption in driver that any system is capable of LED, -hotplug or watchdog support. It could be not true for some new coming -systems. -Add validation for LED, hotplug, watchdog configuration and skip -activation of relevant drivers if not configured. - -Signed-off-by: Vadim Pasternak ---- - drivers/platform/x86/mlx-platform.c | 62 ++++++++++++++++------------- - 1 file changed, 35 insertions(+), 27 deletions(-) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index fac4b6dcfdc7..e0a35412fa77 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -5206,16 +5206,18 @@ static int __init mlxplat_init(void) - } - - /* Add hotplug driver */ -- mlxplat_hotplug->regmap = priv->regmap; -- priv->pdev_hotplug = platform_device_register_resndata( -- &mlxplat_dev->dev, "mlxreg-hotplug", -- PLATFORM_DEVID_NONE, -- mlxplat_mlxcpld_resources, -- ARRAY_SIZE(mlxplat_mlxcpld_resources), -- mlxplat_hotplug, sizeof(*mlxplat_hotplug)); -- if (IS_ERR(priv->pdev_hotplug)) { -- err = PTR_ERR(priv->pdev_hotplug); -- goto fail_platform_mux_register; -+ if (mlxplat_hotplug) { -+ mlxplat_hotplug->regmap = priv->regmap; -+ priv->pdev_hotplug = -+ platform_device_register_resndata(&mlxplat_dev->dev, -+ "mlxreg-hotplug", PLATFORM_DEVID_NONE, -+ mlxplat_mlxcpld_resources, -+ ARRAY_SIZE(mlxplat_mlxcpld_resources), -+ mlxplat_hotplug, sizeof(*mlxplat_hotplug)); -+ if (IS_ERR(priv->pdev_hotplug)) { -+ err = PTR_ERR(priv->pdev_hotplug); -+ goto fail_platform_mux_register; -+ } - } - - /* Set default registers. */ -@@ -5228,24 +5230,26 @@ static int __init mlxplat_init(void) - } - - /* Add LED driver. */ -- mlxplat_led->regmap = priv->regmap; -- priv->pdev_led = platform_device_register_resndata( -- &mlxplat_dev->dev, "leds-mlxreg", -- PLATFORM_DEVID_NONE, NULL, 0, -- mlxplat_led, sizeof(*mlxplat_led)); -- if (IS_ERR(priv->pdev_led)) { -- err = PTR_ERR(priv->pdev_led); -- goto fail_platform_hotplug_register; -+ if (mlxplat_led) { -+ mlxplat_led->regmap = priv->regmap; -+ priv->pdev_led = -+ platform_device_register_resndata(&mlxplat_dev->dev, "leds-mlxreg", -+ PLATFORM_DEVID_NONE, NULL, 0, mlxplat_led, -+ sizeof(*mlxplat_led)); -+ if (IS_ERR(priv->pdev_led)) { -+ err = PTR_ERR(priv->pdev_led); -+ goto fail_platform_hotplug_register; -+ } - } - - /* Add registers io access driver. */ - if (mlxplat_regs_io) { - mlxplat_regs_io->regmap = priv->regmap; -- priv->pdev_io_regs = platform_device_register_resndata( -- &mlxplat_dev->dev, "mlxreg-io", -- PLATFORM_DEVID_NONE, NULL, 0, -- mlxplat_regs_io, -- sizeof(*mlxplat_regs_io)); -+ priv->pdev_io_regs = platform_device_register_resndata(&mlxplat_dev->dev, -+ "mlxreg-io", -+ PLATFORM_DEVID_NONE, NULL, -+ 0, mlxplat_regs_io, -+ sizeof(*mlxplat_regs_io)); - if (IS_ERR(priv->pdev_io_regs)) { - err = PTR_ERR(priv->pdev_io_regs); - goto fail_platform_led_register; -@@ -5302,9 +5306,11 @@ static int __init mlxplat_init(void) - if (mlxplat_regs_io) - platform_device_unregister(priv->pdev_io_regs); - fail_platform_led_register: -- platform_device_unregister(priv->pdev_led); -+ if (mlxplat_led) -+ platform_device_unregister(priv->pdev_led); - fail_platform_hotplug_register: -- platform_device_unregister(priv->pdev_hotplug); -+ if (mlxplat_hotplug) -+ platform_device_unregister(priv->pdev_hotplug); - fail_platform_mux_register: - while (--i >= 0) - platform_device_unregister(priv->pdev_mux[i]); -@@ -5327,8 +5333,10 @@ static void __exit mlxplat_exit(void) - platform_device_unregister(priv->pdev_fan); - if (priv->pdev_io_regs) - platform_device_unregister(priv->pdev_io_regs); -- platform_device_unregister(priv->pdev_led); -- platform_device_unregister(priv->pdev_hotplug); -+ if (priv->pdev_led) -+ platform_device_unregister(priv->pdev_led); -+ if (priv->pdev_hotplug) -+ platform_device_unregister(priv->pdev_hotplug); - - for (i = mlxplat_mux_num - 1; i >= 0 ; i--) - platform_device_unregister(priv->pdev_mux[i]); --- -2.20.1 - diff --git a/patch/0158-platform-x86-mlx-platform-Add-cosmetic-changes-for-a.patch b/patch/0158-platform-x86-mlx-platform-Add-cosmetic-changes-for-a.patch deleted file mode 100644 index 589a912282fe..000000000000 --- a/patch/0158-platform-x86-mlx-platform-Add-cosmetic-changes-for-a.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 90e92c0d97686b0592415dba845a57362d78d122 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 14 Feb 2022 10:07:11 +0200 -Subject: [PATCH backport 5.10 158/182] platform/x86: mlx-platform: Add - cosmetic changes for alignment - -Align the first argument with open parenthesis for -platform_device_register_resndata() calls. - -Signed-off-by: Vadim Pasternak ---- - drivers/platform/x86/mlx-platform.c | 36 +++++++++++++---------------- - 1 file changed, 16 insertions(+), 20 deletions(-) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index e0a35412fa77..a74fcd9d184d 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -5183,22 +5183,20 @@ static int __init mlxplat_init(void) - nr = (nr == mlxplat_max_adap_num) ? -1 : nr; - if (mlxplat_i2c) - mlxplat_i2c->regmap = priv->regmap; -- priv->pdev_i2c = platform_device_register_resndata( -- &mlxplat_dev->dev, "i2c_mlxcpld", -- nr, mlxplat_mlxcpld_resources, -- ARRAY_SIZE(mlxplat_mlxcpld_resources), -- mlxplat_i2c, sizeof(*mlxplat_i2c)); -+ priv->pdev_i2c = platform_device_register_resndata(&mlxplat_dev->dev, "i2c_mlxcpld", -+ nr, mlxplat_mlxcpld_resources, -+ ARRAY_SIZE(mlxplat_mlxcpld_resources), -+ mlxplat_i2c, sizeof(*mlxplat_i2c)); - if (IS_ERR(priv->pdev_i2c)) { - err = PTR_ERR(priv->pdev_i2c); - goto fail_alloc; - } - - for (i = 0; i < mlxplat_mux_num; i++) { -- priv->pdev_mux[i] = platform_device_register_resndata( -- &priv->pdev_i2c->dev, -- "i2c-mux-reg", i, NULL, -- 0, &mlxplat_mux_data[i], -- sizeof(mlxplat_mux_data[i])); -+ priv->pdev_mux[i] = platform_device_register_resndata(&priv->pdev_i2c->dev, -+ "i2c-mux-reg", i, NULL, 0, -+ &mlxplat_mux_data[i], -+ sizeof(mlxplat_mux_data[i])); - if (IS_ERR(priv->pdev_mux[i])) { - err = PTR_ERR(priv->pdev_mux[i]); - goto fail_platform_mux_register; -@@ -5259,11 +5257,10 @@ static int __init mlxplat_init(void) - /* Add FAN driver. */ - if (mlxplat_fan) { - mlxplat_fan->regmap = priv->regmap; -- priv->pdev_fan = platform_device_register_resndata( -- &mlxplat_dev->dev, "mlxreg-fan", -- PLATFORM_DEVID_NONE, NULL, 0, -- mlxplat_fan, -- sizeof(*mlxplat_fan)); -+ priv->pdev_fan = platform_device_register_resndata(&mlxplat_dev->dev, "mlxreg-fan", -+ PLATFORM_DEVID_NONE, NULL, 0, -+ mlxplat_fan, -+ sizeof(*mlxplat_fan)); - if (IS_ERR(priv->pdev_fan)) { - err = PTR_ERR(priv->pdev_fan); - goto fail_platform_io_regs_register; -@@ -5277,11 +5274,10 @@ static int __init mlxplat_init(void) - for (j = 0; j < MLXPLAT_CPLD_WD_MAX_DEVS; j++) { - if (mlxplat_wd_data[j]) { - mlxplat_wd_data[j]->regmap = priv->regmap; -- priv->pdev_wd[j] = platform_device_register_resndata( -- &mlxplat_dev->dev, "mlx-wdt", -- j, NULL, 0, -- mlxplat_wd_data[j], -- sizeof(*mlxplat_wd_data[j])); -+ priv->pdev_wd[j] = -+ platform_device_register_resndata(&mlxplat_dev->dev, "mlx-wdt", j, -+ NULL, 0, mlxplat_wd_data[j], -+ sizeof(*mlxplat_wd_data[j])); - if (IS_ERR(priv->pdev_wd[j])) { - err = PTR_ERR(priv->pdev_wd[j]); - goto fail_platform_wd_register; --- -2.20.1 - diff --git a/patch/0159-mlx-platform-Add-support-for-systems-equipped-with-t.patch b/patch/0159-mlx-platform-Add-support-for-systems-equipped-with-t.patch deleted file mode 100644 index 96046a821a79..000000000000 --- a/patch/0159-mlx-platform-Add-support-for-systems-equipped-with-t.patch +++ /dev/null @@ -1,155 +0,0 @@ -From b04a280dbab5d36d0e3ee87f99ef21906a9238c5 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Wed, 26 Jan 2022 17:16:26 +0200 -Subject: [PATCH backport 5.10 159/182] mlx-platform: Add support for systems - equipped with two ASICs - -Motivation is to support new systems equipped with two ASICs. - -Extend driver with: -- The second ASIC health event. -- Per ASIC reset control, triggering reset of ASIC internal resources - and restarting ASIC initialization flow. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Oleksandr Shamray ---- - drivers/platform/x86/mlx-platform.c | 52 ++++++++++++++++++++++++++++- - 1 file changed, 51 insertions(+), 1 deletion(-) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index a74fcd9d184d..cbe9eab3467f 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -34,6 +34,7 @@ - #define MLXPLAT_CPLD_LPC_REG_CPLD3_PN1_OFFSET 0x09 - #define MLXPLAT_CPLD_LPC_REG_CPLD4_PN_OFFSET 0x0a - #define MLXPLAT_CPLD_LPC_REG_CPLD4_PN1_OFFSET 0x0b -+#define MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET 0x19 - #define MLXPLAT_CPLD_LPC_REG_RESET_GP4_OFFSET 0x1c - #define MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET 0x1d - #define MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET 0x1e -@@ -69,6 +70,9 @@ - #define MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET 0x50 - #define MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET 0x51 - #define MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET 0x52 -+#define MLXPLAT_CPLD_LPC_REG_ASIC2_HEALTH_OFFSET 0x53 -+#define MLXPLAT_CPLD_LPC_REG_ASIC2_EVENT_OFFSET 0x54 -+#define MLXPLAT_CPLD_LPC_REG_ASIC2_MASK_OFFSET 0x55 - #define MLXPLAT_CPLD_LPC_REG_AGGRLC_OFFSET 0x56 - #define MLXPLAT_CPLD_LPC_REG_AGGRLC_MASK_OFFSET 0x57 - #define MLXPLAT_CPLD_LPC_REG_PSU_OFFSET 0x58 -@@ -193,6 +197,7 @@ - MLXPLAT_CPLD_AGGR_MASK_LC_ACT | \ - MLXPLAT_CPLD_AGGR_MASK_LC_SDWN) - #define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW 0xc1 -+#define MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2 BIT(2) - #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C BIT(6) - #define MLXPLAT_CPLD_PSU_MASK GENMASK(1, 0) - #define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0) -@@ -589,6 +594,15 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_asic_items_data[] = { - }, - }; - -+static struct mlxreg_core_data mlxplat_mlxcpld_default_asic2_items_data[] = { -+ { -+ .label = "asic2", -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC2_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+}; -+ - static struct mlxreg_core_item mlxplat_mlxcpld_default_items[] = { - { - .data = mlxplat_mlxcpld_default_psu_items_data, -@@ -1252,6 +1266,15 @@ static struct mlxreg_core_item mlxplat_mlxcpld_ext_items[] = { - .inversed = 0, - .health = true, - }, -+ { -+ .data = mlxplat_mlxcpld_default_asic2_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC2_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_default_asic2_items_data), -+ .inversed = 0, -+ .health = true, -+ } - }; - - static -@@ -1261,7 +1284,7 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_ext_data = { - .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, - .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF | MLXPLAT_CPLD_AGGR_MASK_COMEX, - .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, -- .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, -+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW | MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2, - }; - - static struct mlxreg_core_data mlxplat_mlxcpld_modular_pwr_items_data[] = { -@@ -3075,6 +3098,18 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "asic_reset", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0644, -+ }, -+ { -+ .label = "asic2_reset", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_GP2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, - { - .label = "reset_long_pb", - .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -@@ -3214,6 +3249,13 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .bit = 1, - .mode = 0444, - }, -+ { -+ .label = "asic2_health", -+ .reg = MLXPLAT_CPLD_LPC_REG_ASIC2_HEALTH_OFFSET, -+ .mask = MLXPLAT_CPLD_ASIC_MASK, -+ .bit = 1, -+ .mode = 0444, -+ }, - { - .label = "fan_dir", - .reg = MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION, -@@ -4254,6 +4296,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PWR_EVENT_OFFSET: -@@ -4346,6 +4390,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_HEALTH_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET: -@@ -4473,6 +4520,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_HEALTH_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_ASIC2_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_PSU_MASK_OFFSET: --- -2.20.1 - diff --git a/patch/0160-platform-mellanox-Introduce-support-for-COMe-managem.patch b/patch/0160-platform-mellanox-Introduce-support-for-COMe-managem.patch deleted file mode 100644 index 9e7905d538b0..000000000000 --- a/patch/0160-platform-mellanox-Introduce-support-for-COMe-managem.patch +++ /dev/null @@ -1,357 +0,0 @@ -From fd01b3306efc0e7a73e3b339ac4ae80678743b2a Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Wed, 26 Jan 2022 20:34:32 +0200 -Subject: [PATCH backport 5.10 160/182] platform: mellanox: Introduce support - for COMe management module for chassis - -The system is built for artificial intelligence and accelerated -analytics applications. Chassis is offered to cloud service -providers and OEMs. - -Driver is extended to support new COMe NVSwitch management module. - -Signed-off-by: Vadim Pasternak -Reviewed-by: Oleksandr Shamray ---- - drivers/platform/x86/mlx-platform.c | 269 ++++++++++++++++++++++++++++ - 1 file changed, 269 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index cbe9eab3467f..e06fd1725beb 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -67,6 +67,9 @@ - #define MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET 0x43 - #define MLXPLAT_CPLD_LPC_REG_AGGRCX_OFFSET 0x44 - #define MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET 0x45 -+#define MLXPLAT_CPLD_LPC_REG_GWP_OFFSET 0x4a -+#define MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET 0x4b -+#define MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET 0x4c - #define MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET 0x50 - #define MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET 0x51 - #define MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET 0x52 -@@ -210,6 +213,7 @@ - #define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4) - #define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0) - #define MLXPLAT_CPLD_VOLTREG_UPD_MASK GENMASK(5, 4) -+#define MLXPLAT_CPLD_GWP_MASK GENMASK(0, 0) - #define MLXPLAT_CPLD_I2C_CAP_BIT 0x04 - #define MLXPLAT_CPLD_I2C_CAP_MASK GENMASK(5, MLXPLAT_CPLD_I2C_CAP_BIT) - -@@ -2128,6 +2132,38 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_modular_data = { - .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, - }; - -+/* Platform hotplug for chassis blade systems family data */ -+static struct mlxreg_core_data mlxplat_mlxcpld_global_wp_items_data[] = { -+ { -+ .label = "global_wp_grant", -+ .reg = MLXPLAT_CPLD_LPC_REG_GWP_OFFSET, -+ .mask = MLXPLAT_CPLD_GWP_MASK, -+ .hpdev.nr = MLXPLAT_CPLD_NR_NONE, -+ }, -+}; -+ -+static struct mlxreg_core_item mlxplat_mlxcpld_chassis_blade_items[] = { -+ { -+ .data = mlxplat_mlxcpld_global_wp_items_data, -+ .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF, -+ .reg = MLXPLAT_CPLD_LPC_REG_GWP_OFFSET, -+ .mask = MLXPLAT_CPLD_GWP_MASK, -+ .count = ARRAY_SIZE(mlxplat_mlxcpld_global_wp_items_data), -+ .inversed = 0, -+ .health = false, -+ }, -+}; -+ -+static -+struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_chassis_blade_data = { -+ .items = mlxplat_mlxcpld_chassis_blade_items, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_items), -+ .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET, -+ .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX, -+ .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET, -+ .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, -+}; -+ - /* Platform led default data */ - static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = { - { -@@ -3808,6 +3844,203 @@ static struct mlxreg_core_platform_data mlxplat_modular_regs_io_data = { - .counter = ARRAY_SIZE(mlxplat_mlxcpld_modular_regs_io_data), - }; - -+/* Platform register access for chassis blade systems family data */ -+static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = { -+ { -+ .label = "cpld1_version", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "cpld1_pn", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_PN_OFFSET, -+ .bit = GENMASK(15, 0), -+ .mode = 0444, -+ .regnum = 2, -+ }, -+ { -+ .label = "cpld1_version_min", -+ .reg = MLXPLAT_CPLD_LPC_REG_CPLD1_MVER_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_aux_pwr_or_ref", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_from_comex", -+ .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_comex_pwr_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_platform", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_soc", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_comex_wd", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_voltmon_upgrade_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_system", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(1), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_sw_pwr_off", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_comex_thermal", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_reload_bios", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "reset_ac_pwr_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, -+ }, -+ { -+ .label = "pwr_cycle", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(2), -+ .mode = 0200, -+ }, -+ { -+ .label = "pwr_down", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0200, -+ }, -+ { -+ .label = "global_wp_request", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0644, -+ }, -+ { -+ .label = "jtag_enable", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0644, -+ }, -+ { -+ .label = "comm_chnl_ready", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP2_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0200, -+ }, -+ { -+ .label = "bios_safe_mode", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_active_image", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(5), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_auth_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(6), -+ .mode = 0444, -+ }, -+ { -+ .label = "bios_upgrade_fail", -+ .reg = MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(7), -+ .mode = 0444, -+ }, -+ { -+ .label = "voltreg_update_status", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET, -+ .mask = MLXPLAT_CPLD_VOLTREG_UPD_MASK, -+ .bit = 5, -+ .mode = 0444, -+ }, -+ { -+ .label = "vpd_wp", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(3), -+ .mode = 0644, -+ }, -+ { -+ .label = "pcie_asic_reset_dis", -+ .reg = MLXPLAT_CPLD_LPC_REG_GP0_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(4), -+ .mode = 0644, -+ }, -+ { -+ .label = "global_wp_response", -+ .reg = MLXPLAT_CPLD_LPC_REG_GWP_OFFSET, -+ .mask = GENMASK(7, 0) & ~BIT(0), -+ .mode = 0444, -+ }, -+ { -+ .label = "config1", -+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "config2", -+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+ { -+ .label = "ufm_version", -+ .reg = MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_chassis_blade_regs_io_data = { -+ .data = mlxplat_mlxcpld_chassis_blade_regs_io_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_chassis_blade_regs_io_data), -+}; -+ - /* Platform FAN default */ - static struct mlxreg_core_data mlxplat_mlxcpld_default_fan_data[] = { - { -@@ -4294,6 +4527,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC2_EVENT_OFFSET: -@@ -4387,6 +4622,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRCX_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: -@@ -4517,6 +4755,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_AGGRCO_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRCX_OFFSET: - case MLXPLAT_CPLD_LPC_REG_AGGRCX_MASK_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_EVENT_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_GWP_MASK_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_HEALTH_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_EVENT_OFFSET: - case MLXPLAT_CPLD_LPC_REG_ASIC_MASK_OFFSET: -@@ -4949,6 +5190,28 @@ static int __init mlxplat_dmi_modular_matched(const struct dmi_system_id *dmi) - return 1; - } - -+static int __init mlxplat_dmi_chassis_blade_matched(const struct dmi_system_id *dmi) -+{ -+ int i; -+ -+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; -+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data); -+ mlxplat_mux_data = mlxplat_default_mux_data; -+ mlxplat_hotplug = &mlxplat_mlxcpld_chassis_blade_data; -+ mlxplat_hotplug->deferred_nr = -+ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; -+ for (i = 0; i < mlxplat_mux_num; i++) { -+ mlxplat_mux_data[i].values = mlxplat_msn21xx_channels; -+ mlxplat_mux_data[i].n_values = -+ ARRAY_SIZE(mlxplat_msn21xx_channels); -+ } -+ mlxplat_regs_io = &mlxplat_chassis_blade_regs_io_data; -+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; -+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng400; -+ -+ return 1; -+} -+ - static int __init mlxplat_dmi_qmb8700_matched(const struct dmi_system_id *dmi) - { - int i; -@@ -5044,6 +5307,12 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - DMI_MATCH(DMI_BOARD_NAME, "VMOD0011"), - }, - }, -+ { -+ .callback = mlxplat_dmi_chassis_blade_matched, -+ .matches = { -+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0015"), -+ }, -+ }, - { - .callback = mlxplat_dmi_msn274x_matched, - .matches = { --- -2.20.1 - diff --git a/patch/0161-platform-x86-mlx-platform-Add-support-for-new-system.patch b/patch/0161-platform-x86-mlx-platform-Add-support-for-new-system.patch deleted file mode 100644 index ddb5b0377197..000000000000 --- a/patch/0161-platform-x86-mlx-platform-Add-support-for-new-system.patch +++ /dev/null @@ -1,97 +0,0 @@ -From a38f9cb27bde5616bc71899841db733e305bf6c3 Mon Sep 17 00:00:00 2001 -From: Felix Radensky -Date: Sun, 24 Oct 2021 16:26:40 +0000 -Subject: [PATCH backport 5.10 161/182] platform/x86: mlx-platform: Add support - for new system XH3000 - -Add support for new system type XH3000, which is a water cooling -Ethernet switch blade equipped with 32x200G Ethernet ports. - -The system is recognized by "DMI_BOARD_NAME" and "DMI_PRODUCT_SKU" matches, -when these fields are set to "VMOD0005" and "HI139" respectively. - -Signed-off-by: Felix Radensky -Reviewed-by: Vadim Pasternak ---- - drivers/platform/x86/mlx-platform.c | 51 +++++++++++++++++++++++++++++ - 1 file changed, 51 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index e06fd1725beb..2b1441a8786f 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -2262,6 +2262,25 @@ static struct mlxreg_core_platform_data mlxplat_default_led_wc_data = { - .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_wc_data), - }; - -+/* Platform led default data for water cooling Ethernet switch blade */ -+static struct mlxreg_core_data mlxplat_mlxcpld_default_led_eth_wc_blade_data[] = { -+ { -+ .label = "status:green", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK, -+ }, -+ { -+ .label = "status:red", -+ .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET, -+ .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK -+ }, -+}; -+ -+static struct mlxreg_core_platform_data mlxplat_default_led_eth_wc_blade_data = { -+ .data = mlxplat_mlxcpld_default_led_eth_wc_blade_data, -+ .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_eth_wc_blade_data), -+}; -+ - /* Platform led MSN21xx system family data */ - static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data[] = { - { -@@ -5028,6 +5047,31 @@ static int __init mlxplat_dmi_default_wc_matched(const struct dmi_system_id *dmi - return 1; - } - -+static int __init mlxplat_dmi_default_eth_wc_blade_matched(const struct dmi_system_id *dmi) -+{ -+ int i; -+ -+ mlxplat_max_adap_num = MLXPLAT_CPLD_MAX_PHYS_ADAPTER_NUM; -+ mlxplat_mux_num = ARRAY_SIZE(mlxplat_default_mux_data); -+ mlxplat_mux_data = mlxplat_default_mux_data; -+ for (i = 0; i < mlxplat_mux_num; i++) { -+ mlxplat_mux_data[i].values = mlxplat_msn21xx_channels; -+ mlxplat_mux_data[i].n_values = -+ ARRAY_SIZE(mlxplat_msn21xx_channels); -+ } -+ mlxplat_hotplug = &mlxplat_mlxcpld_default_wc_data; -+ mlxplat_hotplug->deferred_nr = -+ mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; -+ mlxplat_led = &mlxplat_default_led_eth_wc_blade_data; -+ mlxplat_regs_io = &mlxplat_default_ng_regs_io_data; -+ for (i = 0; i < ARRAY_SIZE(mlxplat_mlxcpld_wd_set_type2); i++) -+ mlxplat_wd_data[i] = &mlxplat_mlxcpld_wd_set_type2[i]; -+ mlxplat_i2c = &mlxplat_mlxcpld_i2c_ng_data; -+ mlxplat_regmap_config = &mlxplat_mlxcpld_regmap_config_ng; -+ -+ return 1; -+} -+ - static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi) - { - int i; -@@ -5277,6 +5321,13 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { - DMI_MATCH(DMI_PRODUCT_NAME, "MQM8700"), - }, - }, -+ { -+ .callback = mlxplat_dmi_default_eth_wc_blade_matched, -+ .matches = { -+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0005"), -+ DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "HI139"), -+ }, -+ }, - { - .callback = mlxplat_dmi_qmb7xx_matched, - .matches = { --- -2.20.1 - diff --git a/patch/0162-platform-mellanox-Add-COME-board-revision-register.patch b/patch/0162-platform-mellanox-Add-COME-board-revision-register.patch deleted file mode 100644 index bdc01da8ac20..000000000000 --- a/patch/0162-platform-mellanox-Add-COME-board-revision-register.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 267f4ad4ee5f52ecb3a7d3631d9f5a08a3adecef Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Wed, 6 Jul 2022 17:26:41 +0300 -Subject: [PATCH backport 5.10 162/182] platform: mellanox: Add COME board - revision register - -Add to CPLD COME board configuration register for getting a board -revision. The value of this register is pushed by hardware through -GPIO pins. -The purpose of it is to expose some minor BOM changes. - -Signed-off-by: Vadim Pasternak ---- - drivers/platform/x86/mlx-platform.c | 21 +++++++++++++++++++++ - 1 file changed, 21 insertions(+) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 2b1441a8786f..1d0c13c653b3 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -150,6 +150,7 @@ - #define MLXPLAT_CPLD_LPC_REG_SLOT_QTY_OFFSET 0xfa - #define MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET 0xfb - #define MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET 0xfc -+#define MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET 0xfd - #define MLXPLAT_CPLD_LPC_IO_RANGE 0x100 - #define MLXPLAT_CPLD_LPC_I2C_CH1_OFF 0xdb - #define MLXPLAT_CPLD_LPC_I2C_CH2_OFF 0xda -@@ -3372,6 +3373,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "config3", -+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, - { - .label = "ufm_version", - .reg = MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET, -@@ -3850,6 +3857,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_modular_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "config3", -+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, - { - .label = "ufm_version", - .reg = MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET, -@@ -4047,6 +4060,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_chassis_blade_regs_io_data[] = { - .bit = GENMASK(7, 0), - .mode = 0444, - }, -+ { -+ .label = "config3", -+ .reg = MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET, -+ .bit = GENMASK(7, 0), -+ .mode = 0444, -+ }, - { - .label = "ufm_version", - .reg = MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET, -@@ -4724,6 +4743,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_SLOT_QTY_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: - return true; - } -@@ -4851,6 +4871,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) - case MLXPLAT_CPLD_LPC_REG_SLOT_QTY_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG1_OFFSET: - case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET: -+ case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET: - case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET: - return true; - } --- -2.20.1 - diff --git a/patch/0164-hwmon-jc42-Add-support-for-Seiko-Instruments-S-34TS0.patch b/patch/0164-hwmon-jc42-Add-support-for-Seiko-Instruments-S-34TS0.patch deleted file mode 100644 index 1d5e6dd0986f..000000000000 --- a/patch/0164-hwmon-jc42-Add-support-for-Seiko-Instruments-S-34TS0.patch +++ /dev/null @@ -1,48 +0,0 @@ -From c1af33181092b2b2fc53ee5bd10f9ebcdcea1faf Mon Sep 17 00:00:00 2001 -From: Oleksandr Shamray -Date: Tue, 22 Feb 2022 18:55:15 +0200 -Subject: [PATCH backport 5.10 164/182] hwmon: (jc42) Add support for Seiko - Instruments S-34TS04A - -S-34TS04A is a JC42.4 compatible temperature sensor from Seiko Instruments. - -Signed-off-by: Oleksandr Shamray -Reviewed-by: Vadim Pasternak ---- - drivers/hwmon/jc42.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/drivers/hwmon/jc42.c b/drivers/hwmon/jc42.c -index 4a03d010ec5a..bda2c9fb1f68 100644 ---- a/drivers/hwmon/jc42.c -+++ b/drivers/hwmon/jc42.c -@@ -63,6 +63,7 @@ static const unsigned short normal_i2c[] = { - #define STM_MANID 0x104a /* ST Microelectronics */ - #define GT_MANID 0x1c68 /* Giantec */ - #define GT_MANID2 0x132d /* Giantec, 2nd mfg ID */ -+#define SI_MANID 0x1c85 /* Seiko Instruments */ - - /* SMBUS register */ - #define SMBUS_STMOUT BIT(7) /* SMBus time-out, active low */ -@@ -153,6 +154,10 @@ static const unsigned short normal_i2c[] = { - #define STTS3000_DEVID 0x0200 - #define STTS3000_DEVID_MASK 0xffff - -+/* Seiko Instruments */ -+#define S34TS04A_DEVID 0x2221 -+#define S34TS04A_DEVID_MASK 0xffff -+ - static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 }; - - struct jc42_chips { -@@ -182,6 +187,7 @@ static struct jc42_chips jc42_chips[] = { - { ONS_MANID, CAT34TS02C_DEVID, CAT34TS02C_DEVID_MASK }, - { ONS_MANID, CAT34TS04_DEVID, CAT34TS04_DEVID_MASK }, - { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK }, -+ { SI_MANID, S34TS04A_DEVID, S34TS04A_DEVID_MASK }, - { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK }, - { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK }, - { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK }, --- -2.20.1 - diff --git a/patch/0165-platform-mellanox-mlxreg-io-Add-locking-for-io-opera.patch b/patch/0165-platform-mellanox-mlxreg-io-Add-locking-for-io-opera.patch deleted file mode 100644 index 494b1810fda6..000000000000 --- a/patch/0165-platform-mellanox-mlxreg-io-Add-locking-for-io-opera.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 736f644255c56d2adf32b694d0fd83e2ab6d2d77 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 7 Feb 2022 21:22:04 +0200 -Subject: [PATCH backport 5.10 165/182] platform/mellanox: mlxreg-io: Add - locking for io operations - -Add lock to protect user read/write access to the registers. - -Signed-off-by: Vadim Pasternak ---- - drivers/platform/mellanox/mlxreg-io.c | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - -diff --git a/drivers/platform/mellanox/mlxreg-io.c b/drivers/platform/mellanox/mlxreg-io.c -index 2c2686d5c2fc..ddc08abf398c 100644 ---- a/drivers/platform/mellanox/mlxreg-io.c -+++ b/drivers/platform/mellanox/mlxreg-io.c -@@ -31,6 +31,7 @@ - * @group: sysfs attribute group; - * @groups: list of sysfs attribute group for hwmon registration; - * @regsize: size of a register value; -+ * @io_lock: user access locking; - */ - struct mlxreg_io_priv_data { - struct platform_device *pdev; -@@ -41,6 +42,7 @@ struct mlxreg_io_priv_data { - struct attribute_group group; - const struct attribute_group *groups[2]; - int regsize; -+ struct mutex io_lock; /* Protects user access. */ - }; - - static int -@@ -116,14 +118,19 @@ mlxreg_io_attr_show(struct device *dev, struct device_attribute *attr, - u32 regval = 0; - int ret; - -+ mutex_lock(&priv->io_lock); -+ - ret = mlxreg_io_get_reg(priv->pdata->regmap, data, 0, true, - priv->regsize, ®val); - if (ret) - goto access_error; - -+ mutex_unlock(&priv->io_lock); -+ - return sprintf(buf, "%u\n", regval); - - access_error: -+ mutex_unlock(&priv->io_lock); - return ret; - } - -@@ -145,6 +152,8 @@ mlxreg_io_attr_store(struct device *dev, struct device_attribute *attr, - if (ret) - return ret; - -+ mutex_lock(&priv->io_lock); -+ - ret = mlxreg_io_get_reg(priv->pdata->regmap, data, input_val, false, - priv->regsize, ®val); - if (ret) -@@ -154,9 +163,12 @@ mlxreg_io_attr_store(struct device *dev, struct device_attribute *attr, - if (ret) - goto access_error; - -+ mutex_unlock(&priv->io_lock); -+ - return len; - - access_error: -+ mutex_unlock(&priv->io_lock); - dev_err(&priv->pdev->dev, "Bus access error\n"); - return ret; - } -@@ -246,16 +258,27 @@ static int mlxreg_io_probe(struct platform_device *pdev) - return PTR_ERR(priv->hwmon); - } - -+ mutex_init(&priv->io_lock); - dev_set_drvdata(&pdev->dev, priv); - - return 0; - } - -+static int mlxreg_io_remove(struct platform_device *pdev) -+{ -+ struct mlxreg_io_priv_data *priv = dev_get_drvdata(&pdev->dev); -+ -+ mutex_destroy(&priv->io_lock); -+ -+ return 0; -+} -+ - static struct platform_driver mlxreg_io_driver = { - .driver = { - .name = "mlxreg-io", - }, - .probe = mlxreg_io_probe, -+ .remove = mlxreg_io_remove, - }; - - module_platform_driver(mlxreg_io_driver); --- -2.20.1 - diff --git a/patch/0170-i2c-mlxcpld-Fix-register-setting-for-400KHz-frequenc.patch b/patch/0170-i2c-mlxcpld-Fix-register-setting-for-400KHz-frequenc.patch deleted file mode 100644 index 64e3412f9f9b..000000000000 --- a/patch/0170-i2c-mlxcpld-Fix-register-setting-for-400KHz-frequenc.patch +++ /dev/null @@ -1,30 +0,0 @@ -From d0aec4e04bda89b1183f7568cc64519cda380da8 Mon Sep 17 00:00:00 2001 -From: Vadim Pasternak -Date: Mon, 13 Jun 2022 20:51:35 +0300 -Subject: [PATCH backport 5.10 170/182] i2c: mlxcpld: Fix register setting for - 400KHz frequency - -Fix setting of 'Half Cycle' register for 400KHz frequency. - -Fixes: fa1049135c15 ("i2c: mlxcpld: Modify register setting for 400KHz frequency") -Signed-off-by: Vadim Pasternak ---- - drivers/i2c/busses/i2c-mlxcpld.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c -index 363ea9fd66c4..72fcfb17dd67 100644 ---- a/drivers/i2c/busses/i2c-mlxcpld.c -+++ b/drivers/i2c/busses/i2c-mlxcpld.c -@@ -49,7 +49,7 @@ - #define MLXCPLD_LPCI2C_NACK_IND 2 - - #define MLXCPLD_I2C_FREQ_1000KHZ_SET 0x04 --#define MLXCPLD_I2C_FREQ_400KHZ_SET 0x0c -+#define MLXCPLD_I2C_FREQ_400KHZ_SET 0x0e - #define MLXCPLD_I2C_FREQ_100KHZ_SET 0x42 - - enum mlxcpld_i2c_frequency { --- -2.20.1 - diff --git a/patch/0173-mlxsw-core-Add-support-for-OSFP-transceiver-modules.patch b/patch/0173-mlxsw-core-Add-support-for-OSFP-transceiver-modules.patch deleted file mode 100644 index 579bb8455131..000000000000 --- a/patch/0173-mlxsw-core-Add-support-for-OSFP-transceiver-modules.patch +++ /dev/null @@ -1,59 +0,0 @@ -From f4a99113cce99f7c41e753ff1097120bc33b6951 Mon Sep 17 00:00:00 2001 -From: Danielle Ratson -Date: Tue, 22 Feb 2022 19:17:03 +0200 -Subject: [PATCH backport 5.10 173/182] mlxsw: core: Add support for OSFP - transceiver modules - -The driver can already dump the EEPROM contents of QSFP-DD transceiver -modules via its ethtool_ops::get_module_info() and -ethtool_ops::get_module_eeprom() callbacks. - -Add support for OSFP transceiver modules by adding their SFF-8024 -Identifier Value (0x19). - -This is required for future NVIDIA Spectrum-4 based systems that will be -equipped with OSFP transceivers. - -Signed-off-by: Danielle Ratson -Signed-off-by: Ido Schimmel -Signed-off-by: David S. Miller ---- - drivers/net/ethernet/mellanox/mlxsw/core_env.c | 2 ++ - drivers/net/ethernet/mellanox/mlxsw/reg.h | 1 + - 2 files changed, 3 insertions(+) - -diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -index 98f7cf672d9e..f9c770eec8f8 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c -+++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c -@@ -61,6 +61,7 @@ mlxsw_env_validate_cable_ident(struct mlxsw_core *core, u8 slot_index, int id, - *qsfp = true; - break; - case MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_QSFP_DD: -+ case MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_OSFP: - *qsfp = true; - *cmis = true; - break; -@@ -275,6 +276,7 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, u8 slot_index, - modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN / 2; - break; - case MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_QSFP_DD: -+ case MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_OSFP: - /* Use SFF_8636 as base type. ethtool should recognize specific - * type through the identifier value. - */ -diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h -index 7b71e9ae3d51..f8c828e057c8 100644 ---- a/drivers/net/ethernet/mellanox/mlxsw/reg.h -+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h -@@ -8950,6 +8950,7 @@ enum mlxsw_reg_mcia_eeprom_module_info_id { - MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_QSFP_PLUS = 0x0D, - MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_QSFP28 = 0x11, - MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_QSFP_DD = 0x18, -+ MLXSW_REG_MCIA_EEPROM_MODULE_INFO_ID_OSFP = 0x19, - }; - - enum mlxsw_reg_mcia_eeprom_module_info { --- -2.20.1 - diff --git a/patch/0175-hwmon-pmbus-Add-support-for-Infineon-Digital-Multi-p.patch b/patch/0175-hwmon-pmbus-Add-support-for-Infineon-Digital-Multi-p.patch deleted file mode 100644 index 7718796dbb45..000000000000 --- a/patch/0175-hwmon-pmbus-Add-support-for-Infineon-Digital-Multi-p.patch +++ /dev/null @@ -1,271 +0,0 @@ -From de8198c01c722ac99814d7eaa81d4b63044684e6 Mon Sep 17 00:00:00 2001 -From: "Greg.Schwendimann@infineon.com" -Date: Wed, 27 Apr 2022 18:40:12 +0000 -Subject: [PATCH backport 5.10 175/182] hwmon: (pmbus) Add support for Infineon - Digital Multi-phase xdp152 family controllers - -Add support for devices XDPE152C4, XDPE12584. - -Signed-off-by: Greg Schwendimann -Link: https://lore.kernel.org/r/5e6d50e9b28140158f339b0de343eea4@infineon.com -Signed-off-by: Guenter Roeck ---- - Documentation/hwmon/index.rst | 1 + - Documentation/hwmon/xdpe152c4.rst | 118 ++++++++++++++++++++++++++++++ - drivers/hwmon/pmbus/Kconfig | 9 +++ - drivers/hwmon/pmbus/Makefile | 1 + - drivers/hwmon/pmbus/xdpe152c4.c | 75 +++++++++++++++++++ - 5 files changed, 204 insertions(+) - create mode 100644 Documentation/hwmon/xdpe152c4.rst - create mode 100644 drivers/hwmon/pmbus/xdpe152c4.c - -diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst -index b797db738225..cd280009709c 100644 ---- a/Documentation/hwmon/index.rst -+++ b/Documentation/hwmon/index.rst -@@ -194,6 +194,7 @@ Hardware Monitoring Kernel Drivers - wm8350 - xgene-hwmon - xdpe12284 -+ xdpe152c4 - zl6100 - - .. only:: subproject and html -diff --git a/Documentation/hwmon/xdpe152c4.rst b/Documentation/hwmon/xdpe152c4.rst -new file mode 100644 -index 000000000000..ab92c32d4d69 ---- /dev/null -+++ b/Documentation/hwmon/xdpe152c4.rst -@@ -0,0 +1,118 @@ -+.. SPDX-License-Identifier: GPL-2.0 -+ -+Kernel driver xdpe152 -+===================== -+ -+Supported chips: -+ -+ * Infineon XDPE152C4 -+ -+ Prefix: 'xdpe152c4' -+ -+ * Infineon XDPE15284 -+ -+ Prefix: 'xdpe15284' -+ -+Authors: -+ -+ Greg Schwendimann -+ -+Description -+----------- -+ -+This driver implements support for Infineon Digital Multi-phase Controller -+XDPE152C4 and XDPE15284 dual loop voltage regulators. -+The devices are compliant with: -+ -+- Intel VR13, VR13HC and VR14 rev 1.86 -+ converter specification. -+- Intel SVID rev 1.93. protocol. -+- PMBus rev 1.3.1 interface. -+ -+Devices support linear format for reading input and output voltage, input -+and output current, input and output power and temperature. -+ -+Devices support two pages for telemetry. -+ -+The driver provides for current: input, maximum and critical thresholds -+and maximum and critical alarms. Low Critical thresholds and Low critical alarm are -+supported only for current output. -+The driver exports the following attributes for via the sysfs files, where -+indexes 1, 2 are for "iin" and 3, 4 for "iout": -+ -+**curr[1-4]_crit** -+ -+**curr[1-4]_crit_alarm** -+ -+**curr[1-4]_input** -+ -+**curr[1-4]_label** -+ -+**curr[1-4]_max** -+ -+**curr[1-4]_max_alarm** -+ -+**curr[3-4]_lcrit** -+ -+**curr[3-4]_lcrit_alarm** -+ -+**curr[3-4]_rated_max** -+ -+The driver provides for voltage: input, critical and low critical thresholds -+and critical and low critical alarms. -+The driver exports the following attributes for via the sysfs files, where -+indexes 1, 2 are for "vin" and 3, 4 for "vout": -+ -+**in[1-4]_min** -+ -+**in[1-4]_crit** -+ -+**in[1-4_crit_alarm** -+ -+**in[1-4]_input** -+ -+**in[1-4]_label** -+ -+**in[1-4]_max** -+ -+**in[1-4]_max_alarm** -+ -+**in[1-4]_min** -+ -+**in[1-4]_min_alarm** -+ -+**in[3-4]_lcrit** -+ -+**in[3-4]_lcrit_alarm** -+ -+**in[3-4]_rated_max** -+ -+**in[3-4]_rated_min** -+ -+The driver provides for power: input and alarms. -+The driver exports the following attributes for via the sysfs files, where -+indexes 1, 2 are for "pin" and 3, 4 for "pout": -+ -+**power[1-2]_alarm** -+ -+**power[1-4]_input** -+ -+**power[1-4]_label** -+ -+**power[1-4]_max** -+ -+**power[1-4]_rated_max** -+ -+The driver provides for temperature: input, maximum and critical thresholds -+and maximum and critical alarms. -+The driver exports the following attributes for via the sysfs files: -+ -+**temp[1-2]_crit** -+ -+**temp[1-2]_crit_alarm** -+ -+**temp[1-2]_input** -+ -+**temp[1-2]_max** -+ -+**temp[1-2]_max_alarm** -diff --git a/drivers/hwmon/pmbus/Kconfig b/drivers/hwmon/pmbus/Kconfig -index 41ff2bb28f0b..ee94fcfde685 100644 ---- a/drivers/hwmon/pmbus/Kconfig -+++ b/drivers/hwmon/pmbus/Kconfig -@@ -276,6 +276,15 @@ config SENSORS_UCD9200 - This driver can also be built as a module. If so, the module will - be called ucd9200. - -+config SENSORS_XDPE152 -+ tristate "Infineon XDPE152 family" -+ help -+ If you say yes here you get hardware monitoring support for Infineon -+ XDPE15284, XDPE152C4, device. -+ -+ This driver can also be built as a module. If so, the module will -+ be called xdpe152c4. -+ - config SENSORS_XDPE122 - tristate "Infineon XDPE122 family" - help -diff --git a/drivers/hwmon/pmbus/Makefile b/drivers/hwmon/pmbus/Makefile -index 8861a1b71acb..b1b9a3c8b616 100644 ---- a/drivers/hwmon/pmbus/Makefile -+++ b/drivers/hwmon/pmbus/Makefile -@@ -32,4 +32,5 @@ obj-$(CONFIG_SENSORS_TPS53679) += tps53679.o - obj-$(CONFIG_SENSORS_UCD9000) += ucd9000.o - obj-$(CONFIG_SENSORS_UCD9200) += ucd9200.o - obj-$(CONFIG_SENSORS_XDPE122) += xdpe12284.o -+obj-$(CONFIG_SENSORS_XDPE152) += xdpe152c4.o - obj-$(CONFIG_SENSORS_ZL6100) += zl6100.o -diff --git a/drivers/hwmon/pmbus/xdpe152c4.c b/drivers/hwmon/pmbus/xdpe152c4.c -new file mode 100644 -index 000000000000..b8a36ef73e45 ---- /dev/null -+++ b/drivers/hwmon/pmbus/xdpe152c4.c -@@ -0,0 +1,75 @@ -+// SPDX-License-Identifier: GPL-2.0-or-later -+/* -+ * Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers -+ * -+ * Copyright (c) 2022 Infineon Technologies. All rights reserved. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include "pmbus.h" -+ -+#define XDPE152_PAGE_NUM 2 -+ -+static struct pmbus_driver_info xdpe152_info = { -+ .pages = XDPE152_PAGE_NUM, -+ .format[PSC_VOLTAGE_IN] = linear, -+ .format[PSC_VOLTAGE_OUT] = linear, -+ .format[PSC_TEMPERATURE] = linear, -+ .format[PSC_CURRENT_IN] = linear, -+ .format[PSC_CURRENT_OUT] = linear, -+ .format[PSC_POWER] = linear, -+ .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | -+ PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | -+ PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2 | PMBUS_HAVE_STATUS_TEMP | -+ PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, -+ .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | -+ PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | -+ PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT, -+}; -+ -+static int xdpe152_probe(struct i2c_client *client) -+{ -+ struct pmbus_driver_info *info; -+ -+ info = devm_kmemdup(&client->dev, &xdpe152_info, sizeof(*info), -+ GFP_KERNEL); -+ if (!info) -+ return -ENOMEM; -+ -+ return pmbus_do_probe(client, info); -+} -+ -+static const struct i2c_device_id xdpe152_id[] = { -+ {"xdpe152c4", 0}, -+ {"xdpe15284", 0}, -+ {} -+}; -+ -+MODULE_DEVICE_TABLE(i2c, xdpe152_id); -+ -+static const struct of_device_id __maybe_unused xdpe152_of_match[] = { -+ {.compatible = "infineon,xdpe152c4"}, -+ {.compatible = "infineon,xdpe15284"}, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, xdpe152_of_match); -+ -+static struct i2c_driver xdpe152_driver = { -+ .driver = { -+ .name = "xdpe152c4", -+ .of_match_table = of_match_ptr(xdpe152_of_match), -+ }, -+ .probe_new = xdpe152_probe, -+ .id_table = xdpe152_id, -+}; -+ -+module_i2c_driver(xdpe152_driver); -+ -+MODULE_AUTHOR("Greg Schwendimann "); -+MODULE_DESCRIPTION("PMBus driver for Infineon XDPE152 family"); -+MODULE_LICENSE("GPL"); -+MODULE_IMPORT_NS(PMBUS); --- -2.20.1 - diff --git a/patch/0176-platform-mellanox-fix-reset_pwr_converter_fail-attri.patch b/patch/0176-platform-mellanox-fix-reset_pwr_converter_fail-attri.patch deleted file mode 100644 index 0ed069f65a96..000000000000 --- a/patch/0176-platform-mellanox-fix-reset_pwr_converter_fail-attri.patch +++ /dev/null @@ -1,31 +0,0 @@ -From eb20a45ca217d897a1cb623c3ae84d97e6000f88 Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Sun, 4 Sep 2022 10:41:45 +0300 -Subject: [PATCH backport 5.10 176/182] platform: mellanox: fix - reset_pwr_converter_fail attribute. - -Change incorrect reset_voltmon_upgrade_fail atitribute name to -reset_pwr_converter_fail. - -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak ---- - drivers/platform/x86/mlx-platform.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c -index 135ccea3a34e..3f29ab98480d 100644 ---- a/drivers/platform/x86/mlx-platform.c -+++ b/drivers/platform/x86/mlx-platform.c -@@ -3414,7 +3414,7 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = { - .mode = 0444, - }, - { -- .label = "reset_voltmon_upgrade_fail", -+ .label = "reset_pwr_converter_fail", - .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET, - .mask = GENMASK(7, 0) & ~BIT(0), - .mode = 0444, --- -2.20.1 - diff --git a/patch/0177-Documentation-ABI-fix-description-of-fix-reset_pwr_c.patch b/patch/0177-Documentation-ABI-fix-description-of-fix-reset_pwr_c.patch deleted file mode 100644 index 7c3bed1ce766..000000000000 --- a/patch/0177-Documentation-ABI-fix-description-of-fix-reset_pwr_c.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 0e8bb4ec5d0133a9d3d3e307095aca57d47bfb36 Mon Sep 17 00:00:00 2001 -From: Michael Shych -Date: Sun, 4 Sep 2022 10:46:01 +0300 -Subject: [PATCH backport 5.10 177/182] Documentation/ABI: fix description of - fix reset_pwr_converter_fail attribute. - -Change description of incorrect reset_voltmon_upgrade_fail atitribute -name to reset_pwr_converter_fail. - -Signed-off-by: Michael Shych -Reviewed-by: Vadim Pasternak ---- - Documentation/ABI/stable/sysfs-driver-mlxreg-io | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -index 0913a8daf767..ac503e84e7b3 100644 ---- a/Documentation/ABI/stable/sysfs-driver-mlxreg-io -+++ b/Documentation/ABI/stable/sysfs-driver-mlxreg-io -@@ -103,13 +103,13 @@ Description: These files show the system reset cause, as following: power - What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_comex_pwr_fail - What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_from_comex - What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_system --What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_voltmon_upgrade_fail -+What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_pwr_converter_fail - Date: November 2018 - KernelVersion: 5.0 - Contact: Vadim Pasternak - Description: These files show the system reset cause, as following: ComEx - power fail, reset from ComEx, system platform reset, reset -- due to voltage monitor devices upgrade failure, -+ due to power converter devices failure, - Value 1 in file means this is reset cause, 0 - otherwise. - Only one bit could be 1 at the same time, representing only - the last reset cause. --- -2.20.1 - diff --git a/patch/0180-hwmon-pmbus-Fix-sensors-readouts-for-MPS-Multi-phase.patch b/patch/0180-hwmon-pmbus-Fix-sensors-readouts-for-MPS-Multi-phase.patch deleted file mode 100644 index 1ff0f3af47a9..000000000000 --- a/patch/0180-hwmon-pmbus-Fix-sensors-readouts-for-MPS-Multi-phase.patch +++ /dev/null @@ -1,65 +0,0 @@ -From c5fe53f12090a49223c057b793b3aa411dabdd7a Mon Sep 17 00:00:00 2001 -From: Oleksandr Shamray -Date: Mon, 19 Sep 2022 14:55:22 +0300 -Subject: [PATCH backport 5.10 180/182] hwmon: (pmbus) Fix sensors readouts for - MPS Multi-phase mp2888 controller - -Fix scale factors for reading MPS Multi-phase mp2888 controller. -Fixed sensors: - - PIN/POUT: based on vendor documentation, set base scale factor 0.5W/LSB - - IOUT: based on vendor documentation, set base scale factor 0.25 A/LSB - -Fixes: e4db7719d037 ("hwmon: (pmbus) Add support for MPS Multi-phase mp2888 controller") -Signed-off-by: Oleksandr Shamray -Reviewed-by: Vadim Pasternak ---- - drivers/hwmon/pmbus/mp2888.c | 11 +++++------ - 1 file changed, 5 insertions(+), 6 deletions(-) - -diff --git a/drivers/hwmon/pmbus/mp2888.c b/drivers/hwmon/pmbus/mp2888.c -index 8ecd4adfef40..529eb3c95bb6 100644 ---- a/drivers/hwmon/pmbus/mp2888.c -+++ b/drivers/hwmon/pmbus/mp2888.c -@@ -109,7 +109,7 @@ mp2888_read_phase(struct i2c_client *client, struct mp2888_data *data, int page, - * - Kcs is the DrMOS current sense gain of power stage, which is obtained from the - * register MP2888_MFR_VR_CONFIG1, bits 13-12 with the following selection of DrMOS - * (data->curr_sense_gain): -- * 00b - 5µA/A, 01b - 8.5µA/A, 10b - 9.7µA/A, 11b - 10µA/A. -+ * 00b - 8.5µA/A, 01b - 9.7µA/A, 1b - 10µA/A, 11b - 5µA/A. - * - Rcs is the internal phase current sense resistor. This parameter depends on hardware - * assembly. By default it is set to 1kΩ. In case of different assembly, user should - * scale this parameter by dividing it by Rcs. -@@ -118,10 +118,9 @@ mp2888_read_phase(struct i2c_client *client, struct mp2888_data *data, int page, - * because sampling of current occurrence of bit weight has a big deviation, especially for - * light load. - */ -- ret = DIV_ROUND_CLOSEST(ret * 100 - 9800, data->curr_sense_gain); -- ret = (data->phase_curr_resolution) ? ret * 2 : ret; -+ ret = DIV_ROUND_CLOSEST(ret * 200 - 19600, data->curr_sense_gain); - /* Scale according to total current resolution. */ -- ret = (data->total_curr_resolution) ? ret * 8 : ret * 4; -+ ret = (data->total_curr_resolution) ? ret * 2 : ret; - return ret; - } - -@@ -212,7 +211,7 @@ static int mp2888_read_word_data(struct i2c_client *client, int page, int phase, - ret = pmbus_read_word_data(client, page, phase, reg); - if (ret < 0) - return ret; -- ret = data->total_curr_resolution ? ret * 2 : ret; -+ ret = data->total_curr_resolution ? ret : DIV_ROUND_CLOSEST(ret, 2); - break; - case PMBUS_POUT_OP_WARN_LIMIT: - ret = pmbus_read_word_data(client, page, phase, reg); -@@ -223,7 +222,7 @@ static int mp2888_read_word_data(struct i2c_client *client, int page, int phase, - * set 1. Actual power is reported with 0.5W or 1W respectively resolution. Scaling - * is needed to match both. - */ -- ret = data->total_curr_resolution ? ret * 4 : ret * 2; -+ ret = data->total_curr_resolution ? ret * 2 : ret; - break; - /* - * The below registers are not implemented by device or implemented not according to the --- -2.20.1 - diff --git a/patch/0152-mlxsw-i2c-Prevent-transaction-execution-for-spec.patch b/patch/8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch similarity index 74% rename from patch/0152-mlxsw-i2c-Prevent-transaction-execution-for-spec.patch rename to patch/8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch index bdc10f81fd46..f6ce85ff01e1 100644 --- a/patch/0152-mlxsw-i2c-Prevent-transaction-execution-for-spec.patch +++ b/patch/8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch @@ -1,13 +1,12 @@ -From fbc40a45f3688cb6be043a79556fab25bdf776d3 Mon Sep 17 00:00:00 2001 -From: Stepan Blyschak -Date: Mon, 20 Jun 2022 19:28:04 +0300 -Subject: =?UTF-8?q?From=20d3e0bf403d527f717a62ea328781256f999d4f95=20Mon?= - =?UTF-8?q?=20Sep=2017=2000:00:00=202001=0ASubject:=20[PATCH]=20mlxsw:=20i?= - =?UTF-8?q?2c:=20Prevent=20transaction=20execution=20for=20special=0A=20ch?= - =?UTF-8?q?ip=20states?= +From a2799b0fca7c4b59a6a4903675dcc7d6ba2a6ed2 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Thu, 2 Jun 2022 15:34:53 +0300 +Subject: [PATH backport v6.1 1/2] mlxsw: i2c: SONIC: ISSU: Prevent transaction + execution for special chip states Do not run transaction in cases chip is in reset or in-service update -states. In such case firmware is not accessible and will reject transaction +states. +In such case firmware is not accessible and will reject transaction with the relevant status "RUNNING_RESET" or "FW_ISSU_ONGOING". In case transaction is failed do to one of these reasons, stop sending transactions. In such case driver is about to be removed since it @@ -15,14 +14,13 @@ cannot continue running after reset or in-service update. And re-probed again after reset or in-service update is completed. Signed-off-by: Vadim Pasternak -Signed-off-by: Stepan Blyschak --- drivers/net/ethernet/mellanox/mlxsw/cmd.h | 4 ++++ - drivers/net/ethernet/mellanox/mlxsw/i2c.c | 29 ++++++++++++++++++++++++++--- + drivers/net/ethernet/mellanox/mlxsw/i2c.c | 29 ++++++++++++++++++++--- 2 files changed, 30 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/cmd.h b/drivers/net/ethernet/mellanox/mlxsw/cmd.h -index 91f68fb0b420..d8ecb8c8a269 100644 +index 09bef04b11d1..71fdfc74e322 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/cmd.h +++ b/drivers/net/ethernet/mellanox/mlxsw/cmd.h @@ -149,6 +149,8 @@ enum mlxsw_cmd_status { @@ -44,26 +42,26 @@ index 91f68fb0b420..d8ecb8c8a269 100644 return "BAD_PKT"; default: diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c -index ce843ea91464..b8a5c0cbb6b5 100644 +index 8eb32152ee04..43140eccc8bb 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c +++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c -@@ -63,6 +63,7 @@ - * @core: switch core pointer; - * @bus_info: bus info block; - * @block_size: maximum block size allowed to pass to under layer; +@@ -77,6 +77,7 @@ + * @pdata: device platform data; + * @irq_work: interrupts work item; + * @irq: IRQ line number; + * @status: status to indicate chip reset or in-service update; */ struct mlxsw_i2c { struct { -@@ -76,6 +77,7 @@ struct mlxsw_i2c { - struct mlxsw_core *core; - struct mlxsw_bus_info bus_info; - u16 block_size; +@@ -93,6 +94,7 @@ struct mlxsw_i2c { + struct mlxreg_core_hotplug_platform_data *pdata; + struct work_struct irq_work; + int irq; + u8 status; }; #define MLXSW_I2C_READ_MSG(_client, _addr_buf, _buf, _len) { \ -@@ -222,6 +224,19 @@ static int mlxsw_i2c_write_cmd(struct i2c_client *client, +@@ -239,6 +241,19 @@ static int mlxsw_i2c_write_cmd(struct i2c_client *client, return 0; } @@ -83,7 +81,7 @@ index ce843ea91464..b8a5c0cbb6b5 100644 /* Routine posts initialization command to ASIC through mail box. */ static int mlxsw_i2c_write_init_cmd(struct i2c_client *client, -@@ -405,6 +420,10 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, +@@ -422,6 +437,10 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, WARN_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); @@ -93,8 +91,8 @@ index ce843ea91464..b8a5c0cbb6b5 100644 + if (in_mbox) { reg_size = mlxsw_i2c_get_reg_size(in_mbox); - num = reg_size / mlxsw_i2c->block_size; -@@ -479,6 +498,8 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, + num = DIV_ROUND_UP(reg_size, mlxsw_i2c->block_size); +@@ -494,6 +513,8 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, cmd_fail: mutex_unlock(&mlxsw_i2c->cmd.lock); @@ -103,7 +101,7 @@ index ce843ea91464..b8a5c0cbb6b5 100644 return err; } -@@ -608,14 +629,16 @@ static int mlxsw_i2c_probe(struct i2c_client *client, +@@ -685,14 +706,16 @@ static int mlxsw_i2c_probe(struct i2c_client *client, /* Wait until go bit is cleared. */ err = mlxsw_i2c_wait_go_bit(client, mlxsw_i2c, &status); if (err) { @@ -124,5 +122,5 @@ index ce843ea91464..b8a5c0cbb6b5 100644 goto errout; } -- -2.14.1 +2.20.1 diff --git a/patch/0166-DS-leds-leds-mlxreg-Send-udev-event-from-leds-mlxreg.patch b/patch/8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch similarity index 91% rename from patch/0166-DS-leds-leds-mlxreg-Send-udev-event-from-leds-mlxreg.patch rename to patch/8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch index 9bc90efc991e..07ac5bb764b2 100644 --- a/patch/0166-DS-leds-leds-mlxreg-Send-udev-event-from-leds-mlxreg.patch +++ b/patch/8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch @@ -1,8 +1,8 @@ -From 58797f651264dd362655e7c45bce48a2929cf55c Mon Sep 17 00:00:00 2001 +From f43af239d01b6a8b62667a3b06ee87d2dc3d405d Mon Sep 17 00:00:00 2001 From: Michael Shych Date: Mon, 11 Jul 2022 12:51:27 +0300 -Subject: [PATCH backport 5.10 166/182] DS: leds: leds-mlxreg: Send udev event - from leds-mlxreg driver. +Subject: [PATH backport v6.1 3/3] leds: leds-mlxreg: Downstream: Send udev + event from leds-mlxreg driver. Add sending udev event from leds-mlxreg driver in case of color change. This patch will not be accepted in upstream as it provides no regular flow. @@ -16,7 +16,7 @@ Signed-off-by: Michael Shych 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/drivers/leds/leds-mlxreg.c b/drivers/leds/leds-mlxreg.c -index 7df4653a80d7..137ba5afa921 100644 +index c0caf810b6d0..aadf90abce2e 100644 --- a/drivers/leds/leds-mlxreg.c +++ b/drivers/leds/leds-mlxreg.c @@ -11,6 +11,7 @@ diff --git a/patch/8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch b/patch/8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch new file mode 100644 index 000000000000..20d658b754f6 --- /dev/null +++ b/patch/8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch @@ -0,0 +1,30 @@ +From 63d8c9838b10472bd5e3c6e5a41596d6d44dd1c8 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Thu, 10 Aug 2023 12:03:31 +0000 +Subject: [PATCH backport 6.1.42 1/1] i2c: mlxcpld: Downstream WA to avoid + error for SMBUS read block command + +Due to hardware bug in I2C controller skip handling SMBUS_READ_BLOCK +command. +Remove this patch after bug in I2C controller is fixed. + +Signed-off-by: Vadim Pasternak +--- + drivers/i2c/busses/i2c-mlxcpld.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/i2c/busses/i2c-mlxcpld.c b/drivers/i2c/busses/i2c-mlxcpld.c +index 2ce2c324ea4f..fd9def469132 100644 +--- a/drivers/i2c/busses/i2c-mlxcpld.c ++++ b/drivers/i2c/busses/i2c-mlxcpld.c +@@ -398,6 +398,7 @@ static int mlxcpld_i2c_wait_for_tc(struct mlxcpld_i2c_priv *priv) + mlxcpld_i2c_read_comm(priv, MLXCPLD_LPCI2C_NUM_ADDR_REG, &val, + 1); + if (priv->smbus_block && (val & MLXCPLD_I2C_SMBUS_BLK_BIT)) { ++ return 0; + mlxcpld_i2c_read_comm(priv, MLXCPLD_LPCI2C_NUM_DAT_REG, + &datalen, 1); + if (unlikely(datalen > I2C_SMBUS_BLOCK_MAX)) { +-- +2.20.1 + diff --git a/patch/8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch b/patch/8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch new file mode 100644 index 000000000000..5562309813e6 --- /dev/null +++ b/patch/8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch @@ -0,0 +1,57 @@ +From f897ae50422b9fbff200051419ebb3f5fa280bd8 Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Thu, 2 Nov 2023 11:42:47 +0000 +Subject: [PATCH v6.1.42 downstream 1/2] hwmon: (mlxreg-fan): Downstream: Allow + fan speed setting granularity of 1 PWM + +Currently PWM setting is allowed with 10 percent stepping. +Such configuration is aligned with thermal drivers, which are used to be +bound to "mlxreg-fan" driver. + +This binding happens when the cooling instances created by the driver are +bound to some kernel thermal driver. + +In case system is not using kernel thermal control and the cooling +instances created by the driver are not bound to any thermal driver, the +driver still does not allow setting of PWM granularity less than 10 +percent. + +Allow setting fan with one percent granularity, thus any user space +thermal application will be able to set PWM to any allowed value in range +from 51 PWM to 255 PWM. + +Note: this is downstream patch, since it can affect functionality for +the Nvidia users running kernel thermal control. So, it is not going to be +submitted to up-stream. + +Signed-off-by: Vadim Pasternak +--- + drivers/hwmon/mlxreg-fan.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/hwmon/mlxreg-fan.c b/drivers/hwmon/mlxreg-fan.c +index b48bd7c961d6..ca9b1b27e5d2 100644 +--- a/drivers/hwmon/mlxreg-fan.c ++++ b/drivers/hwmon/mlxreg-fan.c +@@ -15,10 +15,15 @@ + #define MLXREG_FAN_MAX_TACHO 24 + #define MLXREG_FAN_MAX_PWM 4 + #define MLXREG_FAN_PWM_NOT_CONNECTED 0xff +-#define MLXREG_FAN_MAX_STATE 10 ++#ifdef CONFIG_MLXSW_CORE_THERMAL ++#define MLXREG_FAN_MAX_STATE 10 ++#define MLXREG_FAN_SPEED_MIN_LEVEL 2 /* 20 percent */ ++#else ++#define MLXREG_FAN_MAX_STATE 255 ++#define MLXREG_FAN_SPEED_MIN_LEVEL 51 /* 20 percent */ ++#endif + #define MLXREG_FAN_MIN_DUTY 51 /* 20% */ + #define MLXREG_FAN_MAX_DUTY 255 /* 100% */ +-#define MLXREG_FAN_SPEED_MIN_LEVEL 2 /* 20 percent */ + #define MLXREG_FAN_TACHO_SAMPLES_PER_PULSE_DEF 44 + #define MLXREG_FAN_TACHO_DIV_MIN 283 + #define MLXREG_FAN_TACHO_DIV_DEF (MLXREG_FAN_TACHO_DIV_MIN * 4) +-- +-- +2.20.1 + diff --git a/patch/8008-hwmon-emc2305-Downstream-Allow-fan-speed-setting-gra.patch b/patch/8008-hwmon-emc2305-Downstream-Allow-fan-speed-setting-gra.patch new file mode 100644 index 000000000000..603086c0b73f --- /dev/null +++ b/patch/8008-hwmon-emc2305-Downstream-Allow-fan-speed-setting-gra.patch @@ -0,0 +1,51 @@ +From 93a52030e9545368c5dee5d38cb939d8efc796ce Mon Sep 17 00:00:00 2001 +From: Vadim Pasternak +Date: Thu, 2 Nov 2023 12:18:22 +0000 +Subject: [PATCH v6.1.42 downstream 2/2] hwmon: (emc2305): Downstream: Allow + fan speed setting granularity of 1 PWM + +Currently PWM setting is allowed with 10 percent stepping. +Such configuration is aligned with thermal drivers, which are used to be +bound to "emc2305" driver. + +This binding happens when the cooling instances created by the driver are +bound to some kernel thermal driver. + +In case system is not using kernel thermal control and the cooling +instances created by the driver are not bound to any thermal driver, the +driver still does not allow setting of PWM granularity less than 10 +percent. + +Allow setting fan with one percent granularity, thus any user space +thermal application will be able to set PWM to any allowed value in range +from 0 PWM to 255 PWM. + +Note: this is downstream patch, since it can affect functionality for +the Nvidia users running kernel thermal control. So, it is not going to be +submitted to up-stream. + +Signed-off-by: Vadim Pasternak +--- + drivers/hwmon/emc2305.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/drivers/hwmon/emc2305.c b/drivers/hwmon/emc2305.c +index aa1f25add0b6..70be61d32089 100644 +--- a/drivers/hwmon/emc2305.c ++++ b/drivers/hwmon/emc2305.c +@@ -19,7 +19,11 @@ emc2305_normal_i2c[] = { 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d, I2C_CLIENT_EN + #define EMC2305_REG_VENDOR 0xfe + #define EMC2305_FAN_MAX 0xff + #define EMC2305_FAN_MIN 0x00 +-#define EMC2305_FAN_MAX_STATE 10 ++#ifdef CONFIG_MLXSW_CORE_THERMAL ++#define EMC2305_FAN_MAX_STATE 10 ++#else ++#define EMC2305_FAN_MAX_STATE 255 ++#endif + #define EMC2305_DEVICE 0x34 + #define EMC2305_VENDOR 0x5d + #define EMC2305_REG_PRODUCT_ID 0xfd +-- +2.20.1 + diff --git a/patch/8009-hwmon-mlxsw-Downstream-Allow-fan-speed-setting-granu.patch b/patch/8009-hwmon-mlxsw-Downstream-Allow-fan-speed-setting-granu.patch new file mode 100644 index 000000000000..e8649ec3cab9 --- /dev/null +++ b/patch/8009-hwmon-mlxsw-Downstream-Allow-fan-speed-setting-granu.patch @@ -0,0 +1,52 @@ +From 38c77b2f033deb8957aaf1017d0067717b8853cf Mon Sep 17 00:00:00 2001 +From: Oleksandr Shamray +Date: Wed, 8 Nov 2023 14:52:38 +0200 +Subject: [PATCH] hwmon: (mlxsw): Downstream: Allow fan speed setting + granularity of 1 PWM + +Currently PWM setting is allowed with 10 percent stepping. +Such configuration is aligned with thermal drivers, which are used to be +bound to "mlxsw" driver. + +This binding happens when the cooling instances created by the driver are +bound to some kernel thermal driver. + +In case system is not using kernel thermal control and the cooling +instances created by the driver are not bound to any thermal driver, the +driver still does not allow setting of PWM granularity less than 10 +percent. + +Allow setting fan with one percent granularity, thus any user space +thermal application will be able to set PWM to any allowed value in range +from 51 PWM to 255 PWM. + +Note: this is downstream patch, since it can affect functionality for +the Nvidia users running kernel thermal control. So, it is not going to be +submitted to up-stream. + +Signed-off-by: Oleksandr Shamray +--- + drivers/net/ethernet/mellanox/mlxsw/core_thermal.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c +index d062034..cbc9ac2 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c +@@ -21,8 +21,13 @@ + #define MLXSW_THERMAL_ASIC_TEMP_HOT 105000 /* 105C */ + #define MLXSW_THERMAL_HYSTERESIS_TEMP 5000 /* 5C */ + #define MLXSW_THERMAL_MODULE_TEMP_SHIFT (MLXSW_THERMAL_HYSTERESIS_TEMP * 2) ++#ifdef CONFIG_MLXSW_CORE_THERMAL + #define MLXSW_THERMAL_MAX_STATE 10 + #define MLXSW_THERMAL_MIN_STATE 2 ++#else ++#define MLXSW_THERMAL_MAX_STATE 255 ++#define MLXSW_THERMAL_MIN_STATE 51 /* 20 percent */ ++#endif + #define MLXSW_THERMAL_MAX_DUTY 255 + + /* External cooling devices, allowed for binding to mlxsw thermal zones. */ +-- +2.8.4 + diff --git a/patch/kconfig-exclusions b/patch/kconfig-exclusions index 77388ec56ed3..a1de5ec80904 100644 --- a/patch/kconfig-exclusions +++ b/patch/kconfig-exclusions @@ -57,3 +57,4 @@ CONFIG_SECONDARY_TRUSTED_KEYRING CONFIG_SYSTEM_BLACKLIST_KEYRING [mellanox-arm64] + diff --git a/patch/kconfig-inclusions b/patch/kconfig-inclusions index 4a23d1e2722c..9dd7cd3756da 100644 --- a/patch/kconfig-inclusions +++ b/patch/kconfig-inclusions @@ -17,7 +17,7 @@ CONFIG_EEPROM_SFF_8436=m CONFIG_SENSORS_MAX6620=m CONFIG_PMBUS=m CONFIG_SENSORS_PMBUS=m -#CONFIG_SENSORS_DNI_DPS460=m # TODO: enable once the DPS460 patch is re-enabled +#CONFIG_SENSORS_DNI_DPS460=m # TODO: enable once the DPS460 patch is re-enabled CONFIG_I2C_MUX_GPIO=m CONFIG_GPIO_SYSFS=y CONFIG_GPIO_SCH=m @@ -32,115 +32,84 @@ CONFIG_GPIO_ICH=m CONFIG_SENSORS_MAX31790=m # For optoe CONFIG_EEPROM_OPTOE=m - ###-> mellanox_amd64-start +CONFIG_DMI_SYSFS=y CONFIG_OF=y -CONFIG_THERMAL_OF=y -CONFIG_CPU_THERMAL=y -CONFIG_PINCTRL_CANNONLAKE=m -CONFIG_PINCTRL_DENVERTON=m -CONFIG_DW_DMAC_PCI=y +CONFIG_EEPROM_AT24=m +CONFIG_IGB=m CONFIG_MLXSW_CORE=m -CONFIG_MLXSW_CORE_HWMON=y -CONFIG_MLXSW_CORE_THERMAL=y -CONFIG_MLXSW_I2C=m -CONFIG_MLXSW_MINIMAL=m -CONFIG_MFD_INTEL_LPSS=y -CONFIG_MFD_INTEL_LPSS_PCI=y -CONFIG_I2C_MUX_REG=m -CONFIG_I2C_MUX_PCA954x=m -CONFIG_I2C_MUX_MLXCPLD=m -CONFIG_I2C_MLXCPLD=m -CONFIG_I2C_DESIGNWARE_PLATFORM=m -CONFIG_IOSF_MBI=y -CONFIG_I2C_DESIGNWARE_BAYTRAIL=y -CONFIG_I2C_DESIGNWARE_CORE=m +CONFIG_SERIAL_8250_DW=y +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_MUX=m +CONFIG_I2C_SMBUS=m +CONFIG_I2C_I801=m CONFIG_I2C_DESIGNWARE_PCI=m -CONFIG_IIO_SYSFS_TRIGGER=m -CONFIG_SENSORS_IIO_HWMON=m -CONFIG_SENSORS_MLXREG_FAN=m -CONFIG_SENSORS_LM25066=m -CONFIG_SENSORS_TPS53679=m -CONFIG_SENSORS_UCD9000=m -CONFIG_SENSORS_UCD9200=m -CONFIG_SENSORS_XDPE122=m -CONFIG_SENSORS_MP2888=m -CONFIG_SENSORS_MP2975=m -CONFIG_SENSORS_TMP421=m -CONFIG_SENSORS_STTS751=m -CONFIG_SENSORS_POWR1220=m -CONFIG_SENSORS_XDPE152=m +CONFIG_I2C_MLXCPLD=m +CONFIG_PINCTRL=y +CONFIG_GPIOLIB=y CONFIG_SENSORS_DRIVETEMP=m -CONFIG_TI_ADS1015=m -CONFIG_GPIO_PCA953X=m -CONFIG_SERIAL_8250_DETECT_IRQ=y -CONFIG_MLX_WDT=m -CONFIG_LEDS_MLXREG=m -CONFIG_MLX_PLATFORM=m -CONFIG_MELLANOX_PLATFORM=y -CONFIG_MLXREG_HOTPLUG=m -CONFIG_MLXREG_IO=m -CONFIG_MAX1363=m -CONFIG_THERMAL_NETLINK=y -CONFIG_THERMAL_STATISTICS=n -CONFIG_NVSW_SN2201=m -CONFIG_TI_ADS1015=m -CONFIG_SENSORS_EMC2305=m +CONFIG_SENSORS_CORETEMP=m CONFIG_SENSORS_JC42=m CONFIG_SENSORS_POWR1220=m -CONFIG_NET_VENDOR_MELLANOX=y -CONFIG_NET_DEVLINK=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_MUX=m -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=m -CONFIG_SYSFS=y -CONFIG_DMI_SYSFS=y -CONFIG_GPIO_SYSFS=y -CONFIG_WATCHDOG_SYSFS=y -CONFIG_NVMEM_SYSFS=y -CONFIG_MLXREG_LC=m -CONFIG_THERMAL=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_WRITABLE_TRIPS=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_PMBUS=m -CONFIG_SENSORS_PMBUS=m -CONFIG_HWMON=y CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_EMC2305=m +CONFIG_SENSORS_STTS751=m CONFIG_SENSORS_TMP102=m -CONFIG_LEDS_TRIGGERS=y +CONFIG_SENSORS_TMP421=m +CONFIG_THERMAL_NETLINK=y +CONFIG_INTEL_PCH_THERMAL=m +CONFIG_WATCHDOG_SYSFS=y +CONFIG_LPC_ICH=m +CONFIG_MFD_INTEL_LPSS_PCI=y +CONFIG_LEDS_MLXREG=m CONFIG_LEDS_TRIGGER_TIMER=m -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_EEPROM_AT24=m -CONFIG_GPIOLIB=y +CONFIG_DW_DMAC_PCI=y +CONFIG_MELLANOX_PLATFORM=y +CONFIG_MLX_PLATFORM=m +CONFIG_NET_DEVLINK=y +CONFIG_I2C_MUX_REG=m +CONFIG_I2C_MUX_MLXCPLD=m +CONFIG_REGMAP_I2C=m +CONFIG_IIO_SYSFS_TRIGGER=m +CONFIG_NVME_HWMON=y +CONFIG_MLXSW_CORE_HWMON=y +CONFIG_MLXSW_I2C=m +CONFIG_MLXSW_MINIMAL=m +CONFIG_MLXSW_CORE_THERMAL=n +CONFIG_MLXREG_HOTPLUG=m +CONFIG_MLXREG_IO=m +CONFIG_MLX_WDT=m +CONFIG_MLXREG_LC=m +CONFIG_SENSORS_MLXREG_FAN=m CONFIG_GPIO_GENERIC=m -CONFIG_GPIO_ICH=m -CONFIG_LPC_ICH=m -CONFIG_X86_PKG_TEMP_THERMAL=m -CONFIG_SENSORS_CORETEMP=m -CONFIG_INTEL_PCH_THERMAL=m -CONFIG_IGB=m +CONFIG_MAX1363=m +CONFIG_SENSORS_TPS53679=m +CONFIG_SENSORS_XDPE122=m +CONFIG_SENSORS_MP2975=m +CONFIG_SENSORS_MP2888=m +CONFIG_CPU_THERMAL=y CONFIG_IGB_HWMON=y -CONFIG_INOTIFY_USER=y CONFIG_MFD_CORE=y -CONFIG_SERIAL_8250_DW=y -CONFIG_I2C_SMBUS=m -CONFIG_I2C_I801=m -CONFIG_PINCTRL=y +CONFIG_MFD_INTEL_LPSS=y +CONFIG_TI_ADS1015=m CONFIG_PINCTRL_INTEL=y +CONFIG_PINCTRL_CANNONLAKE=m +CONFIG_PINCTRL_DENVERTON=m +CONFIG_NVSW_SN2201=m +CONFIG_I2C_DESIGNWARE_PLATFORM=m +CONFIG_I2C_DESIGNWARE_BAYTRAIL=y +CONFIG_I2C_DESIGNWARE_CORE=m CONFIG_SPI_PXA2XX=m +CONFIG_SENSORS_XDPE152=m +CONFIG_SENSORS_IIO_HWMON=m +CONFIG_SENSORS_LM25066=m +CONFIG_SENSORS_UCD9000=m +CONFIG_SENSORS_UCD9200=m +CONFIG_THERMAL_OF=y ###-> mellanox_amd64-end - # For Cisco 8000 CONFIG_PHYLIB=m -CONFIG_GPIOLIB=y CONFIG_OF_GPIO=y -CONFIG_OF=y CONFIG_OF_MDIO=m CONFIG_MDIO_BUS_MUX_GPIO=m CONFIG_MDIO_BUS_MUX=m @@ -214,7 +183,6 @@ CONFIG_UIO_PENMSI=m CONFIG_ARM64_VA_BITS_39=y CONFIG_COMMON_CLK_CS2000_CP=y CONFIG_I2C_RD1173=y -CONFIG_PENSANDO_SOC_PENFW=y CONFIG_CONTEXT_TRACKING=y CONFIG_NO_HZ_FULL=y CONFIG_RCU_NOCB_CPU=y diff --git a/patch/series b/patch/series index 14e31a282a86..32f267b32064 100755 --- a/patch/series +++ b/patch/series @@ -68,120 +68,67 @@ Support-for-fullcone-nat.patch # Mellanox patches for 5.10 ###-> mellanox_sdk-start -# 0003-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch -# 0004-drop_monitor-Extend-WJH-buffer-linux-channel.patch +0001-psample-define-the-macro-PSAMPLE_MD_EXTENDED_ATTR.patch +0002-drop_monitor-Extend-WJH-buffer-linux-channel.patch ###-> mellanox_sdk-end -#TODO ###-> mellanox_hw_mgmt-start -#0001-i2c-mlxcpld-Update-module-license.patch -#0002-i2c-mlxcpld-Decrease-polling-time-for-performance-im.patch -#0003-i2c-mlxcpld-Add-support-for-I2C-bus-frequency-settin.patch -#0004-i2c-mux-mlxcpld-Update-module-license.patch -#0005-i2c-mux-mlxcpld-Move-header-file-out-of-x86-realm.patch -#0006-i2c-mux-mlxcpld-Convert-driver-to-platform-driver.patch -#0007-i2c-mux-mlxcpld-Prepare-mux-selection-infrastructure.patch -#0008-i2c-mux-mlxcpld-Get-rid-of-adapter-numbers-enforceme.patch -#0009-i2c-mux-mlxcpld-Extend-driver-to-support-word-addres.patch -#0010-i2c-mux-mlxcpld-Extend-supported-mux-number.patch -#0011-i2c-mux-mlxcpld-Add-callback-to-notify-mux-creation-.patch -#0012-hwmon-mlxreg-fan-Add-support-for-fan-drawers-capabil.patch -#0013-hwmon-pmbus-shrink-code-and-remove-pmbus_do_remove.patch -#0015-mlxsw-core-Remove-critical-trip-points-from-thermal-.patch -#0016-net-don-t-include-ethtool.h-from-netdevice.h.patch -#0017-mlxsw-reg-Extend-MTMP-register-with-new-threshold-fi.patch -#0018-mlxsw-thermal-Add-function-for-reading-module-temper.patch -#0019-mlxsw-thermal-Read-module-temperature-thresholds-usi.patch -#0020-mlxsw-thermal-Fix-null-dereference-of-NULL-temperatu.patch -#0021-mlxsw-reg-Add-bank-number-to-MCIA-register.patch -#0022-mlxsw-reg-Document-possible-MCIA-status-values.patch -#0023-ethtool-Allow-network-drivers-to-dump-arbitrary-EEPR.patch -#0024-net-ethtool-Export-helpers-for-getting-EEPROM-info.patch -#0025-ethtool-Add-fallback-to-get_module_eeprom-from-netli.patch -#0026-mlxsw-core-Add-support-for-module-EEPROM-read-by-pag.patch -#0027-ethtool-Decrease-size-of-module-EEPROM-get-policy-ar.patch -#0028-ethtool-Use-kernel-data-types-for-internal-EEPROM-st.patch -#0029-ethtool-Validate-module-EEPROM-length-as-part-of-pol.patch -#0030-ethtool-Validate-module-EEPROM-offset-as-part-of-pol.patch -#0031-mlxsw-core_env-Read-module-temperature-thresholds-us.patch -#0032-mlxsw-core_env-Avoid-unnecessary-memcpy-s.patch -#0035-hwmon-pmbus-Increase-maximum-number-of-phases-per-pa.patch -#0036-hwmon-pmbus-Add-support-for-MPS-Multi-phase-mp2888-c.patch -#0037-dt-bindings-Add-MP2888-voltage-regulator-device.patch -#0038-ethtool-wire-in-generic-SFP-module-access.patch -#0039-ethtool-Fix-NULL-pointer-dereference-during-module-E.patch -#0040-phy-sfp-add-netlink-SFP-support-to-generic-SFP-code.patch -#0042-ethtool-support-FEC-settings-over-netlink.patch -#0045-i2c-mlxcpld-Fix-criteria-for-frequency-setting.patch -#0046-i2c-mlxcpld-Reduce-polling-time-for-performance-impr.patch -#0047-i2c-mlxcpld-Allow-flexible-polling-time-setting-for-.patch -#0053-mlxsw-core-Avoid-creation-virtual-hwmon-objects-by-t.patch -#0054-mlxsw-minimal-Simplify-method-of-modules-number-dete.patch -#0055-platform_data-mlxreg-Add-new-type-to-support-modular.patch -#0056-platform-x86-mlx-platform-Add-initial-support-for-ne.patch -#0057-platform-mellanox-mlxreg-hotplug-Extend-logic-for-ho.patch -#0058-platform-x86-mlx-platform-Configure-notifier-callbac.patch -#0059-platform-mellanox-mlxreg-io-Extend-number-of-hwmon-a.patch -#0060-platform_data-mlxreg-Add-new-field-for-secured-acces.patch -#0061-platform-mellanox-mlxreg-lc-Add-initial-support-for-.patch -#0062-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch -#0063-Documentation-ABI-Add-new-line-card-attributes-for-m.patch -#0064-hwmon-mlxreg-fan-Extend-the-maximum-number-of-tachom.patch -#0065-platform-x86-mlx-platform-Extend-FAN-and-LED-config-.patch -#0066-platform-x86-mlx-platform-Add-new-attributes-for-Cof.patch -#0067-platform-mellanox-Add-dedicated-match-for-system-typ.patch -#0068-mlxsw-core-Initialize-switch-driver-last.patch -#0069-mlxsw-core-Remove-mlxsw_core_is_initialized.patch -#0070-mlxsw-core_env-Defer-handling-of-module-temperature-.patch -#0071-mlxsw-core_env-Convert-module_info_lock-to-a-mutex.patch -#0072-mlxsw-Track-per-module-port-status.patch -#0073-mlxsw-reg-Add-fields-to-PMAOS-register.patch -#0074-mlxsw-Make-PMAOS-pack-function-more-generic.patch -#0075-mlxsw-Add-support-for-transceiver-modules-reset.patch -#0076-ethtool-Add-ability-to-control-transceiver-modules-p.patch -#0077-mlxsw-reg-Add-Port-Module-Memory-Map-Properties-regi.patch -#0078-mlxsw-reg-Add-Management-Cable-IO-and-Notifications-.patch -#0079-mlxsw-Add-ability-to-control-transceiver-modules-pow.patch -#0080-ethtool-Add-transceiver-module-extended-states.patch -#0081-platform-x86-mlx-platform-Add-support-for-multiply-c.patch -#0082-mlxsw-core-Extend-external-cooling-device-whitelist-.patch -#0083-platform_data-mlxreg-Add-field-for-notification-call.patch -#0084-i2c-mlxcpld-Add-callback-to-notify-probing-completio.patch -#0085-hwmon-powr1220-Upgrade-driver-to-support-hwmon-info-.patch -#0086-hwmon-powr1220-Add-support-for-Lattice-s-POWR1014-po.patch -#0087-hwmon-Add-support-for-EMC2305-RPM-based-PWM-Fan-Spee.patch -#0089-platform-mellanox-Add-support-for-new-SN2201-system.patch -#0090-Documentation-ABI-Add-new-attributes-for-mlxreg-io-s.patch -#0091-platform-x86-mlx-platform-Add-support-for-new-system.patch -#0092-platform-mellanox-mlxreg-lc-fix-error-code-in-mlxreg.patch -#0093-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-P.patch -#0094-hwmon-mlxreg-fan-Extend-driver-to-support-multiply-c.patch -#0095-hwmon-mlxreg-fan-Fix-out-of-bounds-read-on-array-fan.patch -#0096-hwmon-mlxreg-fan-Modify-PWM-connectivity-validation.patch -#0097-hwmon-mlxreg-fan-Support-distinctive-names-per-diffe.patch -#0097-1-mlxsw-Use-u16-for-local_port-field.patch -#0097-2-mlxsw-i2c-Fix-chunk-size-setting.patch -#0097-3-mlxsw-core_hwmon-Adjust-module-label-names.patch -#0152-mlxsw-i2c-Prevent-transaction-execution-for-spec.patch -#0157-platform-x86-mlx-platform-Make-activation-of-some-dr.patch -#0158-platform-x86-mlx-platform-Add-cosmetic-changes-for-a.patch -#0159-mlx-platform-Add-support-for-systems-equipped-with-t.patch -#0160-platform-mellanox-Introduce-support-for-COMe-managem.patch -#0161-platform-x86-mlx-platform-Add-support-for-new-system.patch -#0162-platform-mellanox-Add-COME-board-revision-register.patch -#0163-platform-mellanox-Introduce-support-for-rack-manager.patch -#0164-hwmon-jc42-Add-support-for-Seiko-Instruments-S-34TS0.patch -#0165-platform-mellanox-mlxreg-io-Add-locking-for-io-opera.patch -#0166-DS-leds-leds-mlxreg-Send-udev-event-from-leds-mlxreg.patch -#0170-i2c-mlxcpld-Fix-register-setting-for-400KHz-frequenc.patch -#0173-mlxsw-core-Add-support-for-OSFP-transceiver-modules.patch -#0175-hwmon-pmbus-Add-support-for-Infineon-Digital-Multi-p.patch -#0176-platform-mellanox-fix-reset_pwr_converter_fail-attri.patch -#0177-Documentation-ABI-fix-description-of-fix-reset_pwr_c.patch -#0178-platform-mellanox-Introduce-support-for-next-generat.patch -#0180-hwmon-pmbus-Fix-sensors-readouts-for-MPS-Multi-phase.patch -#0186-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch -#0285-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch +0001-platform-mellanox-Introduce-support-for-rack-manager.patch +0002-platform-mellanox-Change-reset_pwr_converter_fail-at.patch +0003-platform-mellanox-Cosmetic-changes-rename-to-more-co.patch +0004-platform-mellanox-Introduce-support-for-next-generat.patch +0005-platform-mellanox-Introduce-support-of-new-Nvidia-L1.patch +0006-platform-mellanox-Split-initialization-procedure.patch +0007-platform-mellanox-Split-logic-in-init-and-exit-flow.patch +0008-platform-mellanox-Extend-all-systems-with-I2C-notifi.patch +0009-platform-mellanox-mlx-platform-Add-mux-selection-reg.patch +0010-platform-mellanox-mlx-platform-Move-bus-shift-assign.patch +0011-platform-mellanox-mlx-platform-Initialize-shift-vari.patch +0012-platform-mellanox-Fix-order-in-exit-flow.patch +0013-platform-mellanox-mlx-platform-Fix-signals-polarity-.patch +0014-platform-mellanox-mlx-platform-Modify-graceful-shutd.patch +0015-platform-mellanox-Change-register-offset-addresses.patch +0016-platform-mellanox-Add-new-attributes.patch +0017-platform-mellanox-Add-field-upgrade-capability-regis.patch +0018-platform-mellanox-Modify-reset-causes-description.patch +0019-platform-mellanox-mlx-platform-Modify-health-and-pow.patch +0020-platform-mellanox-mlx-platform-Add-reset-cause-attri.patch +0021-platform-mellanox-mlx-platform-add-support-for-addit.patch +0022-platform-mellanox-mlx-platform-Modify-power-off-call.patch +0023-platform-mellanox-Cosmetic-changes.patch +0024-platform-mellanox-mlx-platform-Add-reset-callback.patch +0025-platform-mellanox-mlx-platform-Prepare-driver-to-all.patch +0026-platform-mellanox-mlx-platform-Introduce-ACPI-init-f.patch +0027-platform-mellanox-mlx-platform-Get-interrupt-line-th.patch +0028-platform-mellanox-Add-initial-support-for-PCIe-based.patch +0029-platform-mellanox-mlxreg-hotplug-Extend-condition-fo.patch +0030-platform-mellanox-nvsw-sn2201-change-fans-i2c-busses.patch +0032-platform_data-mlxreg-Add-field-with-mapped-resource-.patch +0033-i2c-mlxcpld-Allow-driver-to-run-on-ARM64-architectur.patch +0034-i2c-mlxcpld-Add-support-for-extended-transaction-len.patch +0035-i2c-mlxcpld-Support-PCIe-mapped-register-space.patch +0036-mlxsw-i2c-Fix-chunk-size-setting-in-output-mailbox-b.patch +0037-mlxsw-i2c-Limit-single-transaction-buffer-size.patch +0038-mlxsw-core_hwmon-Adjust-module-label-names-based-on-.patch +0039-mlxsw-reg-Limit-MTBR-register-payload-to-a-single-da.patch +0040-mlxsw-core-Extend-allowed-list-of-external-cooling-d.patch +0041-mlxsw-i2c-Utilize-standard-macros-for-dividing-buffe.patch +0043-hwmon-mlxreg-fan-Extend-number-of-supporetd-fans.patch +0051-platform-mellanox-mlxreg-hotplug-Allow-more-flexible.patch +0052-i2c-mux-Add-register-map-based-mux-driver.patch +0056-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch +0057-Documentation-ABI-Add-new-attribute-for-mlxreg-io-sy.patch +0061-pinctrl-Introduce-struct-pinfunction-and-PINCTRL_PIN.patch +0062-pinctrl-mlxbf3-Add-pinctrl-driver-support.patch +0063-gpio-mlxbf3-Add-gpio-driver-support.patch +0064-pinctrl-mlxbf3-set-varaiable-mlxbf3_pmx_funcs-storag.patch +0085-hwmon-mlxreg-fan-Separate-methods-of-fan-setting-com.patch +8003-mlxsw-i2c-SONIC-ISSU-Prevent-transaction-execution-f.patch +8005-leds-leds-mlxreg-Downstream-Send-udev-event-from-led.patch +8006-i2c-mlxcpld-Downstream-WA-to-avoid-error-for-SMBUS-r.patch +8007-hwmon-mlxreg-fan-Downstream-Allow-fan-speed-setting-.patch +8008-hwmon-emc2305-Downstream-Allow-fan-speed-setting-gra.patch +8009-hwmon-mlxsw-Downstream-Allow-fan-speed-setting-granu.patch ###-> mellanox_hw_mgmt-end # Cisco patches for 5.10 kernel