From 61cb526b45c873be1f3a5bd93526d149276d5d3b Mon Sep 17 00:00:00 2001 From: "stane.shieh" Date: Thu, 28 Dec 2017 16:05:12 +0800 Subject: [PATCH 1/4] Update .gitmodules For sonic-linux-kernel and sonic-platform-modules-mitac. Update and create submodules. --- .gitmodules | 5 ++++- platform/broadcom/sonic-platform-modules-mitac | 1 + 2 files changed, 5 insertions(+), 1 deletion(-) create mode 160000 platform/broadcom/sonic-platform-modules-mitac diff --git a/.gitmodules b/.gitmodules index 1c7a6da0281d..cf92fab92f26 100644 --- a/.gitmodules +++ b/.gitmodules @@ -3,7 +3,7 @@ url = https://github.com/Azure/sonic-swss-common [submodule "sonic-linux-kernel"] path = src/sonic-linux-kernel - url = https://github.com/Azure/sonic-linux-kernel + url = https://github.com/MiTAC-EBU/sonic-linux-kernel.git [submodule "sonic-sairedis"] path = src/sonic-sairedis url = https://github.com/Azure/sonic-sairedis @@ -71,3 +71,6 @@ [submodule "platform/nephos/sonic-platform-modules-ingrasys"] path = platform/nephos/sonic-platform-modules-ingrasys url = https://github.com/Ingrasys-sonic/sonic-platform-modules-ingrasys-nephos.git +[submodule "platform/broadcom/sonic-platform-modules-mitac"] + path = platform/broadcom/sonic-platform-modules-mitac + url = https://github.com/MiTAC-EBU/sonic-platform-modules-mitac.git diff --git a/platform/broadcom/sonic-platform-modules-mitac b/platform/broadcom/sonic-platform-modules-mitac new file mode 160000 index 000000000000..689b2b35d481 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-mitac @@ -0,0 +1 @@ +Subproject commit 689b2b35d481b4c213324ecb13ddf09481292808 From b99bedd23a7001ec6669545beb096722ef4c993c Mon Sep 17 00:00:00 2001 From: "eddy.weng" Date: Thu, 18 Jan 2018 10:56:30 +0800 Subject: [PATCH 2/4] [MiTAC ly1200] Add new platform and device for ly1200 Signed-off-by: Eddy Weng --- .../MiTAC-LY1200-B32H0-C3/port_config.ini | 33 + .../MiTAC-LY1200-B32H0-C3/sai.profile | 1 + .../installer.conf | 4 + .../led_proc_init.soc | 45 + .../minigraph.xml | 1074 +++++++++++++++++ .../plugins/eeprom.py | 24 + .../plugins/sfputil.py | 182 +++ .../update_data_ram | 87 ++ platform/broadcom/one-image.mk | 3 +- platform/broadcom/platform-modules-mitac.mk | 11 + platform/broadcom/rules.mk | 1 + .../broadcom/sonic-platform-modules-mitac | 2 +- src/sonic-linux-kernel | 2 +- 13 files changed, 1466 insertions(+), 3 deletions(-) create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/port_config.ini create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/sai.profile create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/installer.conf create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/led_proc_init.soc create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/minigraph.xml create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/eeprom.py create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py create mode 100644 device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/update_data_ram create mode 100644 platform/broadcom/platform-modules-mitac.mk diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/port_config.ini b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/port_config.ini new file mode 100644 index 000000000000..1fa6d21d9609 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/port_config.ini @@ -0,0 +1,33 @@ +# name lanes alias +Ethernet0 49,50,51,52 hundredGigE1 +Ethernet4 53,54,55,56 hundredGigE2 +Ethernet8 57,58,59,60 hundredGigE3 +Ethernet12 61,62,63,64 hundredGigE4 +Ethernet16 65,66,67,68 hundredGigE5 +Ethernet20 69,70,71,72 hundredGigE6 +Ethernet24 73,74,75,76 hundredGigE7 +Ethernet28 77,78,79,80 hundredGigE8 +Ethernet32 33,34,35,36 hundredGigE9 +Ethernet36 37,38,39,40 hundredGigE10 +Ethernet40 41,42,43,44 hundredGigE11 +Ethernet44 45,46,47,48 hundredGigE12 +Ethernet48 81,82,83,84 hundredGigE13 +Ethernet52 85,86,87,88 hundredGigE14 +Ethernet56 89,90,91,92 hundredGigE15 +Ethernet60 93,94,95,96 hundredGigE16 +Ethernet64 97,98,99,100 hundredGigE17 +Ethernet68 101,102,103,104 hundredGigE18 +Ethernet72 105,106,107,108 hundredGigE19 +Ethernet76 109,110,111,112 hundredGigE20 +Ethernet80 17,18,19,20 hundredGigE21 +Ethernet84 21,22,23,24 hundredGigE22 +Ethernet88 25,26,27,28 hundredGigE23 +Ethernet92 29,30,31,32 hundredGigE24 +Ethernet96 113,114,115,116 hundredGigE25 +Ethernet100 117,118,119,120 hundredGigE26 +Ethernet104 121,122,123,124 hundredGigE27 +Ethernet108 125,126,127,128 hundredGigE28 +Ethernet112 1,2,3,4 hundredGigE29 +Ethernet116 5,6,7,8 hundredGigE30 +Ethernet120 9,10,11,12 hundredGigE31 +Ethernet124 13,14,15,16 hundredGigE32 diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/sai.profile b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/sai.profile new file mode 100644 index 000000000000..5bf97eb31a4c --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/MiTAC-LY1200-B32H0-C3/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/etc/bcm/th-ly1200-32x100G.config.bcm diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/installer.conf b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/installer.conf new file mode 100644 index 000000000000..8d4683add468 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/installer.conf @@ -0,0 +1,4 @@ +CONSOLE_PORT=0x3f8 +CONSOLE_DEV=0 +CONSOLE_SPEED=115200 +ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="acpi_enforce_resources=lax pcie_aspm=off irqpoll" diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/led_proc_init.soc b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/led_proc_init.soc new file mode 100644 index 000000000000..165c136f153f --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/led_proc_init.soc @@ -0,0 +1,45 @@ +m CMIC_LEDUP0_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=31 REMAP_PORT_1=30 REMAP_PORT_2=29 REMAP_PORT_3=28 +m CMIC_LEDUP0_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=27 REMAP_PORT_5=26 REMAP_PORT_6=25 REMAP_PORT_7=24 +m CMIC_LEDUP0_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=23 REMAP_PORT_9=22 REMAP_PORT_10=21 REMAP_PORT_11=20 +m CMIC_LEDUP0_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=19 REMAP_PORT_13=18 REMAP_PORT_14=17 REMAP_PORT_15=16 +m CMIC_LEDUP0_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=63 REMAP_PORT_17=62 REMAP_PORT_18=61 REMAP_PORT_19=60 +m CMIC_LEDUP0_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=59 REMAP_PORT_21=58 REMAP_PORT_22=57 REMAP_PORT_23=56 +m CMIC_LEDUP0_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=55 REMAP_PORT_25=54 REMAP_PORT_26=53 REMAP_PORT_27=52 +m CMIC_LEDUP0_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=51 REMAP_PORT_29=50 REMAP_PORT_30=49 REMAP_PORT_31=48 +m CMIC_LEDUP0_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=47 REMAP_PORT_33=46 REMAP_PORT_34=45 REMAP_PORT_35=44 +m CMIC_LEDUP0_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=43 REMAP_PORT_37=42 REMAP_PORT_38=41 REMAP_PORT_39=40 +m CMIC_LEDUP0_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=39 REMAP_PORT_41=38 REMAP_PORT_42=37 REMAP_PORT_43=36 +m CMIC_LEDUP0_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=35 REMAP_PORT_45=34 REMAP_PORT_46=33 REMAP_PORT_47=32 +m CMIC_LEDUP0_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=15 REMAP_PORT_49=14 REMAP_PORT_50=13 REMAP_PORT_51=12 +m CMIC_LEDUP0_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=11 REMAP_PORT_53=10 REMAP_PORT_54=9 REMAP_PORT_55=8 +m CMIC_LEDUP0_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=7 REMAP_PORT_57=6 REMAP_PORT_58=5 REMAP_PORT_59=4 +m CMIC_LEDUP0_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=3 REMAP_PORT_61=2 REMAP_PORT_62=1 REMAP_PORT_63=0 + +m CMIC_LEDUP1_PORT_ORDER_REMAP_0_3 REMAP_PORT_0=35 REMAP_PORT_1=34 REMAP_PORT_2=33 REMAP_PORT_3=32 +m CMIC_LEDUP1_PORT_ORDER_REMAP_4_7 REMAP_PORT_4=39 REMAP_PORT_5=38 REMAP_PORT_6=37 REMAP_PORT_7=36 +m CMIC_LEDUP1_PORT_ORDER_REMAP_8_11 REMAP_PORT_8=43 REMAP_PORT_9=42 REMAP_PORT_10=41 REMAP_PORT_11=40 +m CMIC_LEDUP1_PORT_ORDER_REMAP_12_15 REMAP_PORT_12=47 REMAP_PORT_13=46 REMAP_PORT_14=45 REMAP_PORT_15=44 +m CMIC_LEDUP1_PORT_ORDER_REMAP_16_19 REMAP_PORT_16=3 REMAP_PORT_17=2 REMAP_PORT_18=1 REMAP_PORT_19=0 +m CMIC_LEDUP1_PORT_ORDER_REMAP_20_23 REMAP_PORT_20=7 REMAP_PORT_21=6 REMAP_PORT_22=5 REMAP_PORT_23=4 +m CMIC_LEDUP1_PORT_ORDER_REMAP_24_27 REMAP_PORT_24=11 REMAP_PORT_25=10 REMAP_PORT_26=9 REMAP_PORT_27=8 +m CMIC_LEDUP1_PORT_ORDER_REMAP_28_31 REMAP_PORT_28=15 REMAP_PORT_29=14 REMAP_PORT_30=13 REMAP_PORT_31=12 +m CMIC_LEDUP1_PORT_ORDER_REMAP_32_35 REMAP_PORT_32=19 REMAP_PORT_33=18 REMAP_PORT_34=17 REMAP_PORT_35=16 +m CMIC_LEDUP1_PORT_ORDER_REMAP_36_39 REMAP_PORT_36=23 REMAP_PORT_37=22 REMAP_PORT_38=21 REMAP_PORT_39=20 +m CMIC_LEDUP1_PORT_ORDER_REMAP_40_43 REMAP_PORT_40=27 REMAP_PORT_41=26 REMAP_PORT_42=25 REMAP_PORT_43=24 +m CMIC_LEDUP1_PORT_ORDER_REMAP_44_47 REMAP_PORT_44=31 REMAP_PORT_45=30 REMAP_PORT_46=29 REMAP_PORT_47=28 +m CMIC_LEDUP1_PORT_ORDER_REMAP_48_51 REMAP_PORT_48=51 REMAP_PORT_49=50 REMAP_PORT_50=49 REMAP_PORT_51=48 +m CMIC_LEDUP1_PORT_ORDER_REMAP_52_55 REMAP_PORT_52=55 REMAP_PORT_53=54 REMAP_PORT_54=53 REMAP_PORT_55=52 +m CMIC_LEDUP1_PORT_ORDER_REMAP_56_59 REMAP_PORT_56=59 REMAP_PORT_57=58 REMAP_PORT_58=57 REMAP_PORT_59=56 +m CMIC_LEDUP1_PORT_ORDER_REMAP_60_63 REMAP_PORT_60=63 REMAP_PORT_61=62 REMAP_PORT_62=61 REMAP_PORT_63=60 + +led 0 prog 06 EE 80 D2 0A 71 08 E0 60 EE E9 D2 05 75 10 81 61 ED 02 00 12 A0 F8 15 67 22 F2 01 D2 40 74 14 3A 80 1A 01 71 28 77 63 1A 07 71 2E 77 3A 1A 02 27 1A 03 27 C7 97 71 5C 77 48 28 32 00 32 01 B7 26 ED C7 97 75 48 77 63 1A 02 71 4E 77 55 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 57 32 0E 87 32 0E 87 57 32 0F 87 32 0F 87 57 00 00 00 00 00 00 + +led 0 start + +led 1 prog 06 EE 80 D2 0A 71 08 E0 60 EE E9 D2 05 75 10 81 61 ED 02 00 12 A0 F8 15 67 22 F2 01 D2 40 74 14 3A 80 1A 01 71 28 77 63 1A 07 71 2E 77 3A 1A 02 27 1A 03 27 C7 97 71 5C 77 48 28 32 00 32 01 B7 26 ED C7 97 75 48 77 63 1A 02 71 4E 77 55 32 0E 87 32 0F 87 57 32 0F 87 32 0E 87 57 32 0E 87 32 0E 87 57 32 0F 87 32 0F 87 57 00 00 00 00 00 00 + +led 1 start + +led auto on + +cint /usr/share/sonic/platform/update_data_ram diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/minigraph.xml b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/minigraph.xml new file mode 100644 index 000000000000..05ff699c2bda --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/minigraph.xml @@ -0,0 +1,1074 @@ + + + + + + ARISTA01T0 + 10.0.0.33 + switch1 + 10.0.0.32 + 1 + 180 + 60 + + + switch1 + 10.0.0.0 + ARISTA01T2 + 10.0.0.1 + 1 + 180 + 60 + + + ARISTA02T0 + 10.0.0.35 + switch1 + 10.0.0.34 + 1 + 180 + 60 + + + switch1 + 10.0.0.2 + ARISTA02T2 + 10.0.0.3 + 1 + 180 + 60 + + + ARISTA03T0 + 10.0.0.37 + switch1 + 10.0.0.36 + 1 + 180 + 60 + + + switch1 + 10.0.0.4 + ARISTA03T2 + 10.0.0.5 + 1 + 180 + 60 + + + ARISTA04T0 + 10.0.0.39 + switch1 + 10.0.0.38 + 1 + 180 + 60 + + + switch1 + 10.0.0.6 + ARISTA04T2 + 10.0.0.7 + 1 + 180 + 60 + + + ARISTA05T0 + 10.0.0.41 + switch1 + 10.0.0.40 + 1 + 180 + 60 + + + switch1 + 10.0.0.8 + ARISTA05T2 + 10.0.0.9 + 1 + 180 + 60 + + + ARISTA06T0 + 10.0.0.43 + switch1 + 10.0.0.42 + 1 + 180 + 60 + + + switch1 + 10.0.0.10 + ARISTA06T2 + 10.0.0.11 + 1 + 180 + 60 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+
+ + + + + + HostIP + Loopback0 + + 10.1.0.32/32 + + 10.1.0.32/32 + + + + + + + + switch1 + + + + + + Ethernet0 + 10.0.0.0/31 + + + + Ethernet4 + 10.0.0.2/31 + + + + Ethernet8 + 10.0.0.4/31 + + + + Ethernet12 + 10.0.0.6/31 + + + + Ethernet16 + 10.0.0.8/31 + + + + Ethernet20 + 10.0.0.10/31 + + + + Ethernet24 + 10.0.0.12/31 + + + + Ethernet28 + 10.0.0.14/31 + + + + Ethernet32 + 10.0.0.16/31 + + + + Ethernet36 + 10.0.0.18/31 + + + + Ethernet40 + 10.0.0.20/31 + + + + Ethernet44 + 10.0.0.22/31 + + + + Ethernet48 + 10.0.0.24/31 + + + + Ethernet52 + 10.0.0.26/31 + + + + Ethernet56 + 10.0.0.28/31 + + + + Ethernet60 + 10.0.0.30/31 + + + + Ethernet64 + 10.0.0.32/31 + + + + Ethernet68 + 10.0.0.34/31 + + + + Ethernet72 + 10.0.0.36/31 + + + + Ethernet76 + 10.0.0.38/31 + + + + Ethernet80 + 10.0.0.40/31 + + + + Ethernet84 + 10.0.0.42/31 + + + + Ethernet88 + 10.0.0.44/31 + + + + Ethernet92 + 10.0.0.46/31 + + + + Ethernet96 + 10.0.0.48/31 + + + + Ethernet100 + 10.0.0.50/31 + + + + Ethernet104 + 10.0.0.52/31 + + + + Ethernet108 + 10.0.0.54/31 + + + + Ethernet112 + 10.0.0.56/31 + + + + Ethernet116 + 10.0.0.58/31 + + + + Ethernet120 + 10.0.0.60/31 + + + + Ethernet124 + 10.0.0.62/31 + + + + + + + + + + + + DeviceInterfaceLink + switch1 + Ethernet0 + ARISTA01T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet4 + ARISTA02T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet8 + ARISTA03T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet12 + ARISTA04T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet16 + ARISTA05T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet20 + ARISTA06T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet24 + ARISTA07T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet28 + ARISTA08T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet32 + ARISTA09T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet36 + ARISTA10T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet40 + ARISTA11T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet44 + ARISTA12T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet48 + ARISTA13T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet52 + ARISTA14T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet56 + ARISTA15T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet60 + ARISTA16T2 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet64 + ARISTA01T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet68 + ARISTA02T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet72 + ARISTA03T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet76 + ARISTA04T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet80 + ARISTA05T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet84 + ARISTA06T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet88 + ARISTA07T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet92 + ARISTA08T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet96 + ARISTA09T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet100 + ARISTA10T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet104 + ARISTA11T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet108 + ARISTA12T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet112 + ARISTA13T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet116 + ARISTA14T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet120 + ARISTA15T0 + Ethernet1 + + + DeviceInterfaceLink + switch1 + Ethernet124 + ARISTA16T0 + Ethernet1 + + + + + switch1 + MiTAC-LY1200-B32H0-C3 + + + + + + + switch1 + + + DhcpResources + + + + + NtpResources + + 0.debian.pool.ntp.org;1.debian.pool.ntp.org;2.debian.pool.ntp.org;3.debian.pool.ntp.org + + + SyslogResources + + + + + + + + + switch1 + MiTAC-LY1200-B32H0-C3 +
diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/eeprom.py b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/eeprom.py new file mode 100644 index 000000000000..96dcc5975328 --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/eeprom.py @@ -0,0 +1,24 @@ +#!/usr/bin/env python + +try: + import exceptions + import binascii + import time + import optparse + import warnings + import os + import sys + from sonic_eeprom import eeprom_base + from sonic_eeprom import eeprom_tlvinfo + import subprocess +except ImportError, e: + raise ImportError (str(e) + "- required module not found") + +class board(eeprom_tlvinfo.TlvInfoDecoder): + _TLV_INFO_MAX_LEN = 256 + def __init__(self, name, path, cpld_root, ro): + self.eeprom_path = "/sys/bus/i2c/devices/2-0050/eeprom" + #Two i2c buses might get flipped order, check them both. + if not os.path.exists(self.eeprom_path): + self.eeprom_path = "/sys/bus/i2c/devices/2-0050/eeprom" + super(board, self).__init__(self.eeprom_path, 0, '', True) diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py new file mode 100644 index 000000000000..17d4d2f95b5f --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/plugins/sfputil.py @@ -0,0 +1,182 @@ +# sfputil.py +# +# Platform-specific SFP transceiver interface for SONiC +# + +try: + import time + from sonic_sfp.sfputilbase import SfpUtilBase +except ImportError as e: + raise ImportError("%s - required module not found" % str(e)) + + +class SfpUtil(SfpUtilBase): + """Platform-specific SfpUtil class""" + + PORT_START = 0 + PORT_END = 31 + PORTS_IN_BLOCK = 32 + + EEPROM_OFFSET = 10 + + _port_to_eeprom_mapping = {} + + @property + def port_start(self): + return self.PORT_START + + @property + def port_end(self): + return self.PORT_END + + @property + def qsfp_ports(self): + return range(0, self.PORTS_IN_BLOCK + 1) + + @property + def port_to_eeprom_mapping(self): + return self._port_to_eeprom_mapping + + def __init__(self): + eeprom_path = "/sys/class/i2c-adapter/i2c-{0}/{0}-0050/eeprom" + + for x in range(0, self.port_end + 1): + self._port_to_eeprom_mapping[x] = eeprom_path.format(x + self.EEPROM_OFFSET) + + SfpUtilBase.__init__(self) + + def get_presence(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_addr) + "/port" + str(port_num) + "/port" + str(port_num) + "_present" + + try: + reg_file = open("file_path") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + + # ModPrsL is active low + if reg_value == 0: + return True + + return False + + def get_low_power_mode(self, port_num): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_addr) + "/port" + str(port_num) + "/port" + str(port_num) + "_lpmode" + + try: + reg_file = open(file_path) + except IOError as e: + print "Error: unable to open file: %s" % str(e) + + content = reg_file.readline().rstrip() + + # content is a string containing the hex representation of the register + reg_value = int(content, 16) + + # LPMode is active high + if reg_value == 0: + return False + + return True + + def set_low_power_mode(self, port_num, lpmode): + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_num) + "/port" + str(port_num) + "/port" + str(port_num) + "_lpmode" + + try: + reg_file = open(file_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # LPMode is active high; set or clear the bit accordingly + if lpmode is True: + reg_value = 1 + else: + reg_value = 0 + + # Convert our register value back to a hex string and write back + content = hex(reg_value) + + reg_file.seek(0) + reg_file.write(content) + reg_file.close() + + return True + + def reset(self, port_num): + + # Check for invalid port_num + if port_num < self.port_start or port_num > self.port_end: + return False + + if port_num > 16: + cpld_addr=33 + else: + cpld_addr=32 + + file_path="/sys/bus/i2c/devices/1-00" + str(cpld_num) + "/port" + str(port_num) + "/port" + str(port_num) + "_rst" + + try: + reg_file = open(file_path, "r+") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + # ResetL is active low + reg_value = 0 + + # Convert our register value back to a hex string and write back + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + # Sleep 1 second to allow it to settle + time.sleep(1) + + # Flip the bit back high and write back to the register to take port out of reset + try: + reg_file = open(QSFP_RESET_REGISTER_DEVICE_FILE, "w") + except IOError as e: + print "Error: unable to open file: %s" % str(e) + return False + + reg_value = 1 + reg_file.seek(0) + reg_file.write(hex(reg_value)) + reg_file.close() + + return True diff --git a/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/update_data_ram b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/update_data_ram new file mode 100644 index 000000000000..8dce3925827b --- /dev/null +++ b/device/mitac/x86_64-mitac_ly1200_b32h0_c3-r0/update_data_ram @@ -0,0 +1,87 @@ +void +dport_from_port(int phy_port, int *dport) { + int i, phy_size; + int phy_map[] = {102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83,34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}; + + phy_size = sizeof(phy_map) / sizeof(phy_map[0]); + + for(i=0;i 31 && dport < 96) { + led_ix = 1; + dport -= 32; + }else if (dport > 31) { + dport -= 64; + } + + if(led_ix == 0){ + byte = 0x20680 + 4 * dport; + }else{ + byte = 0x21680 + 4 * dport; + } + + diag_pcie_read(0,byte,&portdata,0); + + if (info->linkstatus == BCM_PORT_LINK_STATUS_UP) { + int speed = 0; + portdata |= 0x02; + + /* get port speed */ + bcm_port_speed_get(unit, port, &speed); + + /* Port speed */ + if(speed == 100000){ + /* Bit5Bit4Bit3 = 101-100G */ + portdata = (portdata & ~0x08) | 0x14; + }else if(speed == 40000){ + /* Bit5Bit4Bit3 = 100-40G */ + portdata = (portdata & ~0x0c) | 0x10; + }else if(speed == 50000){ + /* Bit5Bit4Bit3 = 010-50G */ + portdata = (portdata & ~0x14) | 0x08; + }else if(speed == 25000){ + /* Bit5Bit4Bit3 = 001-25G */ + portdata = (portdata & ~0x18) | 0x04; + }else if(speed == 10000){ + /* Bit5Bit4Bit3 = 000-10G */ + portdata = portdata & ~0x1c; + } + } else { + portdata &= ~0x02; + } + + diag_pcie_write(0,byte,portdata,0); + +} + +int +link_monitor(int unit, int state) +{ + bcm_port_config_t config; + if (state) { + BCM_IF_ERROR_RETURN(bcm_linkscan_register(unit, link_callback)); + BCM_IF_ERROR_RETURN(bcm_port_config_get(unit, &config)); + BCM_IF_ERROR_RETURN(bcm_link_change(unit, config.port)); + } else { + BCM_IF_ERROR_RETURN(bcm_linkscan_unregister(unit, link_callback)); + } + return BCM_E_NONE; +} + +link_monitor(0,1); diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index a29d32abd1c2..a6640c8cd3b8 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -18,6 +18,7 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(INVENTEC_D7032Q28B_PLATFORM_MODULE) \ $(INVENTEC_D7054Q28B_PLATFORM_MODULE) \ $(CEL_DX010_PLATFORM_MODULE) \ - $(DELTA_AG9032V1_PLATFORM_MODULE) + $(DELTA_AG9032V1_PLATFORM_MODULE) \ + $(MITAC_LY1200_32X_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_DOCKERS += $(SONIC_INSTALL_DOCKER_IMAGES) SONIC_INSTALLERS += $(SONIC_ONE_IMAGE) diff --git a/platform/broadcom/platform-modules-mitac.mk b/platform/broadcom/platform-modules-mitac.mk new file mode 100644 index 000000000000..07cf8617dd5c --- /dev/null +++ b/platform/broadcom/platform-modules-mitac.mk @@ -0,0 +1,11 @@ +# MiTAC Platform modules + +MITAC_LY1200_32X_PLATFORM_MODULE_VERSION = 1.0 + +export MITAC_LY1200_32X_PLATFORM_MODULE_VERSION + +MITAC_LY1200_32X_PLATFORM_MODULE = sonic-platform-mitac-ly1200-32x_$(MITAC_LY1200_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(MITAC_LY1200_32X_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-mitac +$(MITAC_LY1200_32X_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) +$(MITAC_LY1200_32X_PLATFORM_MODULE)_PLATFORM = x86_64-mitac_ly1200_b32h0_c3-r0 +SONIC_DPKG_DEBS += $(MITAC_LY1200_32X_PLATFORM_MODULE) diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk index e94361987963..f74d2b5b73b8 100755 --- a/platform/broadcom/rules.mk +++ b/platform/broadcom/rules.mk @@ -8,6 +8,7 @@ include $(PLATFORM_PATH)/platform-modules-accton.mk include $(PLATFORM_PATH)/platform-modules-inventec.mk include $(PLATFORM_PATH)/platform-modules-cel.mk include $(PLATFORM_PATH)/platform-modules-delta.mk +include $(PLATFORM_PATH)/platform-modules-mitac.mk include $(PLATFORM_PATH)/docker-orchagent-brcm.mk include $(PLATFORM_PATH)/docker-syncd-brcm.mk include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk diff --git a/platform/broadcom/sonic-platform-modules-mitac b/platform/broadcom/sonic-platform-modules-mitac index 689b2b35d481..1d9e58425d87 160000 --- a/platform/broadcom/sonic-platform-modules-mitac +++ b/platform/broadcom/sonic-platform-modules-mitac @@ -1 +1 @@ -Subproject commit 689b2b35d481b4c213324ecb13ddf09481292808 +Subproject commit 1d9e58425d8723f7ef9a6aaa87188186a7ba2a9e diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index ff5a3b588cc7..e55561c1c0f4 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit ff5a3b588cc7dbd763fb13c1125710134c8cdd12 +Subproject commit e55561c1c0f4f1e00c6db31ee3683e9223e55de3 From 2e18756f2c0d82222304a1fc88c58a7b876b57c6 Mon Sep 17 00:00:00 2001 From: "eddy.weng" Date: Thu, 18 Jan 2018 14:38:08 +0800 Subject: [PATCH 3/4] Modify submodule commit code Signed-off-by: Eddy Weng --- platform/broadcom/sonic-platform-modules-mitac | 2 +- src/sonic-linux-kernel | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/platform/broadcom/sonic-platform-modules-mitac b/platform/broadcom/sonic-platform-modules-mitac index 1d9e58425d87..024d71fcc653 160000 --- a/platform/broadcom/sonic-platform-modules-mitac +++ b/platform/broadcom/sonic-platform-modules-mitac @@ -1 +1 @@ -Subproject commit 1d9e58425d8723f7ef9a6aaa87188186a7ba2a9e +Subproject commit 024d71fcc653ac59931a83f13a6fcea0df95e292 diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index e55561c1c0f4..c28741c7007c 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit e55561c1c0f4f1e00c6db31ee3683e9223e55de3 +Subproject commit c28741c7007c624d8de28ab1e388cf5a7114def3 From d13c528b26a5808200b41bd6762a2dfa45676d57 Mon Sep 17 00:00:00 2001 From: "stane.shieh" Date: Mon, 22 Jan 2018 13:23:06 +0800 Subject: [PATCH 4/4] Restore .gitmodules to keep Azure sonic linux kernel Signed-off-by: Stane Shieh --- .gitmodules | 2 +- src/sonic-linux-kernel | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitmodules b/.gitmodules index cf92fab92f26..eb7d6b4d6609 100644 --- a/.gitmodules +++ b/.gitmodules @@ -3,7 +3,7 @@ url = https://github.com/Azure/sonic-swss-common [submodule "sonic-linux-kernel"] path = src/sonic-linux-kernel - url = https://github.com/MiTAC-EBU/sonic-linux-kernel.git + url = https://github.com/Azure/sonic-linux-kernel [submodule "sonic-sairedis"] path = src/sonic-sairedis url = https://github.com/Azure/sonic-sairedis diff --git a/src/sonic-linux-kernel b/src/sonic-linux-kernel index c28741c7007c..02b5c0b08f58 160000 --- a/src/sonic-linux-kernel +++ b/src/sonic-linux-kernel @@ -1 +1 @@ -Subproject commit c28741c7007c624d8de28ab1e388cf5a7114def3 +Subproject commit 02b5c0b08f5812d1d7af98f77dfdb2bb11ad1991