[STM32F446]: Wrong chip definition

[UserX404]

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• I made serious effort to avoid creating duplicate or nearly similar issue

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• Programmer/board type: [enter here] (e.g STLINK /V1, /V2, /V2-onboard, /V2-clone, /V3)
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• stlink commandline tool name: [enter here] (e.g st-info, st-flash, st-trace, st-util)
• Target chip (and board, if applicable): [STM32F446] (e.g STM32F103C8T6 (NUCLEO-F103RB))

Further we kindly ask you to describe the detected problem as detailed as possible and to add debug output if available, by using the following template:

Commandline output:

st-flash --area=option read
st-flash 1.7.0-184-g468b1d2
Failed to parse flash type or unrecognized flash type

detected chip_id parametres

# Device Type: STM32F446
# Reference Manual: RM0390
#
chip_id 0x421
flash_type 3
flash_size_reg 0x1fff7a22
flash_pagesize 0x20000
sram_size 0x20000
bootrom_base 0x1fff0000
bootrom_size 0x7800
option_base 0x40023c14
option_size 0x4
flags 2

2022-02-23T11:50:47 INFO common.c: STM32F446: 128 KiB SRAM, 512 KiB flash in at least 128 KiB pages.
0ffeaaed

Expected/description:

Introduced in this commit e62b9e1 the option byte area has been changed. This leads to a read-out of 0x40023c14 which is somwhere in the AHB1 area.

Please change back option area to 0x1FFFC000 with a size of 16bytes, as shown in the datasheet and the attached images.

[UserX404]

maybe dupe of #1156

[Nightwalker-87]

It should be ok to leave this open, even if it's a duplicate.
We can mark this ticket respectively.

[UserX404]

My thoughts about this issue were not correct.
I figured out 0x40023c14 (FLASH_OPTCT) is somehing like a shadow register of 0x1fffC000 and 0x1fffC800.
I just was focused to the option byte registers.

[Nightwalker-87]

The fixed memory address in commit e62b9e1 appears to be correct.
Further details can be found e.g. on the ST community forum: Link.