diff --git a/src/adc.rs b/src/adc.rs
index 24f81bf1..eb7c6960 100644
--- a/src/adc.rs
+++ b/src/adc.rs
@@ -256,24 +256,18 @@ macro_rules! adc_hal {
                 }
 
                 fn reset(&mut self) {
-                    unsafe {
-                        let rcc = &(*RCC::ptr());
-                        $ADC::reset(rcc);
-                    }
+                    let rcc = unsafe { &(*RCC::ptr()) };
+                    $ADC::reset(rcc);
                 }
 
                 fn enable_clock(&mut self) {
-                    unsafe {
-                        let rcc = &(*RCC::ptr());
-                        $ADC::enable(rcc);
-                    }
+                    let rcc = unsafe { &(*RCC::ptr()) };
+                    $ADC::enable(rcc);
                 }
 
                 fn disable_clock(&mut self) {
-                    unsafe {
-                        let rcc = &(*RCC::ptr());
-                        $ADC::disable(rcc);
-                    }
+                    let rcc = unsafe { &(*RCC::ptr()) };
+                    $ADC::disable(rcc);
                 }
 
                 fn calibrate(&mut self) {
diff --git a/src/afio.rs b/src/afio.rs
index 5d6140e3..5860d0eb 100644
--- a/src/afio.rs
+++ b/src/afio.rs
@@ -15,11 +15,9 @@ pub trait AfioExt {
 
 impl AfioExt for AFIO {
     fn constrain(self) -> Parts {
-        unsafe {
-            let rcc = &(*RCC::ptr());
-            AFIO::enable(rcc);
-            AFIO::reset(rcc);
-        }
+        let rcc = unsafe { &(*RCC::ptr()) };
+        AFIO::enable(rcc);
+        AFIO::reset(rcc);
 
         Parts {
             evcr: EVCR { _0: () },
diff --git a/src/can.rs b/src/can.rs
index 9412cfba..7ccf90a6 100644
--- a/src/can.rs
+++ b/src/can.rs
@@ -103,20 +103,18 @@ where
     /// prevent accidental shared usage.
     #[cfg(not(feature = "connectivity"))]
     pub fn new(can: Instance, _usb: USB) -> Can<Instance> {
-        unsafe {
-            let rcc = &(*RCC::ptr());
-            Instance::enable(rcc);
-        }
+        let rcc = unsafe { &(*RCC::ptr()) };
+        Instance::enable(rcc);
+
         Can { _peripheral: can }
     }
 
     /// Creates a CAN interaface.
     #[cfg(feature = "connectivity")]
     pub fn new(can: Instance) -> Can<Instance> {
-        unsafe {
-            let rcc = &(*RCC::ptr());
-            Instance::enable(rcc);
-        }
+        let rcc = unsafe { &(*RCC::ptr()) };
+        Instance::enable(rcc);
+
         Can { _peripheral: can }
     }
 
diff --git a/src/crc.rs b/src/crc.rs
index ea768d1f..252ee171 100644
--- a/src/crc.rs
+++ b/src/crc.rs
@@ -12,10 +12,9 @@ pub trait CrcExt {
 
 impl CrcExt for CRC {
     fn new(self) -> Crc {
-        unsafe {
-            let rcc = &(*RCC::ptr());
-            CRC::enable(rcc);
-        }
+        let rcc = unsafe { &(*RCC::ptr()) };
+        CRC::enable(rcc);
+
         Crc { crc: self }
     }
 }
diff --git a/src/dma.rs b/src/dma.rs
index 39d36d83..e04eca48 100644
--- a/src/dma.rs
+++ b/src/dma.rs
@@ -447,10 +447,8 @@ macro_rules! dma {
                     type Channels = Channels;
 
                     fn split(self) -> Channels {
-                        unsafe {
-                            let rcc = &(*RCC::ptr());
-                            $DMAX::enable(rcc);
-                        }
+                        let rcc = unsafe { &(*RCC::ptr()) };
+                        $DMAX::enable(rcc);
 
                         // reset the DMA control registers (stops all on-going transfers)
                         $(
diff --git a/src/gpio.rs b/src/gpio.rs
index 2aa35825..faf3365e 100644
--- a/src/gpio.rs
+++ b/src/gpio.rs
@@ -371,11 +371,9 @@ macro_rules! gpio {
                 type Parts = Parts;
 
                 fn split(self) -> Parts {
-                    unsafe {
-                        let rcc = &(*RCC::ptr());
-                        $GPIOX::enable(rcc);
-                        $GPIOX::reset(rcc);
-                    }
+                    let rcc = unsafe { &(*RCC::ptr()) };
+                    $GPIOX::enable(rcc);
+                    $GPIOX::reset(rcc);
 
                     Parts {
                         crl: Cr::<CRL, $port_id> { _cr: PhantomData },
diff --git a/src/i2c.rs b/src/i2c.rs
index 66cbe7ab..df045bbe 100644
--- a/src/i2c.rs
+++ b/src/i2c.rs
@@ -266,11 +266,9 @@ where
 {
     /// Configures the I2C peripheral to work in master mode
     fn _i2c(i2c: I2C, pins: PINS, mode: Mode, clocks: Clocks) -> Self {
-        unsafe {
-            let rcc = &(*RCC::ptr());
-            I2C::enable(rcc);
-            I2C::reset(rcc);
-        }
+        let rcc = unsafe { &(*RCC::ptr()) };
+        I2C::enable(rcc);
+        I2C::reset(rcc);
 
         let pclk1 = I2C::Bus::get_frequency(&clocks).0;
 
diff --git a/src/rcc.rs b/src/rcc.rs
index 410fc18f..a9e7ff78 100644
--- a/src/rcc.rs
+++ b/src/rcc.rs
@@ -54,7 +54,7 @@ pub struct AHB {
 }
 
 impl AHB {
-    fn enr(rcc: &RccRB) -> &rcc::AHBENR {
+    fn enr(rcc: &rcc::RegisterBlock) -> &rcc::AHBENR {
         &rcc.ahbenr
     }
 }
@@ -65,11 +65,11 @@ pub struct APB1 {
 }
 
 impl APB1 {
-    fn enr(rcc: &RccRB) -> &rcc::APB1ENR {
+    fn enr(rcc: &rcc::RegisterBlock) -> &rcc::APB1ENR {
         &rcc.apb1enr
     }
 
-    fn rstr(rcc: &RccRB) -> &rcc::APB1RSTR {
+    fn rstr(rcc: &rcc::RegisterBlock) -> &rcc::APB1RSTR {
         &rcc.apb1rstr
     }
 }
@@ -77,10 +77,8 @@ impl APB1 {
 impl APB1 {
     /// Set power interface clock (PWREN) bit in RCC_APB1ENR
     pub fn set_pwren() {
-        unsafe {
-            let rcc = &*RCC::ptr();
-            PWR::enable(rcc);
-        }
+        let rcc = unsafe { &*RCC::ptr() };
+        PWR::enable(rcc);
     }
 }
 
@@ -90,11 +88,11 @@ pub struct APB2 {
 }
 
 impl APB2 {
-    fn enr(rcc: &RccRB) -> &rcc::APB2ENR {
+    fn enr(rcc: &rcc::RegisterBlock) -> &rcc::APB2ENR {
         &rcc.apb2enr
     }
 
-    fn rstr(rcc: &RccRB) -> &rcc::APB2RSTR {
+    fn rstr(rcc: &rcc::RegisterBlock) -> &rcc::APB2RSTR {
         &rcc.apb2rstr
     }
 }
@@ -422,10 +420,8 @@ impl BKP {
     /// Enables write access to the registers in the backup domain
     pub fn constrain(self, bkp: crate::pac::BKP, pwr: &mut PWR) -> BackupDomain {
         // Enable the backup interface by setting PWREN and BKPEN
-        unsafe {
-            let rcc = &(*RCC::ptr());
-            crate::pac::BKP::enable(rcc);
-        }
+        let rcc = unsafe { &(*RCC::ptr()) };
+        crate::pac::BKP::enable(rcc);
 
         // Enable access to the backup registers
         pwr.cr.modify(|_r, w| w.dbp().set_bit());
@@ -543,8 +539,6 @@ impl GetBusFreq for APB2 {
     }
 }
 
-use crate::pac::rcc::RegisterBlock as RccRB;
-
 pub(crate) mod sealed {
 
     pub trait Sealed {}
@@ -559,10 +553,10 @@ pub trait RccBus {
 
 /// Enable/disable peripheral
 pub trait Enable: RccBus {
-    fn enable(rcc: &RccRB);
-    fn disable(rcc: &RccRB);
+    fn enable(rcc: &rcc::RegisterBlock);
+    fn disable(rcc: &rcc::RegisterBlock);
 }
 /// Reset peripheral
 pub trait Reset: RccBus {
-    fn reset(rcc: &RccRB);
+    fn reset(rcc: &rcc::RegisterBlock);
 }
diff --git a/src/rcc/enable.rs b/src/rcc/enable.rs
index a65d11c4..d09622c3 100644
--- a/src/rcc/enable.rs
+++ b/src/rcc/enable.rs
@@ -4,20 +4,20 @@ use crate::bb;
 macro_rules! bus {
     ($($PER:ident => ($apbX:ty, $bit:literal),)+) => {
         $(
-			impl Sealed for crate::pac::$PER {}
+            impl Sealed for crate::pac::$PER {}
 
             impl RccBus for crate::pac::$PER {
                 type Bus = $apbX;
             }
             impl Enable for crate::pac::$PER {
                 #[inline(always)]
-                fn enable(rcc: &RccRB) {
+                fn enable(rcc: &rcc::RegisterBlock) {
                     unsafe {
                         bb::set(Self::Bus::enr(rcc), $bit);
                     }
                 }
                 #[inline(always)]
-                fn disable(rcc: &RccRB) {
+                fn disable(rcc: &rcc::RegisterBlock) {
                     unsafe {
                         bb::clear(Self::Bus::enr(rcc), $bit);
                     }
@@ -25,7 +25,7 @@ macro_rules! bus {
             }
             impl Reset for crate::pac::$PER {
                 #[inline(always)]
-                fn reset(rcc: &RccRB) {
+                fn reset(rcc: &rcc::RegisterBlock) {
                     unsafe {
                         bb::set(Self::Bus::rstr(rcc), $bit);
                         bb::clear(Self::Bus::rstr(rcc), $bit);
@@ -44,13 +44,13 @@ macro_rules! ahb_bus {
             }
             impl Enable for crate::pac::$PER {
                 #[inline(always)]
-                fn enable(rcc: &RccRB) {
+                fn enable(rcc: &rcc::RegisterBlock) {
                     unsafe {
                         bb::set(Self::Bus::enr(rcc), $bit);
                     }
                 }
                 #[inline(always)]
-                fn disable(rcc: &RccRB) {
+                fn disable(rcc: &rcc::RegisterBlock) {
                     unsafe {
                         bb::clear(Self::Bus::enr(rcc), $bit);
                     }
diff --git a/src/serial.rs b/src/serial.rs
index 1aebacb3..70923887 100644
--- a/src/serial.rs
+++ b/src/serial.rs
@@ -300,11 +300,9 @@ macro_rules! hal {
                     PINS: Pins<$USARTX>,
                 {
                     // enable and reset $USARTX
-                    unsafe {
-                        let rcc = &(*RCC::ptr());
-                        $USARTX::enable(rcc);
-                        $USARTX::reset(rcc);
-                    }
+                    let rcc = unsafe { &(*RCC::ptr()) };
+                    $USARTX::enable(rcc);
+                    $USARTX::reset(rcc);
 
                     #[allow(unused_unsafe)]
                     mapr.modify_mapr(|_, w| unsafe{
diff --git a/src/spi.rs b/src/spi.rs
index 93a0f535..c15f1fdc 100644
--- a/src/spi.rs
+++ b/src/spi.rs
@@ -330,11 +330,9 @@ where
 {
     fn _spi(spi: SPI, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self {
         // enable or reset SPI
-        unsafe {
-            let rcc = &(*RCC::ptr());
-            SPI::enable(rcc);
-            SPI::reset(rcc);
-        }
+        let rcc = unsafe { &(*RCC::ptr()) };
+        SPI::enable(rcc);
+        SPI::reset(rcc);
 
         // disable SS output
         spi.cr2.write(|w| w.ssoe().clear_bit());
diff --git a/src/timer.rs b/src/timer.rs
index 13a6d557..63f2c778 100644
--- a/src/timer.rs
+++ b/src/timer.rs
@@ -282,11 +282,9 @@ macro_rules! hal {
                 /// Initialize timer
                 pub fn $timX(tim: $TIMX, clocks: &Clocks) -> Self {
                     // enable and reset peripheral to a clean slate state
-                    unsafe {
-                        let rcc = &(*RCC::ptr());
-                        $TIMX::enable(rcc);
-                        $TIMX::reset(rcc);
-                    }
+                    let rcc = unsafe { &(*RCC::ptr()) };
+                    $TIMX::enable(rcc);
+                    $TIMX::reset(rcc);
 
                     Self { tim, clk: <$TIMX as RccBus>::Bus::get_timer_frequency(&clocks) }
                 }
@@ -328,10 +326,8 @@ macro_rules! hal {
                 /// Resets timer peripheral
                 #[inline(always)]
                 pub fn clocking_reset(&mut self) {
-                    unsafe {
-                        let rcc = &(*RCC::ptr());
-                        $TIMX::reset(rcc);
-                    }
+                    let rcc = unsafe { &(*RCC::ptr()) };
+                    $TIMX::reset(rcc);
                 }
 
                 /// Stopping timer in debug mode can cause troubles when sampling the signal