From 975f5d03cc7177e261d401c3035798c8b19d26c4 Mon Sep 17 00:00:00 2001 From: AndreySmirnov81 <19325847+AndreySmirnov81@users.noreply.github.com> Date: Fri, 18 Feb 2022 13:08:42 +0300 Subject: [PATCH] Rename Serial items --- src/serial.rs | 33 ++++++++++++++++++++------------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/src/serial.rs b/src/serial.rs index 62073ba2..d6bfcc5f 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -153,10 +153,12 @@ impl Pins for (PD8>, PD9 Self { - self.wordlength = WordLength::DataBits8; + pub fn wordlength_8bits(mut self) -> Self { + self.wordlength = WordLength::Bits8; self } - pub fn wordlength_9(mut self) -> Self { - self.wordlength = WordLength::DataBits9; + pub fn wordlength_9bits(mut self) -> Self { + self.wordlength = WordLength::Bits9; + self + } + + pub fn wordlength(mut self, wordlength: WordLength) -> Self { + self.wordlength = wordlength; self } @@ -230,7 +237,7 @@ impl Default for Config { let baudrate = 115_200_u32.bps(); Config { baudrate, - wordlength: WordLength::DataBits8, + wordlength: WordLength::Bits8, parity: Parity::ParityNone, stopbits: StopBits::STOP1, } @@ -327,8 +334,8 @@ where }; self.usart.cr1.modify(|_r, w| { w.m().bit(match config.wordlength { - WordLength::DataBits8 => false, - WordLength::DataBits9 => true, + WordLength::Bits8 => false, + WordLength::Bits9 => true, }); w.ps().bit(parity_is_odd); w.pce().bit(parity_is_used) @@ -652,7 +659,7 @@ where /// Reads 9-bit words from the UART/USART /// -/// If the UART/USART was configured with `WordLength::DataBits9`, the returned value will contain +/// If the UART/USART was configured with `WordLength::Bits9`, the returned value will contain /// 9 received data bits and all other bits set to zero. Otherwise, the returned value will contain /// 8 received data bits and all other bits set to zero. impl crate::hal::serial::Read for Rx @@ -733,7 +740,7 @@ where /// Writes 9-bit words to the UART/USART /// -/// If the UART/USART was configured with `WordLength::DataBits9`, the 9 least significant bits will +/// If the UART/USART was configured with `WordLength::Bits9`, the 9 least significant bits will /// be transmitted and the other 7 bits will be ignored. Otherwise, the 8 least significant bits /// will be transmitted and the other 8 bits will be ignored. impl crate::hal::serial::Write for Tx