From 808049f45db2a498e2094c9ef3a6edc3b42f6864 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 18 Feb 2022 15:54:12 +0300 Subject: [PATCH] reexport gpio, other cleanups --- CHANGELOG.md | 1 + examples/delay.rs | 2 +- examples/enc28j60-coap.rs.disabled | 2 +- examples/enc28j60.rs.disabled | 2 +- examples/gpio_input.rs | 2 +- examples/i2c-bme280/src/main.rs | 2 +- examples/mpu9250.rs.disabled | 2 +- examples/qei.rs | 2 +- src/adc.rs | 135 ++++++++++++++--------------- src/afio.rs | 4 +- src/can.rs | 58 ++++++------- src/delay.rs | 21 ++++- src/gpio.rs | 2 + src/i2c.rs | 24 +++-- src/serial.rs | 19 ++-- src/spi.rs | 101 ++++++++++++--------- src/timer.rs | 96 +++++++------------- 17 files changed, 236 insertions(+), 239 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 3a4417dc..1f012e25 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ### Added +- Reexport gpio pins to `gpio` mod - Added the ability to specify the word size (8 or 9 bits) for `Serial` (USART). When using parity, the parity bit is included in the number of bits of the word. - `blocking::serial::Write` for `Tx` and `Serial`. `core::fmt::Write` for `Serial` - `Instance` for Timer's, rtic-monotonic fugit impl diff --git a/examples/delay.rs b/examples/delay.rs index 47d4c697..6939b7cf 100644 --- a/examples/delay.rs +++ b/examples/delay.rs @@ -30,7 +30,7 @@ fn main() -> ! { #[cfg(any(feature = "stm32f103", feature = "stm32f105", feature = "stm32f107"))] let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh); - let mut delay = Delay::new(cp.SYST, clocks); + let mut delay = Delay::new(cp.SYST, &clocks); loop { led.set_high(); diff --git a/examples/enc28j60-coap.rs.disabled b/examples/enc28j60-coap.rs.disabled index 723039f4..6d0faa10 100644 --- a/examples/enc28j60-coap.rs.disabled +++ b/examples/enc28j60-coap.rs.disabled @@ -95,7 +95,7 @@ fn main() -> ! { ); // ENC28J60 - let mut delay = Delay::new(cp.SYST, clocks); + let mut delay = Delay::new(cp.SYST, &clocks); let mut enc28j60 = Enc28j60::new( spi, ncs, diff --git a/examples/enc28j60.rs.disabled b/examples/enc28j60.rs.disabled index 739129ac..6eacd211 100644 --- a/examples/enc28j60.rs.disabled +++ b/examples/enc28j60.rs.disabled @@ -89,7 +89,7 @@ fn main() -> ! { // ENC28J60 let mut reset = gpioa.pa3.into_push_pull_output(&mut gpioa.crl); reset.set_high(); - let mut delay = Delay::new(cp.SYST, clocks); + let mut delay = Delay::new(cp.SYST, &clocks); let mut enc28j60 = Enc28j60::new( spi, ncs, diff --git a/examples/gpio_input.rs b/examples/gpio_input.rs index 426186df..ed16f59b 100644 --- a/examples/gpio_input.rs +++ b/examples/gpio_input.rs @@ -53,7 +53,7 @@ fn main() -> ! { // The key_up for check buttons if long press. // if key_up is true, and buttons were not long press. let mut key_up: bool = true; - let mut delay = Delay::new(cp.SYST, clock); + let mut delay = Delay::new(cp.SYST, &clock); loop { let key_result = (key_0.is_low(), key_1.is_low()); if key_up && (key_result.0 || key_result.1) { diff --git a/examples/i2c-bme280/src/main.rs b/examples/i2c-bme280/src/main.rs index 2d2da13f..66e17233 100644 --- a/examples/i2c-bme280/src/main.rs +++ b/examples/i2c-bme280/src/main.rs @@ -80,7 +80,7 @@ fn main() -> ! { // The Adafruit boards have address 0x77 without closing the jumper on the back, the BME280 lib connects to 0x77 with `new_secondary`, use // `new_primary` for 0x76 if you close the jumper/solder bridge. - let mut bme280 = BME280::new_secondary(i2c, Delay::new(cp.SYST, clocks)); + let mut bme280 = BME280::new_secondary(i2c, Delay::new(cp.SYST, &clocks)); bme280 .init() .map_err(|error| { diff --git a/examples/mpu9250.rs.disabled b/examples/mpu9250.rs.disabled index 8802f3f1..24408015 100644 --- a/examples/mpu9250.rs.disabled +++ b/examples/mpu9250.rs.disabled @@ -55,7 +55,7 @@ fn main() -> ! { clocks, ); - let mut delay = Delay::new(cp.SYST, clocks); + let mut delay = Delay::new(cp.SYST, &clocks); let mut mpu9250 = Mpu9250::marg(spi, nss, &mut delay).unwrap(); diff --git a/examples/qei.rs b/examples/qei.rs index 929856c2..b4fb8d81 100644 --- a/examples/qei.rs +++ b/examples/qei.rs @@ -39,7 +39,7 @@ fn main() -> ! { let c2 = gpiob.pb7; let qei = Timer::new(dp.TIM4, &clocks).qei((c1, c2), &mut afio.mapr, QeiOptions::default()); - let mut delay = Delay::new(cp.SYST, clocks); + let mut delay = Delay::new(cp.SYST, &clocks); loop { let before = qei.count(); diff --git a/src/adc.rs b/src/adc.rs index 816e0e65..adfc3969 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -6,21 +6,14 @@ use embedded_hal::adc::{Channel, OneShot}; #[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))] use crate::dma::dma2; use crate::dma::{dma1, CircBuffer, Receive, RxDma, Transfer, TransferPayload, W}; -#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))] -use crate::gpio::gpiof; -use crate::gpio::Analog; -use crate::gpio::{gpioa, gpiob, gpioc}; +use crate::gpio::{self, Analog}; use crate::rcc::{Clocks, Enable, Reset}; use crate::time::kHz; use core::sync::atomic::{self, Ordering}; use cortex_m::asm::delay; use embedded_dma::StaticWriteBuffer; -#[cfg(any(feature = "stm32f103", feature = "connectivity"))] -use crate::pac::ADC2; -#[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl")))] -use crate::pac::ADC3; -use crate::pac::{ADC1, RCC}; +use crate::pac::{self, RCC}; /// Continuous mode pub struct Continuous; @@ -108,7 +101,7 @@ impl From for bool { } macro_rules! adc_pins { - ($ADC:ident, $($pin:ty => $chan:expr),+ $(,)*) => { + ($ADC:ty, $($pin:ty => $chan:expr),+ $(,)*) => { $( impl Channel<$ADC> for $pin { type ID = u8; @@ -119,60 +112,60 @@ macro_rules! adc_pins { }; } -adc_pins!(ADC1, - gpioa::PA0 => 0_u8, - gpioa::PA1 => 1_u8, - gpioa::PA2 => 2_u8, - gpioa::PA3 => 3_u8, - gpioa::PA4 => 4_u8, - gpioa::PA5 => 5_u8, - gpioa::PA6 => 6_u8, - gpioa::PA7 => 7_u8, - gpiob::PB0 => 8_u8, - gpiob::PB1 => 9_u8, - gpioc::PC0 => 10_u8, - gpioc::PC1 => 11_u8, - gpioc::PC2 => 12_u8, - gpioc::PC3 => 13_u8, - gpioc::PC4 => 14_u8, - gpioc::PC5 => 15_u8, +adc_pins!(pac::ADC1, + gpio::PA0 => 0_u8, + gpio::PA1 => 1_u8, + gpio::PA2 => 2_u8, + gpio::PA3 => 3_u8, + gpio::PA4 => 4_u8, + gpio::PA5 => 5_u8, + gpio::PA6 => 6_u8, + gpio::PA7 => 7_u8, + gpio::PB0 => 8_u8, + gpio::PB1 => 9_u8, + gpio::PC0 => 10_u8, + gpio::PC1 => 11_u8, + gpio::PC2 => 12_u8, + gpio::PC3 => 13_u8, + gpio::PC4 => 14_u8, + gpio::PC5 => 15_u8, ); #[cfg(any(feature = "stm32f103", feature = "connectivity"))] -adc_pins!(ADC2, - gpioa::PA0 => 0_u8, - gpioa::PA1 => 1_u8, - gpioa::PA2 => 2_u8, - gpioa::PA3 => 3_u8, - gpioa::PA4 => 4_u8, - gpioa::PA5 => 5_u8, - gpioa::PA6 => 6_u8, - gpioa::PA7 => 7_u8, - gpiob::PB0 => 8_u8, - gpiob::PB1 => 9_u8, - gpioc::PC0 => 10_u8, - gpioc::PC1 => 11_u8, - gpioc::PC2 => 12_u8, - gpioc::PC3 => 13_u8, - gpioc::PC4 => 14_u8, - gpioc::PC5 => 15_u8, +adc_pins!(pac::ADC2, + gpio::PA0 => 0_u8, + gpio::PA1 => 1_u8, + gpio::PA2 => 2_u8, + gpio::PA3 => 3_u8, + gpio::PA4 => 4_u8, + gpio::PA5 => 5_u8, + gpio::PA6 => 6_u8, + gpio::PA7 => 7_u8, + gpio::PB0 => 8_u8, + gpio::PB1 => 9_u8, + gpio::PC0 => 10_u8, + gpio::PC1 => 11_u8, + gpio::PC2 => 12_u8, + gpio::PC3 => 13_u8, + gpio::PC4 => 14_u8, + gpio::PC5 => 15_u8, ); #[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))] -adc_pins!(ADC3, - gpioa::PA0 => 0_u8, - gpioa::PA1 => 1_u8, - gpioa::PA2 => 2_u8, - gpioa::PA3 => 3_u8, - gpiof::PF6 => 4_u8, - gpiof::PF7 => 5_u8, - gpiof::PF8 => 6_u8, - gpiof::PF9 => 7_u8, - gpiof::PF10 => 8_u8, - gpioc::PC0 => 10_u8, - gpioc::PC1 => 11_u8, - gpioc::PC2 => 12_u8, - gpioc::PC3 => 13_u8, +adc_pins!(pac::ADC3, + gpio::PA0 => 0_u8, + gpio::PA1 => 1_u8, + gpio::PA2 => 2_u8, + gpio::PA3 => 3_u8, + gpio::PF6 => 4_u8, + gpio::PF7 => 5_u8, + gpio::PF8 => 6_u8, + gpio::PF9 => 7_u8, + gpio::PF10 => 8_u8, + gpio::PC0 => 10_u8, + gpio::PC1 => 11_u8, + gpio::PC2 => 12_u8, + gpio::PC3 => 13_u8, ); /// Stored ADC config can be restored using the `Adc::restore_cfg` method @@ -181,7 +174,7 @@ pub struct StoredConfig(SampleTime, Align); macro_rules! adc_hal { ($( - $ADC:ident: ($adc:ident), + $ADC:ty: ($adc:ident), )+) => { $( @@ -279,17 +272,17 @@ macro_rules! adc_hal { fn reset(&mut self) { let rcc = unsafe { &(*RCC::ptr()) }; - $ADC::reset(rcc); + <$ADC>::reset(rcc); } fn enable_clock(&mut self) { let rcc = unsafe { &(*RCC::ptr()) }; - $ADC::enable(rcc); + <$ADC>::enable(rcc); } fn disable_clock(&mut self) { let rcc = unsafe { &(*RCC::ptr()) }; - $ADC::disable(rcc); + <$ADC>::disable(rcc); } fn calibrate(&mut self) { @@ -461,7 +454,7 @@ macro_rules! adc_hal { } } -impl Adc { +impl Adc { fn read_aux(&mut self, chan: u8) -> u16 { let tsv_off = if self.rb.cr2.read().tsvrefe().bit_is_clear() { self.rb.cr2.modify(|_, w| w.tsvrefe().set_bit()); @@ -545,17 +538,17 @@ impl Adc { } adc_hal! { - ADC1: (adc1), + pac::ADC1: (adc1), } #[cfg(any(feature = "stm32f103", feature = "connectivity"))] adc_hal! { - ADC2: (adc2), + pac::ADC2: (adc2), } #[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))] adc_hal! { - ADC3: (adc3), + pac::ADC3: (adc3), } pub struct AdcPayload { @@ -608,7 +601,7 @@ pub trait SetChannels: ChannelTimeSequence { pub type AdcDma = RxDma, CHANNEL>; macro_rules! adcdma { - ($ADCX:ident: ( + ($ADCX:ty: ( $rxdma:ident, $dmarxch:ty, )) => { @@ -750,7 +743,7 @@ macro_rules! adcdma { // until the end of the transfer. let (ptr, len) = unsafe { buffer.static_write_buffer() }; self.channel.set_peripheral_address( - unsafe { &(*$ADCX::ptr()).dr as *const _ as u32 }, + unsafe { &(*<$ADCX>::ptr()).dr as *const _ as u32 }, false, ); self.channel.set_memory_address(ptr as u32, true); @@ -789,7 +782,7 @@ macro_rules! adcdma { // until the end of the transfer. let (ptr, len) = unsafe { buffer.static_write_buffer() }; self.channel.set_peripheral_address( - unsafe { &(*$ADCX::ptr()).dr as *const _ as u32 }, + unsafe { &(*<$ADCX>::ptr()).dr as *const _ as u32 }, false, ); self.channel.set_memory_address(ptr as u32, true); @@ -819,7 +812,7 @@ macro_rules! adcdma { } adcdma! { - ADC1: ( + pac::ADC1: ( AdcDma1, dma1::C1, ) @@ -827,7 +820,7 @@ adcdma! { #[cfg(all(feature = "stm32f103", any(feature = "high", feature = "xl",),))] adcdma! { - ADC3: ( + pac::ADC3: ( AdcDma3, dma2::C5, ) diff --git a/src/afio.rs b/src/afio.rs index 84a4ea83..ef5c9359 100644 --- a/src/afio.rs +++ b/src/afio.rs @@ -4,9 +4,7 @@ use crate::pac::{afio, AFIO, RCC}; use crate::rcc::{Enable, Reset}; use crate::gpio::{ - gpioa::PA15, - gpiob::{PB3, PB4}, - Debugger, Floating, Input, + Debugger, Floating, Input, PA15, {PB3, PB4}, }; pub trait AfioExt { diff --git a/src/can.rs b/src/can.rs index e0e21ceb..7073763d 100644 --- a/src/can.rs +++ b/src/can.rs @@ -20,27 +20,20 @@ //! | RX | PB5 | PB12 | use crate::afio::MAPR; -#[cfg(feature = "connectivity")] -use crate::gpio::gpiob::{PB12, PB13, PB5, PB6}; -use crate::gpio::{ - gpioa::{PA11, PA12}, - gpiob::{PB8, PB9}, - Alternate, Input, -}; -#[cfg(feature = "connectivity")] -use crate::pac::CAN2; -#[cfg(not(feature = "connectivity"))] -use crate::pac::USB; -use crate::pac::{CAN1, RCC}; +use crate::gpio::{self, Alternate, Input}; +use crate::pac::{self, RCC}; pub trait Pins: crate::Sealed { type Instance; fn remap(mapr: &mut MAPR); } -impl crate::Sealed for (PA12>, PA11>) {} -impl Pins for (PA12>, PA11>) { - type Instance = CAN1; +impl crate::Sealed + for (gpio::PA12>, gpio::PA11>) +{ +} +impl Pins for (gpio::PA12>, gpio::PA11>) { + type Instance = pac::CAN1; fn remap(mapr: &mut MAPR) { #[cfg(not(feature = "connectivity"))] @@ -50,9 +43,9 @@ impl Pins for (PA12>, PA11>) { } } -impl crate::Sealed for (PB9>, PB8>) {} -impl Pins for (PB9>, PB8>) { - type Instance = CAN1; +impl crate::Sealed for (gpio::PB9>, gpio::PB8>) {} +impl Pins for (gpio::PB9>, gpio::PB8>) { + type Instance = pac::CAN1; fn remap(mapr: &mut MAPR) { #[cfg(not(feature = "connectivity"))] @@ -63,10 +56,13 @@ impl Pins for (PB9>, PB8>) { } #[cfg(feature = "connectivity")] -impl crate::Sealed for (PB13>, PB12>) {} +impl crate::Sealed + for (gpio::PB13>, gpio::PB12>) +{ +} #[cfg(feature = "connectivity")] -impl Pins for (PB13>, PB12>) { - type Instance = CAN2; +impl Pins for (gpio::PB13>, gpio::PB12>) { + type Instance = pac::CAN2; fn remap(mapr: &mut MAPR) { mapr.modify_mapr(|_, w| w.can2_remap().clear_bit()); @@ -74,10 +70,10 @@ impl Pins for (PB13>, PB12>) { } #[cfg(feature = "connectivity")] -impl crate::Sealed for (PB6>, PB5>) {} +impl crate::Sealed for (gpio::PB6>, gpio::PB5>) {} #[cfg(feature = "connectivity")] -impl Pins for (PB6>, PB5>) { - type Instance = CAN2; +impl Pins for (gpio::PB6>, gpio::PB5>) { + type Instance = pac::CAN2; fn remap(mapr: &mut MAPR) { mapr.modify_mapr(|_, w| w.can2_remap().set_bit()); @@ -98,7 +94,7 @@ where /// CAN shares SRAM with the USB peripheral. Take ownership of USB to /// prevent accidental shared usage. #[cfg(not(feature = "connectivity"))] - pub fn new(can: Instance, _usb: USB) -> Can { + pub fn new(can: Instance, _usb: pac::USB) -> Can { let rcc = unsafe { &(*RCC::ptr()) }; Instance::enable(rcc); @@ -123,18 +119,18 @@ where } } -unsafe impl bxcan::Instance for Can { - const REGISTERS: *mut bxcan::RegisterBlock = CAN1::ptr() as *mut _; +unsafe impl bxcan::Instance for Can { + const REGISTERS: *mut bxcan::RegisterBlock = pac::CAN1::ptr() as *mut _; } #[cfg(feature = "connectivity")] -unsafe impl bxcan::Instance for Can { - const REGISTERS: *mut bxcan::RegisterBlock = CAN2::ptr() as *mut _; +unsafe impl bxcan::Instance for Can { + const REGISTERS: *mut bxcan::RegisterBlock = pac::CAN2::ptr() as *mut _; } -unsafe impl bxcan::FilterOwner for Can { +unsafe impl bxcan::FilterOwner for Can { const NUM_FILTER_BANKS: u8 = 28; } #[cfg(feature = "connectivity")] -unsafe impl bxcan::MasterInstance for Can {} +unsafe impl bxcan::MasterInstance for Can {} diff --git a/src/delay.rs b/src/delay.rs index 94257cd5..970de142 100644 --- a/src/delay.rs +++ b/src/delay.rs @@ -5,19 +5,32 @@ use cortex_m::peripheral::SYST; use crate::hal::blocking::delay::{DelayMs, DelayUs}; use crate::rcc::Clocks; +use fugit::HertzU32 as Hertz; /// System timer (SysTick) as a delay provider pub struct Delay { - clocks: Clocks, + clk: Hertz, syst: SYST, } impl Delay { /// Configures the system timer (SysTick) as a delay provider - pub fn new(mut syst: SYST, clocks: Clocks) -> Self { + pub fn new(mut syst: SYST, clocks: &Clocks) -> Self { syst.set_clock_source(SystClkSource::Core); - Delay { clocks, syst } + Delay { + clk: clocks.hclk(), + syst, + } + } + + pub fn new_external(mut syst: SYST, clocks: &Clocks) -> Self { + syst.set_clock_source(SystClkSource::External); + + Delay { + clk: clocks.hclk() / 8, + syst, + } } /// Releases the system timer (SysTick) resource @@ -49,7 +62,7 @@ impl DelayUs for Delay { // The SysTick Reload Value register supports values between 1 and 0x00FFFFFF. const MAX_RVR: u32 = 0x00FF_FFFF; - let mut total_rvr = us * (self.clocks.sysclk().raw() / 1_000_000); + let mut total_rvr = us * (self.clk.raw() / 1_000_000); while total_rvr != 0 { let current_rvr = if total_rvr <= MAX_RVR { diff --git a/src/gpio.rs b/src/gpio.rs index fda029ef..000514df 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -405,6 +405,8 @@ macro_rules! gpio { } } } + + pub use $gpiox::{ $($PXi,)+ }; } } diff --git a/src/i2c.rs b/src/i2c.rs index 9fe03af8..532d0d05 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -5,8 +5,7 @@ // https://www.st.com/content/ccc/resource/technical/document/application_note/5d/ae/a3/6f/08/69/4e/9b/CD00209826.pdf/files/CD00209826.pdf/jcr:content/translations/en.CD00209826.pdf use crate::afio::MAPR; -use crate::gpio::gpiob::{PB10, PB11, PB6, PB7, PB8, PB9}; -use crate::gpio::{Alternate, OpenDrain}; +use crate::gpio::{self, Alternate, OpenDrain}; use crate::hal::blocking::i2c::{Read, Write, WriteRead}; use crate::pac::{DWT, I2C1, I2C2, RCC}; use crate::rcc::{BusClock, Clocks, Enable, Reset}; @@ -90,15 +89,30 @@ pub trait Pins { const REMAP: bool; } -impl Pins for (PB6>, PB7>) { +impl Pins + for ( + gpio::PB6>, + gpio::PB7>, + ) +{ const REMAP: bool = false; } -impl Pins for (PB8>, PB9>) { +impl Pins + for ( + gpio::PB8>, + gpio::PB9>, + ) +{ const REMAP: bool = true; } -impl Pins for (PB10>, PB11>) { +impl Pins + for ( + gpio::PB10>, + gpio::PB11>, + ) +{ const REMAP: bool = false; } diff --git a/src/serial.rs b/src/serial.rs index 5575063b..7bc473db 100644 --- a/src/serial.rs +++ b/src/serial.rs @@ -85,10 +85,7 @@ use embedded_hal::serial::Write; use crate::afio::MAPR; use crate::dma::{dma1, CircBuffer, RxDma, Transfer, TxDma, R, W}; -use crate::gpio::gpioa::{PA10, PA2, PA3, PA9}; -use crate::gpio::gpiob::{PB10, PB11, PB6, PB7}; -use crate::gpio::gpioc::{PC10, PC11}; -use crate::gpio::gpiod::{PD5, PD6, PD8, PD9}; +use crate::gpio; use crate::gpio::{Alternate, Input}; use crate::pac::{RCC, USART1, USART2, USART3}; use crate::rcc::{BusClock, Clocks, Enable, Reset}; @@ -124,31 +121,31 @@ pub trait Pins { const REMAP: u8; } -impl Pins for (PA9>, PA10>) { +impl Pins for (gpio::PA9>, gpio::PA10>) { const REMAP: u8 = 0; } -impl Pins for (PB6>, PB7>) { +impl Pins for (gpio::PB6>, gpio::PB7>) { const REMAP: u8 = 1; } -impl Pins for (PA2>, PA3>) { +impl Pins for (gpio::PA2>, gpio::PA3>) { const REMAP: u8 = 0; } -impl Pins for (PD5>, PD6>) { +impl Pins for (gpio::PD5>, gpio::PD6>) { const REMAP: u8 = 1; } -impl Pins for (PB10>, PB11>) { +impl Pins for (gpio::PB10>, gpio::PB11>) { const REMAP: u8 = 0; } -impl Pins for (PC10>, PC11>) { +impl Pins for (gpio::PC10>, gpio::PC11>) { const REMAP: u8 = 1; } -impl Pins for (PD8>, PD9>) { +impl Pins for (gpio::PD8>, gpio::PD9>) { const REMAP: u8 = 0b11; } diff --git a/src/spi.rs b/src/spi.rs index a18691f6..7ebd568f 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -37,20 +37,14 @@ use core::ops::Deref; use core::ptr; pub use crate::hal::spi::{FullDuplex, Mode, Phase, Polarity}; -#[cfg(any(feature = "high", feature = "connectivity"))] -use crate::pac::SPI3; -use crate::pac::{RCC, SPI1, SPI2}; +use crate::pac::{self, RCC}; use crate::afio::MAPR; use crate::dma::dma1; #[cfg(feature = "connectivity")] use crate::dma::dma2; use crate::dma::{Receive, RxDma, RxTxDma, Transfer, TransferPayload, Transmit, TxDma, R, W}; -use crate::gpio::gpioa::{PA5, PA6, PA7}; -use crate::gpio::gpiob::{PB13, PB14, PB15, PB3, PB4, PB5}; -#[cfg(feature = "connectivity")] -use crate::gpio::gpioc::{PC10, PC11, PC12}; -use crate::gpio::{Alternate, Input}; +use crate::gpio::{self, Alternate, Input}; use crate::rcc::{BusClock, Clocks, Enable, Reset}; use crate::time::Hertz; @@ -121,37 +115,37 @@ impl Miso for NoMiso {} impl Mosi for NoMosi {} macro_rules! remap { - ($name:ident, $SPIX:ident, $state:literal, $SCK:ident, $MISO:ident, $MOSI:ident) => { + ($name:ident, $SPIX:ty, $state:literal, $SCK:ident, $MISO:ident, $MOSI:ident) => { pub struct $name; impl Remap for $name { type Periph = $SPIX; const REMAP: bool = $state; } - impl Sck<$name> for $SCK> {} - impl Miso<$name> for $MISO> {} - impl Mosi<$name> for $MOSI> {} + impl Sck<$name> for gpio::$SCK> {} + impl Miso<$name> for gpio::$MISO> {} + impl Mosi<$name> for gpio::$MOSI> {} }; } -remap!(Spi1NoRemap, SPI1, false, PA5, PA6, PA7); -remap!(Spi1Remap, SPI1, true, PB3, PB4, PB5); -remap!(Spi2NoRemap, SPI2, false, PB13, PB14, PB15); +remap!(Spi1NoRemap, pac::SPI1, false, PA5, PA6, PA7); +remap!(Spi1Remap, pac::SPI1, true, PB3, PB4, PB5); +remap!(Spi2NoRemap, pac::SPI2, false, PB13, PB14, PB15); #[cfg(any(feature = "high", feature = "connectivity"))] -remap!(Spi3NoRemap, SPI3, false, PB3, PB4, PB5); +remap!(Spi3NoRemap, pac::SPI3, false, PB3, PB4, PB5); #[cfg(feature = "connectivity")] -remap!(Spi3Remap, SPI3, true, PC10, PC11, PC12); +remap!(Spi3Remap, pac::SPI3, true, PC10, PC11, PC12); pub trait Instance: crate::Sealed + Deref + Enable + Reset + BusClock { } -impl Instance for SPI1 {} -impl Instance for SPI2 {} +impl Instance for pac::SPI1 {} +impl Instance for pac::SPI2 {} #[cfg(any(feature = "high", feature = "connectivity"))] -impl Instance for SPI3 {} +impl Instance for pac::SPI3 {} -impl Spi { +impl Spi { /** Constructs an SPI instance using SPI1 in 8bit dataframe mode. @@ -160,7 +154,7 @@ impl Spi { You can also use `NoSck`, `NoMiso` or `NoMosi` if you don't want to use the pins */ pub fn spi1( - spi: SPI1, + spi: pac::SPI1, pins: PINS, mapr: &mut MAPR, mode: Mode, @@ -168,15 +162,15 @@ impl Spi { clocks: Clocks, ) -> Self where - REMAP: Remap, + REMAP: Remap, PINS: Pins, { mapr.modify_mapr(|_, w| w.spi1_remap().bit(REMAP::REMAP)); - Spi::::configure(spi, pins, mode, freq, clocks) + Spi::::configure(spi, pins, mode, freq, clocks) } } -impl Spi { +impl Spi { /** Constructs an SPI instance using SPI2 in 8bit dataframe mode. @@ -184,17 +178,17 @@ impl Spi { You can also use `NoSck`, `NoMiso` or `NoMosi` if you don't want to use the pins */ - pub fn spi2(spi: SPI2, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self + pub fn spi2(spi: pac::SPI2, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self where - REMAP: Remap, + REMAP: Remap, PINS: Pins, { - Spi::::configure(spi, pins, mode, freq, clocks) + Spi::::configure(spi, pins, mode, freq, clocks) } } #[cfg(any(feature = "high", feature = "connectivity"))] -impl Spi { +impl Spi { /** Constructs an SPI instance using SPI3 in 8bit dataframe mode. @@ -203,12 +197,12 @@ impl Spi { You can also use `NoSck`, `NoMiso` or `NoMosi` if you don't want to use the pins */ #[cfg(not(feature = "connectivity"))] - pub fn spi3(spi: SPI3, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self + pub fn spi3(spi: pac::SPI3, pins: PINS, mode: Mode, freq: Hertz, clocks: Clocks) -> Self where - REMAP: Remap, + REMAP: Remap, PINS: Pins, { - Spi::::configure(spi, pins, mode, freq, clocks) + Spi::::configure(spi, pins, mode, freq, clocks) } /** @@ -220,7 +214,7 @@ impl Spi { */ #[cfg(feature = "connectivity")] pub fn spi3( - spi: SPI3, + spi: pac::SPI3, pins: PINS, mapr: &mut MAPR, mode: Mode, @@ -228,11 +222,11 @@ impl Spi { clocks: Clocks, ) -> Self where - REMAP: Remap, + REMAP: Remap, PINS: Pins, { mapr.modify_mapr(|_, w| w.spi3_remap().bit(REMAP::REMAP)); - Spi::::configure(spi, pins, mode, freq, clocks) + Spi::::configure(spi, pins, mode, freq, clocks) } } @@ -513,7 +507,7 @@ pub type SpiRxTxDma = RxTxDma, RXCHANNEL, TXCHANNEL>; macro_rules! spi_dma { - ($SPIi:ident, $RCi:ty, $TCi:ty, $rxdma:ident, $txdma:ident, $rxtxdma:ident) => { + ($SPIi:ty, $RCi:ty, $TCi:ty, $rxdma:ident, $txdma:ident, $rxtxdma:ident) => { pub type $rxdma = SpiRxDma<$SPIi, REMAP, PINS, $RCi>; pub type $txdma = SpiTxDma<$SPIi, REMAP, PINS, $TCi>; pub type $rxtxdma = SpiRxTxDma<$SPIi, REMAP, PINS, $RCi, $TCi>; @@ -638,7 +632,7 @@ macro_rules! spi_dma { // until the end of the transfer. let (ptr, len) = unsafe { buffer.static_write_buffer() }; self.channel.set_peripheral_address( - unsafe { &(*$SPIi::ptr()).dr as *const _ as u32 }, + unsafe { &(*<$SPIi>::ptr()).dr as *const _ as u32 }, false, ); self.channel.set_memory_address(ptr as u32, true); @@ -681,7 +675,7 @@ macro_rules! spi_dma { // until the end of the transfer. let (ptr, len) = unsafe { buffer.static_read_buffer() }; self.channel.set_peripheral_address( - unsafe { &(*$SPIi::ptr()).dr as *const _ as u32 }, + unsafe { &(*<$SPIi>::ptr()).dr as *const _ as u32 }, false, ); self.channel.set_memory_address(ptr as u32, true); @@ -736,14 +730,14 @@ macro_rules! spi_dma { } self.rxchannel.set_peripheral_address( - unsafe { &(*$SPIi::ptr()).dr as *const _ as u32 }, + unsafe { &(*<$SPIi>::ptr()).dr as *const _ as u32 }, false, ); self.rxchannel.set_memory_address(rxptr as u32, true); self.rxchannel.set_transfer_length(rxlen); self.txchannel.set_peripheral_address( - unsafe { &(*$SPIi::ptr()).dr as *const _ as u32 }, + unsafe { &(*<$SPIi>::ptr()).dr as *const _ as u32 }, false, ); self.txchannel.set_memory_address(txptr as u32, true); @@ -800,7 +794,28 @@ macro_rules! spi_dma { }; } -spi_dma!(SPI1, dma1::C2, dma1::C3, Spi1RxDma, Spi1TxDma, Spi1RxTxDma); -spi_dma!(SPI2, dma1::C4, dma1::C5, Spi2RxDma, Spi2TxDma, Spi2RxTxDma); +spi_dma!( + pac::SPI1, + dma1::C2, + dma1::C3, + Spi1RxDma, + Spi1TxDma, + Spi1RxTxDma +); +spi_dma!( + pac::SPI2, + dma1::C4, + dma1::C5, + Spi2RxDma, + Spi2TxDma, + Spi2RxTxDma +); #[cfg(feature = "connectivity")] -spi_dma!(SPI3, dma2::C1, dma2::C2, Spi3RxDma, Spi3TxDma, Spi3RxTxDma); +spi_dma!( + pac::SPI3, + dma2::C1, + dma2::C2, + Spi3RxDma, + Spi3TxDma, + Spi3RxTxDma +); diff --git a/src/timer.rs b/src/timer.rs index 86ad2457..a2afda20 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -48,25 +48,7 @@ */ use crate::hal::timer::{Cancel, CountDown, Periodic}; -use crate::pac::RCC; -#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))] -use crate::pac::TIM1; -#[cfg(feature = "medium")] -use crate::pac::TIM4; -#[cfg(any(feature = "high", feature = "connectivity"))] -use crate::pac::TIM5; -#[cfg(any(feature = "stm32f100", feature = "high", feature = "connectivity",))] -use crate::pac::TIM6; -#[cfg(any( - all(feature = "high", any(feature = "stm32f101", feature = "stm32f103",),), - any(feature = "stm32f100", feature = "connectivity",) -))] -use crate::pac::TIM7; -#[cfg(all(feature = "stm32f103", feature = "high",))] -use crate::pac::TIM8; -use crate::pac::{DBGMCU as DBG, TIM2, TIM3}; -#[cfg(feature = "stm32f100")] -use crate::pac::{TIM15, TIM16, TIM17}; +use crate::pac::{self, DBGMCU as DBG, RCC}; use crate::rcc::{self, Clocks}; use core::convert::TryFrom; @@ -113,57 +95,43 @@ pub(crate) mod sealed { } macro_rules! remap { - ($($name:ident: ($TIMX:ident, $state:literal, $P1:ident, $P2:ident, $P3:ident, $P4:ident),)+) => { + ($($name:ident: ($TIMX:ty, $state:literal, $P1:ident, $P2:ident, $P3:ident, $P4:ident),)+) => { $( pub struct $name; impl sealed::Remap for $name { type Periph = $TIMX; const REMAP: u8 = $state; } - impl sealed::Ch1<$name> for $P1 {} - impl sealed::Ch2<$name> for $P2 {} - impl sealed::Ch3<$name> for $P3 {} - impl sealed::Ch4<$name> for $P4 {} + impl sealed::Ch1<$name> for crate::gpio::$P1 {} + impl sealed::Ch2<$name> for crate::gpio::$P2 {} + impl sealed::Ch3<$name> for crate::gpio::$P3 {} + impl sealed::Ch4<$name> for crate::gpio::$P4 {} )+ } } -use crate::gpio::gpioa::{PA0, PA1, PA15, PA2, PA3, PA6, PA7}; -use crate::gpio::gpiob::{PB0, PB1, PB10, PB11, PB3, PB4, PB5}; -use crate::gpio::gpioc::{PC6, PC7, PC8, PC9}; - -#[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))] -use crate::gpio::{ - gpioa::{PA10, PA11, PA8, PA9}, - gpioe::{PE11, PE13, PE14, PE9}, -}; #[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))] remap!( - Tim1NoRemap: (TIM1, 0b00, PA8, PA9, PA10, PA11), - //Tim1PartialRemap: (TIM1, 0b01, PA8, PA9, PA10, PA11), - Tim1FullRemap: (TIM1, 0b11, PE9, PE11, PE13, PE14), + Tim1NoRemap: (pac::TIM1, 0b00, PA8, PA9, PA10, PA11), + //Tim1PartialRemap: (pac::TIM1, 0b01, PA8, PA9, PA10, PA11), + Tim1FullRemap: (pac::TIM1, 0b11, PE9, PE11, PE13, PE14), ); remap!( - Tim2NoRemap: (TIM2, 0b00, PA0, PA1, PA2, PA3), - Tim2PartialRemap1: (TIM2, 0b01, PA15, PB3, PA2, PA3), - Tim2PartialRemap2: (TIM2, 0b10, PA0, PA1, PB10, PB11), - Tim2FullRemap: (TIM2, 0b11, PA15, PB3, PB10, PB11), - - Tim3NoRemap: (TIM3, 0b00, PA6, PA7, PB0, PB1), - Tim3PartialRemap: (TIM3, 0b10, PB4, PB5, PB0, PB1), - Tim3FullRemap: (TIM3, 0b11, PC6, PC7, PC8, PC9), + Tim2NoRemap: (pac::TIM2, 0b00, PA0, PA1, PA2, PA3), + Tim2PartialRemap1: (pac::TIM2, 0b01, PA15, PB3, PA2, PA3), + Tim2PartialRemap2: (pac::TIM2, 0b10, PA0, PA1, PB10, PB11), + Tim2FullRemap: (pac::TIM2, 0b11, PA15, PB3, PB10, PB11), + + Tim3NoRemap: (pac::TIM3, 0b00, PA6, PA7, PB0, PB1), + Tim3PartialRemap: (pac::TIM3, 0b10, PB4, PB5, PB0, PB1), + Tim3FullRemap: (pac::TIM3, 0b11, PC6, PC7, PC8, PC9), ); -#[cfg(feature = "medium")] -use crate::gpio::{ - gpiob::{PB6, PB7, PB8, PB9}, - gpiod::{PD12, PD13, PD14, PD15}, -}; #[cfg(feature = "medium")] remap!( - Tim4NoRemap: (TIM4, 0b00, PB6, PB7, PB8, PB9), - Tim4Remap: (TIM4, 0b01, PD12, PD13, PD14, PD15), + Tim4NoRemap: (pac::TIM4, 0b00, PB6, PB7, PB8, PB9), + Tim4Remap: (pac::TIM4, 0b01, PD12, PD13, PD14, PD15), ); impl Timer { @@ -311,7 +279,7 @@ where } macro_rules! hal { - ($($TIMX:ident: ($timX:ident, $APBx:ident, $dbg_timX_stop:ident$(,$master_timbase:ident)*),)+) => { + ($($TIMX:ty: ($timX:ident, $APBx:ident, $dbg_timX_stop:ident$(,$master_timbase:ident)*),)+) => { $( impl Instance for $TIMX { } @@ -496,23 +464,23 @@ macro_rules! hal { fn compute_arr_presc(freq: u32, clock: u32) -> (u16, u16) { let ticks = clock / freq; let psc = u16::try_from((ticks - 1) / (1 << 16)).unwrap(); - let arr = u16::try_from(ticks / (psc + 1) as u32).unwrap(); + let arr = u16::try_from(ticks / (psc + 1) as u32).unwrap() - 1; (psc, arr) } hal! { - TIM2: (tim2, APB1, dbg_tim2_stop, tim2), - TIM3: (tim3, APB1, dbg_tim3_stop, tim2), + pac::TIM2: (tim2, APB1, dbg_tim2_stop, tim2), + pac::TIM3: (tim3, APB1, dbg_tim3_stop, tim2), } #[cfg(any(feature = "stm32f100", feature = "stm32f103", feature = "connectivity",))] hal! { - TIM1: (tim1, APB2, dbg_tim1_stop, tim1), + pac::TIM1: (tim1, APB2, dbg_tim1_stop, tim1), } #[cfg(any(feature = "stm32f100", feature = "high", feature = "connectivity",))] hal! { - TIM6: (tim6, APB1, dbg_tim6_stop, tim6), + pac::TIM6: (tim6, APB1, dbg_tim6_stop, tim6), } #[cfg(any( @@ -520,29 +488,29 @@ hal! { any(feature = "stm32f100", feature = "connectivity",) ))] hal! { - TIM7: (tim7, APB1, dbg_tim7_stop, tim6), + pac::TIM7: (tim7, APB1, dbg_tim7_stop, tim6), } #[cfg(feature = "stm32f100")] hal! { - TIM15: (tim15, APB2, dbg_tim15_stop), - TIM16: (tim16, APB2, dbg_tim16_stop), - TIM17: (tim17, APB2, dbg_tim17_stop), + pac::TIM15: (tim15, APB2, dbg_tim15_stop), + pac::TIM16: (tim16, APB2, dbg_tim16_stop), + pac::TIM17: (tim17, APB2, dbg_tim17_stop), } #[cfg(feature = "medium")] hal! { - TIM4: (tim4, APB1, dbg_tim4_stop, tim2), + pac::TIM4: (tim4, APB1, dbg_tim4_stop, tim2), } #[cfg(any(feature = "high", feature = "connectivity"))] hal! { - TIM5: (tim5, APB1, dbg_tim5_stop, tim2), + pac::TIM5: (tim5, APB1, dbg_tim5_stop, tim2), } #[cfg(all(feature = "stm32f103", feature = "high",))] hal! { - TIM8: (tim8, APB2, dbg_tim8_stop, tim1), + pac::TIM8: (tim8, APB2, dbg_tim8_stop, tim1), } //TODO: restore these timers once stm32-rs has been updated