From fb7ca26674032eb478a62a520e216a2f40433d7b Mon Sep 17 00:00:00 2001 From: Piroro-hs Date: Mon, 19 Jul 2021 17:48:52 +0900 Subject: [PATCH] Define pin type aliases directly under gpio module --- CHANGELOG.md | 3 + examples/gpio_interrupts.rs | 23 +++---- examples/serial_echo_rtic.rs | 11 +-- src/adc.rs | 130 +++++++++++++++++------------------ src/gpio.rs | 77 +++++++++++---------- 5 files changed, 120 insertions(+), 124 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index d737e6749..71d51712d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -16,6 +16,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ### Changed - `PXx` struct (representing a generic GPIO pin) implements `Send` and `Sync` [#251] +- Each pin aliases (`PA0`, `PA1`, ..) are defined under `gpio` module directly. + Re-export from gpio port sub-modules are provided for compatibility. [#257] ### Breaking Changes @@ -351,6 +353,7 @@ let clocks = rcc [defmt]: https://github.com/knurling-rs/defmt [filter]: https://defmt.ferrous-systems.com/filtering.html +[#257]: https://github.com/stm32-rs/stm32f3xx-hal/pull/257 [#255]: https://github.com/stm32-rs/stm32f3xx-hal/pull/255 [#252]: https://github.com/stm32-rs/stm32f3xx-hal/pull/252 [#247]: https://github.com/stm32-rs/stm32f3xx-hal/pull/247 diff --git a/examples/gpio_interrupts.rs b/examples/gpio_interrupts.rs index a091691fe..b641e63c0 100644 --- a/examples/gpio_interrupts.rs +++ b/examples/gpio_interrupts.rs @@ -1,24 +1,23 @@ #![no_main] #![no_std] -use panic_semihosting as _; +use core::cell::RefCell; -use stm32f3xx_hal as hal; +use panic_semihosting as _; -use core::cell::RefCell; -use cortex_m::asm; -use cortex_m::interrupt::Mutex; -use cortex_m::peripheral::NVIC; +use cortex_m::{asm, interrupt::Mutex, peripheral::NVIC}; use cortex_m_rt::entry; -use hal::gpio::{gpioa, gpioe, Edge, Input, Output, PushPull}; -use hal::interrupt; -use hal::pac; -use hal::prelude::*; -type LedPin = gpioe::PE9>; +use stm32f3xx_hal::{ + gpio::{self, Edge, Input, Output, PushPull}, + interrupt, pac, + prelude::*, +}; + +type LedPin = gpio::PE9>; static LED: Mutex>> = Mutex::new(RefCell::new(None)); -type ButtonPin = gpioa::PA0; +type ButtonPin = gpio::PA0; static BUTTON: Mutex>> = Mutex::new(RefCell::new(None)); // When the user button is pressed. The north LED will toggle. diff --git a/examples/serial_echo_rtic.rs b/examples/serial_echo_rtic.rs index 4ff0e45a6..6d0135dd9 100644 --- a/examples/serial_echo_rtic.rs +++ b/examples/serial_echo_rtic.rs @@ -9,6 +9,7 @@ mod app { use rtt_target::{rprintln, rtt_init_print}; use stm32f3xx_hal::{ gpio::{self, Output, PushPull, AF7}, + pac, prelude::*, serial::{Event, Serial}, }; @@ -16,14 +17,8 @@ mod app { #[monotonic(binds = SysTick, default = true)] type DwtMono = DwtSystick<48_000_000>; - type SerialType = Serial< - stm32f3xx_hal::pac::USART1, - ( - gpio::gpioa::PA9>, - gpio::gpioa::PA10>, - ), - >; - type DirType = stm32f3xx_hal::gpio::gpioe::PE13>; + type SerialType = Serial>, gpio::PA10>)>; + type DirType = gpio::PE13>; #[shared] struct Shared {} diff --git a/src/adc.rs b/src/adc.rs index 0d19950dd..e13e429c1 100644 --- a/src/adc.rs +++ b/src/adc.rs @@ -9,19 +9,14 @@ //! //! [examples/adc.rs]: https://github.com/stm32-rs/stm32f3xx-hal/blob/v0.7.0/examples/adc.rs -use crate::{ - gpio::Analog, - rcc::{Clocks, AHB}, -}; use cortex_m::asm; use embedded_hal::adc::{Channel, OneShot}; use crate::{ - gpio::{gpioa, gpiob, gpioc}, - pac::{ADC1, ADC1_2, ADC2}, + gpio::{self, Analog}, + pac::{adc1::cfgr::ALIGN_A, adc1_2::ccr::CKMODE_A, ADC1, ADC1_2, ADC2}, + rcc::{Clocks, AHB}, }; -use stm32f3::stm32f303::{adc1::cfgr::ALIGN_A, adc1_2::ccr::CKMODE_A}; -const MAX_ADVREGEN_STARTUP_US: u32 = 10; #[cfg(any( feature = "stm32f303xb", @@ -29,10 +24,9 @@ const MAX_ADVREGEN_STARTUP_US: u32 = 10; feature = "stm32f303xd", feature = "stm32f303xe", ))] -use crate::{ - gpio::{gpiod, gpioe, gpiof}, - pac::{ADC3, ADC3_4, ADC4}, -}; +use crate::pac::{ADC3, ADC3_4, ADC4}; + +const MAX_ADVREGEN_STARTUP_US: u32 = 10; /// Analog Digital Converter Peripheral // TODO: Remove `pub` from the register block once all functionalities are implemented. @@ -174,21 +168,21 @@ macro_rules! adc_pins { #[cfg(feature = "stm32f303")] adc_pins!(ADC1, - gpioa::PA0 => 1, - gpioa::PA1 => 2, - gpioa::PA2 => 3, - gpioa::PA3 => 4, - gpioc::PC0 => 6, - gpioc::PC1 => 7, - gpioc::PC2 => 8, - gpioc::PC3 => 9, + gpio::PA0 => 1, + gpio::PA1 => 2, + gpio::PA2 => 3, + gpio::PA3 => 4, + gpio::PC0 => 6, + gpio::PC1 => 7, + gpio::PC2 => 8, + gpio::PC3 => 9, ); #[cfg(any(feature = "stm32f303x6", feature = "stm32f303x8"))] adc_pins!(ADC1, - gpiob::PB0 => 11, - gpiob::PB1 => 12, - gpiob::PB13 => 13, + gpio::PB0 => 11, + gpio::PB1 => 12, + gpio::PB13 => 13, ); #[cfg(any( @@ -198,8 +192,8 @@ adc_pins!(ADC1, feature = "stm32f303xe", ))] adc_pins!(ADC1, - gpiof::PF4 => 5, - gpiof::PF2 => 10, + gpio::PF4 => 5, + gpio::PF2 => 10, ); // # ADC2 Pin/Channel mapping @@ -207,24 +201,24 @@ adc_pins!(ADC1, #[cfg(feature = "stm32f303")] adc_pins!(ADC2, - gpioa::PA4 => 1, - gpioa::PA5 => 2, - gpioa::PA6 => 3, - gpioa::PA7 => 4, - gpioc::PC4 => 5, - gpioc::PC0 => 6, - gpioc::PC1 => 7, - gpioc::PC2 => 8, - gpioc::PC3 => 9, - gpioc::PC5 => 11, - gpiob::PB2 => 12, + gpio::PA4 => 1, + gpio::PA5 => 2, + gpio::PA6 => 3, + gpio::PA7 => 4, + gpio::PC4 => 5, + gpio::PC0 => 6, + gpio::PC1 => 7, + gpio::PC2 => 8, + gpio::PC3 => 9, + gpio::PC5 => 11, + gpio::PB2 => 12, ); #[cfg(any(feature = "stm32f303x6", feature = "stm32f303x8"))] adc_pins!(ADC2, - gpiob::PB12 => 13, - gpiob::PB14 => 14, - gpiob::PB15 => 15, + gpio::PB12 => 13, + gpio::PB14 => 14, + gpio::PB15 => 15, ); #[cfg(any( @@ -234,7 +228,7 @@ adc_pins!(ADC2, feature = "stm32f303xe", ))] adc_pins!(ADC2, - gpiof::PF2 => 10, + gpio::PF2 => 10, ); // # ADC3 Pin/Channel mapping @@ -247,22 +241,22 @@ adc_pins!(ADC2, feature = "stm32f303xe", ))] adc_pins!(ADC3, - gpiob::PB1 => 1, - gpioe::PE9 => 2, - gpioe::PE13 => 3, + gpio::PB1 => 1, + gpio::PE9 => 2, + gpio::PE13 => 3, // There is no ADC3 Channel #4 - gpiob::PB13 => 5, - gpioe::PE8 => 6, - gpiod::PD10 => 7, - gpiod::PD11 => 8, - gpiod::PD12 => 9, - gpiod::PD13 => 10, - gpiod::PD14 => 11, - gpiob::PB0 => 12, - gpioe::PE7 => 13, - gpioe::PE10 => 14, - gpioe::PE11 => 15, - gpioe::PE12 => 16, + gpio::PB13 => 5, + gpio::PE8 => 6, + gpio::PD10 => 7, + gpio::PD11 => 8, + gpio::PD12 => 9, + gpio::PD13 => 10, + gpio::PD14 => 11, + gpio::PB0 => 12, + gpio::PE7 => 13, + gpio::PE10 => 14, + gpio::PE11 => 15, + gpio::PE12 => 16, ); // # ADC4 Pin/Channel mapping @@ -275,19 +269,19 @@ adc_pins!(ADC3, feature = "stm32f303xe", ))] adc_pins!(ADC4, - gpioe::PE14 => 1, - gpioe::PE15 => 2, - gpiob::PB12 => 3, - gpiob::PB14 => 4, - gpiob::PB15 => 5, - gpioe::PE8 => 6, - gpiod::PD10 => 7, - gpiod::PD11 => 8, - gpiod::PD12 => 9, - gpiod::PD13 => 10, - gpiod::PD14 => 11, - gpiod::PD8 => 12, - gpiod::PD9 => 13, + gpio::PE14 => 1, + gpio::PE15 => 2, + gpio::PB12 => 3, + gpio::PB14 => 4, + gpio::PB15 => 5, + gpio::PE8 => 6, + gpio::PD10 => 7, + gpio::PD11 => 8, + gpio::PD12 => 9, + gpio::PD13 => 10, + gpio::PD14 => 11, + gpio::PD8 => 12, + gpio::PD9 => 13, ); // Abstract implementation of ADC functionality diff --git a/src/gpio.rs b/src/gpio.rs index b64ddc649..d7feb649f 100644 --- a/src/gpio.rs +++ b/src/gpio.rs @@ -755,42 +755,54 @@ macro_rules! gpio { gpio_mapped: $gpioy:ident, iopen: $iopxen:ident, ioprst: $iopxrst:ident, - partially_erased_pin: $PXx:ty, + partially_erased_pin: $PXx:ident, pins: [$( $i:literal => ( - $PXi:ty, $pxi:ident, $MODE:ty, $AFR:ident, [$($IntoAfi:ident),*], + $PXi:ident, $pxi:ident, $MODE:ty, $AFR:ident, [$($IntoAfi:ident),*], ), )+], }) => { - paste::paste!{ + paste::paste! { #[doc = "GPIO port " $GPIOX " (type state)"] pub struct $Gpiox; - } - impl private::Gpio for $Gpiox { - type Reg = crate::pac::$gpioy::RegisterBlock; + impl private::Gpio for $Gpiox { + type Reg = crate::pac::$gpioy::RegisterBlock; - #[inline(always)] - fn ptr(&self) -> *const Self::Reg { - crate::pac::$GPIOX::ptr() + #[inline(always)] + fn ptr(&self) -> *const Self::Reg { + crate::pac::$GPIOX::ptr() + } + + #[inline(always)] + fn port_index(&self) -> u8 { + $port_index + } } - #[inline(always)] - fn port_index(&self) -> u8 { - $port_index + impl marker::Gpio for $Gpiox {} + + impl marker::GpioStatic for $Gpiox { + type MODER = $gpiox::MODER; + type OTYPER = $gpiox::OTYPER; + type OSPEEDR = $gpiox::OSPEEDR; + type PUPDR = $gpiox::PUPDR; } - } - impl marker::Gpio for $Gpiox {} + $( + #[doc = "Pin " $PXi] + pub type $PXi = Pin<$Gpiox, U<$i>, Mode>; - impl marker::GpioStatic for $Gpiox { - type MODER = $gpiox::MODER; - type OTYPER = $gpiox::OTYPER; - type OSPEEDR = $gpiox::OSPEEDR; - type PUPDR = $gpiox::PUPDR; - } + $( + impl marker::$IntoAfi for $PXi { + type AFR = $gpiox::$AFR; + } + )* + )+ + + #[doc = "Partially erased pin for " $GPIOX] + pub type $PXx = Pin<$Gpiox, Ux, Mode>; - paste::paste!{ #[doc = "All Pins and associated registers for GPIO port " $GPIOX] pub mod $gpiox { use core::marker::PhantomData; @@ -800,7 +812,7 @@ macro_rules! gpio { rcc::AHB, }; - use super::{marker, Afr, $Gpiox, GpioExt, Moder, Ospeedr, Otyper, Pin, Pupdr, U, Ux}; + use super::{Afr, $Gpiox, GpioExt, Moder, Ospeedr, Otyper, Pupdr, U}; #[allow(unused_imports)] use super::{ @@ -808,6 +820,13 @@ macro_rules! gpio { AF0, AF1, AF2, AF3, AF4, AF5, AF6, AF7, AF8, AF9, AF10, AF11, AF12, AF13, AF14, AF15, }; + pub use super::{ + $PXx, + $( + $PXi, + )+ + }; + /// GPIO parts pub struct Parts { /// Opaque AFRH register @@ -923,20 +942,6 @@ macro_rules! gpio { fn pull_down { PULLDOWN } } } - - /// Partially erased pin - pub type $PXx = Pin<$Gpiox, Ux, Mode>; - - $( - #[doc = "Pin " $PXi] - pub type $PXi = Pin<$Gpiox, U<$i>, Mode>; - - $( - impl marker::$IntoAfi for $PXi { - type AFR = $AFR; - } - )* - )+ } } };