diff --git a/tt_metal/hw/inc/blackhole/dev_mem_map.h b/tt_metal/hw/inc/blackhole/dev_mem_map.h index d2d52ac749e0..828f2c33c752 100644 --- a/tt_metal/hw/inc/blackhole/dev_mem_map.h +++ b/tt_metal/hw/inc/blackhole/dev_mem_map.h @@ -51,9 +51,9 @@ #define MEM_BOOT_CODE_BASE 0 #define MEM_L1_BARRIER 12 -#define MEM_MAILBOX_BASE 48 +#define MEM_MAILBOX_BASE 16 // Magic size must be big enough to hold dev_msgs_t. static_asserts will fire if this is too small -#define MEM_MAILBOX_SIZE 5 * 4 * 512 + 4 * 32 + 1364 + 8 * 4 +#define MEM_MAILBOX_SIZE 5 * 4 * 512 + 4 * 32 + 1364 #define MEM_MAILBOX_END (MEM_MAILBOX_BASE + MEM_MAILBOX_SIZE) #define MEM_IERISC_MAILBOX_BASE 1024 #define MEM_IERISC_MAILBOX_END (MEM_IERISC_MAILBOX_BASE + 128) diff --git a/tt_metal/hw/inc/blackhole/eth_l1_address_map.h b/tt_metal/hw/inc/blackhole/eth_l1_address_map.h index 3586808504ff..f2d7ac382d65 100644 --- a/tt_metal/hw/inc/blackhole/eth_l1_address_map.h +++ b/tt_metal/hw/inc/blackhole/eth_l1_address_map.h @@ -60,7 +60,7 @@ struct address_map { // erisc early exit functionality re-uses mailboxes_t::ncrisc_halt_msg_t::stack_save memory static constexpr std::int32_t ERISC_MEM_MAILBOX_STACK_SAVE = ERISC_MEM_MAILBOX_BASE + 4; - static constexpr std::uint32_t ERISC_MEM_MAILBOX_END = ERISC_MEM_MAILBOX_BASE + 288 + 256 + 16 + (32 + 512) * 4 + 64; + static constexpr std::uint32_t ERISC_MEM_MAILBOX_END = ERISC_MEM_MAILBOX_BASE + 288 + 256 + 16 + (32 + 512) * 4; static constexpr std::int32_t ERISC_L1_KERNEL_CONFIG_BASE = ERISC_MEM_MAILBOX_END; static constexpr std::int32_t ERISC_L1_UNRESERVED_BASE = ERISC_L1_KERNEL_CONFIG_BASE + ERISC_L1_KERNEL_CONFIG_SIZE; diff --git a/tt_metal/hw/inc/dev_msgs.h b/tt_metal/hw/inc/dev_msgs.h index 55add9c4c78b..b5b27e95ebac 100644 --- a/tt_metal/hw/inc/dev_msgs.h +++ b/tt_metal/hw/inc/dev_msgs.h @@ -236,19 +236,18 @@ struct dprint_buf_msg_t { // NOC aligment max from BH -static constexpr uint32_t TT_ARCH_MAX_NOC_ALIGNMENT = 64; +static constexpr uint32_t TT_ARCH_MAX_NOC_WRITE_ALIGNMENT = 16; // TODO: when device specific headers specify number of processors // (and hal abstracts them on host), get these from there (same as above for dprint) #if defined(COMPILE_FOR_ERISC) || defined (COMPILE_FOR_IDLE_ERISC) static constexpr uint32_t PROFILER_RISC_COUNT = 1; -static constexpr uint32_t PROFILER_NOC_ALIGMENT_PAD_COUNT = 14; #else static constexpr uint32_t PROFILER_RISC_COUNT = 5; -static constexpr uint32_t PROFILER_NOC_ALIGMENT_PAD_COUNT = 2; #endif static constexpr uint32_t LAUNCH_NOC_ALIGMENT_PAD_COUNT = 1; +static constexpr uint32_t PROFILER_NOC_ALIGMENT_PAD_COUNT = 2; struct profiler_msg_t { uint32_t control_vector[kernel_profiler::PROFILER_L1_CONTROL_VECTOR_SIZE]; @@ -281,14 +280,14 @@ static_assert( #endif #if defined(COMPILE_FOR_ERISC) || defined (COMPILE_FOR_IDLE_ERISC) static_assert( eth_l1_mem::address_map::ERISC_MEM_MAILBOX_BASE + sizeof(mailboxes_t) < eth_l1_mem::address_map::ERISC_MEM_MAILBOX_END); -static constexpr uint32_t ETH_LAUNCH_CHECK = (eth_l1_mem::address_map::ERISC_MEM_MAILBOX_BASE + offsetof(mailboxes_t, launch)) % TT_ARCH_MAX_NOC_ALIGNMENT; -static constexpr uint32_t ETH_PROFILER_CHECK = (eth_l1_mem::address_map::ERISC_MEM_MAILBOX_BASE + offsetof(mailboxes_t, profiler)) % TT_ARCH_MAX_NOC_ALIGNMENT; +static constexpr uint32_t ETH_LAUNCH_CHECK = (eth_l1_mem::address_map::ERISC_MEM_MAILBOX_BASE + offsetof(mailboxes_t, launch)) % TT_ARCH_MAX_NOC_WRITE_ALIGNMENT; +static constexpr uint32_t ETH_PROFILER_CHECK = (eth_l1_mem::address_map::ERISC_MEM_MAILBOX_BASE + offsetof(mailboxes_t, profiler)) % TT_ARCH_MAX_NOC_WRITE_ALIGNMENT; static_assert( ETH_LAUNCH_CHECK == 0); static_assert( ETH_PROFILER_CHECK == 0); #else static_assert(MEM_MAILBOX_BASE + sizeof(mailboxes_t) < MEM_MAILBOX_END); -static constexpr uint32_t TENSIX_LAUNCH_CHECK = (MEM_MAILBOX_BASE + offsetof(mailboxes_t, launch)) % TT_ARCH_MAX_NOC_ALIGNMENT; -static constexpr uint32_t TENSIX_PROFILER_CHECK = (MEM_MAILBOX_BASE + offsetof(mailboxes_t, profiler)) % TT_ARCH_MAX_NOC_ALIGNMENT; +static constexpr uint32_t TENSIX_LAUNCH_CHECK = (MEM_MAILBOX_BASE + offsetof(mailboxes_t, launch)) % TT_ARCH_MAX_NOC_WRITE_ALIGNMENT; +static constexpr uint32_t TENSIX_PROFILER_CHECK = (MEM_MAILBOX_BASE + offsetof(mailboxes_t, profiler)) % TT_ARCH_MAX_NOC_WRITE_ALIGNMENT; static_assert( TENSIX_LAUNCH_CHECK == 0); static_assert( TENSIX_PROFILER_CHECK == 0); #endif diff --git a/tt_metal/hw/inc/grayskull/dev_mem_map.h b/tt_metal/hw/inc/grayskull/dev_mem_map.h index 526197d76bf0..c59561363660 100644 --- a/tt_metal/hw/inc/grayskull/dev_mem_map.h +++ b/tt_metal/hw/inc/grayskull/dev_mem_map.h @@ -53,9 +53,9 @@ #define MEM_BOOT_CODE_BASE 0 #define MEM_L1_BARRIER 12 -#define MEM_MAILBOX_BASE 48 +#define MEM_MAILBOX_BASE 16 // Magic size must be big enough to hold dev_msgs_t. static_asserts will fire if this is too small -#define MEM_MAILBOX_SIZE 5 * 2 * 1024 + 128 + 1364 + 8 * 4 +#define MEM_MAILBOX_SIZE 5 * 2 * 1024 + 128 + 1364 #define MEM_MAILBOX_END (MEM_MAILBOX_BASE + MEM_MAILBOX_SIZE) #define MEM_IERISC_MAILBOX_BASE 0 #define MEM_IERISC_MAILBOX_END 0 diff --git a/tt_metal/hw/inc/wormhole/dev_mem_map.h b/tt_metal/hw/inc/wormhole/dev_mem_map.h index e4fcc18d1f92..89a40666601d 100644 --- a/tt_metal/hw/inc/wormhole/dev_mem_map.h +++ b/tt_metal/hw/inc/wormhole/dev_mem_map.h @@ -55,9 +55,9 @@ #define MEM_BOOT_CODE_BASE 0 #define MEM_L1_BARRIER 12 -#define MEM_MAILBOX_BASE 48 +#define MEM_MAILBOX_BASE 16 // Magic size must be big enough to hold dev_msgs_t. static_asserts will fire if this is too small -#define MEM_MAILBOX_SIZE 5 * 4 * 512 + 4 * 32 + 1364 + 8 * 4 +#define MEM_MAILBOX_SIZE 5 * 4 * 512 + 4 * 32 + 1364 #define MEM_MAILBOX_END (MEM_MAILBOX_BASE + MEM_MAILBOX_SIZE) #define MEM_IERISC_MAILBOX_BASE 1024 #define MEM_IERISC_MAILBOX_END (MEM_IERISC_MAILBOX_BASE + 128) diff --git a/tt_metal/hw/inc/wormhole/eth_l1_address_map.h b/tt_metal/hw/inc/wormhole/eth_l1_address_map.h index f0ef1b8fdec2..cbd5b6f6f53e 100644 --- a/tt_metal/hw/inc/wormhole/eth_l1_address_map.h +++ b/tt_metal/hw/inc/wormhole/eth_l1_address_map.h @@ -60,7 +60,7 @@ struct address_map { // erisc early exit functionality re-uses mailboxes_t::ncrisc_halt_msg_t::stack_save memory static constexpr std::int32_t ERISC_MEM_MAILBOX_STACK_SAVE = ERISC_MEM_MAILBOX_BASE + 4; - static constexpr std::uint32_t ERISC_MEM_MAILBOX_END = ERISC_MEM_MAILBOX_BASE + 288 + 256 + 16 + (512 + 32) * 4 + 64; + static constexpr std::uint32_t ERISC_MEM_MAILBOX_END = ERISC_MEM_MAILBOX_BASE + 288 + 256 + 16 + (512 + 32) * 4; static constexpr std::int32_t ERISC_L1_KERNEL_CONFIG_BASE = ERISC_MEM_MAILBOX_END; static constexpr std::int32_t ERISC_L1_UNRESERVED_BASE = ERISC_L1_KERNEL_CONFIG_BASE + ERISC_L1_KERNEL_CONFIG_SIZE;