Fault injection environment (finjenv) of permanent hardware faults for various arithmetic circuits based on QuestaSIM logic simulator
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Updated
Dec 24, 2024 - Verilog
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arithmetic-circuits
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This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.
logic-gates icarus-verilog hdl multiplexer decoders encoders combinational-circuit adders sequential-circuits flip-flops arithmetic-circuits demultiplexer ripple-carry-adder shift-registers
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Updated
Jul 15, 2024 - Verilog
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