platform-designer

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Matrix multiplication on multiple Nios II cores

fpga parallel-computing matrix-multiplication verilog mailbox nios shared-memory hdl fpga-soc qsys parallel-programming nios2 de2-115 quartus spmd sopc platform-designer

Implementation of ChaCha20 for Cyclone V FPGA (DE10-nano) easily connectable to HPS (ARM processor)

arm cryptography encryption fpga verilog altera systemverilog hdl soc chacha20 dma cyclone-v ip-core hps rfc7539 platform-designer rfc8439

PERIDOT Standard peripherals

qsys quartus-prime peridot platform-designer

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