CHARM: Composing Heterogeneous Accelerators on Versal ACAP Architecture
AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!
AXI 1G Ethernet ref designs for the Opsero Ethernet FMC Max (OP080)
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Evaluation of timing performance of deep neural networks workloads accelerated on Versal AI Engine in presence of contention on shared resources, mainly caused by ARM Cortex A72 dual-core microprocessor.
Implementation of the Phylogenetic Liklihood Function for the AMD Versal architecture (FPGA and AI processors on same SoC).
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