From f26113e13faac7a967ab136a009096e6d01a4683 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Mon, 20 Feb 2023 23:59:52 -0800 Subject: [PATCH 01/10] Remove Duplicate Compiler Flags --- common.mk | 19 +++++++++++++++++-- tools/barstools | 2 +- variables.mk | 2 ++ 3 files changed, 20 insertions(+), 3 deletions(-) diff --git a/common.mk b/common.mk index f592fa5ce2..f5ed314245 100644 --- a/common.mk +++ b/common.mk @@ -126,10 +126,26 @@ define mfc_extra_anno_contents } ] endef +define sfc_extra_low_transforms_anno_contents +[ + { + "class": "firrtl.stage.RunFirrtlTransformAnnotation", + "transform": "barstools.tapeout.transforms.ExtraLowTransforms" + } +] +endef export mfc_extra_anno_contents +export sfc_extra_low_transforms_anno_contents $(FINAL_ANNO_FILE) $(MFC_EXTRA_ANNO_FILE): $(ANNO_FILE) echo "$$mfc_extra_anno_contents" > $(MFC_EXTRA_ANNO_FILE) +ifeq (,$(ENABLE_CUSTOM_FIRRTL_PASS)) jq -s '[.[][]]' $(ANNO_FILE) $(MFC_EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE) +else + echo "$$sfc_extra_low_transforms_anno_contents" > $(SFC_EXTRA_ANNO_FILE) + jq -s '[.[][]]' $(SFC_EXTRA_ANNO_FILE) $(MFC_EXTRA_ANNO_FILE) > $(EXTRA_ANNO_FILE) + jq -s '[.[][]]' $(ANNO_FILE) $(EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE) +endif + .PHONY: firrtl firrtl: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) @@ -179,9 +195,8 @@ endif --annotation-file $(FINAL_ANNO_FILE) \ --log-level $(FIRRTL_LOGLEVEL) \ --allow-unrecognized-annotations \ - -DX $(SFC_LEVEL) \ -X $(SFC_LEVEL) \ - $(EXTRA_FIRRTL_OPTIONS)) # -X and -DX are duplicates to allow for extra FIRRTL passes to be run + $(EXTRA_FIRRTL_OPTIONS)) -mv $(SFC_FIRRTL_BASENAME).lo.fir $(SFC_FIRRTL_FILE) # Optionally change file type when SFC generates LowFIRRTL @if [ "$(SFC_LEVEL)" = low ]; then cat $(SFC_ANNO_FILE) | jq 'del(.[] | select(.target | test("io.cpu"))?)' > /tmp/unnec-anno-deleted.sfc.anno.json; fi @if [ "$(SFC_LEVEL)" = low ]; then cat /tmp/unnec-anno-deleted.sfc.anno.json | jq 'del(.[] | select(.class | test("SRAMAnnotation"))?)' > /tmp/unnec-anno-deleted2.sfc.anno.json; fi diff --git a/tools/barstools b/tools/barstools index 9760528f1d..a9f9068baf 160000 --- a/tools/barstools +++ b/tools/barstools @@ -1 +1 @@ -Subproject commit 9760528f1de2b1a52a11476e76d25909b31d1def +Subproject commit a9f9068baf5ecf3aa3c37980738971036e411731 diff --git a/variables.mk b/variables.mk index f10cbfa95a..b98e5633ea 100644 --- a/variables.mk +++ b/variables.mk @@ -146,6 +146,7 @@ endif # chisel generated outputs FIRRTL_FILE ?= $(build_dir)/$(long_name).fir ANNO_FILE ?= $(build_dir)/$(long_name).anno.json +EXTRA_ANNO_FILE ?= $(build_dir)/$(long_name).extra.anno.json # chisel anno modification output MFC_EXTRA_ANNO_FILE ?= $(build_dir)/$(long_name).extrafirtool.anno.json @@ -154,6 +155,7 @@ FINAL_ANNO_FILE ?= $(build_dir)/$(long_name).appended.anno.json # scala firrtl compiler (sfc) outputs SFC_FIRRTL_BASENAME ?= $(build_dir)/$(long_name).sfc SFC_FIRRTL_FILE ?= $(SFC_FIRRTL_BASENAME).fir +SFC_EXTRA_ANNO_FILE ?= $(build_dir)/$(long_name).extrasfc.anno.json SFC_ANNO_FILE ?= $(build_dir)/$(long_name).sfc.anno.json # firtool compiler outputs From 1adc21d663f1dbe2b7293386b77df17c51ccf050 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 21 Feb 2023 11:34:27 -0800 Subject: [PATCH 02/10] Fix socket name length issues on CI --- .github/scripts/defaults.sh | 5 +++++ .github/scripts/remote-do-rtl-build.sh | 2 +- .github/workflows/chipyard-full-flow.yml | 1 + variables.mk | 3 ++- 4 files changed, 9 insertions(+), 2 deletions(-) diff --git a/.github/scripts/defaults.sh b/.github/scripts/defaults.sh index 6ca434fb30..57fdfaa808 100755 --- a/.github/scripts/defaults.sh +++ b/.github/scripts/defaults.sh @@ -23,6 +23,11 @@ LOCAL_CHIPYARD_DIR=$GITHUB_WORKSPACE LOCAL_SIM_DIR=$LOCAL_CHIPYARD_DIR/sims/verilator LOCAL_FIRESIM_DIR=$LOCAL_CHIPYARD_DIR/sims/firesim/sim +# CI uses temp directories with very long names +# explicitly force socket creation to use /tmp to avoid name length errors +# https://github.com/sbt/sbt/pull/6887 +JAVA_TMP_DIR=$(mktemp -d -t ci-cy-XXXXXXXX) + # key value store to get the build groups declare -A grouping grouping["group-cores"]="chipyard-cva6 chipyard-ibex chipyard-rocket chipyard-hetero chipyard-boom chipyard-sodor chipyard-digitaltop chipyard-multiclock-rocket chipyard-nomem-scratchpad chipyard-spike chipyard-clone" diff --git a/.github/scripts/remote-do-rtl-build.sh b/.github/scripts/remote-do-rtl-build.sh index 0e887e9a26..b5755d0156 100755 --- a/.github/scripts/remote-do-rtl-build.sh +++ b/.github/scripts/remote-do-rtl-build.sh @@ -53,5 +53,5 @@ read -a keys <<< ${grouping[$1]} for key in "${keys[@]}" do export COURSIER_CACHE=$REMOTE_WORK_DIR/.coursier-cache - make -j$REMOTE_MAKE_NPROC -C $REMOTE_MAKE_DIR FIRRTL_LOGLEVEL=info JAVA_OPTS="$REMOTE_JAVA_OPTS" SBT_OPTS="$REMOTE_SBT_OPTS" ${mapping[$key]} + make -j$REMOTE_MAKE_NPROC -C $REMOTE_MAKE_DIR FIRRTL_LOGLEVEL=info JAVA_TMP_DIR=$JAVA_TMP_DIR SBT_OPTS="$REMOTE_SBT_OPTS" ${mapping[$key]} done diff --git a/.github/workflows/chipyard-full-flow.yml b/.github/workflows/chipyard-full-flow.yml index cc2168e847..22382571d3 100644 --- a/.github/workflows/chipyard-full-flow.yml +++ b/.github/workflows/chipyard-full-flow.yml @@ -13,6 +13,7 @@ defaults: env: REMOTE_WORK_DIR: ${{ secrets.BUILDDIR }}/cy-ci-shared/cy-${{ github.sha }} + JAVA_TMP_DIR: /tmp/cy-${{ github.sha }}-full jobs: cancel-prior-workflows: diff --git a/variables.mk b/variables.mk index b98e5633ea..a89d23a0f4 100644 --- a/variables.mk +++ b/variables.mk @@ -204,7 +204,8 @@ sim_common_files ?= $(build_dir)/sim_files.common.f # java arguments used in sbt ######################################################################################### JAVA_HEAP_SIZE ?= 8G -export JAVA_TOOL_OPTIONS ?= -Xmx$(JAVA_HEAP_SIZE) -Xss8M -Djava.io.tmpdir=$(base_dir)/.java_tmp +JAVA_TMP_DIR ?= $(base_dir)/.java_tmp +export JAVA_TOOL_OPTIONS ?= -Xmx$(JAVA_HEAP_SIZE) -Xss8M -Djava.io.tmpdir=$(JAVA_TMP_DIR) ######################################################################################### # default sbt launch command From 3b248b13689e5963210db90cbb71d6a3963a8f1b Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 21 Feb 2023 14:48:15 -0800 Subject: [PATCH 03/10] Fix firesim sbt builds --- .github/scripts/remote-run-firesim-scala-tests.sh | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/scripts/remote-run-firesim-scala-tests.sh b/.github/scripts/remote-run-firesim-scala-tests.sh index 6d475921c0..960d170699 100755 --- a/.github/scripts/remote-run-firesim-scala-tests.sh +++ b/.github/scripts/remote-run-firesim-scala-tests.sh @@ -16,4 +16,5 @@ cd $REMOTE_CHIPYARD_DIR # Run Firesim Scala Tests export FIRESIM_ENV_SOURCED=1; export COURSIER_CACHE=$REMOTE_WORK_DIR/.coursier-cache -make -C $REMOTE_FIRESIM_DIR JAVA_OPTS="$REMOTE_JAVA_OPTS" SBT_OPTS="$REMOTE_SBT_OPTS" TARGET_SBT_PROJECT="{file:$REMOTE_CHIPYARD_DIR}firechip" testOnly ${mapping[$1]} +JAVA_TOOL_OPTIONS="$REMOTE_JAVA_OPTS -Djava.io.tmpdir=$(mktemp -d -t cy-fsim-XXXXXXXX)" +make -C $REMOTE_FIRESIM_DIR JAVA_TOOL_OPTIONS="$JAVA_TOOL_OPTIONS" SBT_OPTS="$REMOTE_SBT_OPTS" TARGET_SBT_PROJECT="{file:$REMOTE_CHIPYARD_DIR}firechip" testOnly ${mapping[$1]} From 985491659a608d93d5759292bd41463e78436d39 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Tue, 21 Feb 2023 16:56:25 -0800 Subject: [PATCH 04/10] Fix TestDriver.v missing from gen-collateral after recompiling --- sims/vcs/Makefile | 6 +++--- sims/verilator/Makefile | 6 +++--- vlsi/Makefile | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) diff --git a/sims/vcs/Makefile b/sims/vcs/Makefile index b26df84331..b6f11a800b 100644 --- a/sims/vcs/Makefile +++ b/sims/vcs/Makefile @@ -38,10 +38,10 @@ SIM_FILE_REQS += \ $(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v # copy files but ignore *.h files in *.f since vcs has +incdir+$(build_dir) -$(sim_files): $(SIM_FILE_REQS) | $(GEN_COLLATERAL_DIR) - cp -f $^ $(GEN_COLLATERAL_DIR) +$(sim_files): $(SIM_FILE_REQS) $(ALL_MODS_FILELIST) | $(GEN_COLLATERAL_DIR) + cp -f $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR) $(foreach file,\ - $^,\ + $(SIM_FILE_REQS),\ $(if $(filter %.h,$(file)),\ ,\ echo "$(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;)) diff --git a/sims/verilator/Makefile b/sims/verilator/Makefile index fd171b4cb3..d48da28e8c 100644 --- a/sims/verilator/Makefile +++ b/sims/verilator/Makefile @@ -66,10 +66,10 @@ SIM_FILE_REQS += \ $(ROCKETCHIP_RSRCS_DIR)/csrc/remote_bitbang.cc # copy files and add -FI for *.h files in *.f -$(sim_files): $(SIM_FILE_REQS) | $(GEN_COLLATERAL_DIR) - cp -f $^ $(GEN_COLLATERAL_DIR) +$(sim_files): $(SIM_FILE_REQS) $(ALL_MODS_FILELIST) | $(GEN_COLLATERAL_DIR) + cp -f $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR) $(foreach file,\ - $^,\ + $(SIM_FILE_REQS),\ $(if $(filter %.h,$(file)),\ echo "-FI $(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;,\ echo "$(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;)) diff --git a/vlsi/Makefile b/vlsi/Makefile index a1f850a1ee..ab8438d50c 100644 --- a/vlsi/Makefile +++ b/vlsi/Makefile @@ -134,10 +134,10 @@ SIM_FILE_REQS += \ $(ROCKETCHIP_RSRCS_DIR)/vsrc/TestDriver.v # copy files but ignore *.h files in *.f since vcs has +incdir+$(build_dir) -$(sim_files): $(SIM_FILE_REQS) | $(build_dir) - cp -f $^ $(build_dir) +$(sim_files): $(SIM_FILE_REQS) $(ALL_MODS_FILELIST) | $(build_dir) + cp -f $(SIM_FILE_REQS) $(build_dir) $(foreach file,\ - $^,\ + $(SIM_FILE_REQS),\ $(if $(filter %.h,$(file)),\ ,\ echo "$(addprefix $(build_dir)/, $(notdir $(file)))" >> $@;)) From 3b6c0d2ae31d9a909d79f29fecdea171ae981cc4 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Tue, 21 Feb 2023 21:23:58 -0800 Subject: [PATCH 05/10] fixes --- fpga/Makefile | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/fpga/Makefile b/fpga/Makefile index 037b2fb9a6..79bdb338b8 100644 --- a/fpga/Makefile +++ b/fpga/Makefile @@ -90,11 +90,14 @@ fpga_common_script_dir := $(fpga_dir)/common/tcl ######################################################################################### # setup misc. sim files ######################################################################################### +SIM_FILE_REQS += \ + $(ROCKETCHIP_RSRCS_DIR)/vsrc/EICG_wrapper.v + # copy files but ignore *.h files in *.f (match vcs) -$(sim_files): $(SIM_FILE_REQS) | $(GEN_COLLATERAL_DIR) - cp -f $^ $(GEN_COLLATERAL_DIR) +$(sim_files): $(SIM_FILE_REQS) $(ALL_MODS_FILELIST) | $(GEN_COLLATERAL_DIR) + cp -f $(SIM_FILE_REQS) $(GEN_COLLATERAL_DIR) $(foreach file,\ - $^,\ + $(SIM_FILE_REQS),\ $(if $(filter %.h,$(file)),\ ,\ echo "$(addprefix $(GEN_COLLATERAL_DIR)/, $(notdir $(file)))" >> $@;)) From 5d0a25bab3688f6aad6d847478c4bf907fd753a8 Mon Sep 17 00:00:00 2001 From: joey0320 Date: Tue, 21 Feb 2023 21:54:45 -0800 Subject: [PATCH 06/10] Revert "Remove Duplicate Compiler Flags" This reverts commit be358542863d7eaf2e28dcbc4aac10c03a97dd0b. --- common.mk | 19 ++----------------- tools/barstools | 2 +- variables.mk | 2 -- 3 files changed, 3 insertions(+), 20 deletions(-) diff --git a/common.mk b/common.mk index f5ed314245..f592fa5ce2 100644 --- a/common.mk +++ b/common.mk @@ -126,26 +126,10 @@ define mfc_extra_anno_contents } ] endef -define sfc_extra_low_transforms_anno_contents -[ - { - "class": "firrtl.stage.RunFirrtlTransformAnnotation", - "transform": "barstools.tapeout.transforms.ExtraLowTransforms" - } -] -endef export mfc_extra_anno_contents -export sfc_extra_low_transforms_anno_contents $(FINAL_ANNO_FILE) $(MFC_EXTRA_ANNO_FILE): $(ANNO_FILE) echo "$$mfc_extra_anno_contents" > $(MFC_EXTRA_ANNO_FILE) -ifeq (,$(ENABLE_CUSTOM_FIRRTL_PASS)) jq -s '[.[][]]' $(ANNO_FILE) $(MFC_EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE) -else - echo "$$sfc_extra_low_transforms_anno_contents" > $(SFC_EXTRA_ANNO_FILE) - jq -s '[.[][]]' $(SFC_EXTRA_ANNO_FILE) $(MFC_EXTRA_ANNO_FILE) > $(EXTRA_ANNO_FILE) - jq -s '[.[][]]' $(ANNO_FILE) $(EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE) -endif - .PHONY: firrtl firrtl: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) @@ -195,8 +179,9 @@ endif --annotation-file $(FINAL_ANNO_FILE) \ --log-level $(FIRRTL_LOGLEVEL) \ --allow-unrecognized-annotations \ + -DX $(SFC_LEVEL) \ -X $(SFC_LEVEL) \ - $(EXTRA_FIRRTL_OPTIONS)) + $(EXTRA_FIRRTL_OPTIONS)) # -X and -DX are duplicates to allow for extra FIRRTL passes to be run -mv $(SFC_FIRRTL_BASENAME).lo.fir $(SFC_FIRRTL_FILE) # Optionally change file type when SFC generates LowFIRRTL @if [ "$(SFC_LEVEL)" = low ]; then cat $(SFC_ANNO_FILE) | jq 'del(.[] | select(.target | test("io.cpu"))?)' > /tmp/unnec-anno-deleted.sfc.anno.json; fi @if [ "$(SFC_LEVEL)" = low ]; then cat /tmp/unnec-anno-deleted.sfc.anno.json | jq 'del(.[] | select(.class | test("SRAMAnnotation"))?)' > /tmp/unnec-anno-deleted2.sfc.anno.json; fi diff --git a/tools/barstools b/tools/barstools index a9f9068baf..9760528f1d 160000 --- a/tools/barstools +++ b/tools/barstools @@ -1 +1 @@ -Subproject commit a9f9068baf5ecf3aa3c37980738971036e411731 +Subproject commit 9760528f1de2b1a52a11476e76d25909b31d1def diff --git a/variables.mk b/variables.mk index a89d23a0f4..1312cbe387 100644 --- a/variables.mk +++ b/variables.mk @@ -146,7 +146,6 @@ endif # chisel generated outputs FIRRTL_FILE ?= $(build_dir)/$(long_name).fir ANNO_FILE ?= $(build_dir)/$(long_name).anno.json -EXTRA_ANNO_FILE ?= $(build_dir)/$(long_name).extra.anno.json # chisel anno modification output MFC_EXTRA_ANNO_FILE ?= $(build_dir)/$(long_name).extrafirtool.anno.json @@ -155,7 +154,6 @@ FINAL_ANNO_FILE ?= $(build_dir)/$(long_name).appended.anno.json # scala firrtl compiler (sfc) outputs SFC_FIRRTL_BASENAME ?= $(build_dir)/$(long_name).sfc SFC_FIRRTL_FILE ?= $(SFC_FIRRTL_BASENAME).fir -SFC_EXTRA_ANNO_FILE ?= $(build_dir)/$(long_name).extrasfc.anno.json SFC_ANNO_FILE ?= $(build_dir)/$(long_name).sfc.anno.json # firtool compiler outputs From 546aa981b6fcc3007a0908fc457c23fab79ba5c4 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 21 Feb 2023 10:12:40 -0800 Subject: [PATCH 07/10] Bump boom --- generators/boom | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/generators/boom b/generators/boom index 615f4ef60f..deae9f7046 160000 --- a/generators/boom +++ b/generators/boom @@ -1 +1 @@ -Subproject commit 615f4ef60fdd2fd255ff0cf49602391c91b83369 +Subproject commit deae9f70469336a3787fa7fcc10135ffb93d21d9 From 04f30b95849c29a3a345343ef4f98db04d5a9c2d Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 21 Feb 2023 10:32:34 -0800 Subject: [PATCH 08/10] Consolidate peripheral device testing configs into a single ManyPeripheralsConfig --- .github/scripts/defaults.sh | 7 ++-- .github/scripts/run-tests.sh | 8 ++--- .github/workflows/chipyard-run-tests.yml | 32 +++---------------- .../config/PeripheralDeviceConfigs.scala | 12 +++++++ 4 files changed, 22 insertions(+), 37 deletions(-) diff --git a/.github/scripts/defaults.sh b/.github/scripts/defaults.sh index 57fdfaa808..097bc04523 100755 --- a/.github/scripts/defaults.sh +++ b/.github/scripts/defaults.sh @@ -31,7 +31,7 @@ JAVA_TMP_DIR=$(mktemp -d -t ci-cy-XXXXXXXX) # key value store to get the build groups declare -A grouping grouping["group-cores"]="chipyard-cva6 chipyard-ibex chipyard-rocket chipyard-hetero chipyard-boom chipyard-sodor chipyard-digitaltop chipyard-multiclock-rocket chipyard-nomem-scratchpad chipyard-spike chipyard-clone" -grouping["group-peripherals"]="chipyard-dmirocket chipyard-blkdev chipyard-spiflashread chipyard-spiflashwrite chipyard-mmios chipyard-lbwif chipyard-nocores" +grouping["group-peripherals"]="chipyard-dmirocket chipyard-spiflashwrite chipyard-mmios chipyard-nocores chipyard-manyperipherals" grouping["group-accels"]="chipyard-fftgenerator chipyard-nvdla chipyard-mempress chipyard-sha3 chipyard-hwacha chipyard-gemmini chipyard-streaming-fir chipyard-streaming-passthrough" grouping["group-constellation"]="chipyard-constellation" grouping["group-tracegen"]="tracegen tracegen-boom" @@ -42,7 +42,6 @@ grouping["group-fpga"]="arty vcu118 vc707" declare -A mapping mapping["chipyard-rocket"]="" mapping["chipyard-dmirocket"]=" CONFIG=dmiRocketConfig" -mapping["chipyard-lbwif"]=" CONFIG=LBWIFRocketConfig" mapping["chipyard-sha3"]=" CONFIG=Sha3RocketConfig" mapping["chipyard-mempress"]=" CONFIG=MempressRocketConfig" mapping["chipyard-digitaltop"]=" TOP=DigitalTop" @@ -51,14 +50,12 @@ mapping["chipyard-streaming-passthrough"]=" CONFIG=StreamingPassthroughRocketCon mapping["chipyard-hetero"]=" CONFIG=LargeBoomAndRocketConfig" mapping["chipyard-boom"]=" CONFIG=MediumBoomCosimConfig" mapping["chipyard-spike"]=" CONFIG=SpikeFastUARTConfig EXTRA_SIM_FLAGS='+spike-ipc=10'" -mapping["chipyard-blkdev"]=" CONFIG=SimBlockDeviceRocketConfig" mapping["chipyard-hwacha"]=" CONFIG=HwachaRocketConfig" mapping["chipyard-gemmini"]=" CONFIG=GemminiRocketConfig" mapping["chipyard-cva6"]=" CONFIG=CVA6Config" mapping["chipyard-ibex"]=" CONFIG=IbexConfig" -mapping["chipyard-spiflashread"]=" CONFIG=LargeSPIFlashROMRocketConfig" mapping["chipyard-spiflashwrite"]=" CONFIG=SmallSPIFlashRocketConfig" -mapping["chipyard-mmios"]=" CONFIG=MMIORocketConfig verilog" +mapping["chipyard-manyperipherals"]=" CONFIG=ManyPeripheralsRocketConfig" mapping["chipyard-cloneboom"]=" CONFIG=Cloned64MegaBoomConfig verilog" mapping["chipyard-nocores"]=" CONFIG=NoCoresConfig verilog" mapping["tracegen"]=" CONFIG=NonBlockingTraceGenL2Config" diff --git a/.github/scripts/run-tests.sh b/.github/scripts/run-tests.sh index 8dc6060316..e45ba2d661 100755 --- a/.github/scripts/run-tests.sh +++ b/.github/scripts/run-tests.sh @@ -35,9 +35,6 @@ case $1 in chipyard-dmirocket) run_bmark ${mapping[$1]} ;; - chipyard-lbwif) - run_bmark ${mapping[$1]} - ;; chipyard-boom) run_bmark ${mapping[$1]} ;; @@ -77,7 +74,10 @@ case $1 in make -C $LOCAL_CHIPYARD_DIR/tests make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/tests/streaming-fir.riscv ;; - chipyard-spiflashread) + chipyard-manyperipherals) + # bmark tests, then SPI Flash read tests + run_bmark ${mapping[$1]} + make -C $LOCAL_CHIPYARD_DIR/tests make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashread.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary-fast ;; diff --git a/.github/workflows/chipyard-run-tests.yml b/.github/workflows/chipyard-run-tests.yml index ccac2b9822..fd79bf2482 100644 --- a/.github/workflows/chipyard-run-tests.yml +++ b/.github/workflows/chipyard-run-tests.yml @@ -620,31 +620,8 @@ jobs: group-key: "group-peripherals" project-key: "chipyard-spiflashwrite" - chipyard-spiflashread-run-tests: - name: chipyard-spiflashread-run-tests - needs: prepare-chipyard-peripherals - runs-on: self-hosted - steps: - - name: Delete old checkout - run: | - ls -alh . - rm -rf ${{ github.workspace }}/* || true - rm -rf ${{ github.workspace }}/.* || true - ls -alh . - - name: Checkout - uses: actions/checkout@v3 - - name: Git workaround - uses: ./.github/actions/git-workaround - - name: Create conda env - uses: ./.github/actions/create-conda-env - - name: Run tests - uses: ./.github/actions/run-tests - with: - group-key: "group-peripherals" - project-key: "chipyard-spiflashread" - - chipyard-lbwif-run-tests: - name: chipyard-lbwif-run-tests + chipyard-manyperipherals-run-tests: + name: chipyard-manyperipherals-run-tests needs: prepare-chipyard-peripherals runs-on: self-hosted steps: @@ -664,7 +641,7 @@ jobs: uses: ./.github/actions/run-tests with: group-key: "group-peripherals" - project-key: "chipyard-lbwif" + project-key: "chipyard-manyperipherals" chipyard-sha3-run-tests: name: chipyard-sha3-run-tests @@ -1009,9 +986,8 @@ jobs: chipyard-sodor-run-tests, chipyard-dmirocket-run-tests, chipyard-fftgenerator-run-tests, - chipyard-spiflashread-run-tests, chipyard-spiflashwrite-run-tests, - chipyard-lbwif-run-tests, + chipyard-manyperipherals-run-tests, chipyard-sha3-run-tests, chipyard-streaming-fir-run-tests, chipyard-streaming-passthrough-run-tests, diff --git a/generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala b/generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala index 37e4570acb..d01bcd8dd4 100644 --- a/generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala +++ b/generators/chipyard/src/main/scala/config/PeripheralDeviceConfigs.scala @@ -63,3 +63,15 @@ class dmiRocketConfig extends Config( new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new chipyard.config.AbstractConfig) // DOC include end: DmiRocket + +class ManyPeripheralsRocketConfig extends Config( + new chipyard.harness.WithSimSPIFlashModel(true) ++ // add the SPI flash model in the harness (read-only) + new chipyard.harness.WithSimBlockDevice ++ // drive block-device IOs with SimBlockDevice + new chipyard.config.WithSPIFlash ++ // add the SPI flash controller + new freechips.rocketchip.subsystem.WithDefaultMMIOPort ++ // add default external master port + new freechips.rocketchip.subsystem.WithDefaultSlavePort ++ // add default external slave port + new testchipip.WithBlockDevice ++ // add block-device module to peripherybus + new testchipip.WithSerialTLMem(isMainMemory=true) ++ // set lbwif memory base to DRAM_BASE, use as main memory + new freechips.rocketchip.subsystem.WithNoMemPort ++ // remove AXI4 backing memory + new freechips.rocketchip.subsystem.WithNBigCores(1) ++ + new chipyard.config.AbstractConfig) From c410dc2d2d9a9814157cdd60508a9d81bb62cc87 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Tue, 21 Feb 2023 10:47:35 -0800 Subject: [PATCH 09/10] Consolidate mmio-accelerator test configs into a single config --- .github/scripts/defaults.sh | 7 +- .github/scripts/run-tests.sh | 28 +++---- .github/workflows/chipyard-run-tests.yml | 80 +------------------ .../scala/config/MMIOAcceleratorConfigs.scala | 8 ++ 4 files changed, 28 insertions(+), 95 deletions(-) diff --git a/.github/scripts/defaults.sh b/.github/scripts/defaults.sh index 097bc04523..adc264a938 100755 --- a/.github/scripts/defaults.sh +++ b/.github/scripts/defaults.sh @@ -32,7 +32,7 @@ JAVA_TMP_DIR=$(mktemp -d -t ci-cy-XXXXXXXX) declare -A grouping grouping["group-cores"]="chipyard-cva6 chipyard-ibex chipyard-rocket chipyard-hetero chipyard-boom chipyard-sodor chipyard-digitaltop chipyard-multiclock-rocket chipyard-nomem-scratchpad chipyard-spike chipyard-clone" grouping["group-peripherals"]="chipyard-dmirocket chipyard-spiflashwrite chipyard-mmios chipyard-nocores chipyard-manyperipherals" -grouping["group-accels"]="chipyard-fftgenerator chipyard-nvdla chipyard-mempress chipyard-sha3 chipyard-hwacha chipyard-gemmini chipyard-streaming-fir chipyard-streaming-passthrough" +grouping["group-accels"]="chipyard-mempress chipyard-sha3 chipyard-hwacha chipyard-gemmini chipyard-manymmioaccels" grouping["group-constellation"]="chipyard-constellation" grouping["group-tracegen"]="tracegen tracegen-boom" grouping["group-other"]="icenet testchipip constellation" @@ -45,8 +45,7 @@ mapping["chipyard-dmirocket"]=" CONFIG=dmiRocketConfig" mapping["chipyard-sha3"]=" CONFIG=Sha3RocketConfig" mapping["chipyard-mempress"]=" CONFIG=MempressRocketConfig" mapping["chipyard-digitaltop"]=" TOP=DigitalTop" -mapping["chipyard-streaming-fir"]=" CONFIG=StreamingFIRRocketConfig" -mapping["chipyard-streaming-passthrough"]=" CONFIG=StreamingPassthroughRocketConfig" +mapping["chipyard-manymmioaccels"]=" CONFIG=ManyMMIOAcceleratorRocketConfig" mapping["chipyard-hetero"]=" CONFIG=LargeBoomAndRocketConfig" mapping["chipyard-boom"]=" CONFIG=MediumBoomCosimConfig" mapping["chipyard-spike"]=" CONFIG=SpikeFastUARTConfig EXTRA_SIM_FLAGS='+spike-ipc=10'" @@ -60,11 +59,9 @@ mapping["chipyard-cloneboom"]=" CONFIG=Cloned64MegaBoomConfig verilog" mapping["chipyard-nocores"]=" CONFIG=NoCoresConfig verilog" mapping["tracegen"]=" CONFIG=NonBlockingTraceGenL2Config" mapping["tracegen-boom"]=" CONFIG=BoomTraceGenConfig" -mapping["chipyard-nvdla"]=" CONFIG=SmallNVDLARocketConfig" mapping["chipyard-sodor"]=" CONFIG=Sodor5StageConfig" mapping["chipyard-multiclock-rocket"]=" CONFIG=MulticlockRocketConfig" mapping["chipyard-nomem-scratchpad"]=" CONFIG=MMIOScratchpadOnlyRocketConfig" -mapping["chipyard-fftgenerator"]=" CONFIG=FFTRocketConfig" mapping["chipyard-constellation"]=" CONFIG=SharedNoCConfig" mapping["constellation"]=" SUB_PROJECT=constellation" diff --git a/.github/scripts/run-tests.sh b/.github/scripts/run-tests.sh index e45ba2d661..5247c2de2c 100755 --- a/.github/scripts/run-tests.sh +++ b/.github/scripts/run-tests.sh @@ -66,14 +66,22 @@ case $1 in (cd $LOCAL_CHIPYARD_DIR/generators/mempress/software/src && make) make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/generators/mempress/software/src/mempress-rocc.riscv ;; - chipyard-streaming-passthrough) - make -C $LOCAL_CHIPYARD_DIR/tests + chipyard-manymmioaccels) + make -C $LOCAL_CHIPYARD_DIR/tests + + # test streaming-passthrough make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/tests/streaming-passthrough.riscv - ;; - chipyard-streaming-fir) - make -C $LOCAL_CHIPYARD_DIR/tests + + # test streaming-fir make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} run-binary-fast BINARY=$LOCAL_CHIPYARD_DIR/tests/streaming-fir.riscv - ;; + + # test nvdla + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/nvdla.riscv run-binary-fast + + # test fft + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/fft.riscv run-binary-fast + + ;; chipyard-manyperipherals) # bmark tests, then SPI Flash read tests run_bmark ${mapping[$1]} @@ -101,14 +109,6 @@ case $1 in chipyard-sodor) run_asm ${mapping[$1]} ;; - chipyard-nvdla) - make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/nvdla.riscv run-binary-fast - ;; - chipyard-fftgenerator) - make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/fft.riscv run-binary-fast - ;; chipyard-constellation) run_bmark ${mapping[$1]} ;; diff --git a/.github/workflows/chipyard-run-tests.yml b/.github/workflows/chipyard-run-tests.yml index fd79bf2482..c3e77e8bbd 100644 --- a/.github/workflows/chipyard-run-tests.yml +++ b/.github/workflows/chipyard-run-tests.yml @@ -551,29 +551,6 @@ jobs: group-key: "group-cores" project-key: "chipyard-spike" - chipyard-fftgenerator-run-tests: - name: chipyard-fftgenerator-run-tests - needs: prepare-chipyard-accels - runs-on: self-hosted - steps: - - name: Delete old checkout - run: | - ls -alh . - rm -rf ${{ github.workspace }}/* || true - rm -rf ${{ github.workspace }}/.* || true - ls -alh . - - name: Checkout - uses: actions/checkout@v3 - - name: Git workaround - uses: ./.github/actions/git-workaround - - name: Create conda env - uses: ./.github/actions/create-conda-env - - name: Run tests - uses: ./.github/actions/run-tests - with: - group-key: "group-accels" - project-key: "chipyard-fftgenerator" - chipyard-dmirocket-run-tests: name: chipyard-dmirocket-run-tests needs: prepare-chipyard-peripherals @@ -666,52 +643,6 @@ jobs: group-key: "group-accels" project-key: "chipyard-sha3" - chipyard-streaming-fir-run-tests: - name: chipyard-streaming-fir-run-tests - needs: prepare-chipyard-accels - runs-on: self-hosted - steps: - - name: Delete old checkout - run: | - ls -alh . - rm -rf ${{ github.workspace }}/* || true - rm -rf ${{ github.workspace }}/.* || true - ls -alh . - - name: Checkout - uses: actions/checkout@v3 - - name: Git workaround - uses: ./.github/actions/git-workaround - - name: Create conda env - uses: ./.github/actions/create-conda-env - - name: Run tests - uses: ./.github/actions/run-tests - with: - group-key: "group-accels" - project-key: "chipyard-streaming-fir" - - chipyard-streaming-passthrough-run-tests: - name: chipyard-streaming-passthrough-run-tests - needs: prepare-chipyard-accels - runs-on: self-hosted - steps: - - name: Delete old checkout - run: | - ls -alh . - rm -rf ${{ github.workspace }}/* || true - rm -rf ${{ github.workspace }}/.* || true - ls -alh . - - name: Checkout - uses: actions/checkout@v3 - - name: Git workaround - uses: ./.github/actions/git-workaround - - name: Create conda env - uses: ./.github/actions/create-conda-env - - name: Run tests - uses: ./.github/actions/run-tests - with: - group-key: "group-accels" - project-key: "chipyard-streaming-passthrough" - chipyard-gemmini-run-tests: name: chipyard-gemmini-run-tests needs: prepare-chipyard-accels @@ -735,8 +666,8 @@ jobs: group-key: "group-accels" project-key: "chipyard-gemmini" - chipyard-nvdla-run-tests: - name: chipyard-nvdla-run-tests + chipyard-manymmioaccels-run-tests: + name: chipyard-manymmioaccels-run-tests needs: prepare-chipyard-accels runs-on: self-hosted steps: @@ -756,7 +687,7 @@ jobs: uses: ./.github/actions/run-tests with: group-key: "group-accels" - project-key: "chipyard-nvdla" + project-key: "chipyard-manymmioaccels" chipyard-mempress-run-tests: name: chipyard-mempress-run-tests @@ -985,14 +916,11 @@ jobs: chipyard-ibex-run-tests, chipyard-sodor-run-tests, chipyard-dmirocket-run-tests, - chipyard-fftgenerator-run-tests, chipyard-spiflashwrite-run-tests, chipyard-manyperipherals-run-tests, chipyard-sha3-run-tests, - chipyard-streaming-fir-run-tests, - chipyard-streaming-passthrough-run-tests, chipyard-gemmini-run-tests, - chipyard-nvdla-run-tests, + chipyard-manymmioaccels-run-tests, chipyard-mempress-run-tests, chipyard-constellation-run-tests, tracegen-boom-run-tests, diff --git a/generators/chipyard/src/main/scala/config/MMIOAcceleratorConfigs.scala b/generators/chipyard/src/main/scala/config/MMIOAcceleratorConfigs.scala index 8348891609..fcb4804dd8 100644 --- a/generators/chipyard/src/main/scala/config/MMIOAcceleratorConfigs.scala +++ b/generators/chipyard/src/main/scala/config/MMIOAcceleratorConfigs.scala @@ -56,3 +56,11 @@ class LargeNVDLARocketConfig extends Config( new nvidia.blocks.dla.WithNVDLA("large", true) ++ // add a large NVDLA with synth. rams new freechips.rocketchip.subsystem.WithNBigCores(1) ++ new chipyard.config.AbstractConfig) + +class ManyMMIOAcceleratorRocketConfig extends Config( + new fftgenerator.WithFFTGenerator(numPoints=8, width=16, decPt=8) ++ // add 8-point mmio fft at the default addr (0x2400) with 16bit fixed-point numbers. + new nvidia.blocks.dla.WithNVDLA("small") ++ // add a small NVDLA + new chipyard.example.WithStreamingPassthrough ++ // use top with tilelink-controlled streaming passthrough + new chipyard.example.WithStreamingFIR ++ // use top with tilelink-controlled streaming FIR + new freechips.rocketchip.subsystem.WithNBigCores(1) ++ + new chipyard.config.AbstractConfig) From c66388c7c260d28f562bda09a26fe7b37f9cdb72 Mon Sep 17 00:00:00 2001 From: Jerry Zhao Date: Wed, 22 Feb 2023 09:53:22 -0800 Subject: [PATCH 10/10] Move EXTRA_SIM_FLAGS to defaults.sh in CI --- .github/scripts/defaults.sh | 4 ++-- .github/scripts/run-tests.sh | 9 +++++---- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/.github/scripts/defaults.sh b/.github/scripts/defaults.sh index adc264a938..fb83ad00ba 100755 --- a/.github/scripts/defaults.sh +++ b/.github/scripts/defaults.sh @@ -53,8 +53,8 @@ mapping["chipyard-hwacha"]=" CONFIG=HwachaRocketConfig" mapping["chipyard-gemmini"]=" CONFIG=GemminiRocketConfig" mapping["chipyard-cva6"]=" CONFIG=CVA6Config" mapping["chipyard-ibex"]=" CONFIG=IbexConfig" -mapping["chipyard-spiflashwrite"]=" CONFIG=SmallSPIFlashRocketConfig" -mapping["chipyard-manyperipherals"]=" CONFIG=ManyPeripheralsRocketConfig" +mapping["chipyard-spiflashwrite"]=" CONFIG=SmallSPIFlashRocketConfig EXTRA_SIM_FLAGS='+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img'" +mapping["chipyard-manyperipherals"]=" CONFIG=ManyPeripheralsRocketConfig EXTRA_SIM_FLAGS='+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img'" mapping["chipyard-cloneboom"]=" CONFIG=Cloned64MegaBoomConfig verilog" mapping["chipyard-nocores"]=" CONFIG=NoCoresConfig verilog" mapping["tracegen"]=" CONFIG=NonBlockingTraceGenL2Config" diff --git a/.github/scripts/run-tests.sh b/.github/scripts/run-tests.sh index 5247c2de2c..6e66c9a8dc 100755 --- a/.github/scripts/run-tests.sh +++ b/.github/scripts/run-tests.sh @@ -83,15 +83,16 @@ case $1 in ;; chipyard-manyperipherals) - # bmark tests, then SPI Flash read tests - run_bmark ${mapping[$1]} + # SPI Flash read tests, then bmark tests make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashread.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary-fast + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashread.riscv run-binary-fast + + run_bmark ${mapping[$1]} ;; chipyard-spiflashwrite) make -C $LOCAL_CHIPYARD_DIR/tests - make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashwrite.riscv SIM_FLAGS="+spiflash0=${LOCAL_CHIPYARD_DIR}/tests/spiflash.img" run-binary-fast + make -C $LOCAL_SIM_DIR $DISABLE_SIM_PREREQ ${mapping[$1]} BINARY=$LOCAL_CHIPYARD_DIR/tests/spiflashwrite.riscv run-binary-fast [[ "`xxd $LOCAL_CHIPYARD_DIR/tests/spiflash.img | grep 1337\ 00ff\ aa55\ face | wc -l`" == "6" ]] || false ;; tracegen)