From ee14d4c48c24672e02a6f9f9a0d4c55f1d997083 Mon Sep 17 00:00:00 2001 From: Derrick Qi Date: Thu, 30 Mar 2023 13:30:23 -0700 Subject: [PATCH 1/4] Added UPF Support --- hammer/vlsi/hammer_vlsi_impl.py | 51 +++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 5 deletions(-) diff --git a/hammer/vlsi/hammer_vlsi_impl.py b/hammer/vlsi/hammer_vlsi_impl.py index 2cf3fca54..f7bc6a914 100644 --- a/hammer/vlsi/hammer_vlsi_impl.py +++ b/hammer/vlsi/hammer_vlsi_impl.py @@ -2059,11 +2059,52 @@ def sdf_file(self, value: Optional[str]) -> None: ### END Generated interface HammerTimingTool ### class HasUPFSupport(HammerTool): - """Mix-in trait with functions useful for tools with UPF style power - constraints""" - @property - def upf_power_specification(self) -> str: - raise NotImplementedError("Automatic generation of UPF power specifications is not supported yet.") + """Mix-in trait with functions useful for tools with UPF style power constraints""" + @property + def upf_power_specification(self) -> str: + #Constants and objects + output = [] # type: List[str] + domain = "AO" + #Header + output.append("set_design_top {t}".format(t=self.top_module)) + vdd = VoltageValue(self.get_setting("vlsi.inputs.supplies.VDD")) + #Create Single Power Domain + output.append("create_power_domain {d} \\".format(d=domain)) + output.append("\t-elements {.}") + #Get Supply Nets + power_nets = self.get_all_power_nets() + ground_nets = self.get_all_ground_nets() + #Create Supply Ports + for pg_net in (power_nets+ground_nets): + if(pg_net.pin != None): + #Create Supply Nets + output.append("create_supply_net {p} -domain {d}".format(p=pg_net.name, d=domain)) + output.append("create_supply_port {p} -domain {d} \\".format(p=pg_net.name, d=domain)) + output.append("\t-direction in") + #Connect Supply Net + output.append("connect_supply_net {p} -ports {p}".format(p=pg_net.name)) + #Set Domain Supply Net + output.append("set_domain_supply_net {d} \\".format(d=domain)) + output.append("\t-primary_power_net {p} \\".format(p=power_nets[0].name)) + output.append("\t-primary_ground_net {g}".format(g=ground_nets[0].name)) + #Add Port States + for p_net in power_nets: + if(p_net.pin != None): + output.append("add_port_state {g} \\".format(g=p_net.name)) + output.append("\t-state {{default {v}}}".format(v=vdd.value)) + for g_net in ground_nets: + if(g_net.pin != None): + output.append("add_port_state {g} \\".format(g=g_net.name)) + output.append("\t-state {default off}") + #Create Power State Table + output.append("create_pst pwr_state_table \\") + output.append("\t-supplies {{{p} {g}}}".format(p=" ".join(map(lambda x: x.name, power_nets)),g=" ".join(map(lambda x: x.name, ground_nets)) )) + #Add Power States + output.append("add_pst_state {d} \\".format(d="aon")) + output.append("\t-pst {pwr_state_table} \\") + output.append("\t-state {{{s}}}".format(s=" ".join(map(lambda x: "default", power_nets+ground_nets)))) + #End of File + return "\n".join(output) class HasCPFSupport(HammerTool): From 153e39c0ec93d8ba8c3f9cb140cc6f33c387ffde Mon Sep 17 00:00:00 2001 From: Derrick Qi Date: Wed, 5 Apr 2023 04:15:03 -0700 Subject: [PATCH 2/4] "test" From 8d54db7f79017c000b6c1a4d039372227004a5a0 Mon Sep 17 00:00:00 2001 From: Derrick Qi Date: Wed, 5 Apr 2023 04:19:43 -0700 Subject: [PATCH 3/4] Added fstrings & updated documentation & fixed problems --- hammer/vlsi/hammer_vlsi_impl.py | 74 ++++++++++++++------------------- 1 file changed, 31 insertions(+), 43 deletions(-) diff --git a/hammer/vlsi/hammer_vlsi_impl.py b/hammer/vlsi/hammer_vlsi_impl.py index f7bc6a914..642117277 100644 --- a/hammer/vlsi/hammer_vlsi_impl.py +++ b/hammer/vlsi/hammer_vlsi_impl.py @@ -2062,15 +2062,15 @@ class HasUPFSupport(HammerTool): """Mix-in trait with functions useful for tools with UPF style power constraints""" @property def upf_power_specification(self) -> str: - #Constants and objects output = [] # type: List[str] domain = "AO" #Header - output.append("set_design_top {t}".format(t=self.top_module)) + output.append('upf_version 2.0') + output.append(f'set_design_top {self.top_module}') vdd = VoltageValue(self.get_setting("vlsi.inputs.supplies.VDD")) #Create Single Power Domain - output.append("create_power_domain {d} \\".format(d=domain)) - output.append("\t-elements {.}") + output.append(f'create_power_domain {domain} \\') + output.append(f'\t-elements {{.}}') #Get Supply Nets power_nets = self.get_all_power_nets() ground_nets = self.get_all_ground_nets() @@ -2078,32 +2078,31 @@ def upf_power_specification(self) -> str: for pg_net in (power_nets+ground_nets): if(pg_net.pin != None): #Create Supply Nets - output.append("create_supply_net {p} -domain {d}".format(p=pg_net.name, d=domain)) - output.append("create_supply_port {p} -domain {d} \\".format(p=pg_net.name, d=domain)) - output.append("\t-direction in") + output.append(f'create_supply_net {pg_net.name} -domain {domain}') + output.append(f'create_supply_port {pg_net.name} -domain {domain} \\') + output.append(f'\t-direction in') #Connect Supply Net - output.append("connect_supply_net {p} -ports {p}".format(p=pg_net.name)) - #Set Domain Supply Net - output.append("set_domain_supply_net {d} \\".format(d=domain)) - output.append("\t-primary_power_net {p} \\".format(p=power_nets[0].name)) - output.append("\t-primary_ground_net {g}".format(g=ground_nets[0].name)) + output.append(f'connect_supply_net {pg_net.name} -ports {pg_net.name}') + #Set Domain Supply Net + output.append(f'set_domain_supply_net {domain} \\') + output.append(f'\t-primary_power_net {power_nets[0].name} \\') + output.append(f'\t-primary_ground_net {ground_nets[0].name}') #Add Port States for p_net in power_nets: if(p_net.pin != None): - output.append("add_port_state {g} \\".format(g=p_net.name)) - output.append("\t-state {{default {v}}}".format(v=vdd.value)) + output.append(f'add_port_state {p_net.name} \\') + output.append(f'\t-state {{default {vdd.value}}}') for g_net in ground_nets: if(g_net.pin != None): - output.append("add_port_state {g} \\".format(g=g_net.name)) - output.append("\t-state {default off}") + output.append(f'add_port_state {g_net.name} \\') + output.append(f'\t-state {{default 0.0}}') #Create Power State Table - output.append("create_pst pwr_state_table \\") - output.append("\t-supplies {{{p} {g}}}".format(p=" ".join(map(lambda x: x.name, power_nets)),g=" ".join(map(lambda x: x.name, ground_nets)) )) + output.append('create_pst pwr_state_table \\') + output.append(f'\t-supplies {{{" ".join(map(lambda x: x.name, power_nets))} {" ".join(map(lambda x: x.name, ground_nets))}}}') #Add Power States - output.append("add_pst_state {d} \\".format(d="aon")) - output.append("\t-pst {pwr_state_table} \\") - output.append("\t-state {{{s}}}".format(s=" ".join(map(lambda x: "default", power_nets+ground_nets)))) - #End of File + output.append(f'add_pst_state aon \\') + output.append(f'\t-pst {{pwr_state_table}} \\') + output.append(f'\t-state {{{" ".join(map(lambda x: "default", power_nets+ground_nets))}}}') return "\n".join(output) @@ -2120,37 +2119,26 @@ def cpf_power_specification(self) -> str: # Header output.append("set_cpf_version 1.0e") output.append("set_hierarchy_separator /") - - output.append("set_design {t}".format(t=self.top_module)) - # Define power and ground nets + output.append(f'set_design {self.top_module}') + # Define power and ground nets (HARD CODE) power_nets = self.get_all_power_nets() # type: List[Supply] - ground_nets = self.get_all_ground_nets() # type: List[Supply] + ground_nets = self.get_all_ground_nets()# type: List[Supply] vdd = VoltageValue(self.get_setting("vlsi.inputs.supplies.VDD")) # type: VoltageValue - output.append("create_power_nets -nets {{ {p} }} -voltage {v}". - format(p=" ".join(map(lambda x: x.name, power_nets)), v=vdd.value)) - output.append("create_ground_nets -nets {{ {g} }}". - format(g=" ".join(map(lambda x: x.name, ground_nets)))) - + output.append(f'create_power_nets -nets {{ {" ".join(map(lambda x: x.name, power_nets))} }} -voltage {vdd.value}') + output.append(f'create_ground_nets -nets {{ {" ".join(map(lambda x: x.name, ground_nets))} }}') # Define power domain and connections - output.append("create_power_domain -name {d} -default".format(d=domain)) + output.append(f'create_power_domain -name {domain} -default') # Assume primary power are first in list - output.append("update_power_domain -name {d} -primary_power_net {pp} -primary_ground_net {pg}". - format(d=domain, pp=power_nets[0].name, pg=ground_nets[0].name)) + output.append(f'update_power_domain -name {domain} -primary_power_net {power_nets[0].name} -primary_ground_net {ground_nets[0].name}') # Assuming that all power/ground nets correspond to pins for pg_net in (power_nets+ground_nets): if(pg_net.pin != None): - output.append("create_global_connection -domain {d} -net {n} -pins {p}". - format(d=domain, n=pg_net.name, p=pg_net.pin)) - + output.append(f'create_global_connection -domain {domain} -net {pg_net.name} -pins {pg_net.pin}') # Create nominal operation condtion and power mode - output.append("create_nominal_condition -name {c} -voltage {v}". - format(c=condition, v=vdd.value)) - output.append("create_power_mode -name {m} -default -domain_conditions {{{d}@{c}}}". - format(m=mode, d=domain, c=condition)) - + output.append(f'create_nominal_condition -name {condition} -voltage {vdd.value}') + output.append(f'create_power_mode -name {mode} -default -domain_conditions {{{domain}@{condition}}}') # Footer output.append("end_design") - return "\n".join(output) class HasSDCSupport(HammerTool): From ad93b02b4b20858c41c1e1e67106f0ad37aacd8c Mon Sep 17 00:00:00 2001 From: Derrick Qi Date: Wed, 5 Apr 2023 04:22:13 -0700 Subject: [PATCH 4/4] See previous commit --- hammer/config/defaults.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hammer/config/defaults.yml b/hammer/config/defaults.yml index 1b5895846..44b36cd73 100644 --- a/hammer/config/defaults.yml +++ b/hammer/config/defaults.yml @@ -294,7 +294,7 @@ vlsi.inputs: # Specifies what kind/version/type of power specification to use # Valid options: # cpf - Use the common power format commonly used in Cadence tools - # upf - Use the universal power format, IEEE 1801-2015 + # upf - Use the universal power format, IEEE 1801-2009 power_spec_contents: null # Optional: Contents of a power specification in the above type (str) sram_parameters: [] # SRAM Parameters