Z97 won't pass POST with Nvidia Tesla M40

[SnoringWolf]

System

• Motherboard: msi Z97S SLI Krait Edition
• BIOS Version: A.7 latest
• GPU: i7-4790
• [ x ] CSM is turned off
• [ x ] 4G decoding is enabled
• [ x ] UEFIPatch is applied (see Using UEFIPatch for more information). On some motherboards DSDT Patching is also needed
• [ x ] I have read Common issues (and fixes)

Description

The system won't pass POST with the Tesla M40 installed.
As I understand this FAQ post https://github.com/xCuri0/ReBarUEFI/wiki/Common-issues-(and-fixes)#using-32gb-or-larger-bar-on-lga11551150 I need to revert everything I've done so far and go with an unmodded bios and edit the DSDT.

I'm having issues with the DSDT, the original msi version won't recompile without errors with the available versions of acpica-tools. It always throws two syntax errors were I can't find anything wrong.

iasl DSDT.dsl 

Intel ACPI Component Architecture
ASL+ Optimizing Compiler/Disassembler version 20200925
Copyright (c) 2000 - 2020 Intel Corporation

Compiler aborting due to parser-detected syntax error(s)
DSDT.dsl  10210:         }
Error    6126 -         ^ syntax error

DSDT.dsl  18936: 
Error    6126 - syntax error and premature End-Of-File

sudo dmesg | grep "root bus resource"          
[    0.227916] pci_bus 0000:00: root bus resource [bus 00-3e]
[    0.227917] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
[    0.227918] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
[    0.227919] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000dffff window]
[    0.227920] pci_bus 0000:00: root bus resource [mem 0xdf200000-0xfeafffff window]
[    0.227922] pci_bus 0000:00: root bus resource [mem 0x800000000-0xfffffffff window]

I'm stuck any ideas?

DSDT.dsl.txt
proc-iomem.txt

Edit: I tried 8GB, 16GB and 24GB of RAM with the same result, system won't pass POST
ReBar set to 32GB
If I disable 4G decoding with the Tesla M40 installed the bios throws insufficient PCI resources detected and won't continue to boot.

[xCuri0]

I'm not sure if it's possible to make it work if motherboard won't POST, because that method relies on the OS assigning the device itself.

For the DSDT error you have to remove the Arg0 line, it says this at the bottom of DSDT editing page.

It could be possible to have it working with further patching because unlike Ivy Bridge you have 39-bit addressing on Haswell.