{"payload":{"header_redesign_enabled":false,"results":[{"id":"474341424","archived":false,"color":"#f34b7d","followers":1,"has_funding_file":false,"hl_name":"z1skgr/reconf-Computing__HLS","hl_trunc_description":"High Level synthesis of data transfer in Vivado, Vivado HLS","language":"C++","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":474341424,"name":"reconf-Computing__HLS","owner_id":22920222,"owner_login":"z1skgr","updated_at":"2022-05-16T20:39:59.949Z","has_issues":true}},"sponsorable":false,"topics":["hls","simulation","embedded-systems","data-structures","xilinx","vivado","fifo-queue","xilinx-vivado","embedded-c","data-system","high-level-synthesis","vivado-hls","xilinx-zynq"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":60,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Az1skgr%252Freconf-Computing__HLS%2B%2Blanguage%253AC%252B%252B","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/z1skgr/reconf-Computing__HLS/star":{"post":"wFyP9BQgyOu_JHy56YAa54QT7RFmFIFjShBcjWD2su3eKaR686CvXCJGz7GSsuGMDUF1aotCjXIe2UkRbFwspg"},"/z1skgr/reconf-Computing__HLS/unstar":{"post":"IEdbf_mHgHFPE2YhchAiFJbWOqqUkTtDFKucPIMjdSuWOLhwq9v8V_ww8-meXzf7kRM3Qleel7TXACXYv4CCGg"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"4THpjpd-2Eq2ghAGqY8Ml7qM7SYLNJzJbMk04VRwWPMBGKIaolis4f3d_bSIEdVV7oRfcC6Ujj-KwR_2q-7Lig"}}},"title":"Repository search results"}