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stm32: spi: Infinite loop of RXNE bit check #22083
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@KwonTae-young , this look indeed strange. We need to understand who is disabling SPI. For the bus fault, this might be due to another issue. Can you have a try to limit sysfreq to 16MHz? |
@erwango diff --git a/boards/arm/96b_wistrio/96b_wistrio_defconfig b/boards/arm/96b_wistrio/96b_wistrio_defconfig
index b12fa7c309..b7dd300586 100644
--- a/boards/arm/96b_wistrio/96b_wistrio_defconfig
+++ b/boards/arm/96b_wistrio/96b_wistrio_defconfig
@@ -19,7 +19,7 @@ CONFIG_CLOCK_CONTROL=y
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# Use HSI source
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
-CONFIG_CLOCK_STM32_PLL_DIVISOR=2
+CONFIG_CLOCK_STM32_PLL_DIVISOR=4
# produce 32Mhz clock at PLL output
CONFIG_CLOCK_STM32_PLL_MULTIPLIER=4
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
diff --git a/drivers/spi/spi_ll_stm32.c b/drivers/spi/spi_ll_stm32.c
index 6d15a4fc39..b81444307e 100644
--- a/drivers/spi/spi_ll_stm32.c
+++ b/drivers/spi/spi_ll_stm32.c
@@ -112,7 +112,10 @@ static void spi_stm32_shift_m(SPI_TypeDef *spi, struct spi_stm32_data *data)
}
while (!ll_func_rx_is_not_empty(spi)) {
- /* NOP */
+ if (!LL_SPI_IsEnabled(spi)) {
+ LOG_INF("SPI Enable");
+ LL_SPI_Enable(spi);
+ }
}
if (SPI_WORD_SIZE_GET(data->ctx.config->operation) == 8) {
|
ok, thanks. |
@erwango |
@erwango diff --git a/drivers/lora/sx1276.c b/drivers/lora/sx1276.c
index 1ef72e9417..cd484fe316 100644
--- a/drivers/lora/sx1276.c
+++ b/drivers/lora/sx1276.c
@@ -149,7 +149,7 @@ static void sx1276_irq_callback(struct device *dev,
for (i = 0; i < SX1276_MAX_DIO; i++) {
if (pin == sx1276_dio_pins[i]) {
- (*DioIrq[i])(NULL);
+ //(*DioIrq[i])(NULL);
}
}
} CC: @Mani-Sadhasivam |
Thank for this update @KwonTae-young |
Assigning to @Mani-Sadhasivam to check LORA side. |
@KwonTae-young I can reproduce this issue. But it is random in nature as you said. I'm seeing 1/5 times and sometimes do not. But nevertheless, it is an issue. Let me dig into it soon and update this thread. |
@KwonTae-young @erwango So looks like the issue arises when two consecutive DIO0 interrupts arrive one after the other. Then the board hangs. I can confirm that the Will dig more into this. |
@KwonTae-young Some observations:
|
Ah, the STM32 gpio driver is not handling the debounce functionality. So this might be the culprit. |
Fixed by #24121 |
Describe the bug
I have often experienced board hangs when using LoRa on STM32L151CBT.
If gdb checks while the board is stopped,
RXNE
continues to be checked.https://github.com/zephyrproject-rtos/zephyr/blob/master/drivers/spi/spi_ll_stm32.c#L114-L116
To Reproduce
Expected behavior
The board should not stop.
Impact
When using LoRa, the board hangs at random times.
Screenshots or console output
Environment
Additional context
The test program modified the delay to 10ms for quick symptom reproduction.
The time the board stops is random.
If symptoms do not appear within 1 minute, the symptoms do not seem to be reproduced.
So I test for 1 minute and reset the power.
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