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mipsel-linux-musl #12

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andrewrk opened this issue Mar 31, 2020 · 13 comments · Fixed by #184
Closed

mipsel-linux-musl #12

andrewrk opened this issue Mar 31, 2020 · 13 comments · Fixed by #184

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@andrewrk
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/home/andy/dev/bootstrap-zig/out/host/bin/zig  c++ -target mipsel-linux-musl   -DHAVE_CXX_ATOMICS64_WITHOUT_LIB -std=c++11  -Werror=unguarded-availability-new   -static  CMakeFiles/cmTC_52428.dir/src.cxx.o  -o cmTC_52428  -lm
#include <atomic>
#include <cstdint>
std::atomic<uint64_t> x (0);
int main() {
  uint64_t i = x.load(std::memory_order_relaxed);
  return 0;
}
lld: error: undefined symbol: __atomic_load_8
>>> referenced by src.cxx
>>>               CMakeFiles/cmTC_52428.dir/src.cxx.o:(unsigned long long std::__1::__cxx_atomic_load<unsigned long long>(std::__1::__cxx_atomic_base_impl<unsigned long long> const*, std::__1::memory_order))
>>> referenced by src.cxx
>>>               CMakeFiles/cmTC_52428.dir/src.cxx.o:(unsigned long long std::__1::__cxx_atomic_load<unsigned long long>(std::__1::__cxx_atomic_base_impl<unsigned long long> const*, std::__1::memory_order))

Looks like a missing compiler-rt function.

@andrewrk
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Upstream issue: ziglang/zig#4887

@andrewrk
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andrewrk commented Apr 3, 2020

With ziglang/zig#4924 applied, the next issue is:

lld: error: can't create dynamic relocation R_MIPS_32 against symbol: DW.ref.__gxx_personality_v0 in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output
>>> defined in /home/andy/.cache/zig/stage1/o/T5tckQUc2lhBpJlpVGSxm8lBZ7i8OXPFEBCqlYa8FxB6Me_v4XEhobskf4rQdx8x/libc++.a(/home/andy/.cache/zig/stage1/o/qUmHtY3lH7PA5isys1yCe37lU_DsOWv1RszG5ES7L8qrmRfFKqz_W_nE_pVbhPrT/new.o)
>>> referenced by new.cpp
>>>               /home/andy/.cache/zig/stage1/o/qUmHtY3lH7PA5isys1yCe37lU_DsOWv1RszG5ES7L8qrmRfFKqz_W_nE_pVbhPrT/new.o:(.eh_frame+0x357F) in archive /home/andy/.cache/zig/stage1/o/T5tckQUc2lhBpJlpVGSxm8lBZ7i8OXPFEBCqlYa8FxB6Me_v4XEhobskf4rQdx8x/libc++.a

@andrewrk
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andrewrk commented Apr 3, 2020

Upstream issue: ziglang/zig#4925

@The-King-of-Toasters
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The-King-of-Toasters commented Oct 16, 2023

I'm able to compile/run the C++ example and the zig init-exe bin on my OpenWRT router using a toolchain built by zig-bootstrap. I've yet to run the toolchain on the device, but I'll get on that soon.

@The-King-of-Toasters
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Looks like the toolchain binaries will not run, as they all fail with illegal instruction. This is with a baseline cpu.

@alexrp
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alexrp commented Aug 22, 2024

This works for me now.

@nektro
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nektro commented Aug 22, 2024

closing process is opening a PR changing the README to say OK for this target in the main table
in the description u can say Closes #12

@The-King-of-Toasters
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@alexrp Checked again on my device, still have the same error. Can you share what system you used to test? I'm running off a MediaTek MT7621 OpenWRT router in little-endian mode.

@alexrp
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alexrp commented Aug 23, 2024

@The-King-of-Toasters I tested in QEMU. If there are any bugs running on a particular device, I think that should be tracked on ziglang/zig; would you mind filing an issue there with as many details as possible? (The ideal would be getting the crash in GDB with debug symbols, a backtrace, and disassembly.)

@andrewrk
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andrewrk commented Aug 23, 2024

Is baseline perhaps including CPU features unavailable in the MediaTek MT7621 OpenWRT router? Is it possible to get a disassembly using gdb and see the illegal instruction?

@The-King-of-Toasters
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I'll give it a shot. The problem is that it's a very constrained device, so I need to move things onto USBs or an NFS mount. Another problem is when I tried using GDB on device, it couldn't even make a backtrace (again, I'll get more specific soon).

@andrewrk
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Could you share the reported CPU features on that device (output of lscpu)?

@alexrp
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alexrp commented Aug 24, 2024

From what I can find, that router is using a MIPS 1004Kc, i.e. MIPS32 R2 (not to be confused with the older MIPS II). Our baseline for 32-bit MIPS is mips32 (R1), and I think that baseline is actually quite a bit higher than LLVM's, so it's probably not a case of CPU features not being passed correctly to Clang. 🤔

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4 participants