A7-A11 SoC support #403

asdfugil · 2024-09-23T16:10:47Z

Add support for A7-A11 SoCs found in various iPhones, iPads, iPod touches and Apple TVs.

src/cpu_regs.h

m1n1-raw.ld

src/exception_asm.S

src/utils.c

marcan · 2024-09-24T23:46:31Z

src/startup.c

+    u32 len;
+    const char *p = adt_getprop(adt, node, "firmware-version", &len);
+    u16 version = ba->revision;
+    if (strncmp(p, "iBoot-", 6) == 0) {


We just added common code for this kind of test (for the Sequoia workaround), please use that. See firmware.c.

I will see but I think I will need a separate fw_version_info because I am not dealing with macOS.

Also in my case there's no guarantee of what versions the device may be on so I may have to add absolutely every release and beta... (9.0+, lower is currently broken)

I think I will add a new function to the common code to directly compare iboot version.
It is possible that there's no stored firmware and that everything was just uploaded via USB.

The iBoot version compare code does not rely on the firmware version table being exhaustive, it directly compares the iBoot version string. You only have to add the specific threshold versions to the table you want to test for, then anything in the range you specify will be considered as testing positive. I added it specifically because we need to test the iBoot1 version range (which we do not control) while we do control the subset of iBoot2 versions we use.

This particular piece of code is ran early, before firmware_init(), so this code still needs to parse iBoot version itself regardless.

src/exception.c

asdfugil · 2024-09-26T13:44:59Z

Changes:

Register names are now upper cased
EL3 stack is now before main stack, and does not have STACKBOT magic anymore.
is_idevice() is replaced by is_mac, cpufeat_fast_ipi and cpufeat_mmu_sprr, or removed entirely when not needed.
- supports_fipi() removed as well
Use macros like S5L8960X for all chip_id comparisons
For SMP start offset macros, always use the first SoC with that offset in the macro name.
PAN in exception handler now remains unchanged in code but get patched to NOP during init on non-PAN devices.
Use common code to parse iBoot versions
Add comma to EL list to keep format sane

Add UART bases for A7-A11, T2 SoCs. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

These functions will be used to skip over parts not supported by A7-A11 SoCs. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Cyclone and Typhoon are similar enough to share a file. Hurricane and Zephyr are the physical cores on A10 backing the Hurricane-Zephyr logical core. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

A7-A9X has an EL3. Handle it (without SMP support). Signed-off-by: Nick Chan <towinchenmi@gmail.com>

This includes - GXF - PAN (A7-A9) - Atomics (A7-A10) - FIPI (A7-A10) - DCP Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Boot-args version 1 (iOS 12), and version 3 (iOS 18, macOS 15). Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Add support for 4K page sizes, supported by A7-A8X. Co-developed-by: fenfenS <104295404+fenfenS@users.noreply.github.com> Signed-off-by: fenfenS <104295404+fenfenS@users.noreply.github.com> Signed-off-by: Nick Chan <towinchenmi@gmail.com>

This includes: - EL3 handling - "Slow" IPI support - New start offsets Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Old ADT does not have /cpus/cpu<n>/cpu-impl-reg, and the value is in /arm-io/pmgr/reg[2*n+2]. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

On A7-A11 we have a ROM exploit and we can keep CPU0 RVBAR unlocked. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

This includes: - Do not treat iPhone 5 buffer as dummy on 5s - Added support for 24-bit framebuffer - When we have a vertical display, use whole fb as console Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Account for the differences between the iOS ADT and macOS ADT, and also some physical differences between Apple Silicon Macs and A7-A11 devoces, reflected in the ADT. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

The secondary CPU may potentially use the stack after leaving WFE. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

We do not support the USB controller on A7-A11 SoCs yet, but still do not try to init dwc3 on them. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

asdfugil force-pushed the for-upstream branch 8 times, most recently from c755e18 to 9f3f2f0 Compare September 24, 2024 07:55

marcan requested changes Sep 24, 2024

View reviewed changes

asdfugil force-pushed the for-upstream branch 2 times, most recently from 22fe601 to a9c572f Compare September 26, 2024 13:28

asdfugil force-pushed the for-upstream branch from a9c572f to aa9d2f3 Compare September 26, 2024 13:50

asdfugil added 14 commits September 30, 2024 15:34

soc: Added UART bases for A7-A11, T2 SoCs.

29bd6ad

Add UART bases for A7-A11, T2 SoCs. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

utils: Add more functions to detect CPU features

4f68803

These functions will be used to skip over parts not supported by A7-A11 SoCs. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

chickens: Add A7-A11 chickens

6120449

Cyclone and Typhoon are similar enough to share a file. Hurricane and Zephyr are the physical cores on A10 backing the Hurricane-Zephyr logical core. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Add support for handling EL3.

e530db5

A7-A9X has an EL3. Handle it (without SMP support). Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Skip over features unsupported in A7-A11 SoCs.

1728c8c

This includes - GXF - PAN (A7-A9) - Atomics (A7-A10) - FIPI (A7-A10) - DCP Signed-off-by: Nick Chan <towinchenmi@gmail.com>

Add support for different boot-args revisions.

5f528b5

Boot-args version 1 (iOS 12), and version 3 (iOS 18, macOS 15). Signed-off-by: Nick Chan <towinchenmi@gmail.com>

memory: Add support for 4K translation

f5d41e1

Add support for 4K page sizes, supported by A7-A8X. Co-developed-by: fenfenS <104295404+fenfenS@users.noreply.github.com> Signed-off-by: fenfenS <104295404+fenfenS@users.noreply.github.com> Signed-off-by: Nick Chan <towinchenmi@gmail.com>

smp: Added A7-A11 start support

9d11887

This includes: - EL3 handling - "Slow" IPI support - New start offsets Signed-off-by: Nick Chan <towinchenmi@gmail.com>

smp: Add support for ADT from old FW

e73df7b

Old ADT does not have /cpus/cpu<n>/cpu-impl-reg, and the value is in /arm-io/pmgr/reg[2*n+2]. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

smp: Write _vectors_start into boot CPU rvbar where possible

677a45a

On A7-A11 we have a ROM exploit and we can keep CPU0 RVBAR unlocked. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

fb: Add A7-A11 device support

ff1dba3

This includes: - Do not treat iPhone 5 buffer as dummy on 5s - Added support for 24-bit framebuffer - When we have a vertical display, use whole fb as console Signed-off-by: Nick Chan <towinchenmi@gmail.com>

kboot: Add workarounds for ADT for A7-A11 SoCs.

091589b

Account for the differences between the iOS ADT and macOS ADT, and also some physical differences between Apple Silicon Macs and A7-A11 devoces, reflected in the ADT. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

kboot: Reserve secondary CPU stacks

c43be46

The secondary CPU may potentially use the stack after leaving WFE. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

usb: Skip USB init for now on A7-A11 SoCs.

2a7f9ef

We do not support the USB controller on A7-A11 SoCs yet, but still do not try to init dwc3 on them. Signed-off-by: Nick Chan <towinchenmi@gmail.com>

asdfugil force-pushed the for-upstream branch from aa9d2f3 to 2a7f9ef Compare September 30, 2024 07:35

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A7-A11 SoC support #403

A7-A11 SoC support #403

asdfugil commented Sep 23, 2024

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