i3c: aspeed: Avoid the bus hang issue when ibi queue overflow.

This patch is modified from Aspeed Linux-v5.15 commit #d316a127.
The original commit message is
```
When our i3c controller nack the IBI which isn’t existed in our DAT the
ibi buffer counter (IBI Buffer Status Count) may lose the control.

Consequently, the counter surpasses the tolerance level for the ibi buffer
capability(16). When the controller attempts to read the IBI buffer with a
counter value greater than 16, the CPU will experience a hang due to the
absence of a response from the bus.

This patch will clear the IBI FIFO when the IBI counter exceeds 16, and
the IBI response status receives a NACK, indicating that the controller
received the IBI from an address not included in the hardware DAT.
```

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Change-Id: I67c5701dd44a576731de8ae7d6e48fa560d28b6b

drivers/i3c/i3c_aspeed.c

@@ -991,12 +991,17 @@ static void i3c_aspeed_master_rx_ibi(struct i3c_aspeed_obj *obj)
 		return;
 	}
 
+	if (nstatus > 16) {
+		LOG_ERR("The nibi %d surpasses the tolerance level for the IBI buffer", nstatus);
+		goto clear;
+	}
+
 	for (i = 0; i < nstatus; i++) {
 		obj->ibi_status_parser(i3c_register->ibi_queue_status.value, &ibi_status);
 		data_consumed = false;
 		if (ibi_status.ibi_status) {
 			LOG_WRN("IBI NACK\n");
-			goto out;
+			goto clear;
 		}
 
 		if (ibi_status.error) {
@@ -1076,6 +1081,11 @@ static void i3c_aspeed_master_rx_ibi(struct i3c_aspeed_obj *obj)
 				i3c_aspeed_gen_tbits_low(obj);
 		}
 	}
+	return;
+clear:
+	i3c_aspeed_enter_halt(obj, true);
+	i3c_aspeed_reset_ctrl(obj, I3C_ASPEED_RESET_IBI_QUEUE);
+	i3c_aspeed_exit_halt(obj);
 }
 
 static void i3c_aspeed_slave_event(const struct device *dev, union i3c_intr_s status)