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Update load intrinsic attributes (llvm#101562)
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This patch adds default attributes to many intrinsics and the WillReturn
attribute to some as well. The defaults include WillReturn. The WillReturn
attribute is relevant for dead code elimination as intrinsics without
WillReturn are assumed to have side effects and cannot be removed even
if their return value is unused. It is also relevant for potential
changes to SDAG behavior regarding treatment of intrinsics that function
as loads.
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@kalxr
kalxr authored Aug 15, 2024
1 parent c19326c commit 99a10f1
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Showing 17 changed files with 1,927 additions and 287 deletions.
6 changes: 3 additions & 3 deletions llvm/include/llvm/IR/IntrinsicsBPF.td
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Expand Up @@ -13,11 +13,11 @@
// Specialized loads from packet
let TargetPrefix = "bpf" in { // All intrinsics start with "llvm.bpf."
def int_bpf_load_byte : ClangBuiltin<"__builtin_bpf_load_byte">,
Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
def int_bpf_load_half : ClangBuiltin<"__builtin_bpf_load_half">,
Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
def int_bpf_load_word : ClangBuiltin<"__builtin_bpf_load_word">,
Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
def int_bpf_pseudo : ClangBuiltin<"__builtin_bpf_pseudo">,
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty]>;
def int_bpf_preserve_field_info : ClangBuiltin<"__builtin_bpf_preserve_field_info">,
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29 changes: 17 additions & 12 deletions llvm/include/llvm/IR/IntrinsicsLoongArch.td
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Expand Up @@ -140,6 +140,11 @@ class VecInt<list<LLVMType> ret_types, list<LLVMType> param_types,
: Intrinsic<ret_types, param_types, intr_properties>,
ClangBuiltin<!subst("int_loongarch", "__builtin", NAME)>;

class DefaultAttrsVecInt<list<LLVMType> ret_types, list<LLVMType> param_types,
list<IntrinsicProperty> intr_properties = []>
: DefaultAttrsIntrinsic<ret_types, param_types, intr_properties>,
ClangBuiltin<!subst("int_loongarch", "__builtin", NAME)>;

//===----------------------------------------------------------------------===//
// LSX

Expand Down Expand Up @@ -620,22 +625,22 @@ foreach inst = ["vfcmp_caf_d", "vfcmp_cun_d", "vfcmp_ceq_d", "vfcmp_cueq_d",

// LSX load/store
def int_loongarch_lsx_vld
: VecInt<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lsx_vldx
: VecInt<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i64_ty],
: DefaultAttrsVecInt<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i64_ty],
[IntrReadMem, IntrArgMemOnly]>;
def int_loongarch_lsx_vldrepl_b
: VecInt<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lsx_vldrepl_h
: VecInt<[llvm_v8i16_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v8i16_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lsx_vldrepl_w
: VecInt<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lsx_vldrepl_d
: VecInt<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;

def int_loongarch_lsx_vst
Expand Down Expand Up @@ -1146,22 +1151,22 @@ def int_loongarch_lasx_xvpickve_d_f

// LASX load/store
def int_loongarch_lasx_xvld
: VecInt<[llvm_v32i8_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v32i8_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lasx_xvldx
: VecInt<[llvm_v32i8_ty], [llvm_ptr_ty, llvm_i64_ty],
: DefaultAttrsVecInt<[llvm_v32i8_ty], [llvm_ptr_ty, llvm_i64_ty],
[IntrReadMem, IntrArgMemOnly]>;
def int_loongarch_lasx_xvldrepl_b
: VecInt<[llvm_v32i8_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v32i8_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lasx_xvldrepl_h
: VecInt<[llvm_v16i16_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v16i16_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lasx_xvldrepl_w
: VecInt<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v8i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;
def int_loongarch_lasx_xvldrepl_d
: VecInt<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_i32_ty],
: DefaultAttrsVecInt<[llvm_v4i64_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;

def int_loongarch_lasx_xvst
Expand Down
26 changes: 13 additions & 13 deletions llvm/include/llvm/IR/IntrinsicsMips.td
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Expand Up @@ -236,7 +236,7 @@ def int_mips_extpdp: ClangBuiltin<"__builtin_mips_extpdp">,
def int_mips_wrdsp: ClangBuiltin<"__builtin_mips_wrdsp">,
Intrinsic<[], [llvm_i32_ty, llvm_i32_ty], [ImmArg<ArgIndex<1>>]>;
def int_mips_rddsp: ClangBuiltin<"__builtin_mips_rddsp">,
Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrReadMem, ImmArg<ArgIndex<0>>]>;
DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrReadMem, ImmArg<ArgIndex<0>>]>;

def int_mips_insv: ClangBuiltin<"__builtin_mips_insv">,
Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>;
Expand All @@ -252,22 +252,22 @@ def int_mips_repl_ph: ClangBuiltin<"__builtin_mips_repl_ph">,
Intrinsic<[mips_v2q15_ty], [llvm_i32_ty], [IntrNoMem]>;

def int_mips_pick_qb: ClangBuiltin<"__builtin_mips_pick_qb">,
Intrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrReadMem]>;
DefaultAttrsIntrinsic<[llvm_v4i8_ty], [llvm_v4i8_ty, llvm_v4i8_ty], [IntrReadMem]>;
def int_mips_pick_ph: ClangBuiltin<"__builtin_mips_pick_ph">,
Intrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrReadMem]>;
DefaultAttrsIntrinsic<[mips_v2q15_ty], [mips_v2q15_ty, mips_v2q15_ty], [IntrReadMem]>;

def int_mips_mthlip: ClangBuiltin<"__builtin_mips_mthlip">,
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i32_ty], []>;

def int_mips_bposge32: ClangBuiltin<"__builtin_mips_bposge32">,
Intrinsic<[llvm_i32_ty], [], [IntrReadMem]>;
DefaultAttrsIntrinsic<[llvm_i32_ty], [], [IntrReadMem]>;

def int_mips_lbux: ClangBuiltin<"__builtin_mips_lbux">,
Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
def int_mips_lhx: ClangBuiltin<"__builtin_mips_lhx">,
Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
def int_mips_lwx: ClangBuiltin<"__builtin_mips_lwx">,
Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;

//===----------------------------------------------------------------------===//
// MIPS DSP Rev 2
Expand Down Expand Up @@ -1259,23 +1259,23 @@ def int_mips_insve_d : ClangBuiltin<"__builtin_msa_insve_d">,
[IntrNoMem, ImmArg<ArgIndex<1>>]>;

def int_mips_ld_b : ClangBuiltin<"__builtin_msa_ld_b">,
Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly]>;
def int_mips_ld_h : ClangBuiltin<"__builtin_msa_ld_h">,
Intrinsic<[llvm_v8i16_ty], [llvm_ptr_ty, llvm_i32_ty],
DefaultAttrsIntrinsic<[llvm_v8i16_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly]>;
def int_mips_ld_w : ClangBuiltin<"__builtin_msa_ld_w">,
Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_i32_ty],
DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly]>;
def int_mips_ld_d : ClangBuiltin<"__builtin_msa_ld_d">,
Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_i32_ty],
DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly]>;

def int_mips_ldr_d : ClangBuiltin<"__builtin_msa_ldr_d">,
Intrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_i32_ty],
DefaultAttrsIntrinsic<[llvm_v2i64_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly]>;
def int_mips_ldr_w : ClangBuiltin<"__builtin_msa_ldr_w">,
Intrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_i32_ty],
DefaultAttrsIntrinsic<[llvm_v4i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly]>;

def int_mips_ldi_b : ClangBuiltin<"__builtin_msa_ldi_b">,
Expand Down
2 changes: 1 addition & 1 deletion llvm/include/llvm/IR/IntrinsicsNVVM.td
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Expand Up @@ -4729,7 +4729,7 @@ def int_nvvm_redux_sync_or : ClangBuiltin<"__nvvm_redux_sync_or">,
class NVVM_WMMA_LD<WMMA_REGS Frag, string Layout, int WithStride>
: Intrinsic<Frag.regs,
!if(WithStride, [llvm_anyptr_ty, llvm_i32_ty], [llvm_anyptr_ty]),
[IntrReadMem, IntrArgMemOnly, IntrNoCallback, ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
[IntrWillReturn, IntrReadMem, IntrArgMemOnly, IntrNoCallback, ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>],
WMMA_NAME_LDST<"load", Frag, Layout, WithStride>.intr>;

// WMMA.STORE.D
Expand Down
6 changes: 3 additions & 3 deletions llvm/include/llvm/IR/IntrinsicsSystemZ.td
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Original file line number Diff line number Diff line change
Expand Up @@ -230,11 +230,11 @@ let TargetPrefix = "s390" in {
[IntrNoMem, ImmArg<ArgIndex<1>>]>;

def int_s390_vlbb : ClangBuiltin<"__builtin_s390_vlbb">,
Intrinsic<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrReadMem, IntrArgMemOnly, ImmArg<ArgIndex<1>>]>;

def int_s390_vll : ClangBuiltin<"__builtin_s390_vll">,
Intrinsic<[llvm_v16i8_ty], [llvm_i32_ty, llvm_ptr_ty],
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_i32_ty, llvm_ptr_ty],
[IntrReadMem, IntrArgMemOnly]>;

def int_s390_vpdi : ClangBuiltin<"__builtin_s390_vpdi">,
Expand Down Expand Up @@ -399,7 +399,7 @@ let TargetPrefix = "s390" in {

// Instructions from the Vector Packed Decimal Facility
def int_s390_vlrl : ClangBuiltin<"__builtin_s390_vlrlr">,
Intrinsic<[llvm_v16i8_ty], [llvm_i32_ty, llvm_ptr_ty],
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_i32_ty, llvm_ptr_ty],
[IntrReadMem, IntrArgMemOnly]>;

def int_s390_vstrl : ClangBuiltin<"__builtin_s390_vstrlr">,
Expand Down
4 changes: 2 additions & 2 deletions llvm/include/llvm/IR/IntrinsicsVE.td
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Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
// VEL Intrinsic instructions.
let TargetPrefix = "ve" in {
def int_ve_vl_pack_f32p : ClangBuiltin<"__builtin_ve_vl_pack_f32p">,
Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_ptr_ty],
DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_ptr_ty],
[IntrReadMem]>;
def int_ve_vl_pack_f32a : ClangBuiltin<"__builtin_ve_vl_pack_f32a">,
Intrinsic<[llvm_i64_ty], [llvm_ptr_ty],
DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_ptr_ty],
[IntrReadMem]>;

def int_ve_vl_extract_vm512u :
Expand Down
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