Allows RAMPS to auto assign HW SPI Pins for TMC #26960
Conversation
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As per our conversation, MOSI and MISO are the wrong way around, SCK is correct 👍 |
And fixed! |
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If Ramps has HW SPI pins available why would it be configured to use SW SPI by default? |
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If you use the RepRapDiscount LCD, usually those pins are blocked by the daughterboard it connects to. You can share the SPI with it with no problems tho if you modify the daughterboard to allow connecting the TMC drivers additionally. |
Thanks for the explanation. I haven't looked at a RAMPS for a while and didn't really think about the modern conveniences they are lacking, such as driver communication pins. That makes sense for things to be non-ideal when you're actually adding flying wires to the tops of your drivers for communication. |
* bugfix-2.1.x: (111 commits) [cron] Bump distribution date (2024-04-25) 🩹 IA-Creality minor cleanup 🩹 Simple IA-Creality babystep patch 🚸 Fix duplicate temperature report (MarlinFirmware#26952) [cron] Bump distribution date (2024-04-24) ✏️ MPCTEMP_START => MPC_STARTED (MarlinFirmware#27002) 🔧 BIQU MicroProbe V2 pull-up warning (MarlinFirmware#27008) 🎨 Format pins which fail validation (MarlinFirmware#27007) ✅ CI - Validate Pins Formatting (MarlinFirmware#26996) [cron] Bump distribution date (2024-04-23) 🎨 Clean up after recent PRs [cron] Bump distribution date (2024-04-22) 🐛 Fix Flags<N> data storage width (MarlinFirmware#26995) ✅ Add additional unit tests for types.h (MarlinFirmware#26994) ✅ Unit test improvements (MarlinFirmware#26993) 🔧 Add RAMPS TMC SPI pins when !TMC_USE_SW_SPI (MarlinFirmware#26960) 🐛 Fix PID upon entering PID_FUNCTIONAL_RANGE (MarlinFirmware#26926) [cron] Bump distribution date (2024-04-21) 🎨Match unit test folder structure to code (MarlinFirmware#26990) ✅ Skip compile tests when editing unit tests (MarlinFirmware#26991) ...
* Allows RAMPS to auto assign HW SPI Pins for TMC
Ramps pin definition assumes SW SPI for TMC drivers, even when TMC_USE_SW_SPI is disabled. This checks if the user has hardware or software SPI on and selects the appropriate hardware SPI pins when SW SPI is disabled.