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fix:set continuous mode bit for write hit/miss cases tests #3062

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merged 2 commits into from
Dec 18, 2023

Commits on Dec 15, 2023

  1. fix:set continuous mode bit for write hit/miss cases tests

     CXL HE write hit/miss cases, sets continuous mode bit in rd_cfg instead of wr_cfg.
     set continuous mode bit write hit/miss case tests.
    
     Forced stop  control register ResetL bit is low causes timeout failures
     set ResetL too high for forced stop
    
    Signed-off-by: anandaravuri <ananda.ravuri@intel.com>
    anandaravuri committed Dec 15, 2023
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