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plat-ti: Configure and enable Secure Data Path by default
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Enable SDP by default on TI platforms and reserve 4 MiB from the end of
the TZDRAM area that is already reserved for OP-TEE and firewalled.

Signed-off-by: Andrew F. Davis <afd@ti.com>
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glneo committed Sep 14, 2017
1 parent 6cfeadb commit 0405ba9
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Showing 2 changed files with 21 additions and 1 deletion.
1 change: 1 addition & 0 deletions core/arch/arm/plat-ti/conf.mk
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,7 @@ PLATFORM_FLAVOR ?= dra7xx
CFG_WITH_STACK_CANARIES ?= y
CFG_WITH_STATS ?= y
CFG_WITH_SOFTWARE_PRNG ?= n
CFG_SECURE_DATA_PATH ?= y

$(call force,CFG_8250_UART,y)
$(call force,CFG_ARM32_core,y)
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21 changes: 20 additions & 1 deletion core/arch/arm/plat-ti/platform_config.h
Original file line number Diff line number Diff line change
Expand Up @@ -153,9 +153,28 @@

#endif /* CFG_WITH_PAGER */

#if defined(CFG_SECURE_DATA_PATH)

#if !defined(CFG_TEE_SDP_MEM_SIZE)
#define CFG_TEE_SDP_MEM_SIZE 0x00400000
#endif

/* default locate SDP memory at the end of TZDRAM */
#if !defined(CFG_TEE_SDP_MEM_BASE)
#define CFG_TEE_SDP_MEM_BASE (TZDRAM_BASE + \
TZDRAM_SIZE - \
CFG_TEE_SDP_MEM_SIZE)
#endif

#else /* CFG_SECURE_DATA_PATH */
#define CFG_TEE_SDP_MEM_SIZE 0
#endif /* CFG_SECURE_DATA_PATH */

#define CFG_TA_RAM_START ROUNDUP((TZDRAM_BASE + CFG_TEE_RAM_VA_SIZE), \
CORE_MMU_DEVICE_SIZE)
#define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \

#define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE) - \
CFG_TEE_SDP_MEM_SIZE, \
CORE_MMU_DEVICE_SIZE)

/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
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