plat-ti: Configure and enable Secure Data Path by default

Enable SDP by default on TI platforms and reserve 4 MiB from the end of
the TZDRAM area that is already reserved for OP-TEE and firewalled.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

core/arch/arm/plat-ti/conf.mk

@@ -3,6 +3,13 @@ PLATFORM_FLAVOR ?= dra7xx
 CFG_WITH_STACK_CANARIES ?= y
 CFG_WITH_STATS ?= y
 CFG_WITH_SOFTWARE_PRNG ?= n
+CFG_SECURE_DATA_PATH ?= y
+
+ifeq ($(CFG_SECURE_DATA_PATH),y)
+CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
+else
+CFG_TEE_SDP_MEM_SIZE ?= 0x0
+endif
 
 $(call force,CFG_8250_UART,y)
 $(call force,CFG_ARM32_core,y)

core/arch/arm/plat-ti/platform_config.h

@@ -153,9 +153,18 @@
 
 #endif /* CFG_WITH_PAGER */
 
+#if defined(CFG_SECURE_DATA_PATH)
+/* Locate SDP memory at the end of TZDRAM */
+#define CFG_TEE_SDP_MEM_BASE	(TZDRAM_BASE + \
+				TZDRAM_SIZE - \
+				CFG_TEE_SDP_MEM_SIZE)
+#endif
+
 #define CFG_TA_RAM_START	ROUNDUP((TZDRAM_BASE + CFG_TEE_RAM_VA_SIZE), \
 					CORE_MMU_DEVICE_SIZE)
-#define CFG_TA_RAM_SIZE		ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \
+
+#define CFG_TA_RAM_SIZE		ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE) - \
+					  CFG_TEE_SDP_MEM_SIZE, \
 					  CORE_MMU_DEVICE_SIZE)
 
 /* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */