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core: arm64: bugfix invalidate touched init memory
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The entire range of memory touched during init need to be invalidated in
the caches before enabling the caches.

Prior to this patch with CFG_WITH_PAGER=y the caches where only
invalidated until __init_end which isn't enough, memory up to
__tmp_hashes_end is actually touched. With this patch the range is
increased to __tmp_hashes_end which is the same as is used in the arm32
code.

Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (HiKey 32/64)
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Jens Wiklander <jens.wiklander@linaro.org> (Hikey 64-bit pager)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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jenswi-linaro authored and jforissier committed Jun 20, 2017
1 parent af1e8e5 commit abdd645
Showing 1 changed file with 4 additions and 4 deletions.
8 changes: 4 additions & 4 deletions core/arch/arm/kernel/generic_entry_a64.S
Original file line number Diff line number Diff line change
Expand Up @@ -130,8 +130,8 @@ clear_bss:

adr x0, __text_start
#ifdef CFG_WITH_PAGER
adrp x1, __init_end
add x1, x1, :lo12:__init_end
adrp x1, __tmp_hashes_end
add x1, x1, :lo12:__tmp_hashes_end
#else
adrp x1, __end
add x1, x1, :lo12:__end
Expand Down Expand Up @@ -161,8 +161,8 @@ clear_bss:
mov x19, x0
adr x0, __text_start
#ifdef CFG_WITH_PAGER
adrp x1, __init_end
add x1, x1, :lo12:__init_end
adrp x1, __tmp_hashes_end
add x1, x1, :lo12:__tmp_hashes_end
#else
adrp x1, __end
add x1, x1, :lo12:__end
Expand Down

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