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link static library for TA #1399
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Hi @yuhsien-chen, |
I don't have the source code for the library, so I can't re-build it. |
I was updated the version of static library(vendor provided), and I encountered another problem. |
Relocation types are described in http://infocenter.arm.com/help/topic/com.arm.doc.ihi0056b/IHI0056B_aaelf64.pdf It shouldn't be very hard to implement, considering that we support |
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Hi @jforissier , |
…ng TAs If a 64-bit TA contains relocations of type R_AARCH64_ABS64, OP-TEE refuses to load it and logs the following error: ERROR: TEE-CORE: Unknown relocation type 257 This relocation type does not seem to happen in our test applications, but someone has experienced the issue after linking a TA against a third-party static library [1]. I could reporoduce the issue by adding the following assembly code to a TA: .pushsection .rodata .global _reloc__text_start _reloc__text_start: .quad __text_start .popsection (this adds a 64-bit value into the .rodata section of the TA, exported as a global symbol called _reloc__text_start, its value is set to the __text_start address). This commit adds the necessary code to support R_AARCH64_ABS64. [1] OP-TEE#1399 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (qemu_v8)
…ng TAs If a 64-bit TA contains relocations of type R_AARCH64_ABS64, OP-TEE refuses to load it and logs the following error: ERROR: TEE-CORE: Unknown relocation type 257 This relocation type does not seem to happen in our test applications, but someone has experienced the issue after linking a TA against a third-party static library [1]. I could reporoduce the issue by adding the following assembly code to a TA: .pushsection .rodata .global _reloc__text_start _reloc__text_start: .quad __text_start .popsection (this adds a 64-bit value into the .rodata section of the TA, exported as a global symbol called _reloc__text_start, its value is set to the __text_start address). This commit adds the necessary code to support R_AARCH64_ABS64. [1] OP-TEE#1399 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (qemu_v8)
If a 64-bit TA contains relocations of type R_AARCH64_ABS64, OP-TEE refuses to load it and logs the following error: ERROR: TEE-CORE: Unknown relocation type 257 This relocation type does not seem to happen in our test applications, but someone has experienced the issue after linking a TA against a third-party static library [1]. I could reporoduce the issue by adding the following assembly code to a TA: .pushsection .rodata .global _reloc__text_start _reloc__text_start: .quad __text_start .popsection (this adds a 64-bit value into the .rodata section of the TA, exported as a global symbol called _reloc__text_start, its value is set to the __text_start address). This commit adds the necessary code to support R_AARCH64_ABS64. [1] OP-TEE#1399 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (qemu_v8)
If a 64-bit TA contains relocations of type R_AARCH64_ABS64, OP-TEE refuses to load it and logs the following error: ERROR: TEE-CORE: Unknown relocation type 257 This relocation type does not seem to happen in our test applications, but someone has experienced the issue after linking a TA against a third-party static library [1]. I could reporoduce the issue by adding the following assembly code to a TA: .pushsection .rodata .global _reloc__text_start _reloc__text_start: .quad __text_start .popsection (this adds a 64-bit value into the .rodata section of the TA, exported as a global symbol called _reloc__text_start, its value is set to the __text_start address). This commit adds the necessary code to support R_AARCH64_ABS64. [1] OP-TEE#1399 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (qemu_v8)
I implemented a simple library to cause alignment fault. Below is the simple library code. libMM.h #ifndef _LIB_MM_H
#define _LIB_MM_H
int test_unalign_access2(uint8_t a);
#endif libMM.c #include <stdint.h>
#include "libMM.h"
int test_unalign_access2(uint8_t a)
{
uint32_t* pMyPointer = (uint32_t*)(&a);
*pMyPointer += 2;
return *pMyPointer;
} makefile ANDROID_NDK_BIN := /tmp/my-android-toolchain/arm64/bin
CC := $(ANDROID_NDK_BIN)/aarch64-linux-android-gcc
CPP := $(ANDROID_NDK_BIN)/aarch64-linux-android-g++
AR := $(ANDROID_NDK_BIN)/aarch64-linux-android-ar
CFLAGS := -I../include -I/tmp/my-android-toolchain/arm64/sysroot/usr/include
CFLAGS += -static -Wall -O3 -mstrict-align
LIBS := -L/tmp/my-android-toolchain/arm64/sysroot/usr/lib
# Rule for make c++ object file
.cpp.o:
$(CPP) $(CFLAGS) $(LIBS) -c $<
# Rule for make c object file
.c.o:
$(CC) $(CFLAGS) $(LIBS) -c $<
STATIC_LIB_SRC = libMM.c
STATIC_LIB_OBJ = libMM.o
OUT = ../lib/arm64/libMM.a
$(OUT): $(STATIC_LIB_OBJ)
$(AR) rcs $(OUT) $(STATIC_LIB_OBJ) |
Shouldn't it be |
I had tried the options list below. |
So it's
It's the hardware catching the unaligned access. See the A bit in SCTLR_EL1 in the ARMv8 reference manual. |
I had download manual and search the content with "SCTLR_EL1".
For each bit, the values are:
Does the A bit means "A SError interrupt mask bit."? |
Search further, the bits you found are from CPSR/SPSR... |
I found the exactly one. |
If a 64-bit TA contains relocations of type R_AARCH64_ABS64, OP-TEE refuses to load it and logs the following error: ERROR: TEE-CORE: Unknown relocation type 257 This relocation type does not seem to happen in our test applications, but someone has experienced the issue after linking a TA against a third-party static library [1]. I could reproduce the issue by compiling the hello_world TA with -fPIC instead of -fpie. This simple change generates *one* R_AARCH64_ABS64 in the TA ELF file. This commit adds the necessary code to support R_AARCH64_ABS64. [1] OP-TEE#1399 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (qemu_v8) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
I tried reset value in "arm-trusted-firmware/bl1/aarch64/bl1_entrypoint.S". /* ---------------------------------------------
* Enable the instruction cache, stack pointer
* and data access alignment checks
* ---------------------------------------------
*/
mov x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
mrs x0, sctlr_el3
//orr x0, x0, x1
// reset values
bic x0, x0, x1
msr sctlr_el3, x0
isb Bit it still catch the align access, and report exception. |
Finally, I found "optee_os/core/arch/arm/kernel/generic_entry_a64.S" mrs x0, sctlr_el1
mov x1, #(SCTLR_I | SCTLR_A | SCTLR_SA)
//orr x0, x0, x1
// reset values
bic x0, x0, x1
msr sctlr_el1, x0
isb It works! |
@jenswi-linaro @yuhsien-chen do you think we should make this configurable at build time? Such as, in # Allow SEL0/SEL1 unaligned access?
CFG_UNALIGNED_ACCESS=n |
@jforissier sounds good, we need to be careful with how it's enabled, not all platforms may support this. |
@jforissier it would be good for users. |
OK, thanks for your feedback. |
Hi, I am using HiKey 8GB board with AOSP + OP-TEE. Just before the TEEC_OpenSession TEE output log shows that Unknown relocation type 257. I've pulled the latest version of optee_os and optee_test repositories. Here is the debug log:
Thank you so much for your time. |
@etienne-lms, I see that fixes and pulled the latest commits of optee_os repository, however it still gives the same error. |
@acalb, that's strange: try to rebuild optee-os from scratch. Maybe the fix fails on your relocation but at least you should not get the trace "ERROR: TEE-CORE: Unknown relocation type 257". |
Agreed, I fail to see how you can still have the "Unknown relocation" trace if you are running the correct version. @acalb, can you please make sure the correct TEE binary is loaded by checking the "Initializing" trace? It looks like this:
The version/commit ID and the build date should be enough to know for sure if it's indeed the expected binary that's running. |
@acalb Did you rebuild optee_os with arm-trusted-firmware? In Hikey, optee_os is built into fip.bin and you should replace by fastboot.
|
@acalb optee_os/fip.bin is built separately from the main aosp sources so you'll need to rebuild and flash it again as advised by all the good people above. |
@jforissier, @yuhsien-chen, @vchong, @etienne-lms thanks for your answers. I've rebuild fip.bin and flashed it again. Now it works as expected. |
If a 64-bit TA contains relocations of type R_AARCH64_ABS64, OP-TEE refuses to load it and logs the following error: ERROR: TEE-CORE: Unknown relocation type 257 This relocation type does not seem to happen in our test applications, but someone has experienced the issue after linking a TA against a third-party static library [1]. I could reproduce the issue by compiling the hello_world TA with -fPIC instead of -fpie. This simple change generates *one* R_AARCH64_ABS64 in the TA ELF file. This commit adds the necessary code to support R_AARCH64_ABS64. [1] OP-TEE/optee_os#1399 Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (qemu_v8) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Hello, I'm new to optee, and I want to do a work with link a prebuilt static library to TA.
When my TA call functions in that prebuilt static library, it results in panic, and I don't understand the root cause.
Any advice will be appreciate.
Here is the log from Trusted OS.
ERROR: TEE-CORE:
ERROR: TEE-CORE: user TA data-abort at address 0x4008d0b4 (alignment fault)
ERROR: TEE-CORE: esr 0x92000061 ttbr0 0x100003f0790a0 ttbr1 0x00000000 cidr 0x0
ERROR: TEE-CORE: cpu #5 cpsr 0x40000100
ERROR: TEE-CORE: x0 000000004008d0b4 x1 0000000040000e70
ERROR: TEE-CORE: x2 0000004300000808 x3 0000001400000079
ERROR: TEE-CORE: x4 0000000000000010 x5 0000000000000000
ERROR: TEE-CORE: x6 8080808080808080 x7 0000000000000008
ERROR: TEE-CORE: x8 7f7f7f7f7f7f7f7f x9 fefefefefefefeff
ERROR: TEE-CORE: x10 7f7f7f7f7f7f7f7f x11 0101010101010101
ERROR: TEE-CORE: x12 0000000000000000 x13 0000000040000fb0
ERROR: TEE-CORE: x14 0000000000000000 x15 0000000000000001
ERROR: TEE-CORE: x16 000000003f00ec08 x17 0000000000000000
ERROR: TEE-CORE: x18 0000000000000000 x19 0000000000000000
ERROR: TEE-CORE: x20 000000004008d070 x21 0000000000000001
ERROR: TEE-CORE: x22 0000000040000e60 x23 0000000000000002
ERROR: TEE-CORE: x24 000000004008d0f0 x25 0000000000000001
ERROR: TEE-CORE: x26 0000000040000e50 x27 0000000000000001
ERROR: TEE-CORE: x28 000000004008d0f0 x29 0000000040000e90
ERROR: TEE-CORE: x30 0000000040004604 elr 0000000040004614
ERROR: TEE-CORE: sp_el0 0000000040000db0
ERROR: TEE-CORE: Status of TA 956173ce-a08e-4628-af83-ca9a5ed6260e (0x3f05bcf0) (active)
ERROR: TEE-CORE: - load addr : 0x40001000 ctx-idr: 1
ERROR: TEE-CORE: - stack: 0x40000000 4096
ERROR: TEE-CORE: sect 0 : va 0x40000000 pa 0x3f28d000 0x1000
ERROR: TEE-CORE: sect 1 : va 0x40001000 pa 0x3f200000 0x5f000
ERROR: TEE-CORE: sect 2 : va 0x40060000 pa 0x3f25f000 0x22000
ERROR: TEE-CORE: sect 3 : va 0x40082000 pa 0x3f281000 0xc000
ERROR: TEE-CORE: sect 4 : va 0 pa 0 0
ERROR: TEE-CORE: sect 5 : va 0 pa 0 0
ERROR: TEE-CORE: sect 6 : va 0 pa 0 0
ERROR: TEE-CORE: sect 7 : va 0 pa 0 0
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