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drivers: tzc380: add tzc380 driver #1578

Merged
merged 1 commit into from
Jun 12, 2017
Merged

drivers: tzc380: add tzc380 driver #1578

merged 1 commit into from
Jun 12, 2017

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MrVan
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@MrVan MrVan commented Jun 2, 2017

Add tzc380 driver support.

The usage:
Use tzc_init(vaddr_t base) to get the tzc380 configuration.
Use tzc_configure_region to configure the memory region,
such as "tzc_configure_region(5, 0x4e000000,
TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_32M) | TZC_ATTR_REGION_EN_MASK |
TZC_ATTR_SP_S_RW);"

An example for 6ULEVK:

        tzc_init(addr);

        tzc_configure_region(0, 0x00000000, TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_4G) | TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);
        tzc_configure_region(1, 0x80000000, TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_2G) | TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_NS_RW);
        tzc_configure_region(2, 0x9e000000, TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_32M) | TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_S_RW);
        tzc_configure_region(3, 0x9e000000, TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_2M) | TZC_ATTR_REGION_EN_MASK | TZC_ATTR_SP_ALL);

        tzc_dump_state();

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some minor comments but looks ok to me.

#define TZC_REGION_SIZE_16E (0x3f)

#define TZC_REGION_SIZE_SHIFT (0x1)
#define TZC_REGION_SIZE_MASK (0x3f << 1)
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#define TZC_REGION_SIZE_MASK GENMASK_32(7, 1);

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Fix in next version.

#define TZC_REGION_SIZE_MASK (0x3f << 1)
#define TZC_ATTR_REGION_SIZE(s) ((s) << TZC_REGION_SIZE_SHIFT)

#define TZC_ATTR()
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empty macro ?

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Drop this in next version. Thanks.

#define TZC_SP_NS_W (1 << 0)
#define TZC_SP_NS_R (1 << 1)
#define TZC_SP_S_W (1 << 2)
#define TZC_SP_S_R (1 << 3)
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#define TZC_SP_NS_W BIT(0) and so on


/* Speculation is enabled by default. */
#define SPECULATION_CTRL_WRITE_DISABLE (1 << 1)
#define SPECULATION_CTRL_READ_DISABLE (1 << 0)
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prefer use BIT(1) and BIT(0).

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Fix to use BIT for all the bits things in next version


#include <stdint.h>
#include <types_ext.h>
#include <trace_levels.h>
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shift type_ext.h below trace_levels.h

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Fix in next version.

DMSG("region_base: 0x%08x%08x", temp_32reg_h, temp_32reg);
temp_32reg = tzc_read_region_attributes(tzc.base, n);
DMSG("region sp: %x", temp_32reg >> TZC_ATTR_SP_SHIFT);
DMSG("region size: %x\n", (temp_32reg & TZC_REGION_SIZE_MASK) >> TZC_REGION_SIZE_SHIFT);
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style: exeeds 80 chars

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Fix in next version.

* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
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tzc400.c also includes an ARM-TF notice. Should it be dumped here also ?
* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved.

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There is no tzc380 support in ARM-TF.

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I was thinking of the tzc400.c from optee which is almost the same as this proposed tzc380.c.

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I take tzc400.c as a reference to implement tzc380 support. Simliar functions are implemented in tzc380. But code is not copied from tzc400.c. I am not sure the copyright is needed.

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ok. discard my comments. thanks.

@MrVan
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MrVan commented Jun 5, 2017

Updated with comments addressed.

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Some minor remaining comments. including several parenthesis that could be removed from core/include/drivers/tzc380.h.

Aside these: Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

static uint32_t addr_high(vaddr_t addr __unused)
{
#if (UINTPTR_MAX == UINT64_MAX)
return (addr >> 32);
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minor style: no need parenthesis

return (uint32_t)addr;
}

static uint32_t addr_high(vaddr_t addr __unused)
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minor: prefer __maybe_unused

temp_32reg = tzc_read_region_attributes(tzc.base, n);
DMSG("region sp: %x", temp_32reg >> TZC_ATTR_SP_SHIFT);
DMSG("region size: %x\n", (temp_32reg & TZC_REGION_SIZE_MASK)
>> TZC_REGION_SIZE_SHIFT);
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minor style: end line175 with the operator >>.

Add tzc380 driver support.

The usage:
Use tzc_init(vaddr_t base) to get the tzc380 configuration.
Use tzc_configure_region to configure the memory region,
such as "tzc_configure_region(5, 0x4e000000,
TZC_ATTR_REGION_SIZE(TZC_REGION_SIZE_32M) | TZC_ATTR_REGION_EN_MASK |
TZC_ATTR_SP_S_RW);"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
@MrVan
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MrVan commented Jun 10, 2017

@etienne-lms Updated.

@etienne-lms
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Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

@MrVan
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MrVan commented Jun 12, 2017

@etienne-lms tags already applied, thanks:)

@jforissier
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The failed build status is due to a timeout (Travis seems to be slower than usual today), the final check was almost complete so I'm merging this regardless.

@jforissier jforissier merged commit 4c56bf5 into OP-TEE:master Jun 12, 2017
@MrVan MrVan deleted the tzc380 branch September 29, 2017 02:26
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3 participants