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plat-ti: Configure and enable Secure Data Path by default #1815

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Sep 29, 2017
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7 changes: 7 additions & 0 deletions core/arch/arm/plat-ti/conf.mk
Original file line number Diff line number Diff line change
Expand Up @@ -3,6 +3,13 @@ PLATFORM_FLAVOR ?= dra7xx
CFG_WITH_STACK_CANARIES ?= y
CFG_WITH_STATS ?= y
CFG_WITH_SOFTWARE_PRNG ?= n
CFG_SECURE_DATA_PATH ?= y

ifeq ($(CFG_SECURE_DATA_PATH),y)
CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
else
CFG_TEE_SDP_MEM_SIZE ?= 0x0
endif

$(call force,CFG_8250_UART,y)
$(call force,CFG_ARM32_core,y)
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11 changes: 10 additions & 1 deletion core/arch/arm/plat-ti/platform_config.h
Original file line number Diff line number Diff line change
Expand Up @@ -153,9 +153,18 @@

#endif /* CFG_WITH_PAGER */

#if defined(CFG_SECURE_DATA_PATH)
/* Locate SDP memory at the end of TZDRAM */
#define CFG_TEE_SDP_MEM_BASE (TZDRAM_BASE + \
TZDRAM_SIZE - \
CFG_TEE_SDP_MEM_SIZE)
#endif

#define CFG_TA_RAM_START ROUNDUP((TZDRAM_BASE + CFG_TEE_RAM_VA_SIZE), \
CORE_MMU_DEVICE_SIZE)
#define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE), \

#define CFG_TA_RAM_SIZE ROUNDDOWN((TZDRAM_SIZE - CFG_TEE_RAM_VA_SIZE) - \
CFG_TEE_SDP_MEM_SIZE, \
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Sorry I missed something in my previous comment. You probably want CFG_TEE_SDP_MEM_SIZE set to 0x0 when CFG_SECURE_DATA_PATH != y? If so, plat-ti/conf.mk should contain:

ifeq ($(CFG_SECURE_DATA_PATH),y)
CFG_TEE_SDP_MEM_SIZE ?= 0x00400000
else
CFG_TEE_SDP_MEM_SIZE ?= 0x0
endif

Anyway:
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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I like that, updated.

CORE_MMU_DEVICE_SIZE)

/* Full GlobalPlatform test suite requires CFG_SHMEM_SIZE to be at least 2MB */
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