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Add xilinx a72 and a78 #206

Add xilinx a72 and a78

Add xilinx a72 and a78 #206

Triggered via pull request October 10, 2023 23:33
Status Failure
Total duration 24s
Artifacts 1

compliance.yml

on: pull_request
compliance review
14s
compliance review
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3 errors
compliance review: Checkpatch.txt#L1
CAMELCASE: Avoid CamelCase: <XScuGic_EnableIntr> File:lib/system/freertos/xlnx_common/sys.h Line:53 CAMELCASE: Avoid CamelCase: <vPortEnableInterrupt> File:lib/system/freertos/xlnx_common/sys.h Line:55 CAMELCASE: Avoid CamelCase: <XScuGic_DisableIntr> File:lib/system/freertos/xlnx_common/sys.h Line:62 CAMELCASE: Avoid CamelCase: <vPortDisableInterrupt> File:lib/system/freertos/xlnx_common/sys.h Line:64 LINE_SPACING: Please don't use multiple blank lines File:lib/system/generic/xlnx_common/sys.h Line:57
compliance review
Process completed with exit code 1.
compliance review
Process completed with exit code 1.

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compliance.xml Expired
1.55 KB