Max sample rate AD9288 100MS/s, OpenHantek6022 maxed out at 12MS/s?

[burntCherryCake]

Why is the OpenHantek6022 sample rate limited to 12MS/s (demo mode, release v3.3.3)?
The ADC can operate up to 100MS/s (each channel), CY7C68013A supports an IFCLK output of 1/20.83ns = 48.007...MHz. AD9288 takes 1 pulse on ENCa/b clock pins for each data sample. USB speed on the CY7C is rated for 480Mbit/s, or according to this comment on StackExchange, about 36Mbyte/s after USB data overhead is taken into account.

So the hardware limiting factor is the USB transfer speed. Still, I would expect the Hantek 6022 hardware to be able to transfer data at 36Mbyte/s, 3x the speed of the currently available 12Mbyte/s.

So I would like to know, what is the limiting factor for the 12MS/s data throughput? It can't be period jitter on the free-running XTAL clocking the CY7C, right?

[Vascom]

You need to set Time/div to 20 us or below and you will be able set rate 30 MS/s.
Also second channel must be disabled.

[burntCherryCake]

Aha. I had CH2 on.
But still, if you follow Nyquist exactly, 30MS/s is 15MHz BW.
The Hantek is spec'd for 20MHz, at 48MS/s. So is Hantek doing something that OpenHantek6022 isn't?

[Vascom]

It seems like marketing from Hantek.
Because USB 2.0 speed 480 Mbit/s is for duplex. So it is only 240 Mbit/s for one way - and it is only 30MB/s.

[Ho-Ro]

So is Hantek doing something that OpenHantek6022 isn't?

YES, Hantek is doing marketing, while Openhantek6022 tries do deliver reliable results. You can try to set the max. sample rate to 48 MHz in source code and look at the results :(
The CY7C68013A may deliver 480MBit/s during peak periods for one small memory block of 512 or 1024 bytes, but it will drop a lot of frames during longer run.

[burntCherryCake]

Thanks for the confirmation. That's unfortunate.
The dropped frames should be fixable, given enough work on the HW side to provide a synchronized external clock, synchronized to the PC time source, to the XTALIN pin, since "It is also correct to drive XTALIN with an external 24-MHz square wave derived from another clock source." -- datasheet.

For completeness, you may want to make a block diagram/map of the software code files and how they interconnect.
It appears that the functions controlling sample rates are somewhere in /src/hantekdso/capturing.cpp, but where to stick in a hardcoded value isn't too easy to track down.