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[BACKPORT] arch/stm32h7: add defines for USART clock selection #319

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Aug 6, 2024
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[BACKPORT] arch/stm32h7: add defines for USART clock selection #319

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13 changes: 13 additions & 0 deletions arch/arm/src/stm32h7/hardware/stm32h7x3xx_rcc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -568,8 +568,21 @@

#define RCC_D2CCIP2R_USART234578SEL_SHIFT (0) /* Bits 0-2 */
# define RCC_D2CCIP2R_USART234578SEL_MASK (7 << RCC_D2CCIP2R_USART234578SEL_SHIFT)
# define RCC_D2CCIP2R_USART234578SEL_RCC (0 << RCC_D2CCIP2R_USART234578SEL_SHIFT)
# define RCC_D2CCIP2R_USART234578SEL_PLL2 (1 << RCC_D2CCIP2R_USART234578SEL_SHIFT)
# define RCC_D2CCIP2R_USART234578SEL_PLL3 (2 << RCC_D2CCIP2R_USART234578SEL_SHIFT)
# define RCC_D2CCIP2R_USART234578SEL_HSI (3 << RCC_D2CCIP2R_USART234578SEL_SHIFT)
# define RCC_D2CCIP2R_USART234578SEL_CSI (4 << RCC_D2CCIP2R_USART234578SEL_SHIFT)
# define RCC_D2CCIP2R_USART234578SEL_LSE (5 << RCC_D2CCIP2R_USART234578SEL_SHIFT)
#define RCC_D2CCIP2R_USART16SEL_SHIFT (3) /* Bits 3-5 */
# define RCC_D2CCIP2R_USART16SEL_MASK (7 << RCC_D2CCIP2R_USART16SEL_SHIFT)
# define RCC_D2CCIP2R_USART16SEL_MASK (7 << RCC_D2CCIP2R_USART16SEL_SHIFT)
# define RCC_D2CCIP2R_USART16SEL_RCC (0 << RCC_D2CCIP2R_USART16SEL_SHIFT)
# define RCC_D2CCIP2R_USART16SEL_PLL2 (1 << RCC_D2CCIP2R_USART16SEL_SHIFT)
# define RCC_D2CCIP2R_USART16SEL_PLL3 (2 << RCC_D2CCIP2R_USART16SEL_SHIFT)
# define RCC_D2CCIP2R_USART16SEL_HSI (3 << RCC_D2CCIP2R_USART16SEL_SHIFT)
# define RCC_D2CCIP2R_USART16SEL_CSI (4 << RCC_D2CCIP2R_USART16SEL_SHIFT)
# define RCC_D2CCIP2R_USART16SEL_LSE (5 << RCC_D2CCIP2R_USART16SEL_SHIFT)
/* Bits 6-7: Reserved */
#define RCC_D2CCIP2R_RNGSEL_SHIFT (8) /* Bits 8-9 */
# define RCC_D2CCIP2R_RNGSEL_MASK (3 << RCC_D2CCIP2R_RNGSEL_SHIFT)
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18 changes: 18 additions & 0 deletions arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1006,6 +1006,24 @@ void stm32_stdclockconfig(void)
putreg32(regval, STM32_RCC_D2CCIP2R);
#endif

/* Configure USART2, 3, 4, 5, 7, and 8 kernel clock source selection */

#if defined(STM32_RCC_D2CCIP2R_USART234578_SEL)
regval = getreg32(STM32_RCC_D2CCIP2R);
regval &= ~RCC_D2CCIP2R_USART234578SEL_MASK;
regval |= STM32_RCC_D2CCIP2R_USART234578_SEL;
putreg32(regval, STM32_RCC_D2CCIP2R);
#endif

/* Configure USART1 and 6 kernel clock source selection */

#if defined(STM32_RCC_D2CCIP2R_USART16_SEL)
regval = getreg32(STM32_RCC_D2CCIP2R);
regval &= ~RCC_D2CCIP2R_USART16SEL_MASK;
regval |= STM32_RCC_D2CCIP2R_USART16_SEL;
putreg32(regval, STM32_RCC_D2CCIP2R);
#endif

/* Configure ADC source clock */

#if defined(STM32_RCC_D3CCIPR_ADCSRC)
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17 changes: 17 additions & 0 deletions arch/arm/src/stm32h7/stm32h7x7xx_rcc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -993,6 +993,23 @@ void stm32_stdclockconfig(void)
regval |= STM32_RCC_D2CCIP2R_USBSRC;
putreg32(regval, STM32_RCC_D2CCIP2R);
#endif
/* Configure USART2, 3, 4, 5, 7, and 8 kernel clock source selection */

#if defined(STM32_RCC_D2CCIP2R_USART234578_SEL)
regval = getreg32(STM32_RCC_D2CCIP2R);
regval &= ~RCC_D2CCIP2R_USART234578SEL_MASK;
regval |= STM32_RCC_D2CCIP2R_USART234578_SEL;
putreg32(regval, STM32_RCC_D2CCIP2R);
#endif

/* Configure USART1 and 6 kernel clock source selection */

#if defined(STM32_RCC_D2CCIP2R_USART16_SEL)
regval = getreg32(STM32_RCC_D2CCIP2R);
regval &= ~RCC_D2CCIP2R_USART16SEL_MASK;
regval |= STM32_RCC_D2CCIP2R_USART16_SEL;
putreg32(regval, STM32_RCC_D2CCIP2R);
#endif

/* Configure ADC source clock */

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