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@Patt-Senior-Design

Patt-Senior-Design

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  1. core-design core-design Public

    Out-of-Order RISC-V Core Design in Behavioral Verilog and RTL

    Verilog 7 1

  2. riscv-isa-sim riscv-isa-sim Public

    Forked from riscv-software-src/riscv-isa-sim

    Spike, a RISC-V ISA Simulator

    C

  3. DRAMsim3 DRAMsim3 Public

    Forked from umd-memsys/DRAMsim3

    DRAMsim3: a Cycle-accurate, Thermal-Capable DRAM Simulator

    C++

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