Merge branch 'rc-1.5.0'

PyHDI · Nov 25, 2018 · 14a9a1d · 14a9a1d
2 parents af11bf5 + 9a82dd8
commit 14a9a1d
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Showing 28 changed files with 3,325 additions and 70 deletions.
diff --git a/README.md b/README.md
@@ -69,8 +69,8 @@ sudo apt install iverilog
 - Jinja2: 2.10 or later
 - pytest: 3.2 or later
 - pytest-pythonpath: 0.7 or later
-- Pyverilog: 1.1.2 or later
-- IPgen: 1.0.0 or later
+- Pyverilog: 1.1.3 or later
+- IPgen: 1.0.1 or later
 
 ```
 pip3 install jinja2 pytest pytest-pythonpath pyverilog ipgen

diff --git a/README.rst b/README.rst
@@ -74,8 +74,8 @@ Requirements
 -  Jinja2: 2.10 or later
 -  pytest: 3.2 or later
 -  pytest-pythonpath: 0.7 or later
--  Pyverilog: 1.1.2 or later
--  IPgen: 1.0.0 or later
+-  Pyverilog: 1.1.3 or later
+-  IPgen: 1.0.1 or later
 
 ::
 

diff --git a/setup.py b/setup.py
@@ -5,7 +5,7 @@
 
 
 def read(filename):
-    return open(os.path.join(os.path.dirname(__file__), filename)).read()
+    return open(os.path.join(os.path.dirname(__file__), filename), encoding='utf8').read()
 
 
 m = re.search(r'(\d+\.\d+\.\d+(-.+)?)',
@@ -23,7 +23,7 @@ def read(filename):
       packages=find_packages(),
       package_data={'veriloggen.utils': ['VERSION'],
                     'veriloggen.simulation': ['*.cpp'], },
-      install_requires=['pyverilog>=1.1.2', 'ipgen>=1.0.0', 'Jinja2>=2.10'],
+      install_requires=['pyverilog>=1.1.3', 'ipgen>=1.0.1', 'Jinja2>=2.10'],
       extras_require={
           'graph': ['pygraphviz>=1.3.1'],
           'test': ['pytest>=3.2', 'pytest-pythonpath>=0.7'],

diff --git a/tests/extension/thread_/fixed_const/test_thread_fixed_const.py b/tests/extension/thread_/fixed_const/test_thread_fixed_const.py
@@ -110,7 +110,7 @@
           end
         end
         th_blink_5: begin
-          _th_blink_next_val_1 <= _th_blink_next_val_1 + 256;
+          _th_blink_next_val_1 <= _th_blink_next_val_1 + 'sd128;
           th_blink <= th_blink_6;
         end
         th_blink_6: begin

diff --git a/tests/extension/thread_/fixed_const/thread_fixed_const.py b/tests/extension/thread_/fixed_const/thread_fixed_const.py
@@ -29,8 +29,8 @@ def blink(times):
         led.value = 0
         next_val = vthread.fixed.FixedConst(0, 8)
         for i in range(times):
-            next_val = next_val + 1
-            led.value = next_val
+            next_val = next_val + vthread.fixed.FixedConst(0.5, 8)
+            led.value = next_val.int_part
             print("led = ", led)
 
     th = vthread.Thread(m, 'th_blink', clk, rst, blink)

diff --git a/tests/extension/thread_/ram_initval/Makefile → ...nsion/thread_/fixed_ram_initvals/Makefile b/tests/extension/thread_/ram_initval/Makefile → ...nsion/thread_/fixed_ram_initvals/Makefile