Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add supplementary information to transpiler module #4134

Merged
merged 20 commits into from
May 4, 2020
Merged

Add supplementary information to transpiler module #4134

merged 20 commits into from
May 4, 2020

Conversation

nonhermitian
Copy link
Contributor

Summary

Add supplementary information that was originally in the tutorials to the transpiler module.

Details and comments

@nonhermitian nonhermitian added the documentation Something is not clear or an error documentation label Apr 12, 2020
Comment on lines 414 to 418
Transpiler API
==============

Pass Management
===============
---------------
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Can we add transpiler.preset_passmanagers to the list of documented modules? There is helpful information in there about what exactly each level does, but right now it is not picked up by sphinx.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Sure.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This is already at the top-level of the documentation.

Comment on lines 72 to 74
We see that IBM Quantum devices support five native gates: four single-qubit gates
[`u1`, `u2`, `u3`, and `id`] and one two-qubit entangling gate `cx`. In addition, the
devices support qubit measurements (otherwise we can not read out an answer!).
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This whole section that goes into detail about u1,u2,u3,cx is a bit orthogonal to what the transpiler is. Those gates are already documented, here I think we should go into detail about different transpiler passes. Besides, these u gates are going to go obsolete soon: #4106

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Ok will cut out. Not sure how to reconcile the desire to talk about transpiler passes here with exposing them into the docs. Surely the passes module should discuss this. I can however link to the docs there and then the users would know exactly what is going on when someone gets around to making those docs.

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Passes are also already at top-level in the docs.

branches, and other complex behaviors. That being said, the basic building blocks
follow the structure given below:

.. image:: /source_images/transpiling_core_steps.png
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Can we change this to something more like:

Virtual circuit optimization
Decompose gates acting on 3 or more qubits
Placement on physical qubits ("layout")
Routing on restricted topology
Translate to basis
Physical circuit optimization

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

ok

@nonhermitian
Copy link
Contributor Author

@ajavadia the requested changes have been made.

Copy link
Member

@mtreinish mtreinish left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

LGTM for the most part, just the layout algorithm for preset pass managers needs to be updated

qiskit/transpiler/__init__.py Outdated Show resolved Hide resolved
needed to map a circuit onto a given device, is an important step (if not the most important)
in the whole execution process.

However, as with many important things in life, finding the optimal SWAP mapping is hard.
Copy link
Member

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Heh, this is a bit philosophical for documentation :)

Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Well it is supplementary material so all bets are off.

@nonhermitian
Copy link
Contributor Author

Blocked by #4241

@1ucian0
Copy link
Member

1ucian0 commented May 2, 2020

#4241 was closed. Is this ready?

@nonhermitian
Copy link
Contributor Author

Been ready for a while now.

@1ucian0
Copy link
Member

1ucian0 commented May 2, 2020

requesting approval from @ajavadia and @mtreinish in that case. Thanks!

@mergify mergify bot merged commit 1bd1f7b into Qiskit:master May 4, 2020
faisaldebouni pushed a commit to faisaldebouni/qiskit-terra that referenced this pull request Aug 5, 2020
* start adding transpiler docs

* add more docs

* add gate optim

* tweak docs

* more tweaks

* requested updates

* fix missing file

* remove extra breaks

* update default initial layout selections

* fix line too long

Co-authored-by: Luciano Bello <luciano.bello@ibm.com>
Co-authored-by: Matthew Treinish <mtreinish@kortar.org>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
documentation Something is not clear or an error documentation
Projects
None yet
Development

Successfully merging this pull request may close these issues.

4 participants