Merge #19276 #19279

19276: pkg/tinyusb: bump to 0.15 r=benpicco a=benpicco 19279: cpu/stm32/periph/i2c: export PERIPH_I2C_MAX_BYTES_PER_FRAME r=benpicco a=fabian18 Co-authored-by: Benjamin Valentin <benjamin.valentin@bht-berlin.de> Co-authored-by: Fabian Hüßler <fabian.huessler@st.ovgu.de>
RIOT-OS · Feb 14, 2023 · 1472a76 · 1472a76
3 parents a311b3f + 85ce068 + 26363e9
commit 1472a76
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Showing 4 changed files with 29 additions and 18 deletions.
diff --git a/cpu/stm32/include/periph/cpu_i2c.h b/cpu/stm32/include/periph/cpu_i2c.h
@@ -161,6 +161,19 @@ static const i2c_timing_param_t timing_params[] = {
             CPU_FAM_STM32G0 || CPU_FAM_STM32G4 || CPU_FAM_STM32U5 ||
             CPU_FAM_STM32WB || CPU_FAM_STM32WL */
 
+#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
+    defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32G0) || \
+    defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L0) || \
+    defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \
+    defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WB) || \
+    defined(CPU_FAM_STM32WL)
+/**
+ * @brief   The I2C implementation supports only a limited frame size.
+ *          See i2c_1.c
+ */
+#define PERIPH_I2C_MAX_BYTES_PER_FRAME  (256U)
+#endif
+
 #ifdef __cplusplus
 }
 #endif

diff --git a/cpu/stm32/periph/i2c_1.c b/cpu/stm32/periph/i2c_1.c
@@ -51,7 +51,6 @@
 #include "debug.h"
 
 #define TICK_TIMEOUT    (0xFFFF)
-#define MAX_BYTES_PER_FRAME (256)
 
 #define I2C_IRQ_PRIO    (1)
 #define I2C_FLAG_READ   (I2C_READ << I2C_CR2_RD_WRN_Pos)
@@ -217,7 +216,7 @@ int i2c_write_regs(i2c_t dev, uint16_t addr, uint16_t reg,
 int i2c_read_bytes(i2c_t dev, uint16_t address, void *data,
                    size_t length, uint8_t flags)
 {
-    assert(dev < I2C_NUMOF && length < MAX_BYTES_PER_FRAME);
+    assert(dev < I2C_NUMOF && length < PERIPH_I2C_MAX_BYTES_PER_FRAME);
 
     I2C_TypeDef *i2c = i2c_config[dev].dev;
     assert(i2c != NULL);
@@ -275,7 +274,7 @@ int i2c_write_bytes(i2c_t dev, uint16_t address, const void *data,
 static int _write(I2C_TypeDef *i2c, uint16_t addr, const void *data,
                     size_t length, uint8_t flags, uint32_t cr2_flags)
 {
-    assert(i2c != NULL && length < MAX_BYTES_PER_FRAME);
+    assert(i2c != NULL && length < PERIPH_I2C_MAX_BYTES_PER_FRAME);
 
     /* If reload was NOT set, must either stop or start */
     if ((i2c->ISR & I2C_ISR_TC) && (flags & I2C_NOSTART)) {

diff --git a/pkg/tinyusb/Makefile b/pkg/tinyusb/Makefile
@@ -1,7 +1,7 @@
 PKG_NAME=tinyusb
 PKG_URL=https://github.com/hathach/tinyusb
-# TinyUSB 0.14.0
-PKG_VERSION=9e91b02ec7fb3502747b5c413a4824654fa7fc7e
+# TinyUSB 0.15.0
+PKG_VERSION=86c416d4c0fb38432460b3e11b08b9de76941bf5
 
 PKG_LICENSE=MIT
 

diff --git a/pkg/tinyusb/patches/0002-src-portable-synopsys-define-SystemCoreClock-variabl.patch b/pkg/tinyusb/patches/0002-src-portable-synopsys-define-SystemCoreClock-variabl.patch
@@ -5,31 +5,30 @@ Subject: [PATCH 2/2] src/portable/synopsys: define SystemCoreClock variable
 
 DWC2 for STM32 uses the `SystemCoreClock` variable from CMSIS which is usually declared/defined in `system_stm32fxxx.{h,c}`and set when function SystemCoreClockUpdate is called. Since RIOT explicitely excludes these files, the variable is neither declared nor defined nor set correctly. Therefore, it is defined in `dwc2_stm32` and set to RIOT's `CLOCK_CORECLOCK` define.
 ---
- src/portable/synopsys/dwc2/dwc2_stm32.h | 4 +++-
- 1 file changed, 3 insertions(+), 1 deletion(-)
+ src/portable/synopsys/dwc2/dwc2_stm32.h | 3 +++
+ 1 file changed, 3 insertions(+)
 
 diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
-index 1187e0d6e..0c307322d 100644
+index cb455bd9..9564f879 100644
 --- a/src/portable/synopsys/dwc2/dwc2_stm32.h
 +++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
-@@ -82,6 +82,8 @@
-   #error "Unsupported MCUs"
+@@ -99,6 +99,8 @@
+   #define DWC2_EP_MAX   EP_MAX_FS
  #endif
 
 +#include "clk_conf.h"
 +
- // OTG HS always has higher number of endpoints than FS
- #ifdef USB_OTG_HS_PERIPH_BASE
-   #define DWC2_EP_MAX   EP_MAX_HS
-@@ -107,7 +109,7 @@ static const dwc2_controller_t _dwc2_controller[] =
- //--------------------------------------------------------------------+
+ // On STM32 for consistency we associate
+ // - Port0 to OTG_FS, and Port1 to OTG_HS
+ static const dwc2_controller_t _dwc2_controller[] =
+@@ -118,6 +120,7 @@ static const dwc2_controller_t _dwc2_controller[] =
 
- // SystemCoreClock is alrady included by family header
--// extern uint32_t SystemCoreClock;
+ // SystemCoreClock is already included by family header
+ // extern uint32_t SystemCoreClock;
 +static uint32_t SystemCoreClock = CLOCK_CORECLOCK;
 
  TU_ATTR_ALWAYS_INLINE
  static inline void dwc2_dcd_int_enable(uint8_t rhport)
 -- 
-2.17.1
+2.37.2